Method and device for realizing quick switching of optical module

Abstract

The application relates to the technical field of optical communication, in particular to a method and device for realizing rapid switching of an optical module. 2 The C polling fault detection mode binds the service fault alarm to the corresponding GPIO pin through the alarm mapping logic built in the signal processing unit, directly generates a level jump when the fault occurs, generates a fault interrupt signal to actively report the host, saves the polling waiting time, and greatly improves the response speed of the fault trigger; after receiving the fault interrupt signal, the logic device in the host directly drives the optical protection device to complete link protection switching, can realize ms or even us level switching, and the fault disposal link is shorter; the whole realizes instant fault identification and rapid switching, avoids link degradation and service interruption caused by the fact that the fault cannot be captured in time in the polling interval, and improves the reliability of the 800G coherent optical transmission link operation.

Description

Technical Field

[0001] This invention relates to the field of optical communication technology, and in particular to a method and apparatus for implementing rapid switching of optical modules. Background Technology

[0002] With single-wavelength 800G rates becoming the mainstream for long-distance transmission and data center interconnection, coherent optical modules are widely used due to their superior performance. However, various faults can occur within coherent optical modules. If these faults are not identified and addressed in a timely manner, they can lead to link performance degradation or even service interruption.

[0003] The DSP (Digital Signal Processing) in modern high-performance coherent optical modules can monitor a large number of internal parameters in real time and with high precision through built-in diagnostic functions. This rich state information is typically transmitted via I... 2 The C (Inter-Integrated Circuit) low-speed management interface is read by the host system in a polling manner. The inherent drawback of this polling method is that the polling period is relatively long, and faults that occur during the polling interval cannot be captured immediately, resulting in a significant delay in fault response.

[0004] Therefore, overcoming the shortcomings of the existing technology is an urgent problem to be solved in this technical field. Summary of the Invention

[0005] The technical problem to be solved by this invention is: existing coherent optical modules rely on I 2 The low-speed interface C polls and reads fault parameters, but there is a significant delay in fault capture. Faults occurring during the polling interval cannot be captured immediately, and link protection switching cannot be triggered quickly.

[0006] The present invention adopts the following technical solution: Firstly, a method for implementing fast optical module switching is provided, including: Configure alarm mapping logic in the signal processing unit of the optical module to bind service fault alarms to the corresponding GPIO (General Purpose Input / Output) pins; The GPIO pins of the signal processing unit are connected to the logic unit inside the optical module. When the signal processing unit receives a configured service fault alarm, the corresponding GPIO pin will show a level transition. The logic unit will send a fault interrupt signal to the host according to the level transition. The logic devices in the host drive the optical protection devices according to the fault interruption signal, thereby completing the protection switching of the link.

[0007] Preferably, configuring alarm mapping logic in the signal processing unit of the optical module to bind service fault alarms to corresponding GPIO pins specifically includes: Configure the alarm mapping logic in the internal register of the signal processing unit, and filter out key fault events that will cause service interruption and link degradation as service fault alarms; The service fault alarms are bound to independent GPIO pins of the signal processing unit. When any bound service fault alarm is activated, the level of the corresponding GPIO pin is pulled high; when the service fault alarm is cleared, the level of the corresponding GPIO pin is reset to low.

[0008] Preferably, when the signal processing unit triggers the configured service fault alarm, the corresponding GPIO pin experiences a level transition, and the logic unit sends a fault interrupt signal to the host according to the level transition, specifically including: The logic unit continuously collects the level status of the GPIO pins; If the level of the corresponding GPIO pin changes to a high level, it is determined that there is a corresponding service fault alarm. The logic unit generates a fault interrupt signal and transmits it to the host through the gold finger of the optical module. If the level of the corresponding GPIO pin is detected to return to low, the logic unit cancels the output of the fault interrupt signal.

[0009] Preferably, the logic devices in the host drive the optical protection devices according to the fault interruption signal, thereby completing the protection switching of the link, specifically including: The logic device in the host generates a switching instruction based on the fault interruption signal, and the optical protection device cuts off the current faulty main optical path based on the switching instruction and switches the service traffic to the backup optical path. When the fault interruption signal is removed, the host-side logic device issues a recovery command, and the optical protection device switches back to the original main optical path.

[0010] Preferably, the method further includes: After receiving a level transition of any GPIO pin, the logic unit writes the service fault alarm type identifier corresponding to the GPIO pin that has experienced the level transition into the alarm status register, and outputs a fault interrupt signal to the host. After receiving the fault interruption signal, the logic device in the host drives the optical protection device to perform link protection switching. After the link protection switching is completed, the host reads the alarm status register of the logic unit through the management interface to obtain the service fault alarm type identifier, and executes the corresponding fault recovery strategy according to the obtained service fault alarm type identifier. Once the voltage levels of all triggered GPIO pins return to low, the logic unit clears the service fault alarm type identifier in the alarm status register.

[0011] Preferably, the method further includes: The optical module has an interrupt reset multiplexing pin on its gold fingers. An external separation circuit is set inside the optical module. The external separation circuit electrically isolates the interrupt signal and reset signal carried on the interrupt reset multiplexing pin and separates them into independent interrupt signal paths and reset signal paths. The fault interrupt signal generated by the logic unit is transmitted only through the separated interrupt signal path, and the interrupt reset multiplexing pin is reused as an external output channel to transmit the fault interrupt signal to the host via the gold finger.

[0012] Preferably, the service fault alarm includes one or more of the following: SD (Signal Degrade) alarm, SF (Signal Fail) alarm, receive power alarm, DSP lockout alarm, and Pre-FEC (Pre Forward Error Correction) alarm with bit error rate exceeding the threshold.

[0013] Preferably, the logic unit is a CPLD (Complex Programmable Logic Device) or an FPGA (Field Application FPGA). Programmable Gate Array).

[0014] In a second aspect, a fast optical module switching device is provided to implement the fast optical module switching method described in the first aspect, the device comprising an optical module and a host. The optical module includes a signal processing unit and a logic unit; The signal processing unit is internally configured with alarm mapping logic, which is used to bind service fault alarms to their corresponding GPIO pins; the GPIO pins of the signal processing unit are connected to the logic unit. The logic unit is used to receive the GPIO pin level in real time, and output a fault interrupt signal to the host when the GPIO pin of the signal processing unit undergoes a level transition. The logic device of the host is electrically connected to the optical protection device. The logic device is used to receive the fault interruption signal and drive the optical protection device to perform link protection switching.

[0015] Preferably, the optical module further includes a microcontroller unit, which communicates with the signal processing unit via an SPI bus.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention abandons low-speed I 2 The C-polling fault detection mode binds service fault alarms to corresponding GPIO pins through the alarm mapping logic built into the signal processing unit. When a fault occurs, a level transition is directly generated and the logic unit generates a fault interrupt signal to actively report to the host, eliminating the polling waiting time and significantly improving the fault trigger response speed. After receiving the fault interrupt signal, the logic devices in the host directly drive the optical protection devices to complete the link protection switching, which can achieve switching at the millisecond or even microsecond level, resulting in shorter fault handling links. Overall, it realizes real-time fault identification and rapid switching, avoiding link degradation and service interruption caused by the failure to capture faults in time within the polling interval, and improving the reliability of 800G coherent optical transmission link operation. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a conventional OSFP optical module provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of a structure for switching between an existing OSFP optical module and a host, provided by an embodiment of the present invention; Figure 3 This is a flowchart illustrating a method for implementing fast optical module switching according to an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of an OSFP optical module provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of a switching structure between an OSFP optical module and a host provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the processing flow of a signal processing unit provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the processing flow of a logic unit provided in an embodiment of the present invention; Figure 8 This is a schematic diagram illustrating the workflow of a host computer and an optical protection device according to an embodiment of the present invention; Figure 9 This is a schematic diagram of the external pins of an OSFP optical module provided in an embodiment of the present invention. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0020] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as openly inclusive, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "example," "specific example," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples; that is, although they may be incorporated into embodiments or examples using the above terms for reasons such as order and position, it does not limit them to be incorporated in combination by a single embodiment or example.

[0021] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more. Furthermore, for example, the description may use the prefix "A" or "B" to describe the same type of nouns as two independent entities. In this case, the corresponding features defined with "A" and "B" are used only to distinguish between similar entities and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features.

[0022] In describing some embodiments, the terms "coupled," "coupled," and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the terms "connected" or "coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other, such as "optical coupling," "wireless connection," etc. The embodiments disclosed herein are not necessarily limited to the scope of this invention.

[0023] Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0024] Example 1: As single-wavelength 800G rates become the mainstream for long-distance transmission and data center interconnection, coherent optical modules based on OSFP (Octal Small Form Factor Pluggable) packaging are widely used due to their superior performance.

[0025] Since the OSFP optical module only has 60 pins, there are no additional pins for trigger signals in the event of a switching scenario. For example... Figure 1 As shown, when a service fault alarm occurs in the signal processing unit, it first reports it to the microcontroller unit via the SPI bus, and then the microcontroller unit reports it via I... 2 C reports to the host.

[0026] like Figure 2 As shown, the time it takes for the host to send a switchover request to the corresponding OP (Optical Protect) device through the cross-board bus of the internal logic device is already on the order of hundreds of milliseconds, which cannot meet the switchover requirements of the optical transmission network.

[0027] Against this backdrop, backbone networks carrying critical services have extremely stringent reliability requirements, with fault recovery times needing to be at the millisecond or even microsecond level. Based on traditional OSFP optical modules via I... 2 The C-method of reading registers for protection switching polling has a relatively long cycle, and faults occurring during the polling interval cannot be immediately detected, resulting in significant delays in fault response. Furthermore, the control unit needs to communicate with the OP device via a cross-board bus to perform switching, increasing the switching time. This embodiment primarily addresses the issues of delayed alarm reporting and insufficient switching time in optical modules.

[0028] To address the aforementioned problems, this embodiment proposes a method for fast optical module switching. In one implementation, such as... Figure 3 and Figure 4 As shown, it includes: Step 101: Configure alarm mapping logic in the signal processing unit of the optical module to bind service fault alarms to the corresponding GPIO pins.

[0029] The signal processing unit is a built-in digital signal processing unit within the optical module, possessing the ability to monitor the internal operating parameters of the optical module in real time and identify various fault states. The alarm mapping logic is rule-based logic pre-configured in the internal registers of the signal processing unit, used to establish a one-to-one correspondence between fault events and GPIO pins. The service fault alarm indicates a fault event that directly causes transmission link degradation and service interruption.

[0030] The GPIO pins are hardware level output pins built into the signal processing unit (e.g., ...). Figure 4 The SF_ALARM, SD_ALARM, and service-related_ALARM in the model can intuitively reflect the fault status through high and low levels. In this embodiment, all service fault alarms are pre-screened, and each type of service fault alarm is bound to an independent GPIO pin through alarm mapping logic. This establishes a mapping channel from fault status to hardware level output. When a fault is triggered subsequently, the status signal can be directly output through the GPIO pin, without relying on registers to store fault information and waiting for the host to read it.

[0031] Step 102: The GPIO pin of the signal processing unit is connected to the logic unit inside the optical module. When the signal processing unit receives the configured service fault alarm, the corresponding GPIO pin will show a level transition. The logic unit will send a fault interrupt signal to the host according to the level transition.

[0032] Specifically, the GPIO pin of the signal processing unit, which is bound to the service fault alarm, is physically connected to the internal logic unit of the optical module to achieve zero-delay transmission of fault level signals. The logic unit is a programmable logic device within the optical module responsible for level acquisition and interrupt signal generation, capable of continuously acquiring the output level of the GPIO pin in real time. In one embodiment, the logic unit is a CPLD (Complex Programmable Logic Device) or an FPGA (Field Programmable Gate Array).

[0033] When the signal processing unit detects any bound service fault alarm during the operation of the optical module, the corresponding GPIO pin will experience a level transition. The logic unit captures this level transition in real time, immediately generates a fault interrupt signal, and sends it directly to the host (e.g., via the optical module's external connection channel). Figure 4The fault interrupt signal is transmitted to the INT / RSTn circuit through the IO_INT pin of the logic unit and to the host through CONNECT; the fault interrupt signal is an active reporting hardware notification signal, which can synchronize the fault event to the host side without host polling.

[0034] Step 103: The logic devices in the host drive the optical protection devices according to the fault interruption signal, thereby completing the protection switching of the link.

[0035] Among them, such as Figure 5 As shown, the host is an upper-level transmission device that carries the optical module. The host integrates logic devices and is connected to optical protection devices (such as OP devices) externally. The logic device is a host-side signal identification and control output unit that can receive fault interruption signals sent by the optical module in real time. The optical protection device is a hardware component responsible for optical path switching and is used to realize the switching operation of the primary and backup transmission links.

[0036] In one implementation, once the logic device in the host detects a fault interruption signal, it can determine that the optical module has a fault that affects the service. Then, it directly outputs the corresponding instruction to drive the optical protection device to perform a switching action, such as cutting off the current faulty service link and switching the service data to the backup link, thereby completing the link protection switching operation and avoiding the continuous fault causing a long-term service interruption.

[0037] In one embodiment, this embodiment can be illustrated using an OSFP-packaged coherent optical module as an example. In other embodiments, the optical module can also adopt other mainstream pluggable packaging forms such as SFP (Small Form-factor Pluggable), SFP+ (Small Form-factor Pluggable Plus), QSFP (Quad Small Form-factor Pluggable), and QSFP-DD (Quad Small Form-factor Pluggable Double Density). This method is not limited by the specific packaging specifications of the optical module. It only needs to ensure that the optical module is equipped with a signal processing unit with alarm monitoring capabilities and a logic unit for level acquisition and interrupt output. At the same time, the host side is equipped with logic devices and external optical protection devices. This method can be reused to realize active hardware fault reporting and rapid link protection switching.

[0038] Meanwhile, the service fault alarms identified in this embodiment include SD signal degradation alarm, SF signal failure alarm, receive power alarm, DSP lockout alarm, and Pre-FEC bit error rate exceeding threshold alarm. In other embodiments, the types of service fault alarms bound in the alarm mapping logic can be flexibly adjusted according to the service level requirements of the transmission network, and the fault events that need to be reported by hardware can be added or removed to adapt to the use scenarios of optical communication links with different rates and different transmission distances.

[0039] The following section will provide a detailed explanation of the steps involved in implementing the fast switching method for optical modules.

[0040] To achieve rapid hardware reporting of optical module faults and avoid traditional I / O... 2 The C-polling method suffers from drawbacks such as large sampling delay and untimely fault detection. In one implementation, for example... Figure 6 As shown, configuring alarm mapping logic in the signal processing unit of the optical module to bind service fault alarms to corresponding GPIO pins specifically includes: Step 1011: Configure the alarm mapping logic in the internal register of the signal processing unit, and filter out key fault events that will cause service interruption and link degradation as service fault alarms.

[0041] Specifically, the signal processing unit is a DSP (Digital Signal Processing), which is the core computing and status monitoring unit of the optical module. It can collect various operating parameters of the optical module in real time, such as optical path transmission, signal demodulation, and bit error rate verification. The internal register of the signal processing unit is a storage unit inside the DSP used to store configuration rules, operating parameters, and alarm status, and supports user-defined configuration logic rules. The alarm mapping logic is a dedicated logic rule generated based on the configuration of the internal register, which is used to establish the correspondence between optical module fault events and hardware pin status.

[0042] In one implementation, this embodiment initializes the alarm mapping logic by configuring parameters in the DSP's internal registers. Simultaneously, by combining the service operation characteristics of the 800G high-speed coherent optical transmission network, it accurately identifies core fault events that can directly lead to transmission link performance degradation, data transmission anomalies, and service interruptions. These high-impact fault events are uniformly defined as service fault alarms, while minor interference faults that do not affect the operation of core services are eliminated. This approach identifies fault types that require rapid hardware reporting from the source, ensuring the targetedness and effectiveness of fault monitoring.

[0043] Step 1012: Bind the service fault alarm to an independent GPIO pin of the signal processing unit. When any bound service fault alarm is activated, the level of the corresponding GPIO pin is pulled high.

[0044] The effective level of the service fault alarm can be selected as either high or low according to the hardware configuration. When any bound service fault alarm is activated, the corresponding GPIO pin outputs an effective alarm level, which can be either a high level after being pulled high or a low level after being pulled low.

[0045] The GPIO pins are dedicated general-purpose hardware input / output pins for the DSP, featuring high / low level switching output functionality. They provide intuitive and real-time feedback on fault status through hardware level indication. Based on the filtering of service fault alarms, a pre-defined alarm mapping logic binds each type of service fault alarm to a unique and independent GPIO pin on the DSP, forming a dedicated mapping relationship between a single fault and a single pin. This avoids the problems of indistinguishable fault types and signal corruption caused by multiple faults sharing pins.

[0046] When the optical module is in operation, the DSP detects that any type of bound service fault alarm is activated. When the fault event is triggered, the corresponding GPIO pin will be immediately triggered to toggle the level, for example, from the normal low level to the high level (or from the high level to the low level). The fault status is synchronized in real time through the intuitive change of hardware level, realizing the hardware-based instant feedback of fault events, without relying on software registers to store fault data and wait for the host to poll and read it.

[0047] Step 1013: When the service fault alarm is cleared, the level of the corresponding GPIO pin is reset to low.

[0048] When the internal fault of the optical module is self-healed or external operation and maintenance intervention is completed, the DSP will monitor in real time that the corresponding service fault alarm is cleared and the link operation status is restored to normal. Then, it will control the corresponding GPIO pin that is in a high-level state to automatically reset and fall back to the normal low level through the pre-configured alarm mapping logic.

[0049] The aforementioned dynamic level reset mechanism can provide real-time feedback on the fault recovery status of the optical module. This not only provides accurate hardware basis for the host side to cancel the fault interruption signal and restore normal link services, but also ensures that the GPIO pin level can change normally when a new fault is triggered, thus ensuring the stable operation of the entire fault monitoring, reporting and recovery mechanism.

[0050] To achieve zero-delay fault status identification and proactively push fault notifications to the host, thus breaking away from traditional I / O... 2 The response latency issue caused by C-polling to read alarms can be addressed in one implementation, such as... Figure 7 As shown, when the signal processing unit triggers the configured service fault alarm, the corresponding GPIO pin experiences a level transition. The logic unit sends a fault interrupt signal to the host based on the level transition, specifically including: Step 1021: The logic unit continuously acquires the level status of the GPIO pins.

[0051] The logic unit is a programmable logic device built into the optical module, which can continuously perform level sampling operations with a fixed working clock; the GPIO pin is a hardware channel for the signal processing unit to output fault status, and its high or low level directly represents the activation status of the corresponding service fault alarm.

[0052] The logic unit is physically connected to the GPIO pin of the signal processing unit. During the operation of the optical module, the logic unit will continuously and cyclically sample the output level of the GPIO pin in real time, and keep monitoring the fault level signal throughout the process. There is no polling interval blank period, which can capture any level change generated by the GPIO pin in the first time, laying the hardware sampling foundation for rapid fault identification.

[0053] Step 1022: If the level of the corresponding GPIO pin is detected to jump to a high level, it is determined that there is a corresponding service fault alarm. The logic unit generates a fault interrupt signal and transmits it to the host through the gold finger of the optical module.

[0054] It should be noted that, Figure 4 The INT / RSTn circuit shown is not a physical solder pad on the optical module's gold fingers, but rather an external discrete circuit integrated inside the optical module. The IO_INT level signal output by the logic unit is not directly connected to the gold fingers, but first enters the INT / RSTn circuit for signal processing.

[0055] The INT / RSTn circuit provides electrical isolation and path separation between the interrupt signal output from the logic unit and the reset signal output from the microcontroller unit, ensuring that the two signals do not interfere with each other when multiplexing the same gold finger pin. After processing by the INT / RSTn circuit, the fault interrupt signal from the logic unit is transmitted through the interrupt signal output path of this circuit module to the INT / RSTn physical pad on the gold finger, and is transmitted to the logic device on the host side in the form of a level signal, thereby triggering the host to perform protection switching.

[0056] When the logic unit samples and detects that a GPIO pin changes from a normal low level to a high level, it can accurately determine, based on the pre-configured alarm mapping relationship, that the current optical module has triggered a service fault alarm bound to the corresponding GPIO pin. The fault interrupt signal is a hardware-level notification signal generated by the logic unit, distinct from software register reporting information, and does not require active querying by the host. After generating the fault interrupt signal, the logic unit directly transmits the signal through the optical module's external interface with the host, actively pushing the fault event to the host side. This eliminates the need for the host to repeatedly read the module registers, significantly reducing fault reporting time.

[0057] Step 1023: If the level of the corresponding GPIO pin is detected to return to low, the logic unit cancels the output of the fault interrupt signal.

[0058] Specifically, canceling the output fault interrupt signal means that when the logic unit detects that the level of the GPIO pin that previously triggered the alarm has returned from high to low, the logic unit pulls the output level of its IO_INT pin back from a valid high level to an invalid low level. Since IO_INT is a level-triggered signal, the host side always considers the fault interrupt valid during the high-level duration. When the IO_INT level returns to low, the level signal transmitted to the INT / RSTn pads of the gold finger via the INT / RSTn circuit synchronously returns to an invalid state. The host-side logic device no longer recognizes a valid fault interrupt, meaning the fault interrupt signal is canceled. At this time, the system returns to a ready state and can respond to the next service fault alarm event.

[0059] When the signal processing unit detects that the service fault alarm has been cleared, the GPIO pin level falls back to the normal low level. After the logic unit continuously samples and captures this level change, it will synchronously terminate and cancel the fault interrupt signal currently being transmitted outward.

[0060] In one implementation, when the host side cannot detect the fault interruption signal through the gold finger, it can be determined that the fault of the optical module has been eliminated, providing an accurate hardware basis for the host to control the optical protection device to switch back to the original main service link, and ensuring that the entire fault monitoring, interruption reporting and fault recovery mechanism can work continuously in a loop.

[0061] Furthermore, the OSFP MSA optical module packaging specification defines a pin shared by interrupt and reset. These pins can be separated using external circuitry. The traditional design purpose of the interrupt pin is to provide a hardware-level emergency event notification signal to the host. Currently, the default usage of this interrupt pin is extremely simple; any alarm occurring within the module triggers an interrupt sent to the host, which has significant limitations. Based on the above, in one implementation, referring to... Figure 4 and Figure 5 The method for implementing rapid switching of the optical module further includes: the gold fingers of the optical module are provided with interrupt reset multiplexing pins, and an external separation circuit is set inside the optical module. The external separation circuit electrically isolates the interrupt signal and reset signal carried on the interrupt reset multiplexing pin and splits them into independent interrupt signal paths and reset signal paths. The fault interrupt signal generated by the logic unit is transmitted only through the separated interrupt signal path, and the interrupt reset multiplexing pin is reused as an external output channel to transmit the fault interrupt signal to the host via the gold fingers.

[0062] Furthermore, refer to Figure 4 As shown, the OSFP optical module has an INT / RSTn pin on its gold fingers. This pin is an interrupt / reset multiplexed pin, meaning that the interrupt signal (INT) and the reset signal (RSTn) share the same physical pad for external transmission. In traditional solutions, if the interrupt signal and the reset signal share the same pin and there is no internal isolation within the module, there is a risk of crosstalk between the two signals: for example, a low-level reset pulse sent by the host may be misinterpreted by the logic unit as an interrupt cancellation, or a high-level interrupt signal output by the logic unit may block the microcontroller from receiving the reset command.

[0063] To solve the above problems, this embodiment sets up an external separation circuit inside the optical module, namely... Figure 4 The INT / RSTn circuit is shown in the diagram. The peripheral separation circuit is connected between the INT / RSTn multiplexed pin of the gold finger and the internal functional unit of the module. Its function is to electrically isolate the interrupt signal and reset signal carried on the multiplexed pin, splitting the originally multiplexed single physical channel into two independent signal paths within the module: one is the interrupt signal path, which starts from the IO_INT pin of the logic unit, passes through the interrupt output channel of the peripheral separation circuit, and drives the INT / RSTn pad of the gold finger to output a fault interrupt signal to the host.

[0064] The second is the reset signal path: the reset command issued by the host is received from the INT / RSTn pad of the gold finger, and transmitted to the IO_RSTn pin of the microcontroller unit through the reset input channel of the peripheral separation circuit to perform the module reset operation.

[0065] The peripheral separation circuit ensures, through directional control and electrical isolation means (such as tri-state buffers, level converters, or diode isolation), that the interrupt signal path only allows unidirectional output from inside the module to the outside, and the reset signal path only allows unidirectional input from outside to inside the module, and the two paths do not affect each other electrically.

[0066] Based on the above design, the fault interrupt signal generated by the logic unit is transmitted only through the separated interrupt signal path, using the INT / RSTn pin of the gold finger as the external output channel to transmit the fault interrupt signal to the host-side logic device. Simultaneously, the reset command issued by the host is transmitted to the microcontroller unit only through the separated reset signal path, without interfering with the interrupt output of the logic unit. This external separation circuit achieves complete decoupling of the interrupt signal and reset signal within the module without increasing the number of gold finger pins, thus being compatible with the pin allocation specifications defined by the OSFP standard and meeting the requirement of independent and reliable transmission of the fault interrupt signal in this embodiment.

[0067] Furthermore, since the logic unit outputs a fault interrupt signal externally only through a single IO_INT pin, and this signal is a level signal, the host side cannot directly distinguish the specific service fault alarm type based solely on the high or low level of this signal. Therefore, this embodiment adopts a two-stage processing mechanism of switching first and then identifying.

[0068] In one embodiment, the method for implementing the fast switching of the optical module further includes: after the logic unit receives a level transition of any GPIO pin, it writes the service fault alarm type identifier corresponding to the GPIO pin that experienced the level transition into the alarm status register and outputs a fault interrupt signal to the host; after the logic device in the host receives the fault interrupt signal, it drives the optical protection device to perform link protection switching; after the link protection switching is completed, the host reads the alarm status register of the logic unit through the management interface to obtain the service fault alarm type identifier, and executes the corresponding fault recovery strategy according to the obtained service fault alarm type identifier; when the voltage levels of all triggered GPIO pins return to low level, the logic unit clears the service fault alarm type identifier in the alarm status register.

[0069] The first stage is the rapid switching stage: after the logic unit detects a level transition on any GPIO pin, it immediately pulls IO_INT high to output a fault interrupt signal. Upon receiving the interrupt signal, the host-side logic device immediately and indiscriminately drives the optical protection device to perform protection switching, cutting off the faulty main optical path and switching the service to the backup optical path, ensuring uninterrupted service. This stage does not rely on alarm type judgment, and the response speed is only constrained by the hardware level transmission delay, reaching the microsecond level.

[0070] The second phase is the alarm identification and differentiated recovery phase: After the first phase of failover is completed and the service is protected, the host uses I... 2The C management interface reads the alarm status register inside the logic unit. This register records the service fault alarm type identifiers corresponding to all GPIO pins that have experienced level transitions, allowing the host to accurately determine the specific alarm type currently triggered. Based on different alarm types, the host can execute differentiated recovery strategies: for example, for SF signal failure alarms, the host must wait for the link to fully recover before switching back to the original main optical path; for SD signal degradation alarms, the host can automatically switch back after the signal quality improves to a preset threshold; for Pre-FEC bit error rate exceeding the threshold alarms, a performance degradation monitoring timer can be triggered in conjunction with the alarm to determine whether to switch back.

[0071] The above solution decouples the switching speed from the alarm identification accuracy. The switching action is directly triggered by a hardware interrupt without waiting for any software judgment process, thus ensuring the optimal switching speed. The alarm type identification is completed by reading the register after the switching. Its reading delay does not affect the timeliness of service protection and is only used to guide recovery strategies and operation and maintenance alarm records.

[0072] When the corresponding GPIO pin level returns to low, the logic unit automatically clears the corresponding flag bit in the alarm status register; when all flag bits are cleared, the IO_INT pin level is reset to low, the fault interrupt signal is withdrawn, and the system returns to the ready state to wait for the next fault event.

[0073] The logic devices in the host drive the optical protection devices according to the fault interruption signal, thereby completing the protection switching of the link. In one embodiment, such as... Figure 5 and Figure 8 As shown, the logic devices in the host drive the optical protection devices according to the fault interruption signal, thereby completing the protection switching of the link, specifically including: Step 1031: The logic device in the host generates a switching instruction according to the fault interruption signal, and the optical protection device cuts off the current faulty main optical path according to the switching instruction and switches the service traffic to the backup optical path.

[0074] The host is a host transmission device equipped with optical modules. The logic device is a hardware processing unit on the host side used for signal analysis and control signal output, capable of receiving fault interruption signals transmitted by the optical modules via the gold fingers in real time. The fault interruption signal is a hardware fault notification actively pushed by the optical modules. When the logic device captures the fault interruption signal, it can determine that the optical modules have caused a fault affecting services. The switching instruction is a hardware control signal output by the logic device, used to directly control the optical protection device to perform optical path switching. The optical protection device is a hardware component inside the host that implements optical path switching and is responsible for switching the primary and backup transmission optical paths.

[0075] In one implementation, after the logic device detects a fault interruption signal, it can generate a switchover command locally and send it to the optical protection device without interacting across the backplane bus. After receiving the switchover command, the optical protection device immediately disconnects the faulty main optical path carrying the service and simultaneously transfers all service traffic to the pre-configured backup optical path, blocking the continuous transmission of data through the faulty link and avoiding large-scale service interruption caused by link degradation.

[0076] Step 1032: After the fault interruption signal is withdrawn, the host-side logic device issues a recovery command, and the optical protection device switches back to the original main optical path.

[0077] The cancellation of the fault interrupt signal indicates that the internal service fault alarm of the optical module has been cleared, the GPIO pin returns to the normal low level, and the logic unit stops pushing the fault interrupt signal outward. After the logic device on the host side can no longer detect the fault interrupt signal, it determines that the transmission link fault has been repaired, and then generates a recovery command and sends it to the optical protection device.

[0078] After receiving the recovery command, the optical protection device disconnects the backup optical path and reconnects the original main optical path, switching the service traffic from the backup optical path back to the original main optical path. The transmission link is restored to its initial working state, and the entire process can be reused cyclically.

[0079] In summary, this embodiment abandons low-speed I 2 The C-polling fault detection mode binds service fault alarms to corresponding GPIO pins through the alarm mapping logic built into the signal processing unit. When a fault occurs, a level transition is directly generated and the logic unit generates a fault interrupt signal to actively report to the host, eliminating the polling waiting time and significantly improving the fault trigger response speed. After receiving the fault interrupt signal, the logic devices in the host directly drive the optical protection devices to complete the link protection switching, which can achieve switching at the millisecond or even microsecond level, resulting in shorter fault handling links. Overall, it realizes real-time fault identification and rapid switching, avoiding link degradation and service interruption caused by the failure to capture faults in time within the polling interval, and improving the reliability of 800G coherent optical transmission link operation.

[0080] Example 2: This embodiment proposes a fast optical module switching device to implement the fast optical module switching method described in Embodiment 1. In one embodiment, refer to... Figure 4 and Figure 5As shown, the device includes an optical module and a host; the optical module includes a signal processing unit and a logic unit; the signal processing unit is internally configured with alarm mapping logic for binding service fault alarms to their corresponding GPIO pins; the GPIO pins of the signal processing unit are connected to the logic unit; the logic unit is used to receive the GPIO pin level in real time, and outputs a fault interrupt signal to the host when the signal processing unit triggers a service fault alarm and the GPIO pin level changes; the logic device of the host is electrically connected to the optical protection device, and the logic device is used to receive the fault interrupt signal and drive the optical protection device to perform link protection switching. In one embodiment, refer to... Figure 4 The optical module also includes a microcontroller unit, which communicates with the signal processing unit via an SPI bus.

[0081] The signal processing unit is a built-in unit of the optical module, possessing the ability to monitor the internal operating parameters of the optical module in real time and identify various fault states. The alarm mapping logic is a set of rule logic pre-configured in the internal registers of the signal processing unit, used to establish a one-to-one correspondence between fault events and GPIO pins. The service fault alarm refers to various fault events that directly cause transmission link degradation and service interruption.

[0082] The GPIO pins are hardware level output pins built into the signal processing unit (e.g., ...). Figure 4 The SF_ALARM, SD_ALARM, and service-related_ALARM in the model can intuitively reflect the fault status through high and low levels. In this embodiment, all service fault alarms are pre-screened, and each type of service fault alarm is bound to an independent GPIO pin through alarm mapping logic. This establishes a mapping channel from fault status to hardware level output. When a fault is triggered subsequently, the status signal can be directly output through the GPIO pin, without relying on registers to store fault information and waiting for the host to read it.

[0083] The signal processing unit is physically connected to the GPIO pin of the service fault alarm and the internal logic unit of the optical module to achieve zero-delay transmission of fault level signals. The logic unit is a programmable logic device inside the optical module responsible for level acquisition and interrupt signal generation, capable of continuously acquiring the output level of the GPIO pin in real time. In one embodiment, the logic unit is a CPLD or FPGA programmable logic device.

[0084] When the signal processing unit detects any bound service fault alarm during the operation of the optical module, the corresponding GPIO pin will experience a level transition. The logic unit captures this level transition in real time, immediately generates a fault interrupt signal, and sends it directly to the host (e.g., via the optical module's external connection channel). Figure 4The fault interrupt signal is transmitted to the INT / RSTn circuit through the IO_INT pin of the logic unit and to the host through CONNECT; the fault interrupt signal is an active reporting hardware notification signal, which can synchronize the fault event to the host side without host polling.

[0085] like Figure 5 As shown, the host is an upper-level transmission device that carries the optical module. The host integrates logic devices and is connected to optical protection devices (such as OP devices) externally. The logic device is a host-side signal identification and control output unit that can receive fault interruption signals sent by the optical module in real time. The optical protection device is a hardware component responsible for optical path switching and is used to realize the switching operation of the primary and backup transmission links.

[0086] In one implementation, such as Figure 9 As shown, the optical module and the host are connected via at least the following pins: a 16-pin high-speed signal interface, employing differential signal transmission technology, using 8 pairs of differential lines with opposite phases to achieve anti-interference and high-speed transmission in the transmit and receive directions; and a 2-pin management interface, via I... 2 C enables communication between the host and the optical module, used to obtain the module's status in real time and send module configuration; it has two status pins, of which pin 44 is multiplexed as INT interrupt and RSTn reset signal, pin 17 is multiplexed as LPWn low power and PRSn in-place signal, and the rest are power signal and ground signal pins.

[0087] For the specific steps of the method for implementing the fast switching of the optical module, please refer to Embodiment 1, which will not be repeated in this embodiment.

[0088] In summary, this embodiment abandons low-speed I 2 The C-polling fault detection mode binds service fault alarms to corresponding GPIO pins through the alarm mapping logic built into the signal processing unit. When a fault occurs, a level transition is directly generated and the logic unit generates a fault interrupt signal to actively report to the host, eliminating the polling waiting time and significantly improving the fault trigger response speed. After receiving the fault interrupt signal, the logic devices in the host directly drive the optical protection devices to complete the link protection switching, which can achieve switching at the millisecond or even microsecond level, resulting in shorter fault handling links. Overall, it realizes real-time fault identification and rapid switching, avoiding link degradation and service interruption caused by the failure to capture faults in time within the polling interval, and improving the reliability of 800G coherent optical transmission link operation.

[0089] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for implementing fast switching of optical modules, characterized in that, include: Configure alarm mapping logic in the signal processing unit of the optical module to bind service fault alarms to the corresponding GPIO pins; The GPIO pins of the signal processing unit are connected to the logic unit inside the optical module. When the signal processing unit receives a configured service fault alarm, the corresponding GPIO pin will show a level transition. The logic unit will send a fault interrupt signal to the host according to the level transition. The logic devices in the host drive the optical protection devices according to the fault interruption signal, thereby completing the protection switching of the link.

2. The method for implementing fast switching of optical modules according to claim 1, characterized in that, The configuration of alarm mapping logic in the signal processing unit of the optical module to bind service fault alarms to corresponding GPIO pins specifically includes: Configure the alarm mapping logic in the internal register of the signal processing unit, and filter out key fault events that will cause service interruption and link degradation as service fault alarms; The service fault alarm is bound to an independent GPIO pin of the signal processing unit. When any bound service fault alarm is activated, the level of the corresponding GPIO pin is pulled high. When the service fault alarm is cleared, the level of the corresponding GPIO pin is reset to low.

3. The method for implementing fast switching of optical modules according to claim 1, characterized in that, When the signal processing unit triggers the configured service fault alarm, the corresponding GPIO pin experiences a level transition. The logic unit then sends a fault interrupt signal to the host based on the level transition. Specifically, this includes: The logic unit continuously collects the level status of the GPIO pins; If the level of the corresponding GPIO pin changes to a high level, it is determined that there is a corresponding service fault alarm. The logic unit generates a fault interrupt signal and transmits it to the host through the gold finger of the optical module. If the level of the corresponding GPIO pin is detected to return to low, the logic unit cancels the output of the fault interrupt signal.

4. The method for implementing fast switching of optical modules according to claim 1, characterized in that, The logic devices in the host drive the optical protection devices according to the fault interruption signal, thereby completing the protection switching of the link, specifically including: The logic device in the host generates a switching instruction based on the fault interruption signal, and the optical protection device cuts off the current faulty main optical path based on the switching instruction and switches the service traffic to the backup optical path. When the fault interruption signal is removed, the host-side logic device issues a recovery command, and the optical protection device switches back to the original main optical path.

5. The method for implementing fast switching of optical modules according to claim 1, characterized in that, The method further includes: After receiving a level transition of any GPIO pin, the logic unit writes the service fault alarm type identifier corresponding to the GPIO pin that has experienced the level transition into the alarm status register, and outputs a fault interrupt signal to the host. After receiving the fault interruption signal, the logic device in the host drives the optical protection device to perform link protection switching. After the link protection switching is completed, the host reads the alarm status register of the logic unit through the management interface to obtain the service fault alarm type identifier, and executes the corresponding fault recovery strategy according to the obtained service fault alarm type identifier. Once the voltage levels of all triggered GPIO pins return to low, the logic unit clears the service fault alarm type identifier in the alarm status register.

6. The method for implementing fast switching of optical modules according to claim 1, characterized in that, The method further includes: The optical module has an interrupt reset multiplexing pin on its gold fingers. An external separation circuit is set inside the optical module. The external separation circuit electrically isolates the interrupt signal and reset signal carried on the interrupt reset multiplexing pin and separates them into independent interrupt signal paths and reset signal paths. The fault interrupt signal generated by the logic unit is transmitted only through the separated interrupt signal path, and the interrupt reset multiplexing pin is reused as an external output channel to transmit the fault interrupt signal to the host via the gold finger.

7. The method for implementing fast switching of optical modules according to claim 1, characterized in that, The service fault alarms include one or more of the following: SD signal degradation alarm, SF signal failure alarm, receive power alarm, DSP lockout alarm, and Pre-FEC bit error rate exceeding threshold alarm.

8. The method for implementing fast switching of optical modules according to claim 1, characterized in that, The logic unit is a CPLD or FPGA.

9. A fast optical module switching device, characterized in that, The device is used to implement the method for fast switching of optical modules as described in any one of claims 1-8, the device comprising an optical module and a host; The optical module includes a signal processing unit and a logic unit; The signal processing unit is internally configured with alarm mapping logic, which is used to bind service fault alarms to their corresponding GPIO pins; the GPIO pins of the signal processing unit are connected to the logic unit. The logic unit is used to receive the GPIO pin level in real time, and output a fault interrupt signal to the host when the GPIO pin of the signal processing unit undergoes a level transition. The logic device of the host is electrically connected to the optical protection device. The logic device is used to receive the fault interruption signal and drive the optical protection device to perform link protection switching.

10. The optical module fast switching device according to claim 9, characterized in that, The optical module also includes a microcontroller unit, which communicates with the signal processing unit via an SPI bus.

Images