A Gardner bit synchronization hot start method, device, equipment and medium

Abstract

The application relates to the technical field of digital communication, and provides a Gardner bit synchronization warm start method, device, equipment and medium, the method comprising the following steps: intercepting a training sequence from a received signal; initializing a warm start parameter initial value; taking the warm start parameter initial value as a warm start initial condition of a training Gardner bit synchronization ring; alternately performing normal order training and reverse order training on the warm start initial condition of the Gardner bit synchronization ring by using the training sequence; obtaining a final estimation value of the warm start parameter; and further calculating a formal warm start initial condition of the Gardner bit synchronization ring. By alternately performing normal order training and reverse order training, high-precision warm start parameter estimation can be realized under the condition of a short training sequence, so that the lock time of the Gardner bit synchronization ring is significantly shortened, and the problems of slow convergence of the Gardner bit synchronization ring and insufficient estimation precision of the warm start parameter in the burst demodulation scene in the prior art can be solved.

Description

Technical Field

[0001] This invention relates to the field of digital communication technology, and more specifically, to a Gardner bit synchronization hot-start method, apparatus, device, and medium. Background Technology

[0002] In burst-mode digital communication systems, the transmitter sends data in frames, and the receiver needs to independently complete synchronization acquisition at the beginning of each frame, including frame synchronization, symbol timing synchronization, and carrier synchronization. Because the duration of a burst frame is finite, the synchronization system must complete acquisition within an extremely short time, placing high demands on the convergence speed of the synchronization algorithm.

[0003] The Gardner Timing Error Detector (TED) is one of the most widely used symbol timing synchronization algorithms, proposed by FM Gardner in 1986. Its core formula is: (1) in, These are the interpolated symbolic sample values. This is the timing error estimate. Gardner timing error detectors have advantages such as being non-data-aided (NDA), independent of carrier phase, and simple to implement, and are widely used in receivers with modulation methods such as BPSK (Binary Phase Shift Keying), QPSK (Quadrature Phase Shift Keying), and QAM (Quadrature Amplitude Modulation).

[0004] The Gardner bit synchronization loop consists of a Gardner timing error detector, a loop filter, and a numerically controlled oscillator (NCO) forming a closed feedback loop. By continuously adjusting the interpolation time, the timing error is brought close to zero. The state equation of this loop is: (2) (3) in, For the nominal step size of NCO, , For oversampling rate, and These are proportional gain and integral gain, respectively. This is the state of the integral branch.

[0005] The update equation for the NCO accumulator is: (4) when When underflow occurs (from positive to negative), a new interpolation point is chosen, and the interpolation fraction phase is: (5) However, the Gardner bit synchronization ring has the following key drawbacks in burst mode applications: 1. Slow convergence speed: When cold-starting from zero initial value, the loop needs to go through a long transient process to converge to the steady state. The typical convergence time is hundreds to thousands of symbols, which is unacceptable for short burst frames.

[0006] 2. Limited frequency offset tolerance: The Gardner timing error detector uses a narrowband synchronization algorithm, and its capture range is about half of the loop bandwidth. When there is a large sampling frequency deviation, the cold start loop cannot reliably lock.

[0007] 3. Uncertain initial conditions: sampling phase deviation τ and sampling frequency deviation during cold start. Both parameters are unknown, and the loop needs to estimate and track both parameters simultaneously, which further exacerbates the convergence difficulty.

[0008] To address the aforementioned issues, a warm start technique is commonly employed in engineering practice: before running the Gardner bit synchronization loop, the initial state of the loop is pre-set using known information, thereby significantly shortening the convergence time. The key to warm start lies in obtaining a high-precision initial sampling phase deviation. and sampling frequency deviation Estimated value.

[0009] During warm start, the initial sampling phase deviation The formula for substituting into the accumulator is: (6) Sampling frequency deviation Substituting the integral term into the state equation, the formula is: (7) Existing hot-start methods mainly include: (1) correlation estimation based on the leader sequence, which requires known training sequences and whose accuracy is limited by the length of the training sequences; (2) frequency estimation based on FFT (Fast Fourier Transform), which has high computational complexity and cannot simultaneously estimate the timing phase; and (3) non-data-aided estimation based on the Oerder-Meyr algorithm, whose accuracy is limited by the signal-to-noise ratio and sequence length and cannot estimate the sampling frequency deviation. All of the above methods have the problem of insufficient estimation accuracy or excessive computational overhead, making it difficult to achieve both accuracy and speed in hot-start parameter acquisition in resource-constrained burst demodulation systems.

[0010] Therefore, there is an urgent need for a method that can quickly and accurately estimate the phase deviation required for Gardner hot start without relying on known training sequences. and sampling frequency deviation A new method. Summary of the Invention

[0011] This invention aims to provide a Gardner bit synchronization warm-start method, apparatus, device, and medium to solve the problems of slow convergence of the Gardner bit synchronization loop and insufficient accuracy of warm-start parameter estimation in burst demodulation scenarios, and to achieve high-precision sampling phase deviation under shorter training sequence conditions. and sampling frequency deviation This estimate significantly reduces the locking time of the Gardner ring.

[0012] In a first aspect, the present invention provides a Gardner bit synchronization hot-start method, comprising: Extract the training sequence from the received signal; Initialize the initial values ​​of the warm-start parameters and the maximum number of iterations; the warm-start parameters include the sampling phase deviation and the sampling frequency deviation; The initial values ​​of the hot start parameters are used as the initial conditions for training the Gardner bit synchronization ring. The initial conditions for the hot start of the Gardner bit synchronization ring are trained alternately in forward and reverse order using the training sequence. When the alternating forward and reverse training reaches the maximum number of iterations, the final estimated values ​​of the hot start parameters are obtained. The initial conditions for the formal hot start of the Gardner bit synchronization ring are calculated based on the final estimated values ​​of the hot start parameters.

[0013] In a preferred embodiment, the step of extracting the training sequence from the received signal includes: After frame synchronization is confirmed, a data segment is extracted from the received oversampled baseband signal as a training sequence. The starting position of the training sequence is determined by the frame header position given by frame synchronization; The truncation length of the data segment is set comprehensively based on the requirements for estimation accuracy and computational delay. Preferably, the truncation length is 64 to 512 symbols.

[0014] In a preferred embodiment, the forward training includes: The estimated hot-start parameters are used as the initial hot-start conditions for the Gardner bit synchronization ring in forward order training. Based on the initial hot-start conditions, the Gardner bit synchronization algorithm is run on the training sequence in forward order. After the run is completed, the output result of this forward order training is obtained. In the first forward training iteration, the estimated value of the warm-start parameter is the initial value of the warm-start parameter. In the subsequent forward training iterations, the estimated value of the warm-start parameter is calculated from the output result of the previous reverse training iteration.

[0015] In a preferred embodiment, the reverse training includes: The estimated hot-start parameters are used as the initial conditions for the reverse hot-start training of the Gardner bit synchronization ring. Based on the initial conditions for the reverse hot-start, the Gardner bit synchronization algorithm is run on the reverse training sequence in the reverse direction. After the run is completed, the output result of this reverse training is obtained. The reverse training sequence is obtained by arranging the training sequence in reverse chronological order; the estimated hot-start parameter value is calculated from the output result of the previous forward training.

[0016] In a preferred embodiment, the method for calculating the estimated values ​​of the hot-start parameters based on the output results of the previous forward or reverse training is as follows:

[0017]

[0018] in, This represents the estimated sampling phase bias value in the hot-start parameter estimates for the i-th forward or reverse training iteration. The output result is the sampling phase deviation of the (i-1)th forward or reverse training iteration; This represents the sampling frequency bias estimate in the hot-start parameter estimates for the i-th forward or reverse training iteration. The output result is the sampling frequency deviation of the (i-1)th forward or reverse training.

[0019] In a preferred embodiment, the formal hot-start initial conditions of the Gardner bit synchronization ring are calculated based on the final estimated value of the hot-start parameters, which is the same method used to calculate the estimated value of the hot-start parameters based on the output results of the previous forward or reverse training.

[0020] In a second aspect, the present invention provides a Gardner bit synchronization hot-start device, comprising: The data acquisition module is used to extract training sequences from the received signals; An initialization module is used to initialize the initial values ​​of the hot-start parameters and the maximum number of iterations; the hot-start parameters include the sampling phase deviation and the sampling frequency deviation. The iterative training module is used to train the Gardner bit synchronization ring with the initial values ​​of the hot start parameters as the initial conditions for hot start. It uses the training sequence to perform alternating forward and reverse training on the initial conditions for hot start of the Gardner bit synchronization ring. When the alternating forward and reverse training reaches the maximum number of iterations, the final estimated values ​​of the hot start parameters are obtained. The hot start injection module is used to calculate the formal hot start initial conditions of the Gardner bit synchronization ring based on the final estimated values ​​of the hot start parameters.

[0021] Thirdly, the present invention provides an electronic device, comprising: At least one processor; and a memory communicatively connected to said at least one processor; The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the instructions stored in the memory to perform the above-described method.

[0022] Fourthly, the present invention provides a computer-readable storage medium for storing instructions that, when executed, cause the above-described method to be implemented.

[0023] In summary, this invention, by alternating between forward and reverse training of the initial conditions for the warm-start of the Gardner bit synchronization ring, achieves high-precision estimation of sampling phase deviation and sampling frequency deviation under shorter training sequences. This significantly shortens the locking time of the Gardner bit synchronization ring and solves the problems of slow convergence and insufficient accuracy of warm-start parameter estimation in existing technologies during burst demodulation scenarios. The beneficial effects of this invention are: 1. Significantly improved convergence speed: This invention accurately estimates the warm start parameters in advance through bidirectional iterative training with alternating forward and reverse training. After warm start, the Gardner bit synchronization ring can complete locking within a very small number of symbols (typically less than 20 symbols), which can reduce the locking time by more than 90% compared to cold start.

[0024] 2. Two-way information utilization for higher estimation accuracy: The forward training of this invention has high accuracy at the end of the data, while the reverse training is equivalent to refining at the beginning of the forward data. The two complement each other, which is equivalent to doubling the effective observation length and reducing the estimation variance by about 50%.

[0025] 3. Self-iterative refinement without additional pilots: This invention fully utilizes the training sequence after frame synchronization, without inserting additional known pilot symbols, and does not occupy additional spectrum resources.

[0026] 4. Fewer iterations and lower computational overhead: This invention typically requires only 2 to 4 iterations of forward and reverse training to bring the estimation error close to the Cramér-Rao Lower Bound (CRLB). The total computational load is only 2*1 times that of a normal Gardner bit synchronization ring processing the same data segment, making it suitable for implementation in real-time signal processing systems.

[0027] 5. Strong robustness: Through iterative refinement, the impact of initial estimation error on the final result is significantly suppressed, and the tolerance range for initial phase deviation and frequency deviation is much greater than that of a single cold start. Attached Figure Description

[0028] Figure 1 This is a flowchart of a Gardner bit synchronization hot start method provided in an embodiment of the present invention.

[0029] Figure 2 This is a schematic diagram of a Gardner bit synchronization hot start method provided in an embodiment of the present invention.

[0030] Figure 3 This is a timing diagram illustrating alternating forward and reverse training in an embodiment of the present invention, showing the directional relationship between the forward and reverse training sequences, as well as the transmission and conversion relationship of the warm-start parameters in each iteration.

[0031] Figure 4 This is a schematic diagram of a Gardner bit synchronization hot start device provided in an embodiment of the present invention.

[0032] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0035] This invention provides a Gardner bit synchronization warm-start method. After frame synchronization is completed and before the Gardner bit synchronization loop officially starts running, a training sequence is extracted from the received useful signal. The Gardner bit synchronization algorithm is then run on the training sequence in alternating forward and reverse order to gradually refine the sampling phase deviation. and sampling frequency deviation The estimated value was used as the initial condition for the formal hot start of the Gardner bit synchronization ring.

[0036] In view of this, such as Figure 1 As shown in the figure, an embodiment of the present invention provides a Gardner bit synchronization hot start method, which includes the following steps: Step 1: Extract the training sequence from the received signal; Step 2: Initialize the initial values ​​of the warm-start parameters and the maximum number of iterations; the warm-start parameters include the sampling phase deviation and the sampling frequency deviation; Step 3: Use the initial values ​​of the hot start parameters as the initial conditions for training the Gardner bit synchronization ring. Use the training sequence to perform alternating forward and reverse training on the initial conditions for the hot start of the Gardner bit synchronization ring. When the alternating forward and reverse training reaches the maximum number of iterations, the final estimated values ​​of the hot start parameters are obtained. Step 4: Calculate the formal hot start initial conditions of the Gardner bit synchronization ring based on the final estimated values ​​of the hot start parameters.

[0037] This invention achieves high-precision estimation of sampling phase deviation and sampling frequency deviation under shorter training sequence conditions by alternating forward and reverse training of the initial conditions for the hot start of the Gardner bit synchronization ring. This significantly shortens the locking time of the Gardner bit synchronization ring and solves the problems of slow convergence and insufficient accuracy of hot start parameter estimation in the existing technology under burst demodulation scenarios.

[0038] The following details the specific implementation of the Gardner bit-synchronous warm-start method described above. For example... Figure 1 As shown, the method includes the following steps: Step 1: Extract the training sequence from the received signal; specifically including: After frame synchronization confirmation, a data segment of length N is extracted from the received oversampled baseband signal as a training sequence, denoted as . , ; The starting position of the training sequence is determined by the frame header position given by frame synchronization; The truncation length N of the data segment is set comprehensively based on the requirements for estimation accuracy and calculation delay. In this embodiment of the invention, the truncation length N is preferably 64 to 512 symbols.

[0039] Step 2: Initialize the initial values ​​of the warm-start parameters and the maximum number of iterations; The hot start parameters include the sampling phase deviation. and sampling frequency deviation Then initialize the initial estimate of the sampling phase deviation. Initial estimate of sampling frequency deviation All are set to zero, that is Set the maximum number of iterations I for both forward and reverse training.

[0040] Step 3: Use the initial values ​​of the hot start parameters as the initial conditions for training the Gardner bit synchronization ring. Use the training sequence to perform alternating forward and reverse training on the initial conditions for the hot start of the Gardner bit synchronization ring. When the alternating forward and reverse training reaches the maximum number of iterations, the final estimated values ​​of the hot start parameters are obtained.

[0041] Since the maximum number of iterations for forward and reverse training is set to I, each iteration is performed a maximum of I times, for a total of 2*I iterations. Furthermore, forward and reverse training are performed alternately, as shown below. Figure 2 , Figure 3 As shown, the forward training and reverse training are specifically as follows: (1) The i-th positive order training (i=1,3,5,...2*I-1) The estimated values ​​of the warm-start parameters are used as the initial conditions for the warm-start of the Gardner bit synchronization ring in the forward order training. Based on the initial conditions, the Gardner bit synchronization algorithm is run on the training sequence in the forward order. After the run is completed, the output results of this forward order training are obtained.

[0042] For example, the hot start parameter estimate during the i-th positive sequence training is denoted as the sampling phase deviation estimate. And sampling frequency deviation estimate This serves as the initial condition for the warm start of the Gardner bit synchronization loop during the i-th forward training, and the training sequence is processed in the forward direction. Running the Gardner bit synchronization algorithm, where the estimated warm-start parameters during the first forward training are the initial values ​​of the warm-start parameters, i.e., the initial estimated values ​​of the sampling phase deviation. Initial estimate of sampling frequency deviation All are set to zero. Since forward and reverse training are performed alternately, the estimated values ​​of the hot-start parameters, i.e., the estimated values ​​of the sampling phase deviation, mentioned during the remaining forward training are... And sampling frequency deviation estimate Therefore, it is calculated from the output of the previous reverse training; the calculation formula is: (8) (9) in, This is the estimated sampling phase deviation value in the hot start parameter estimation values ​​of the i-th positive sequence training. The output result is the sampling phase deviation of the (i-1)th positive-order training. This is the estimated sampling frequency bias value in the hot-start parameter estimates for the i-th positive-order training. The output result is the sampling frequency deviation of the (i-1)th forward training.

[0043] The specific process of running the Gardner bit synchronization algorithm is as follows: The sampled phase deviation estimate is... The initial value of the NCO accumulator of the Gardner bit synchronization ring is injected according to formula (6), and the estimated value of the sampling frequency deviation is... The initial state of the integral branch of the Gardner bit synchronization ring is injected according to formula (7). After the Gardner bit synchronization algorithm finishes running, the steady-state mean of the integral branch of the Gardner bit synchronization ring is extracted as the frequency deviation update estimate, and the steady-state mean of the interpolation fraction is extracted as the phase deviation update estimate to obtain the output result. and , is represented as: (10) (11) Among them, the output results and This is used to calculate the estimated hot-start parameters as the initial condition for the (i+1)th orthogonal training.

[0044] (2) The i-th reverse training (i=2,4,6,...2*I) The reverse training is similar to the forward training, except that the estimated hot-start parameter value is used as the reverse hot-start initial condition for the Gardner bit synchronization ring. Based on the reverse hot-start initial condition, the Gardner bit synchronization algorithm is run on the reverse training sequence in the reverse direction. After the run is completed, the output result of this reverse training is obtained.

[0045] Wherein, the reverse training sequence is composed of the training sequence Arranged in reverse chronological order; denoted as In this embodiment of the invention, since reverse training starts from i=2 and forward and reverse training alternate, the estimated values ​​of the hot-start parameters used in reverse training are all calculated from the output results of the previous forward training. The same calculation formulas are used in formulas (8) and (9), where... This represents the estimated sampling phase bias value in the hot-start parameter estimates for the i-th reverse training iteration. The output result is the sampling phase deviation of the (i-1)th reverse training iteration; This represents the estimated sampling frequency bias in the hot-start parameter estimates for the i-th reverse training iteration. This is the output result of the sampling frequency deviation during the (i-1)th reverse training.

[0046] Furthermore, the reverse training of the Gardner bit synchronization algorithm is similar to that in the forward training, and the output results obtained after the run are also consistent with those in the forward training, both obtained according to formulas (10) and (11). and Similarly, output the result. and This is used to calculate the estimated hot-start parameters as the initial condition for the (i+1)th reverse training.

[0047] (3) Iterative update and iteration termination By alternating between forward and reverse training as described above, the output results of this forward or reverse training will be... and Calculate the initial values ​​of the warm-start parameters for the next iteration of forward or reverse training. and This serves as the initial condition for warm-start. After completing 2*I training iterations, the iteration terminates, yielding the final estimated values ​​of the warm-start parameters. and Otherwise, continue with alternating forward and reverse training.

[0048] Step 4: Calculate the initial conditions for the formal hot start of the Gardner bit synchronization ring based on the final estimated values ​​of the hot start parameters. The calculation method is the same as that used to calculate the estimated values ​​of the hot start parameters based on the output results of the previous forward or reverse training. That is, calculate the estimated values ​​of the hot start parameters using formulas (8) and (9). , As the initial condition for the formal hot start of the Gardner bit synchronization ring, symbol timing synchronization processing is performed on the entire frame of data.

[0049] Based on the same technological concept, such as Figure 4 As shown, this embodiment of the invention also provides a Gardner bit synchronization hot-start device, comprising: The data acquisition module is used to extract training sequences from the received signals; An initialization module is used to initialize the initial values ​​of the hot-start parameters and the maximum number of iterations; the hot-start parameters include the sampling phase deviation and the sampling frequency deviation. The iterative training module is used to train the Gardner bit synchronization ring with the initial values ​​of the hot start parameters as the initial conditions for hot start. It uses the training sequence to perform alternating forward and reverse training on the initial conditions for hot start of the Gardner bit synchronization ring. When the alternating forward and reverse training reaches the maximum number of iterations, the final estimated values ​​of the hot start parameters are obtained. The hot start injection module is used to calculate the formal hot start initial conditions of the Gardner bit synchronization ring based on the final estimated values ​​of the hot start parameters.

[0050] The working principle of each functional module in the above device can be referred to the description in the foregoing method embodiments, and will not be repeated here.

[0051] Based on the same technical concept, embodiments of the present invention also provide an electronic device that can implement the Gardner bit synchronization warm-start method flow provided in the above embodiments of the present invention. In one embodiment, the electronic device can be a server, a terminal device, or other electronic devices. Figure 5 As shown, the electronic device may include: At least one processor and a memory connected to the at least one processor. In this embodiment of the invention, the specific connection medium between the processor and the memory is not limited. Figure 5 The example used is the connection between the processor and memory via a bus. The bus... Figure 5 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. Buses can be categorized into address buses, data buses, control buses, etc., but for ease of representation, [the specific bus type is not shown here]. Figure 5The processor is represented by a single thick line, but this does not imply that there is only one bus or one type of bus. Alternatively, a processor can also be called a controller; there are no restrictions on the name.

[0052] In this embodiment of the invention, the memory stores instructions that can be executed by at least one processor. By executing the instructions stored in the memory, at least one processor can execute a Gardner bit-synchronous warm-start method as described above.

[0053] The processor is the control center of the device. It can connect to various parts of the control device through various interfaces and lines. By running or executing instructions stored in memory and calling data stored in memory, it can monitor the device's various functions and process data, thereby enabling overall monitoring of the device.

[0054] In an alternative design, the processor may include one or more processing units. The processor may integrate an application processor and a modem processor, wherein the application processor primarily handles the operating system, user interface, and applications, while the modem processor primarily handles wireless communication. It is understood that the modem processor may also not be integrated into the processor. In some embodiments, the processor and memory may be implemented on the same chip; in some embodiments, they may also be implemented separately on separate chips.

[0055] The processor can be a general-purpose processor, such as a CPU, digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the Gardner bit-synchronous warm-start method disclosed in the embodiments of this invention can be directly manifested as execution by a hardware processor, or execution by a combination of hardware and software modules within the processor.

[0056] Memory, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory can include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic memory, magnetic disk, optical disk, etc. Memory is any other medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer, but is not limited thereto. In embodiments of the present invention, memory can also be a circuit or any other device capable of implementing storage functions, used to store program instructions and / or data.

[0057] By designing and programming the processor, the code corresponding to the Gardner bit-synchronous warm-start method described in the foregoing embodiments can be embedded into the chip, enabling the chip to execute the steps of the method described in the foregoing embodiments during operation. How to design and program a processor is a technique well-known to those skilled in the art and will not be elaborated upon here.

[0058] Based on the same inventive concept, embodiments of the present invention also provide a storage medium storing computer instructions that, when executed on a computer, cause the computer to perform a Gardner bit-synchronous warm-start method described above.

[0059] In some alternative embodiments, the present invention also provides that various aspects of the Gardner bit synchronization warm-start method can also be implemented as a program product comprising program code that, when the program product is run on a device, causes the control device to perform the steps in the Gardner bit synchronization warm-start method according to various exemplary embodiments of the present invention as described above.

[0060] It should be noted that although several units or sub-units of the apparatus have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of the invention, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of one unit described above can be further divided and embodied by multiple units. Furthermore, although the operation of the method of the invention is described in a specific order in the drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0061] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0062] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a server, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0063] Program code for performing the operations of this invention can be written using any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0064] In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0065] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0066] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0067] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A Gardner bit synchronization hot-start method, characterized in that, include: Extract the training sequence from the received signal; Initialize the warm-start parameters to their initial values ​​and the maximum number of iterations; The hot start parameters include sampling phase deviation and sampling frequency deviation; The initial values ​​of the hot start parameters are used as the initial conditions for training the Gardner bit synchronization ring. The initial conditions for the hot start of the Gardner bit synchronization ring are trained alternately in forward and reverse order using the training sequence. When the alternating forward and reverse training reaches the maximum number of iterations, the final estimated values ​​of the hot start parameters are obtained. The initial conditions for the formal hot start of the Gardner bit synchronization ring are calculated based on the final estimated values ​​of the hot start parameters.

2. The Gardner bit synchronization hot-start method according to claim 1, characterized in that, The step of extracting the training sequence from the received signal includes: After frame synchronization is confirmed, a data segment is extracted from the received oversampled baseband signal as a training sequence. The starting position of the training sequence is determined by the frame header position given by frame synchronization; The truncation length of the data segment is set comprehensively based on the requirements for estimation accuracy and computational delay.

3. The Gardner bit synchronization hot-start method according to claim 2, characterized in that, The truncation length is between 64 and 512 symbols.

4. The Gardner bit synchronization hot-start method according to claim 1, characterized in that, The forward training includes: The estimated hot-start parameters are used as the initial hot-start conditions for the Gardner bit synchronization ring in forward order training. Based on the initial hot-start conditions, the Gardner bit synchronization algorithm is run on the training sequence in forward order. After the run is completed, the output result of this forward order training is obtained. In the first forward training iteration, the estimated value of the warm-start parameter is the initial value of the warm-start parameter. In the subsequent forward training iterations, the estimated value of the warm-start parameter is calculated from the output result of the previous reverse training iteration.

5. The Gardner bit synchronization hot-start method according to claim 4, characterized in that, The reverse training includes: The estimated hot-start parameters are used as the initial conditions for the reverse hot-start training of the Gardner bit synchronization ring. Based on the initial conditions for the reverse hot-start, the Gardner bit synchronization algorithm is run on the reverse training sequence in the reverse direction. After the run is completed, the output result of this reverse training is obtained. The reverse training sequence is obtained by arranging the training sequence in reverse chronological order; the estimated hot-start parameter value is calculated from the output result of the previous forward training.

6. The Gardner bit synchronization hot-start method according to claim 5, characterized in that, The method for calculating the estimated values ​​of the hot-start parameters based on the output results of the previous forward or reverse training is as follows: in, This represents the estimated sampling phase bias value in the hot-start parameter estimates for the i-th forward or reverse training iteration. The output result is the sampling phase deviation of the (i-1)th forward or reverse training iteration; This represents the sampling frequency bias estimate in the hot-start parameter estimates for the i-th forward or reverse training iteration. The output result is the sampling frequency deviation of the (i-1)th forward or reverse training.

7. The Gardner bit synchronization hot-start method according to claim 6, characterized in that, The method for calculating the formal hot start initial conditions of the Gardner bit synchronization ring based on the final estimated value of the hot start parameters is the same as the method for calculating the estimated value of the hot start parameters based on the output results of the previous forward or reverse training.

8. A Gardner position synchronous hot start device, characterized in that, include: The data acquisition module is used to extract training sequences from the received signals; The initialization module is used to initialize the initial values ​​of the hot-start parameters and the maximum number of iterations. The hot start parameters include sampling phase deviation and sampling frequency deviation; The iterative training module is used to train the Gardner bit synchronization ring with the initial values ​​of the hot start parameters as the initial conditions for hot start. It uses the training sequence to perform alternating forward and reverse training on the initial conditions for hot start of the Gardner bit synchronization ring. When the alternating forward and reverse training reaches the maximum number of iterations, the final estimated values ​​of the hot start parameters are obtained. The hot start injection module is used to calculate the formal hot start initial conditions of the Gardner bit synchronization ring based on the final estimated values ​​of the hot start parameters.

9. An electronic device, characterized in that, include: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores instructions executable by the at least one processor, which executes the instructions stored in the memory to perform the method as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store instructions that, when executed, cause the method as described in any one of claims 1-8 to be implemented.

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