Circuit board, power module, motor controller, electric drive assembly, and vehicle

Abstract

The application provides a circuit board, a power module, a motor controller, an electric drive assembly and a vehicle, and relates to the technical field of circuit boards.The circuit board comprises a power switch chip and a heat dissipation plate, the heat dissipation plate comprises a first heat conduction layer, a ceramic layer and a second heat conduction layer, the ceramic layer is arranged between the first heat conduction layer and the second heat conduction layer, the first heat conduction layer is provided with a groove, and the power switch chip is arranged in the groove, so that the power switch chip can be cooled through the first heat conduction layer, the ceramic layer and the second heat conduction layer, and the heat dissipation effect is better than that of the power switch chip being cooled through a copper layer and a heat conduction insulating film made of plastic material in the related art.

Description

[0001] This application claims priority to Chinese Patent Application No. 202520768069.2, filed on April 21, 2025, entitled "A Circuit Board, Power Module, Inverter and Vehicle", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of circuit board technology, and in particular to a circuit board, power module, motor controller, electric drive assembly, and vehicle. Background Technology

[0003] In the printed circuit board (PCB) of the power module, the operating current of the power switch chip is relatively large, for example, the operating current of the power switch chip is above 400 amps. Therefore, the power switch chip generates a lot of heat when it is working, and heat dissipation is required.

[0004] In related technologies, power switch chips dissipate heat through a copper layer and a thermally conductive insulating film. However, since the thermally conductive insulating film is made of plastic, the heat dissipation effect of the power switch device is poor. Summary of the Invention

[0005] This application aims to provide a circuit board, a power module, a motor controller, an electric drive assembly, and a vehicle to at least solve the problem in the related art where the power switch chip in the power module's circuit board dissipates heat through a copper layer and a thermally conductive insulating film made of plastic material, resulting in poor heat dissipation of the power switch device.

[0006] To solve the above-mentioned technical problems, this application is implemented as follows:

[0007] In a first aspect, embodiments of this application provide a circuit board, including a power switch chip and a heat sink;

[0008] The heat sink includes a first heat-conducting layer, a ceramic layer, and a second heat-conducting layer.

[0009] The ceramic layer is disposed between the first thermally conductive layer and the second thermally conductive layer;

[0010] The first thermally conductive layer has a groove, and the power switch chip is disposed in the groove.

[0011] Secondly, embodiments of this application provide a power module, including the circuit board as described in the first aspect.

[0012] Thirdly, embodiments of this application provide a motor controller, including a circuit board as described in the first aspect, or including a power module as described in the second aspect.

[0013] Fourthly, embodiments of this application provide an electric drive assembly, including a circuit board as described in the first aspect, or a power module as described in the second aspect, or a motor controller as described in the third aspect.

[0014] Fifthly, embodiments of this application provide a vehicle including a circuit board as described in the first aspect, or a power module as described in the second aspect, or a motor controller as described in the third aspect, or an electric drive assembly as described in the fourth aspect.

[0015] In this embodiment, the heat sink includes a first thermally conductive layer, a ceramic layer, and a second thermally conductive layer. The ceramic layer is disposed between the first and second thermally conductive layers. The first thermally conductive layer has a groove in which a power switch chip is disposed. The power switch chip can dissipate heat through the first thermally conductive layer, the ceramic layer, and the second thermally conductive layer. Since ceramic materials have better thermal conductivity than plastic materials, the heat dissipation effect is better compared with the related technology where the power switch chip dissipates heat through a copper layer and a thermally conductive insulating film of plastic material. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of a circuit board structure provided in an embodiment of this application;

[0018] Figure 2 This is a schematic diagram of the structure of a heat sink provided in an embodiment of this application.

[0019] Figure label:

[0020] 10-Heat sink; 11-First thermally conductive layer; 111-Groove; 12-Ceramic layer; 13-Second thermally conductive layer; 14-First adhesive layer; 20-Main board; 21-First conductive layer; 22-Second conductive layer; 23-Third conductive layer; 24-Fourth conductive layer; 25-Insulating material; 26-Conductive via; 30-Power switch chip; 31-Fifth conductive layer. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0023] Reference Figure 1 This application provides a circuit board including a motherboard 20, a power switch chip 30, and a heat sink 10. The heat sink 10 is disposed in the inner layer of the motherboard 20 and includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. The ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 has a groove 111, and the power switch chip 30 is disposed in the groove 111.

[0024] It should be noted that the ceramic layer 12 has good insulation properties, and since ceramic materials have better insulation properties than plastic materials, the insulation of the circuit board can be improved through the ceramic layer 12.

[0025] In some embodiments, the motherboard 20 includes multiple conductive layers, each conductive layer comprising a conductive material, and an insulating material 25 filling the spaces between the conductive layers; wherein the conductive material includes copper, aluminum, silver, gold, etc., and the insulating material 25 includes plastics, such as epoxy resin, polyimide, polycarbonate, polytetrafluoroethylene, etc.

[0026] It should be noted that the conductive layer is not only electrically conductive, but also thermally conductive.

[0027] In some embodiments, the conductive layer includes a plurality of conductive portions spaced apart by a first preset distance, and the conductive portions are filled with an insulating material 25.

[0028] In some embodiments, the shape of the conductive portion includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0029] In some embodiments, the power switch chip 30 is a power switch device, and the material of the power switch chip 30 includes silicon carbide.

[0030] In some embodiments, the heat sink 10 may be a copper-clad ceramic substrate. For example, the heat sink 10 may be a copper-clad ceramic substrate formed by bonding copper foil and a ceramic substrate through active metal brazing (AMB) technology.

[0031] It should be noted that the groove 111 of the first thermal conductive layer 11 is formed by electrochemical etching, or the first thermal conductive layer 11 is first etched to form the groove 111, and then the first thermal conductive layer 11, the ceramic layer 12 and the second thermal conductive layer 13 are combined by active metal brazing (AMB) technology to form a copper-clad ceramic substrate.

[0032] In some embodiments, the first thermally conductive layer 11 is a conductive material, including copper, aluminum, silver, gold, etc.

[0033] In some embodiments, the second thermally conductive layer 13 is a conductive material, including copper, aluminum, silver, gold, etc.

[0034] In some embodiments, the ceramic layer 12 is a ceramic material, including alumina, aluminum nitride, silicon nitride, silicon carbide, beryllium oxide, zirconium oxide, etc.

[0035] In some embodiments, the area of ​​the ceramic layer 12 is larger than the area of ​​the first thermally conductive layer 11.

[0036] In some embodiments, the area of ​​the ceramic layer 12 is larger than the area of ​​the second thermally conductive layer 13.

[0037] In some embodiments, the projected area of ​​the first thermally conductive layer 11 on the surface of the ceramic layer 12 is smaller than the area of ​​the ceramic layer 12.

[0038] In some embodiments, the projected area of ​​the second thermally conductive layer 13 on the surface of the ceramic layer 12 is smaller than the area of ​​the ceramic layer 12.

[0039] In some embodiments, the shape of the first thermally conductive layer 11 includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0040] In some embodiments, the shape of the second heat-conducting layer 13 includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0041] In some embodiments, the shape of the ceramic layer 12 includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0042] In some embodiments, the shape of the motherboard 20 includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0043] In some embodiments, the heat sink 10 is a standard rectangle with right angles at the four corners, and its aspect ratio can be adjusted according to actual needs. The edges are smooth and burr-free.

[0044] In some embodiments, the heat sink 10 has an L-shaped substrate and is composed of two mutually perpendicular rectangular portions forming a right angle. The length and width of the two rectangular portions can be adjusted according to actual needs.

[0045] In some embodiments, the heat sink 10 is U-shaped and consists of three rectangular parts, with the two side rectangular parts parallel to the middle rectangular part, forming a U-shape. The width and depth of the U-shape opening can be adjusted according to actual needs.

[0046] In some embodiments, the heat sink 10 is a regular polygon, such as a hexagon or octagon. All sides are of equal length, and the angles are evenly distributed. The edges are smooth and burr-free.

[0047] In some embodiments, the heat sink 10 has an irregular shape, customized according to specific application requirements. It can be any shape composed of free curves or broken lines, with smooth edges and no burrs.

[0048] It should be noted that the shape of the heat sink 10 may also include other shapes, which are not limited here.

[0049] In some embodiments, the surface of the heat sink 10 is designed with multiple positioning holes, the shape and size of which can be adjusted according to actual needs. The positioning holes can be circular, square, or irregular in shape. In some embodiments, the groove 111 is cuboid in shape with a regular rectangular cross-section. The aspect ratio can be flexibly designed according to actual needs, and the length direction can extend along a specific direction of the substrate, such as the length direction being consistent with the current flow direction or the same as the pin arrangement direction of the device.

[0050] In some embodiments, the groove 111 is cylindrical in shape with a circular cross-section, smooth edges without burrs, and the diameter can be customized according to the size of different components.

[0051] In some embodiments, the vertical cross-section of the groove 111 is V-shaped, with an opening angle generally between 30° and 90°. The two inclined surfaces are smooth and symmetrical, and the pointed bottom of the V-shape can be designed with a certain rounded corner to avoid stress concentration.

[0052] In some embodiments, the vertical cross-section of the groove 111 is trapezoidal, with the width of the upper base being smaller than the width of the lower base, and the two non-parallel sides being inclined sides. The inclination angle of the inclined sides can be adjusted according to actual needs, so that the groove 111 has a certain lateral support force, and the height of the trapezoid and the width ratio of the upper and lower bases are appropriate.

[0053] In some embodiments, the vertical cross-section of the groove 111 is semi-circular with its arc surface facing upwards, and the diameter of the semi-circle can be determined according to actual needs.

[0054] In some embodiments, the vertical cross-section of the groove 111 is a polygon, such as a regular polygon like a hexagon or octagon, with each side having equal length and angle or designed in a certain proportion. It can also be designed as an irregular polygon to meet specific component shape or layout requirements.

[0055] In some embodiments, the vertical cross-section of the groove 111 is fan-shaped, consisting of two concentric circular arcs with different radii and two rays emanating from the center. The angle of the fan can be determined according to actual needs, and can be designed as a fan with less than 180° or a large arc fan with greater than 180°.

[0056] In some embodiments, the vertical cross-section of the groove 111 is dovetail-shaped, with a wider opening that gradually narrows inward to form a dovetail-like shape. The two sides are symmetrical slopes with an inclination angle generally between 30° and 60°, and the bottom is a flat or rounded transition.

[0057] It should be noted that the shape of the groove 111 may also include other shapes, which are not limited here.

[0058] In this embodiment, the heat sink 10 is disposed on the inner layer of the motherboard 20. The heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. The ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and a power switch chip 30 is disposed in the groove 111. The power switch chip 30 can dissipate heat through the first thermally conductive layer 11, the ceramic layer 12, and the second thermally conductive layer 13. Since ceramic materials have better thermal conductivity than plastic materials, the heat dissipation effect is better compared with the heat dissipation of power switch chips through copper layers and thermally conductive insulating films of plastic materials in related technologies.

[0059] In some embodiments, the second conductive layer 22 and the second thermally conductive layer 13 are flush with each other on the surface facing the heat sink.

[0060] The surfaces of the second conductive layer 22 and the second thermal conductive layer 13 facing the heat sink are flush with each other. That is, the height difference between the surface of the second conductive layer 22 facing the heat sink and the surface of the second thermal conductive layer 13 facing the heat sink is within a first preset difference range. In some embodiments, the height difference between the surface of the second conductive layer 22 facing the heat sink and the surface of the second thermal conductive layer 13 facing the heat sink can be ignored.

[0061] Optionally, in some embodiments, the first thermal conductive layer 11 is disposed below the first conductive layer 21 of the motherboard 20, and the second thermal conductive layer 13 is on the same horizontal plane as the second conductive layer 22 of the motherboard 20.

[0062] In some embodiments, the thickness of the second conductive layer 22 is equal to the thickness of the second thermally conductive layer 13; in other embodiments, the thickness of the second conductive layer 22 is less than the thickness of the second thermally conductive layer 13.

[0063] In some embodiments, the bottom surface of the second conductive layer 22 and the bottom surface of the second thermally conductive layer 13 are on the same horizontal plane.

[0064] In some embodiments, the top surface of the second conductive layer 22 is below the same horizontal plane as the top surface of the second thermally conductive layer 13; in other embodiments, the top surface of the second conductive layer 22 is below the top surface of the second thermally conductive layer 13.

[0065] In this embodiment, by placing the first thermal conductive layer 11 below the first conductive layer 21 of the motherboard 20, it is advantageous for the first conductive layer 21 to be electrically connected to the power switch chip 30 in the groove 111 of the first thermal conductive layer 11 through the through hole. Since the second thermal conductive layer 13 and the second conductive layer 22 of the motherboard 20 are on the same horizontal plane, it is advantageous to place the second thermal conductive layer 13 and the second conductive layer 22 of the motherboard 20 together on the plane of the heat sink, or on the plane of other conductive layers of the circuit board.

[0066] In some embodiments, the second conductive layer 22 includes a plurality of conductive portions, at least one of the conductive portions of the second conductive layer 22 is adjacent to the heat sink 10, the conductive portions of the second conductive layer 22 adjacent to the heat sink 10 are spaced apart from the heat sink 10 by a second preset distance, and an insulating material 25 is filled between the conductive portions of the second conductive layer 22 adjacent to the heat sink 10 and the heat sink 10.

[0067] Optionally, in some embodiments, the circuit board further includes a first conductive layer 21, which is electrically connected to the first DC terminal of the power switch chip 30.

[0068] In some embodiments, a plurality of conductive vias 26 are provided between the first conductive layer 21 and the power switch chip 30, and the first conductive layer 21 is electrically connected to the first DC terminal of the power switch chip 30 through the conductive vias 26.

[0069] In this embodiment, since the first conductive layer 21 is electrically connected to the first DC terminal of the power switch chip 30, the power switch chip 30 can receive current signals through the first conductive layer 21, or the power switch chip 30 can output current signals through the first conductive layer 21.

[0070] In some embodiments, the groove 111 is disposed on the side of the first thermally conductive layer 11 away from the ceramic layer 12, so that the first DC terminal of the power switch chip 30 disposed in the groove 111 can be electrically connected to the first conductive layer 21.

[0071] Optionally, in some embodiments, the circuit board further includes a third conductive layer 23, which is disposed below the first conductive layer 21, and is electrically connected to the second DC terminal of the power switch chip 30.

[0072] In some embodiments, the first thermally conductive layer 11 is disposed between the first conductive layer 21 and the second thermally conductive layer 13.

[0073] In some embodiments, the thickness of the third conductive layer 23 is equal to the thickness of the first thermally conductive layer 11; in other embodiments, the thickness of the third conductive layer 23 is less than the thickness of the first thermally conductive layer 11.

[0074] In some embodiments, the bottom surface of the third conductive layer 23 is on the same horizontal plane as the bottom surface of the first thermal conductive layer 11; in other embodiments, the bottom surface of the third conductive layer 23 is higher than the bottom surface of the first thermal conductive layer 11.

[0075] In some embodiments, the top surface of the third conductive layer 23 is below the same horizontal plane as the top surface of the first thermal conductive layer 11; in other embodiments, the top surface of the third conductive layer 23 is lower than the top surface of the first thermal conductive layer 11.

[0076] In this embodiment, by placing the third conductive layer 23 below the first conductive layer 21, compared to placing the third conductive layer 23 above the first conductive layer 21, it is advantageous to shorten the distance between the third conductive layer 23 and the second DC terminal of the power switch chip 30 for electrical connection. By electrically connecting the third conductive layer 23 to the second DC terminal of the power switch chip 30, the power switch chip 30 can receive current signals through the first conductive layer 21, or the power switch chip 30 can output current signals through the first conductive layer 21.

[0077] In some embodiments, the third conductive layer 23 includes a plurality of conductive portions, at least one of the conductive portions of the third conductive layer 23 is adjacent to the heat sink 10, the conductive portions of the third conductive layer 23 adjacent to the heat sink 10 are spaced apart from the heat sink 10 by a fourth preset distance, and the space between the conductive portions of the third conductive layer 23 adjacent to the heat sink 10 and the heat sink 10 is filled with an insulating material 25.

[0078] In some embodiments, the circuit board further includes a fourth conductive layer 24, which is electrically connected to the control terminal of the power switch chip 30.

[0079] Optionally, in some embodiments, the fourth conductive layer 24 of the motherboard 20 is disposed on the first conductive layer 21, and the fourth conductive layer 24 is electrically connected to the control terminal of the power switch chip 30.

[0080] In this embodiment, by placing the fourth conductive layer 24 of the motherboard 20 above the first conductive layer 21, compared to placing the fourth conductive layer 24 of the motherboard 20 below the first conductive layer 21, it is advantageous to shorten the distance between the fourth conductive layer 24 and the external control terminal for electrical connection; by electrically connecting the fourth conductive layer 24 to the control terminal of the power switch chip 30, the power switch chip 30 can receive external control signals through the fourth conductive layer 24.

[0081] In some embodiments, a control signal is received through the control terminal of the power switch chip 30. When the control signal is at a first level, the power switch chip 30 is turned on; when the control signal is at a second level, the power switch chip 30 is turned off. When the power switch chip 30 is turned on, the first DC terminal of the power switch chip 30 is connected to the second DC terminal of the power switch chip 30; when the power switch chip 30 is turned off, the first DC terminal of the power switch chip 30 is disconnected from the second DC terminal of the power switch chip 30.

[0082] In some embodiments, when the power switch chip 30 is turned on, the first DC terminal of the power switch chip 30 receives a current signal and outputs the current signal through the second DC terminal of the power switch chip 30; in other embodiments, when the power switch chip 30 is turned on, the second DC terminal of the power switch chip 30 receives a current signal and outputs the current signal through the first DC terminal of the power switch chip 30.

[0083] In some embodiments, the second conductive layer 22 is adjacent to the third conductive layer 23, the third conductive layer 23 is adjacent to the first conductive layer 21, and the first conductive layer 21 is adjacent to the fourth conductive layer 24.

[0084] Optional, refer to Figure 2In some embodiments, the first thermally conductive layer 11 further includes a first adhesive layer 14; the power switch chip 30 is disposed at the bottom of the groove 111 through the first adhesive layer 14.

[0085] In some embodiments, the material of the first adhesive layer 14 includes silver.

[0086] In some embodiments, the shape of the first adhesive layer 14 includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0087] In some embodiments, the first adhesive layer 14 includes a plurality of first portions, at least a portion of which are isolated from each other.

[0088] In some embodiments, the shape of the first portion includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation herein.

[0089] In some embodiments, a plurality of first portions in the first adhesive layer 14 are arranged in an array.

[0090] In some embodiments, the array comprising a plurality of first divisions includes a matrix, a circular array, an elliptical array, a polygonal array, or other forms of array.

[0091] In some embodiments, the power switch chip 30 is bonded to the bottom of the groove 111 of the first thermally conductive layer 11 via the first adhesive layer 14.

[0092] In this embodiment, the power switch chip 30 is disposed at the bottom of the groove 111 of the first thermally conductive layer 11 via the first adhesive layer 14, so as to fix the power switch chip 30 to the bottom of the groove 111.

[0093] In some embodiments, the circuit board further includes a fifth conductive layer 31, which is located on the side of the power switch chip 30 away from the bottom of the recess 111; the fifth conductive layer 31 and the surface of the first thermal conductive layer 11 on the side away from the power switch chip 30 are flush with each other, or the surface of the fifth conductive layer 31 on the side away from the power switch chip 30 is lower than the surface of the first thermal conductive layer on the side away from the power switch chip 30.

[0094] In this embodiment, the surfaces of the fifth conductive layer 31 and the first thermal conductive layer 11 on the side away from the power switch chip 30 are flush with each other. That is, the height difference between the surface of the fifth conductive layer 31 on the side away from the power switch chip 30 and the surface of the first thermal conductive layer 11 on the side away from the power switch chip 30 is within a second preset difference range. In some embodiments, the height difference between the surface of the fifth conductive layer 31 on the side away from the power switch chip 30 and the surface of the first thermal conductive layer 11 on the side away from the power switch chip 30 can be ignored.

[0095] Optionally, in some embodiments, the first surface of the power switch chip 30 is connected to the bottom surface of the groove 111, and the second surface of the power switch chip 30 is provided with a fifth conductive layer 31.

[0096] In some embodiments, the material of the fifth conductive layer 31 includes copper, aluminum, silver, gold, etc.

[0097] In some embodiments, the power switch chip 30 is electrically connected to the first conductive layer 21 through the fifth conductive layer 31.

[0098] In some embodiments, the shape of the fifth conductive layer 31 includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0099] In this embodiment, since the first surface of the power switch chip 30 is connected to the bottom surface of the groove 111, and the second surface of the power switch chip 30 is provided with a fifth conductive layer 31, the power switch chip 30 can be electrically connected to the first conductive layer 21 through the fifth conductive layer 31.

[0100] In some embodiments, the relationship between the total thickness H2 of the power switch chip 30, the fifth conductive layer 31, and the first adhesive layer 14 and the depth H1 of the groove 111 of the first thermally conductive layer 11 is as follows:

[0101] H1 = H2 + h;

[0102] Where h is the difference between H1 and H2, for example, h is 10 micrometers.

[0103] In some embodiments, the relationship between the horizontal distance X1 between the top boundary of the groove 111 of the first thermally conductive layer 11 and the boundary of the power switch chip 30, and the horizontal distance X2 between the bottom boundary of the groove 111 of the first thermally conductive layer 11 and the boundary of the power switch chip 30 is as follows:

[0104] L1≤X2≤X1≤L2;

[0105] Wherein, L1 is the first distance threshold and L2 is the second distance threshold. For example, L1 is 200 micrometers and L2 is 700 micrometers.

[0106] In some embodiments, the second thermally conductive layer 13 of the heat sink 10 is dry-mounted on the heat sink.

[0107] In some embodiments, the circuit board further includes a second conductive layer 22, which is disposed on a heat sink.

[0108] In some embodiments, the circuit board further includes a heat sink, on which a second adhesive layer is disposed, and a second thermally conductive layer 13 is disposed on the second adhesive layer. The second thermally conductive layer 13 is disposed on the heat sink through the second adhesive layer, so that the heat of the power switch chip 30 is conducted to the heat sink for heat dissipation in sequence through the first thermally conductive layer 11, the ceramic layer 12 and the second thermally conductive layer 13.

[0109] In some embodiments, the second conductive layer 22 is disposed on the second adhesive layer, and the second conductive layer 22 is disposed on the heat sink through the second adhesive layer.

[0110] In some embodiments, the material of the second adhesive layer includes silver.

[0111] In some embodiments, the shape of the second adhesive layer includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation.

[0112] In some embodiments, the second adhesive layer includes a plurality of second portions, at least a portion of which are isolated from each other.

[0113] In some embodiments, the shape of the second portion includes a circle, an ellipse, a rectangle, a polygon, or other shapes, without limitation herein.

[0114] In some embodiments, a plurality of second portions in the second adhesive layer are arranged in an array.

[0115] In some embodiments, the array comprising a plurality of second portions includes a matrix, a circular array, an elliptical array, a polygonal array, or other forms of array.

[0116] In some embodiments, the circuit board further includes a sixth conductive layer and a seventh conductive layer. The second thermal conductive layer 13 is disposed on the sixth conductive layer, the sixth conductive layer is disposed on the seventh conductive layer, the seventh conductive layer is disposed on the second adhesive layer, and the seventh conductive layer is disposed on the heat sink through the second adhesive layer, so that the heat of the power switch chip 30 is conducted to the heat sink for heat dissipation in sequence through the first thermal conductive layer 11, the ceramic layer 12, the second thermal conductive layer 13, the sixth conductive layer, and the seventh conductive layer.

[0117] In some embodiments, the second conductive layer 22 is disposed on the sixth conductive layer.

[0118] In some embodiments, the number of power switch chips 30 in the circuit board is multiple, and the number of heat sinks 10 in the circuit board is multiple. Each heat sink 10 corresponds to a power switch chip 30, and each heat sink 10 is disposed in the inner layer of the main board 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and the power switch chip 30 corresponding to the heat sink 10 is disposed in the groove 111.

[0119] In some embodiments, multiple power switch chips 30 in the circuit board are connected in parallel; the heat sinks 10 are isolated from each other by insulating material 25.

[0120] In some embodiments, the plurality of heat sinks 10 in the circuit board are arranged in an array.

[0121] In some embodiments, the array of multiple heat sinks 10 includes a matrix, a circular array, an elliptical array, a polygonal array, or other forms of array.

[0122] In some embodiments, the first thermally conductive layer 11 in each heat sink 10 is disposed below the first conductive layer 21 of the motherboard 20, and the second thermally conductive layer 13 in each heat sink 10 is on the same horizontal plane as the second conductive layer 22 of the motherboard 20.

[0123] For example, there are 10 power switch chips 30 in the circuit board and 10 heat sinks 10 in the circuit board. Each heat sink 10 corresponds to one power switch chip 30, and each heat sink 10 is disposed in the inner layer of the main board 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and the power switch chip 30 corresponding to the heat sink 10 is disposed in the groove 111. The 10 heat sinks 10 in the circuit board are arranged in a 2×5 matrix, that is, the matrix includes two rows and five columns.

[0124] In this embodiment, each heat sink 10 is disposed in the inner layer of the motherboard 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and the power switch chip 30 corresponding to the heat sink 10 is disposed in the groove 111. Thus, each power switch chip 30 can dissipate heat through the first thermally conductive layer 11, the ceramic layer 12, and the second thermally conductive layer 13. Since ceramic materials have better thermal conductivity than plastic materials, the heat dissipation effect is better compared with the heat dissipation of power switch chips through copper layers and thermally conductive insulating films of plastic materials in related technologies.

[0125] In some embodiments, the first conductive layer 21 is electrically connected to the first DC terminal of each power switch chip 30.

[0126] In some embodiments, a plurality of conductive vias 26 are provided between the first conductive layer 21 and each power switch chip 30, and the first conductive layer 21 is electrically connected to the first DC terminal of each power switch chip 30 through the conductive vias 26.

[0127] In this embodiment, since the first conductive layer 21 is electrically connected to the first DC terminal of each power switch chip 30, each power switch chip 30 can receive current signals through the first conductive layer 21, or each power switch chip 30 can output current signals through the first conductive layer 21.

[0128] In some embodiments, the third conductive layer 23 of the motherboard 20 is disposed below the first conductive layer 21, and the third conductive layer 23 is electrically connected to the second DC terminal of each power switch chip 30.

[0129] In some embodiments, the thickness of the third conductive layer 23 is equal to the thickness of the first thermally conductive layer 11 in at least a portion of the heat sink 10; in other embodiments, the thickness of the third conductive layer 23 is less than the thickness of the first thermally conductive layer 11 in at least a portion of the heat sink 10.

[0130] In some embodiments, the bottom surface of the third conductive layer 23 is on the same horizontal plane as the bottom surface of the first thermally conductive layer 11 in at least a portion of the heat sink 10; in other embodiments, the bottom surface of the third conductive layer 23 is higher than the bottom surface of the first thermally conductive layer 11 in at least a portion of the heat sink 10.

[0131] In some embodiments, the top surface of the third conductive layer 23 is below the same horizontal plane as the top surface of the first thermally conductive layer 11 in at least a portion of the heat sink 10; in other embodiments, the top surface of the third conductive layer 23 is below the top surface of the first thermally conductive layer 11 in at least a portion of the heat sink 10.

[0132] In this embodiment, by placing the third conductive layer 23 below the first conductive layer 21, compared to placing the third conductive layer 23 above the first conductive layer 21, it is advantageous to shorten the distance between the third conductive layer 23 and the second DC terminal of the power switch chip 30 for electrical connection. By electrically connecting the third conductive layer 23 to the second DC terminal of each power switch chip 30, each power switch chip 30 can receive current signals through the first conductive layer 21, or each power switch chip 30 can output current signals through the first conductive layer 21.

[0133] In some embodiments, the fourth conductive layer 24 of the motherboard 20 is disposed on the first conductive layer 21, and the fourth conductive layer 24 is electrically connected to the control terminal of each power switch chip 30.

[0134] In this embodiment, by placing the fourth conductive layer 24 of the motherboard 20 above the first conductive layer 21, compared to placing the fourth conductive layer 24 of the motherboard 20 below the first conductive layer 21, it is advantageous to shorten the distance between the fourth conductive layer 24 and the external control terminal for electrical connection. By electrically connecting the fourth conductive layer 24 to the control terminal of each power switch chip 30, each power switch chip 30 can receive external control signals through the fourth conductive layer 24.

[0135] In some embodiments, the number of power switch chips 30 in the circuit board is multiple, and the heat sink 10 is disposed in the inner layer of the main board 20. The heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12 and a second thermally conductive layer 13. The ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and each power switch chip 30 is disposed in the groove 111.

[0136] In some embodiments, multiple power switch chips 30 in the circuit board are connected in parallel; the power switch chips 30 are spaced apart by a third preset distance.

[0137] In some embodiments, the power switch chips 30 are isolated from each other by an insulating material 25.

[0138] In some embodiments, the plurality of power switch chips 30 in the groove 111 are arranged in an array.

[0139] In some embodiments, the array of multiple power switch chips 30 includes a matrix, a circular array, an elliptical array, a polygonal array, or other types of arrays.

[0140] For example, the circuit board contains 10 power switch chips 30, and the heat sink 10 is disposed in the inner layer of the motherboard 20. The heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. The ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 has a groove 111, and each power switch chip 30 is disposed in the groove 111. The 10 power switch chips 30 in the groove 111 are arranged in a 2×5 matrix, that is, the matrix includes two rows and five columns.

[0141] In this embodiment, the heat sink 10 is disposed on the inner layer of the motherboard 20. The heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. The ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and a plurality of power switch chips 30 are disposed in the groove 111. Each power switch chip 30 can dissipate heat through the first thermally conductive layer 11, the ceramic layer 12, and the second thermally conductive layer 13. Since ceramic materials have better thermal conductivity than plastic materials, the heat dissipation effect is better compared with the heat dissipation of power switch chips through copper layers and thermally conductive insulating films of plastic materials in related technologies.

[0142] In some embodiments, the number of power switch chips 30 in the circuit board is multiple, and the number of heat sinks 10 in the circuit board is multiple. Each heat sink 10 corresponds to a power switch chip 30, and each heat sink 10 is disposed in the inner layer of the main board 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and at least one power switch chip 30 corresponding to the heat sink 10 is disposed in the groove 111.

[0143] In some embodiments, the number of power switch chips 30 disposed in at least a portion of the heat sinks 10 is different.

[0144] In some embodiments, the arrangement of power switch chips 30 disposed in at least a portion of the heat sinks 10 is different.

[0145] For example, the circuit board contains 10 power switch chips 30 and 3 heat sinks 10, with each heat sink 10 corresponding to a power switch chip 30. Each heat sink 10 is located in the inner layer of the main board 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the first heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 has a groove 111, in which one power switch chip 30 is disposed. In the second heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. Layer 11 has a groove 111, in which four power switch chips 30 are arranged in a 2×2 matrix, i.e., the matrix includes two rows and two columns; in the third heat sink 10, the ceramic layer 12 is disposed between the first heat-conducting layer 11 and the second heat-conducting layer 13. The first heat-conducting layer 11 has a groove 111, in which five power switch chips 30 are arranged in a rectangular array, wherein one power switch chip 30 is disposed at each corner of the rectangular array and one power switch chip 30 is disposed at the geometric center of the rectangular array.

[0146] In this embodiment, each heat sink 10 is disposed in the inner layer of the motherboard 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, and at least one power switch chip 30 corresponding to the heat sink 10 is disposed in the groove 111. Then, each power switch chip 30 can dissipate heat through the first thermally conductive layer 11, the ceramic layer 12, and the second thermally conductive layer 13. Since ceramic materials have better thermal conductivity than plastic materials, the heat dissipation effect is better compared with the heat dissipation of power switch chips through copper layers and thermally conductive insulating films of plastic materials in related technologies.

[0147] In some embodiments, the number of power switch chips 30 in the circuit board is multiple, and the number of heat sinks 10 in the circuit board is multiple. Each heat sink 10 corresponds to a power switch chip 30, and each heat sink 10 is disposed in the inner layer of the main board 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with at least one groove 111, and at least one power switch chip 30 corresponding to the heat sink 10 is disposed in the groove 111.

[0148] In some embodiments, the plurality of grooves 111 in the heat sink 10 are arranged in an array.

[0149] In some embodiments, the array of multiple grooves 111 includes a matrix, a circular array, an elliptical array, a polygonal array, or other forms of array.

[0150] In some embodiments, the number of grooves 111 provided in at least a portion of the heat sinks 10 is different.

[0151] In some embodiments, the arrangement of the grooves 111 provided in at least a portion of the heat sinks 10 is different.

[0152] For example, the circuit board contains 10 power switch chips 30 and 3 heat sinks 10, with each heat sink 10 corresponding to a power switch chip 30. Each heat sink 10 is located in the inner layer of the main board 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the first heat sink 10, the ceramic layer 12 is located between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 has two grooves 111, and each groove 111 contains one power switch chip 30. In the second heat sink 10, the ceramic layer 12 is located between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 has two grooves 111, and each groove 111 contains one power switch chip 30. The first heat sink 10 has one groove 111 containing four power switch chips 30 arranged in a 2×2 matrix (two rows and two columns). The third heat sink 10 has a ceramic layer 12 positioned between the first heat-conducting layer 11 and the second heat-conducting layer 13. The first heat-conducting layer 11 has two grooves 111. The first groove 111 contains three power switch chips 30 arranged in a triangular array, with one power switch chip 30 at each corner of the triangular array. The second groove 111 contains one power switch chip 30.

[0153] In this embodiment, each heat sink 10 is disposed in the inner layer of the motherboard 20. Each heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. In the heat sink 10, the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with at least one groove 111, and at least one power switch chip 30 corresponding to the heat sink 10 is disposed in the groove 111. Then, each power switch chip 30 can dissipate heat through the first thermally conductive layer 11, the ceramic layer 12, and the second thermally conductive layer 13. Since ceramic materials have better thermal conductivity than plastic materials, the heat dissipation effect is better compared with the heat dissipation of power switch chips through copper layers and thermally conductive insulating films of plastic materials in related technologies.

[0154] This application also provides a power module, including the circuit board as described above.

[0155] The specific implementation process of the circuit board in the power module is similar to that of the aforementioned circuit board, and will not be repeated here.

[0156] This application also provides a motor controller, including the circuit board as described above, or including the power module as described above.

[0157] The specific implementation process of the circuit board in the motor controller is similar to that of the aforementioned circuit board, and will not be repeated here.

[0158] In some embodiments, the motor controller includes multiple bridge arms, each bridge arm including two half-bridges, and each half-bridge including a power module.

[0159] This application also provides an electric drive assembly, including the circuit board as described above, or the power module as described above, or the motor controller as described above.

[0160] The specific implementation process of the circuit board in the electric drive assembly is similar to that of the aforementioned circuit board implementation process, and will not be repeated here.

[0161] This application also provides a vehicle, including the circuit board as described above, or the power module as described above, or the motor controller as described above, or the electric drive assembly as described above.

[0162] The specific implementation process of the circuit board in the vehicle is similar to that of the aforementioned circuit board, and will not be repeated here.

[0163] In summary, in this embodiment, the heat sink 10 is disposed on the inner layer of the motherboard 20. The heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13. The ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13. The first thermally conductive layer 11 is provided with a groove 111, in which a power switch chip 30 is disposed. The power switch chip 30 can dissipate heat through the first thermally conductive layer 11, the ceramic layer 12, and the second thermally conductive layer 13. Since ceramic materials have better thermal conductivity than plastic materials, the heat dissipation effect is better compared with the heat dissipation of power switch chips through copper layers and thermally conductive insulating films of plastic materials in related technologies.

[0164] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0165] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

[0166] The embodiments of the present invention also include the following notes:

[0167] This application provides a circuit board including a motherboard 20, a power switch chip 30, and a heat sink 10; the heat sink 10 is disposed in the inner layer of the motherboard 20, and the heat sink 10 includes a first thermally conductive layer 11, a ceramic layer 12, and a second thermally conductive layer 13; the ceramic layer 12 is disposed between the first thermally conductive layer 11 and the second thermally conductive layer 13; the first thermally conductive layer 11 is provided with a groove 111, and the power switch chip 30 is disposed in the groove 111.

[0168] In some embodiments, the first thermal conductive layer 11 is disposed below the first conductive layer 21 of the motherboard 20, and the second thermal conductive layer 13 is on the same horizontal plane as the second conductive layer 22 of the motherboard 20.

[0169] In some embodiments, the first conductive layer 21 is electrically connected to the first end of the power switch chip 30.

[0170] In some embodiments, the third conductive layer 23 of the motherboard 20 is disposed below the first conductive layer 21, and the third conductive layer 23 is electrically connected to the second end of the power switch chip 30.

[0171] In some embodiments, the fourth conductive layer 24 of the motherboard 20 is disposed on the first conductive layer 21, and the fourth conductive layer 24 is electrically connected to the control terminal of the power switch chip 30.

[0172] In some embodiments, the first thermally conductive layer 11 further includes a first adhesive layer 14; the power switch chip 30 is disposed at the bottom of the groove 111 through the first adhesive layer 14.

[0173] In some embodiments, the first surface of the power switch chip 30 is connected to the bottom surface of the groove 111, and the second surface of the power switch chip 30 is provided with a fifth conductive layer 31.

[0174] This application also provides a power module, including the circuit board as described above.

[0175] This application also provides an inverter, including the circuit board as described above, or including the power module as described above.

[0176] This application also provides a vehicle that includes the circuit board as described above, or the power module as described above, or the inverter as described above.

Claims

1. A circuit board, characterized in that, Includes a power switch chip (30) and a heat sink (10); The heat sink (10) includes a first heat-conducting layer (11), a ceramic layer (12), and a second heat-conducting layer (13); The ceramic layer (12) is disposed between the first thermally conductive layer (11) and the second thermally conductive layer (13); The first thermally conductive layer (11) is provided with a groove (111), and the power switch chip (30) is disposed in the groove (111).

2. The circuit board according to claim 1, characterized in that, The groove (111) is disposed on the side of the first heat-conducting layer (11) away from the ceramic layer (12).

3. The circuit board according to claim 1 or 2, characterized in that, The circuit board also includes a first conductive layer (21), which is electrically connected to the first DC terminal of the power switch chip (30).

4. The circuit board according to claim 3, characterized in that, The circuit board also includes a third conductive layer (23), which is electrically connected to the second DC terminal of the power switch chip (30).

5. The circuit board according to claim 3 or 4, characterized in that, The first thermally conductive layer (11) is disposed between the first conductive layer (21) and the second thermally conductive layer (13).

6. The circuit board according to any one of claims 1 to 5, characterized in that, The second heat-conducting layer (13) of the heat sink (10) is dry-mounted on the heat sink.

7. The circuit board according to any one of claims 1 to 6, characterized in that, The circuit board also includes a second conductive layer (22), which is used to be disposed on the heat sink.

8. The circuit board according to claim 7, characterized in that, The second conductive layer (22) and the second thermally conductive layer (13) are flush with each other on the side facing the heat sink.

9. The circuit board according to any one of claims 1 to 8, characterized in that, The circuit board also includes a fourth conductive layer (24), which is electrically connected to the control terminal of the power switch chip (30).

10. The circuit board according to any one of claims 1 to 9, characterized in that, The first thermally conductive layer (11) further includes a first adhesive layer (14); the power switch chip (30) is disposed at the bottom of the groove (111) through the first adhesive layer (14).

11. The circuit board according to any one of claims 1 to 10, characterized in that, The circuit board also includes a fifth conductive layer (31), which is located on the side of the power switch chip (30) away from the bottom of the groove (111); The fifth conductive layer (31) and the first thermal conductive layer (11) are flush with each other on the side away from the power switch chip (30), or the surface of the fifth conductive layer (31) on the side away from the power switch chip (30) is lower than the surface of the first thermal conductive layer on the side away from the power switch chip (30).

12. The circuit board according to any one of claims 1 to 11, characterized in that, The projected area of ​​the first thermally conductive layer (11) on the surface of the ceramic layer (12) is smaller than the area of ​​the ceramic layer (12); and / or: The projected area of ​​the second thermally conductive layer (13) on the surface of the ceramic layer (12) is smaller than the area of ​​the ceramic layer (12).

13. A power module, characterized in that, The circuit board includes any one of claims 1 to 12.

14. A motor controller, characterized in that, It includes a circuit board as described in any one of claims 1 to 12, or a power module as described in claim 13.

15. An electric drive assembly, characterized in that, It includes a circuit board as described in any one of claims 1 to 12, or a power module as described in claim 13, or a motor controller as described in claim 14.

16. A vehicle, characterized in that, It includes a circuit board as described in any one of claims 1 to 12, or a power module as described in claim 13, or a motor controller as described in claim 14, or an electric drive assembly as described in claim 15.

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