A method for solving the inner layer interconnection defects of an AI computing power circuit board

Abstract

The application discloses a method for solving AI computing power circuit board inner layer interconnection defects, comprising the following steps: preparing a production board, the production board is provided with a drilling position, and two surfaces of the production board are a first surface and a second surface; drilling a first pre-drilling hole on the first surface of the production board corresponding to the drilling position by using a depth control drilling method, the hole diameter of the first pre-drilling hole is smaller than the outer diameter of the drilling position; after turning over the production board, drilling a second pre-drilling hole on the second surface of the production board corresponding to the drilling position by using a depth control drilling method, the second pre-drilling hole is not communicated with the first pre-drilling hole, and the hole diameter of the second pre-drilling hole is smaller than the outer diameter of the drilling position; finally, drilling a through hole which is drilled from top to bottom on the second surface of the production board corresponding to the drilling position, and the hole diameter of the through hole is the same as the hole diameter of the drilling position. The method improves the quality of drilling and reduces the risk of broken drill during drilling.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, and specifically to a method for solving the internal interconnection defects of AI computing power circuit boards. Background Technology

[0002] For high-speed, high-end computing power circuit boards, taking NVIDIA's AI computing power board as an example, the board thickness is 6-8mm, the hole diameter is 0.2-0.25mm, and the thickness-to-diameter ratio is 24:1 to 40:1 (compared to only 6:1 to 10:1 for ordinary server boards). The inner layer dielectric material is extremely hard, using M8 / M9 grade high-frequency, high-speed materials (quartz cloth, high-silicon filler), with a hardness 3-5 times that of FR-4. The number of holes is extremely high: 50,000 to 100,000 holes per board, requiring no steps, no nail heads, and smooth hole walls to meet the integrity requirements of 112Gbps+ high-speed signals. If single-sided drilling is used during drilling, many fatal problems will occur: such as extremely large drill bit slenderness ratio, insufficient rigidity, extremely high sway / breakage rate, copper chipping at the entrance, burrs at the exit, and large hole wall roughness, which cannot meet the requirements of high-frequency signals; cumulative coaxiality error, excessive hole position misalignment, affecting the yield of subsequent copper plating / electroplating.

[0003] Secondly, in the context of PCB manufacturing, "ICD" mostly refers to Inter Connect Defect, which is the failure to form a reliable connection between the hole wall and the inner copper foil in a multilayer board. It is an interlayer interface failure behavior, which often manifests as gaps, oxide residues, or plating separation between the copper layer on the hole wall and the inner copper foil. ICD occurs more frequently, especially in the deep micro-blind vias and stacked via structures of HDI and AI computing power circuit boards. This type of defect may be intermittently conductive at room temperature, but it is easy to expand into an open circuit after thermal cycling, and it is difficult to detect 100%, which is a fatal reliability defect.

[0004] The mechanism of resin residue-type ICDs is mainly due to excessive resin production, incomplete resin removal, poor drill bit cutting leading to high frictional temperatures, melting resin which is then pulled to form drill slag, insufficient chip removal resulting in a large amount of drill slag remaining in the hole, and subsequent resin removal processes (such as plasma or potassium permanganate) having an incompatible effective resin removal capacity with the product, failing to completely remove the residual resin residue from the hole wall. This resin residue will isolate the bonding between the copper layer on the hole wall and the inner copper foil, forming a resin residue-type ICD.

[0005] Drilling can negatively impact adhesive-laden ICDs, primarily in the following ways: Vacuuming directly affects chip removal and cooling, reducing the risk of drill slag residue in the hole; excessive drill bit wear reduces cutting ability, easily causing overheating of the drill bit, and carbonized drill slag hinders adhesive removal, leading to gaps in the inner copper layer; improper drilling parameters can easily cause hole wall scratches, prevent drill slag removal, and cause overheating of the drill bit, with carbonized drill slag hindering adhesive removal; improper step-by-step drill return methods are detrimental to chip removal and drill bit heat dissipation, easily causing excessive drill slag and drill slag carbonization; and incomplete cleaning of dust inside the hole can easily lead to foreign object residue. Summary of the Invention

[0006] In view of the above-mentioned technical defects, the present invention provides a method for solving the internal interconnection defects of AI computing power circuit boards, which improves the drilling quality and reduces the risk of tool breakage during drilling.

[0007] To address the aforementioned technical problems, this invention provides a method for resolving internal interconnection defects in AI computing power circuit boards, comprising the following steps: S1. Prepare a production board, which has drilling positions and two surfaces of the production board, namely the first surface and the second surface. S2. Drill a first pre-drilled hole at the corresponding drilling position on the first surface of the production board using controlled depth drilling. The first pre-drilled hole is a blind hole, and the diameter of the first pre-drilled hole is smaller than the outer diameter of the drilling position. S3. After flipping the production board, a second pre-drilled hole is drilled at the corresponding drilling position on the second surface of the production board using controlled depth drilling. The second pre-drilled hole is not connected to the first pre-drilled hole, that is, the second pre-drilled hole is also a blind hole. The diameter of the second pre-drilled hole is smaller than the outer diameter of the drilling position. S4. Finally, drill through holes on the second surface of the production board at the corresponding drilling positions, with the diameter of the through holes being the same as the diameter of the drilling positions.

[0008] Furthermore, the depth of the first pre-drilled hole is 60-70% of the thickness of the production board, and the depth of the second pre-drilled hole is 30-40% of the thickness of the production board.

[0009] Furthermore, an un-drilled allowance is provided between the second pre-drilled hole and the first pre-drilled hole to separate them, serving as an isolation position so that the second pre-drilled hole and the first pre-drilled hole are not connected.

[0010] Furthermore, the thickness of the isolation position is 0.11-0.2 mm.

[0011] Furthermore, when the thickness of the production board is 6.0 mm, the thickness of the isolation position is 0.2 mm; when the thickness of the production board is 6.6 mm, the thickness of the isolation position is 0.15 mm; and when the thickness of the production board is 6.9-7.0 mm, the thickness of the isolation position is 0.11 mm.

[0012] Furthermore, in step S2, the diameter of the first pre-drilled hole is 0.05 mm smaller than the outer diameter of the drilled hole.

[0013] Furthermore, in step S3, the diameter of the second pre-drilled hole is 0.05-0.1 mm smaller than the outer diameter of the drilled hole.

[0014] Furthermore, in step S4, the thickness-to-diameter ratio of the through hole is ≥20:1.

[0015] Furthermore, a carbide drill bit is used for drilling, and a diamond coating is plated on the surface of the carbide drill bit. The helix angle of the carbide drill bit is 25°-30°, and the groove width ratio of the carbide drill bit is 1.1:1. In addition, a 0.2mm thick coated aluminum sheet is covered on the surface of the production board during drilling.

[0016] Furthermore, the following steps are included after step S4: S5. The production boards are subjected to high-pressure water washing and plasma treatment in sequence.

[0017] Furthermore, the production board is a multilayer board in which an inner core board and an outer copper foil are laminated together by a prepreg, and the inner core board has been fabricated with inner layer circuitry before lamination.

[0018] Compared with the prior art, the present invention has the following beneficial effects: In this invention, a first pre-drilled hole and a second pre-drilled hole are drilled on the first and second surfaces of the production board using controlled-depth drilling. These pre-drilled holes are vertically aligned but not connected, meaning they do not penetrate the entire production board. This dual-surface pre-drilling method reduces the depth and cutting amount of a single drilling operation, thus lowering the risk of tool breakage. Then, a through hole is drilled using a drill bit with the same outer diameter as the hole location. Although this through hole penetrates the entire production board vertically and vertically, and the penetration depth is relatively deeper than during pre-drilling, the center of the upper and lower portions of the hole location has already been removed by pre-drilling. Therefore, only the remaining material in the hole wall needs to be cut, resulting in a small overall cutting amount and minimizing the risk of tool breakage. The drilling efficiency is also lower, and the drill cuttings at the hole wall are easier to break, facilitating chip removal and reducing drilling contamination. This significantly reduces ICD defects and ensures a smooth hole wall without burrs or spikes, meeting the requirements for 112Gbps high-speed signal transmission. The margin between the two pre-drilled holes reduces burr generation and improves drilling quality. If the second pre-drilled hole is connected to the first pre-drilled hole before drilling through the hole, the drill bit is prone to slippage and deflection at the moment the second pre-drilled hole penetrates the hole position because the space below has been drilled. This is especially true when the diameter of the second pre-drilled hole is smaller than that of the first pre-drilled hole, which can easily lead to slag and burrs at the junction of the two pre-drilled holes.

[0019] Secondly, by utilizing coaxial alignment, the center coordinates of the hole are accurately recorded after the first pre-drilled hole is completed. When machining the second pre-drilled hole, the drill bit axis will be aligned with the center of the first pre-drilled hole, which greatly reduces the docking error between the upper and lower pre-drilled holes. After drilling the second pre-drilled hole, when continuing to drill through holes directly on the second surface, it can be ensured that the axis of the through hole overlaps with the center of the second pre-drilled hole. Moreover, at the moment when the drill bit drills through the remaining material, the first pre-drilled hole will also guide the drill bit to enter along the path of least resistance, achieving a guiding effect, avoiding the drill bit from swaying during drilling, ensuring the coaxiality of the hole position, and further improving the hole wall quality of the through hole.

[0020] In addition, using a carbide drill bit with a diamond coating and a coated aluminum sheet during drilling can improve the heat dissipation of the drill bit, suppress the formation of coarse holes and slag, and further reduce the occurrence of ICD defects. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of drilling the first pre-drilled hole on the production board in the embodiment; Figure 2 This is a schematic diagram of drilling a second pre-drilled hole on the production board in the embodiment; Figure 3 This is a schematic diagram illustrating the drilling of through holes on the production board in the embodiment. Detailed Implementation

[0022] To better understand the technical content of this invention, the technical solution of this invention will be further introduced and explained below in conjunction with specific embodiments.

[0023] Example This embodiment illustrates a method for manufacturing a circuit board, which includes a mixed-color ink solder resist process, comprising the following processing steps in sequence: (1) Cutting: Cut the core board according to the panel size of 520mm×620mm. The thickness of the core board is 0.5mm. The copper layer thickness on both surfaces of the core board is 0.5oz. The inner layer medium of the core board is M8 / M9 grade high frequency and high speed material (such as quartz cloth or high silicon filler).

[0024] (2) Inner layer circuit fabrication (negative film process): Inner layer pattern transfer, photosensitive film is coated using a vertical coating machine, and the film thickness of the photosensitive film is controlled at 8μm. The inner layer circuit is exposed using a fully automatic exposure machine with 5-6 exposure rulers (21 exposure rulers). After development, the inner layer circuit pattern is formed; Inner layer etching, the inner layer circuit is etched out on the core board after exposure and development. The inner layer line width is measured to be 3mil; Inner layer AOI, and then the inner layer circuit is inspected for defects such as open circuits, short circuits, line gaps, and line pinholes. Defective products are scrapped, and defect-free products are sent to the next process.

[0025] (3) Pressing: The browning speed is according to the thickness of the bottom copper. The core board, prepreg and outer copper foil are stacked in sequence as required. Then, according to the Tg of the board material, the appropriate lamination conditions are selected to press the stacked board to form the production board. The two surfaces of the production board are the first surface and the second surface, and there are several drilling positions on the production board. The drilling positions are the positions that need to be drilled in subsequent processing.

[0026] (4) Drilling: Specifically includes the following steps: S1. Place the production board on the drilling machine table, with the first surface of the production board facing upwards. Drill the first pre-drilled hole 1 (e.g., at the corresponding drilling position on the first surface of the production board) using controlled depth drilling. Figure 1 As shown), the depth of the first pre-drilled hole is 60-70% of the thickness of the production board, that is, the first pre-drilled hole is a blind hole; the diameter of the first pre-drilled hole is smaller than the outer diameter of the drilling position, that is, there is still cutting residue to be removed on the hole wall of the first pre-drilled hole. S2. After flipping the production board so that its second surface faces upward, drill the second pre-drilled hole 2 at the corresponding drilling position on the second surface of the production board using controlled depth drilling (e.g., Figure 2 As shown), the depth of the second pre-drilled hole is 30-40% of the thickness of the production board, and there is an un-drilled allowance between the second pre-drilled hole 2 and the first pre-drilled hole 1 to separate them, serving as an isolation position 3 (as shown). Figure 2 As shown), so that the second pre-drilled hole 2 is not connected to the first pre-drilled hole 1, that is, the second pre-drilled hole is also a blind hole, and the diameter of the second pre-drilled hole is smaller than the outer diameter of the drilling position. S3. Keeping the second surface of the production board facing upwards, finally drill through holes 4 (e.g., vertical drilling) at the corresponding drilling positions on the second surface of the production board. Figure 3 As shown), the diameter of the through hole 4 is the same as the diameter of the drill hole, that is, the outer diameter of the drill bit when drilling the through hole is the same as the diameter of the through hole.

[0027] In one embodiment, the thickness of the thinnest part of the isolation position 3 is 0.11-0.2 mm, and the thickness is selected according to different board thicknesses; specifically, when the board thickness is 6.0 mm, the thickness of the isolation position is 0.2 mm; when the board thickness is 6.6 mm, the thickness of the isolation position is 0.15 mm; and when the board thickness is 6.9-7.0 mm, the thickness of the isolation position is 0.11 mm.

[0028] In one embodiment, the diameter of the first pre-drilled hole 1 is 0.05 mm smaller than the outer diameter of the drilled hole.

[0029] In one embodiment, the diameter of the second pre-drilled hole 2 is 0.05-0.1 mm smaller than the outer diameter of the drilled hole; preferably, the diameter of the second pre-drilled hole 2 is 0.1 mm smaller than the outer diameter of the drilled hole, that is, the diameter of the second pre-drilled hole is smaller than the diameter of the first pre-drilled hole.

[0030] In one embodiment, the thickness-to-diameter ratio of the through hole is ≥20:1. For example, if the thickness of the production board is 6mm and the diameter of the through hole is 0.25mm, the thickness-to-diameter ratio of the through hole is 24:1.

[0031] In one embodiment, a carbide drill bit (such as a tungsten carbide drill bit) is used for drilling. The surface of the carbide drill bit is coated with a diamond coating to improve the wear resistance of the drill bit. In addition, a 0.2mm thick coated aluminum sheet (i.e. an aluminum sheet with a resin coating) is covered on the surface of the production board for each drilling operation, which can effectively improve the heat dissipation of the drill bit and suppress the generation of coarse holes and glue residue.

[0032] In one embodiment, the helix angle of the carbide drill bit is 25°-30°, which can effectively ensure rigidity and chip removal, and reduce the risk of tool breakage / deviation. In addition, the groove width ratio (referring to the ratio of the drill bit helical groove width to the drill bit diameter) of the carbide drill bit is 1.1:1. This drill bit groove width ratio has the best chip removal effect when drilling high aspect ratio products of AI computing power PCB. This ratio is the optimal balance point between "core thickness rigidity" and "groove width chip removal", which ensures sufficient core strength of the drill bit and provides sufficient chip removal channels.

[0033] In one embodiment, a carbide drill bit with a length-to-diameter ratio of 30 is used for drilling, which reduces the number of holes drilled per drill bit and the number of grinding cycles, ensuring the sharpness of the cutting edge and reducing the residue of adhesive residue caused by high drilling temperatures.

[0034] In one embodiment, drilling only one production board at a time reduces hole roughness and wall residue compared to drilling at least two production boards simultaneously, thus improving hole wall quality.

[0035] In one embodiment, a Schmoll drilling machine from Germany is selected for drilling, with a hole position accuracy of CPK1.33 or higher and a spindle runout of ≤10μm, ensuring that the hole position accuracy is controlled within ±2mil.

[0036] (5) Removal of drilling residue: The production board is subjected to high-pressure water washing and plasma treatment in sequence to remove residual adhesive in the holes.

[0037] (6) Copper plating: A thin layer of copper is deposited on the board surface and hole walls using chemical copper plating. The backlight test is level 10, and the copper plating thickness in the hole is 0.5μm.

[0038] (7) Full-board electroplating: The production board is subjected to full-board electroplating treatment.

[0039] (8) Fabrication of outer layer circuits (positive film process): The outer layer pattern is transferred using a fully automatic exposure machine and positive film circuit film. The outer layer circuit is exposed using an exposure ruler of 5 to 7 divisions (21 divisions). After development, the outer layer circuit pattern is formed on the production board. The outer layer pattern is electroplated, and then copper and tin are plated on the production board respectively. The electroplating parameters are set according to the required copper thickness. Copper plating is performed at a current density of 1.8 ASD for 60 minutes, and tin plating is performed at a current density of 1.2 ASD for 10 minutes, with a tin thickness of 3 to 5 μm. Then, the film is removed, etched, and tin is removed in sequence to etch the outer layer circuit on the production board. The outer layer AOI is performed using an automatic optical inspection system. By comparing with the CAM data, the outer layer circuit is checked for defects such as open circuits, gaps, incomplete etching, and short circuits.

[0040] (9) Solder resist and screen printing: After screen printing solder resist ink on the surface of the production board, it is then subjected to pre-curing, exposure, development and heat curing treatment in sequence to cure the solder resist ink into a solder resist layer; specifically, the solder resist ink on the TOP side and the characters on the TOP side are added with "UL mark", thereby coating a layer on the lines and substrates that do not need to be soldered to prevent bridging between lines during soldering, provide a permanent electrical environment and chemical corrosion resistance, and at the same time beautify the appearance.

[0041] (10) Surface treatment (immersion nickel and gold): The copper surface of the solder pads of the solder mask opening position is uniformly deposited with a nickel layer and a gold layer of a certain required thickness through chemical principle. The thickness of the nickel layer is 3-5μm; the thickness of the gold layer is 0.05-0.1μm.

[0042] (11) Electrical test: Test the electrical conductivity of the finished board. The test method used for this board is: flying probe test.

[0043] (12) Molding: Based on existing technology and design requirements, the circuit board is made with a shape tolerance of + / -0.05mm.

[0044] (13) FQC: In accordance with the customer's acceptance standards and the applicant's inspection standards, inspect the appearance of the circuit board, and repair any defects in a timely manner to ensure excellent quality control for the customer.

[0045] (14) FQA: Re-test the appearance of the circuit board, the thickness of the copper in the holes, the thickness of the dielectric layer, the thickness of the solder mask, the thickness of the inner copper layer, etc. to see if they meet the customer's requirements.

[0046] (15) Packaging: The circuit boards are sealed according to the packaging method and quantity required by the customer, and desiccant and humidity card are placed in the packaging before shipment.

[0047] The technical solutions provided by the embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the embodiments of the present invention. The descriptions of the embodiments above are only for helping to understand the principles of the embodiments of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the embodiments of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for solving internal layer interconnection defects in AI computing power circuit boards, characterized in that, Includes the following steps: S1. Prepare a production board, which has drilling positions and two surfaces of the production board, namely the first surface and the second surface. S2. Drill a first pre-drilled hole at the corresponding drilling position on the first surface of the production board using controlled depth drilling. The diameter of the first pre-drilled hole is smaller than the outer diameter of the drilling position. S3. After flipping the production board, drill a second pre-drilled hole at the corresponding drilling position on the second surface of the production board using controlled depth drilling. The second pre-drilled hole is not connected to the first pre-drilled hole, and the diameter of the second pre-drilled hole is smaller than the outer diameter of the drilling position. S4. Finally, drill through holes on the second surface of the production board at the corresponding drilling positions, with the diameter of the through holes being the same as the diameter of the drilling positions.

2. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 1, characterized in that, The depth of the first pre-drilled hole is 60-70% of the thickness of the production board, and the depth of the second pre-drilled hole is 30-40% of the thickness of the production board.

3. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 1, characterized in that, An un-drilled allowance is provided between the second pre-drilled hole and the first pre-drilled hole to separate them, serving as an isolation position so that the second pre-drilled hole and the first pre-drilled hole are not connected.

4. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 3, characterized in that, The thickness of the isolation position is 0.11-0.2 mm.

5. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 4, characterized in that, When the thickness of the production board is 6.0mm, the thickness of the isolation position is 0.2mm; when the thickness of the production board is 6.6mm, the thickness of the isolation position is 0.15mm; when the thickness of the production board is 6.9-7.0mm, the thickness of the isolation position is 0.11mm.

6. The method for solving the internal interconnection defects of AI computing power circuit boards according to any one of claims 1-5, characterized in that, The diameter of the first pre-drilled hole is 0.05 mm smaller than the outer diameter of the drilled hole, and the diameter of the second pre-drilled hole is 0.05-0.1 mm smaller than the outer diameter of the drilled hole.

7. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 1, characterized in that, In step S4, the thickness-to-diameter ratio of the through hole is ≥20:

1.

8. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 1, characterized in that, When drilling, a carbide drill bit is used, and the surface of the carbide drill bit is coated with a diamond coating. The helix angle of the carbide drill bit is 25°-30°, and the groove width ratio of the carbide drill bit is 1.1:

1. In addition, a 0.2mm thick coated aluminum sheet is covered on the surface of the production board during drilling.

9. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 1, characterized in that, Step S4 is followed by the following steps: S5. The production boards are subjected to high-pressure water washing and plasma treatment in sequence.

10. The method for solving the internal interconnection defects of AI computing power circuit boards according to claim 1, characterized in that, The production board is a multilayer board in which an inner core board and an outer copper foil are laminated together by a prepreg, and the inner core board has already been fabricated with inner circuitry before lamination.

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