Semiconductor structure and method of forming a semiconductor structure

Abstract

The application discloses a semiconductor structure and a method for forming the semiconductor structure. The semiconductor structure comprises a substrate and a fin structure containing carbon nanotubes. The fin structure is located on the substrate and extends along a first direction. The fin structure comprises first material layers and second material layers which are alternately stacked. The surface wettability of the first material layers is consistent with the surface wettability of the carbon nanotubes. The surface wettability of the second material layers is different from the surface wettability of the first material layers. Two side surfaces of the first material layers are formed with grooves which extend along a second direction. The carbon nanotubes are located in the grooves. Therefore, the semiconductor structure receives the carbon nanotubes through the grooves in the fin structure in a vertical direction. The current of a carbon nanotube field effect transistor based on the semiconductor structure can be determined by the vertical height. The transistor has super-high device integration and super-high transistor drive current. The semiconductor structure is suitable for current improvement of a super-high integration device when the transistor size is micronized to the nanometer scale.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a semiconductor structure and a method for forming a semiconductor structure. Background Technology

[0002] Due to their high carrier mobility, carbon nanotubes have become a hot topic of interest for future high-performance logic transistors.

[0003] However, the carbon nanotube field effect transistor (CNTFET) in related technologies has a planar structure, which cannot simultaneously achieve ultra-high device integration and ultra-high transistor drive current, thus making it difficult to meet the semiconductor industry's demand for high device integration and high performance. Summary of the Invention

[0004] To address the problems of the prior art, this application provides a semiconductor structure and a method for forming the semiconductor structure. The technical solution is as follows:

[0005] On the one hand, a semiconductor structure is provided, comprising:

[0006] Substrate;

[0007] A fin structure containing carbon nanotubes is located on the substrate. The fin structure includes alternating stacked first and second material layers. The surface wettability of the first material layer is consistent with the surface wettability of the carbon nanotubes, and the surface wettability of the second material layer is different from the surface wettability of the first material layer. The fin structure extends along a first direction.

[0008] The first material layer has grooves extending along a second direction formed on both sides, and the carbon nanotubes are located in the grooves; the second direction is perpendicular to the first direction, and the first direction and the second direction are parallel to the surface of the substrate.

[0009] In some exemplary embodiments, the thickness of the first material layer is greater than or equal to the diameter of the carbon nanotube, and the depth of the groove in the second direction is greater than or equal to the diameter of the carbon nanotube.

[0010] In some exemplary embodiments, the thickness of the first material layer is less than twice the diameter of the carbon nanotube, and the depth of the groove in the second direction is less than twice the diameter of the carbon nanotube.

[0011] In some exemplary embodiments, when the surface wettability of the carbon nanotubes is hydrophilic, the first material layer is composed of silicon dioxide and the second material layer is composed of silicon.

[0012] In some exemplary embodiments, the semiconductor structure further includes:

[0013] A gate structure is located on the fin structure;

[0014] The source / drain regions are located on the fin structures on both sides of the gate structure and are in contact with the carbon nanotubes in the fin structures.

[0015] On the other hand, a method for forming a semiconductor structure is provided, which can be used to form any of the aforementioned semiconductor structures, including:

[0016] A substrate is provided, the substrate comprising a substrate and alternatingly stacked first and second material layers on the substrate, the first and second material layers extending along a first direction, the surface wettability of the first material layer being consistent with the surface wettability of the carbon nanotubes to be formed, and the surface wettability of the second material layer being different from the surface wettability of the first material layer.

[0017] A portion of the width of the first material layer is removed from the sidewall of the first material layer along a second direction to form a groove surrounded by adjacent second material layers; the second direction is parallel to the substrate surface and perpendicular to the first direction;

[0018] The carbon nanotubes are formed within the groove to obtain a fin structure containing the carbon nanotubes.

[0019] In one exemplary embodiment, the thickness of the first material layer is greater than or equal to the diameter of the carbon nanotube, and the depth of the groove in the second direction is greater than or equal to the diameter of the carbon nanotube.

[0020] In one exemplary embodiment, the thickness of the first material layer is less than twice the diameter of the carbon nanotube, and the depth of the groove in the second direction is less than twice the diameter of the carbon nanotube.

[0021] In one exemplary embodiment, forming the carbon nanotubes within the groove to obtain a fin structure comprising the carbon nanotubes includes:

[0022] The substrate with the grooves formed thereon is immersed in a carbon nanotube solution;

[0023] The substrate, after being immersed in the carbon nanotube solution, is cleaned to remove carbon nanotubes deposited outside the grooves.

[0024] In one exemplary embodiment, after cleaning the substrate immersed in the carbon nanotube solution, the method further includes:

[0025] A plasma dry etching process is used to etch the substrate in a direction perpendicular to the substrate to remove carbon nanotubes remaining on the substrate surface.

[0026] In one exemplary embodiment, the etching gas in the plasma dry etching process is a plasma gas containing oxygen and argon.

[0027] In one exemplary embodiment, the process of removing a portion of the width of the first material layer along a second direction from the sidewall of the first material layer to form a groove surrounded by adjacent second material layers includes:

[0028] Isotropic selective etching is performed along the second direction from the sidewall of the first material layer; the selective etching rate on the first material layer is greater than the etching rate on the second material layer.

[0029] In one exemplary embodiment, after obtaining the fin structure comprising the carbon nanotubes, the method may further include:

[0030] A gate structure is formed on the fin structure;

[0031] On the fin structure, source / drain regions are formed on both sides of the gate structure, and the source / drain regions are in contact with the carbon nanotubes in the fin structure.

[0032] On the other hand, an electronic device is provided, the electronic device comprising a semiconductor structure formed using any of the foregoing methods for forming a semiconductor structure.

[0033] The semiconductor structure of this application embodiment includes a substrate and a fin structure containing carbon nanotubes. The fin structure is located on the substrate and extends along a first direction. The fin structure includes alternating stacked first and second material layers. The surface wettability of the first material layer is consistent with the surface wettability of the carbon nanotubes, while the surface wettability of the second material layer is different from that of the first material layer. Grooves extending along a second direction are formed on both sides of the first material layer, and the carbon nanotubes are located in the grooves. Thus, the semiconductor structure receives the carbon nanotubes in the vertical direction through the grooves in the fin structure. This allows the current of the carbon nanotube field-effect transistor based on the semiconductor structure to be determined by the vertical height. Therefore, it can have ultra-high device integration while also having ultra-high transistor drive current, making it suitable for current enhancement of ultra-high integration devices with transistor size miniaturized to the nanoscale. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1a This is a schematic diagram of the transverse cross-section of a carbon nanotube field-effect transistor in the prior art;

[0036] Figure 1b yes Figure 1a A top-down view;

[0037] Figure 2 This is a cross-sectional view of the semiconductor structure provided in the embodiments of this application;

[0038] Figure 3 This is a top view schematic diagram of another semiconductor structure provided in the embodiments of this application;

[0039] Figure 4 This is a flowchart illustrating a method for forming a semiconductor structure according to an embodiment of this application;

[0040] Figures 5 to 10 This is a schematic diagram of the semiconductor structure formation process provided in the embodiments of this application. Detailed Implementation

[0041] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0042] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe specific objects or a sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or server that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or devices.

[0043] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this application.

[0044] The carbon nanotube field-effect transistors in related technologies have a planar structure. Figure 1a The image shown is a schematic diagram of a cross-section of a carbon nanotube field-effect transistor in the prior art. Figure 1b As shown Figure 1a A top-down view. (See diagram below.) Figure 1a and Figure 1b As shown, a carbon nanotube array is laid flat on a substrate 102 in a film-like manner. It includes multiple carbon nanotubes 101 arranged at intervals on the substrate 102 and located between the source region 103 and the drain region 104. The carbon nanotube array 101 serves as the channel of the transistor. Therefore, the driving current lon of the carbon nanotube field-effect transistor is proportional to the width W of the carbon nanotube array 101. In other words, if the carbon nanotube field-effect transistor in the prior art is to have an ultra-high transistor driving current, a carbon nanotube array 101 with a larger width W is required. This will inevitably lead to a decrease in device integration, making it impossible to simultaneously obtain ultra-high device integration and a driving current exceeding that of the transistor, thus making it difficult to meet the semiconductor industry's demand for high device integration and high performance.

[0045] Therefore, this application provides a semiconductor structure, please refer to the embodiments provided. Figure 2 The diagram shown is a cross-sectional view of a semiconductor structure provided in an embodiment of this application, as shown below. Figure 2 As shown, the semiconductor structure 200 includes a substrate 210 and a fin structure 220 containing carbon nanotubes 230. The carbon nanotubes 230 can be single-walled carbon nanotubes or multi-walled carbon nanotubes, and the carbon nanotubes 230 in the fin structure 220 can be used to form channels for carbon nanotube field-effect transistors formed in subsequent processes.

[0046] The fin structure 220 extends along a first direction (hereinafter referred to as the X direction) parallel to the surface of the substrate 210. The fin structure 220 includes alternately stacked first material layers 221 and second material layers 222. The surface wettability of the first material layer 221 is consistent with the surface wettability of the carbon nanotube 230, and the surface wettability of the second material layer 222 is different from that of the first material layer 221, and thus different from that of the carbon nanotube 230. For example, assuming the surface wettability of the carbon nanotube 230 is hydrophilic, then the first material layer 221 is hydrophilic and the second material layer 222 is hydrophobic; if the surface wettability of the carbon nanotube 230 is hydrophobic, then the first material layer 221 is hydrophobic and the second material layer 222 is hydrophilic.

[0047] The surface wettability of carbon nanotubes is related to the wettability of the polymer coating the carbon nanotube surface. When the surface of the carbon nanotube is coated with an aqueous polymer (which is hydrophilic), the surface wettability of the carbon nanotube is hydrophilic, and it can be called an aqueous carbon nanotube. When the surface of the carbon nanotube is coated with an organic polymer (which is hydrophobic), the surface wettability of the carbon nanotube is hydrophobic, and it can be called an organic carbon nanotube.

[0048] In this structure, grooves 240 extending along a second direction (hereinafter referred to as the Y direction) are etched on both sides (221a, 221b) of the first material layer 221. Carbon nanotubes 230 are located in the grooves 240. This second direction is parallel to the surface of the substrate 210 and perpendicular to the first direction. The carbon nanotubes 230 in this fin structure 220 can be used as channels for carbon nanotube field-effect transistors. The second material layer 222 is used to isolate the carbon nanotubes 230 in the vertical direction and can define the vertical distance between adjacent carbon nanotubes.

[0049] Specifically, substrate 210 can be a semiconductor substrate or a silicon-on-insulator (SOI) substrate, etc., which can be doped (e.g., doped with p-type or n-type dopant) or undoped. The SOI substrate is a semiconductor material layer formed on an insulating layer, which can be, for example, a buried oxide (BOX) layer or a silicon oxide layer, disposed on a silicon substrate or a glass substrate. In specific implementations, the semiconductor material of substrate 210 can include one or more of silicon, germanium, compound semiconductors, and alloy semiconductors. The compound semiconductor can be one or more of silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and indium antimonide. The alloy semiconductor can be one or more of silicon germanium, gallium arsenide phosphide, aluminum indium arsenide, aluminum gallium arsenide, gallium indium arsenide, gallium indium phosphide, and gallium arsenide phosphide.

[0050] The constituent material of the first material layer 221 is related to its surface wettability, which needs to be consistent with the surface wettability of the carbon nanotube 230. This allows the carbon nanotube 230 in the groove 240 to adhere to the first material layer 221, which is exposed on the side of the groove 240. The constituent material of the second material layer 222 is related to its surface wettability, which needs to be different from the surface wettability of the carbon nanotube 230. This ensures that the carbon nanotubes do not deposit in the second material layer 222, and also prevents the carbon nanotube 230 in the groove 240 from adhering to the upper and lower walls of the groove 240. This ensures that the carbon nanotubes in the groove 240 have more exposed surface area, which is beneficial for improving the gate structure's control over the carbon nanotubes when they are used as channels.

[0051] Specifically, the constituent materials of the first material layer 221 and the second material layer 222 can both be suitable dielectric materials. For example, when the surface wettability of the carbon nanotube 230 is hydrophilic, the constituent material of the first material layer 221 is silicon dioxide, and the constituent material of the second material layer 222 is silicon, such as insulating intrinsic silicon.

[0052] In this embodiment, the thickness of the first material layer 221 and the thickness of the second material layer 222 can be the same or different, and the thickness of each layer is related to the diameter of the selected carbon nanotube 230. For example, the thickness of each layer can be 1 to 5 nm.

[0053] In some exemplary embodiments, the thickness T of the first material layer 221 is greater than or equal to the diameter of the carbon nanotube 230, and the depth H of the groove 240 in the second direction Y is greater than or equal to the diameter of the carbon nanotube 230, thereby allowing the carbon nanotube 230 to be fully enclosed within the groove 240. It should be noted that the diameter of the carbon nanotube 230 mentioned in the embodiments of this application refers to the diameter of a single carbon nanotube.

[0054] In some exemplary embodiments, the thickness T of the first material layer 221 is not only greater than or equal to the diameter of the carbon nanotube 230, but also less than twice the diameter of the carbon nanotube 230. Similarly, the depth H of the groove 240 in the second direction Y is not only greater than or equal to the diameter of the carbon nanotube 230, but also less than twice the diameter of the carbon nanotube 230. This allows the groove 240 to accommodate only one carbon nanotube, avoiding the decrease in mobility and performance caused by the entanglement of multiple carbon nanotubes when there are multiple carbon nanotubes in the groove 240. This is beneficial to improving the device performance based on the semiconductor structure.

[0055] In this embodiment, the number of alternating material layers in the fin structure 220 is related to the total number of carbon nanotubes 230 required. For example, the number of alternating material layers in the fin structure 220 is 10 to 100 layers.

[0056] It should be noted that, Figure 2 Although the diagram shows the second material layer 222 as the bottom layer of the alternating stack, in practical applications the first material layer 221 can also be used as the bottom layer of the alternating stack.

[0057] In some exemplary embodiments, the semiconductor structure may further include: a gate structure and source / drain regions, the gate structure being located on the fin structure, the source / drain regions being located on the fin structures on both sides of the gate structure and in contact with the carbon nanotubes in the fin structures, the gate structure being used to control the carbon nanotubes 230 in the fin structure 220 to realize the device's turn-on and turn-off.

[0058] like Figure 3 The diagram shown is a top view of another semiconductor structure provided in an embodiment of this application. The gate structure is not shown in the diagram, but can be configured with reference to the gate structure arrangement in existing carbon nanotube field-effect transistors. The source region 310 and drain region 320 are located at both ends of the fin structure 220 in the X direction and are in contact with the carbon nanotubes 230 in the fin structure 220. It should be noted that along... Figure 3 The aforementioned result can be obtained by cross-sectioning along the dotted lines. Figure 2 The diagram shown is shown in the image.

[0059] To facilitate understanding of the technical effects of the embodiments of this application, the following is combined with existing technologies. Figure 1b The above-described embodiments of this application Figure 3 Let's illustrate with an example. Assume... Figure 1b Given W = 20nm and Pitch (the spacing between carbon nanotubes) = 4nm, a single carbon nanotube field-effect transistor in the prior art has only 5 (20 / 4) carbon nanotubes. Therefore, the driving current lon of the carbon nanotube field-effect transistor in the prior art can be expressed as the number of carbon nanotubes. Figure 3 In the same configuration, W = 20 nm, Pitch (the spacing between carbon nanotubes) = 4 nm, and the height H of the fin structure is 220. fin When the wavelength is 400nm, the embodiments of this application can realize that a single carbon nanotube field-effect transistor has 100 (400 / 4) carbon nanotubes. Therefore, the embodiments of this application can realize that the driving current lon of the carbon nanotube field-effect transistor can be expressed as 100 carbon nanotubes. Thus, under the above assumptions, the embodiments of this application can achieve a 20-fold increase in driving current.

[0060] Compared to Si fins, carbon nanotubes exhibit significantly higher carrier mobility. Typical intrinsic carbon nanotubes possess a carrier mobility exceeding 10,000, and a typical carbon nanotube array with a density of 200 nanotubes / µm has an equivalent carrier mobility of 1450, far surpassing the approximately 300 of silicon under advanced processes. This higher carrier mobility results in superior high-frequency characteristics (approaching THz) for carbon nanotube field-effect transistors (FETs), while the higher carbon nanotube density allows for greater drive current. Compared to planar carbon nanotube FETs, the fin-structured carbon nanotube FETs of this application, where the current is determined by the vertical height, are suitable for current enhancement in ultra-high integration devices miniaturized to the nanoscale. Furthermore, the fin-structured carbon nanotube FETs of this application allow for better gate control over the carbon nanotubes.

[0061] This application also provides a method for forming a semiconductor structure, which can be used to form any of the aforementioned semiconductor structures of this application.

[0062] Please see Figure 4 The diagram shown is a flowchart illustrating a method for forming a semiconductor structure according to an embodiment of this application. Figures 5 to 10 This is a cross-sectional view of the semiconductor structure formation process provided in the embodiments of this application.

[0063] like Figure 4 As shown, in step S401, a substrate is provided, the substrate comprising a substrate and a first material layer and a second material layer alternately stacked on the substrate.

[0064] The first material layer and the second material layer both extend along the first direction, i.e., the X direction. The surface wettability of the first material layer is consistent with the surface wettability of the carbon nanotube to be formed, while the surface wettability of the second material layer is different from that of the first material layer.

[0065] In a specific implementation, the alternately stacked first and second material layers can be obtained by patterning the alternately stacked first and second original material layers on the substrate. See [link to implementation details]. Figure 5 On substrate 501, a first primary material layer 510 and a second primary material layer 520 are alternately grown in a direction perpendicular to the surface of substrate 501 to form a layered stack. For example, suitable deposition processes such as chemical vapor deposition (CVD), physical vapor deposition (PVD), and atomic layer deposition (ALD) can be used to grow each first primary material layer 510 and each second primary material layer 520.

[0066] Specifically, the constituent materials of the first primary material layer 510 and the second primary material layer 520 can both be suitable dielectric materials. For example, when the surface wettability of the carbon nanotube to be formed is hydrophilic, the constituent material of the first primary material layer 510 can be silicon dioxide, and the constituent material of the second primary material layer 520 can be silicon, such as insulating intrinsic silicon.

[0067] The thickness of each first primary material layer 510 can be the same or different, and the thickness of each second primary material layer 520 can be the same or different. Furthermore, the thickness of the first primary material layer 510 and the thickness of the second primary material layer 520 can be the same or different. The thickness of each layer is related to the diameter of the carbon nanotube to be formed. For example, the thickness of each layer can be 1–5 nm.

[0068] The number of alternating stacked layers is related to the total number of carbon nanotubes to be formed. For example, the number of alternating stacked layers is 10 to 100.

[0069] It should be noted that, Figure 5 Although the bottom layer of the alternating stack is shown as the second original material layer 520, in actual applications, the first original material layer 510 can also be used as the bottom layer of the alternating stack.

[0070] See Figure 6a and Figure 6b ,in Figure 6b for Figure 6a The corresponding top view diagram, along Figure 6b By cross-sectioning the dashed lines in the diagram, we can obtain... Figure 6a The diagram shown is as follows. Figure 6a and Figure 6b As shown, it is possible to... Figure 5 The layered stack shown is etched to remove a portion of the layered stack. The portion of the layered stack remaining after the etching is used as a fin 610 on the substrate 501. It can be understood that the portion of the layered stack remaining in the fin 610 includes portions of the alternately stacked first original material layer 510 and second original material layer 520. The portions of the alternately stacked first original material layer 510 and second original material layer 520 remaining in the fin 610 are respectively referred to as the first material layer 611 and the second material layer 612.

[0071] The patterning process can include one or more photolithography processes, including dual patterning or multi-patterning processes. Generally, dual or multi-patterning processes combine photolithography and self-alignment, resulting in a smaller pattern pitch than that obtained using a single direct photolithography process. For example, a sacrificial layer can be formed on the substrate and patterned using photolithography. Using self-alignment, spacers can be formed on the sides of the patterned sacrificial layer. The sacrificial layer is then removed, and the remaining spacers can be used to pattern fins. Specifically, the remaining spacers can be used as etching masks to etch partially stacked until the substrate 501 is exposed. The spacers are then removed, leaving the unetched portions stacked to form fins 610 protruding from the substrate 501.

[0072] See also Figure 4 In step S403, a portion of the width of the first material layer is removed from the sidewall of the first material layer along the second direction to form a groove surrounded by adjacent second material layers.

[0073] The second direction is parallel to the substrate surface and perpendicular to the first direction.

[0074] Specifically, such as Figure 7 As shown, the first material layer 611 in the fin 610 can be shortened along the second direction Y from the two exposed sides of the fin 610 to remove a portion of the width of the first material layer, so that the side of the first material layer 611 is recessed relative to the side of the second material layer 612. This results in a groove 710 formed on both sides of each first material layer 611 by adjacent second material layers 612. This groove 710 is used for subsequent deposition of carbon nanotubes. For example, the depth H of the groove 710 along the second direction Y is 1–5 nm.

[0075] In some exemplary embodiments, the thickness of the first original material layer 510 or the first material layer 611 is greater than or equal to the diameter of the carbon nanotube to be formed, and the depth H of the groove 710 in the second direction Y is greater than or equal to the diameter of the carbon nanotube to be formed, so that the subsequently formed carbon nanotube can be fully enclosed within the groove 710. It should be noted that the diameter of the carbon nanotube mentioned in the embodiments of this application refers to the diameter of a single carbon nanotube.

[0076] In some other exemplary embodiments, the thickness T of the first original material layer 510 or the first material layer 611 is not only greater than or equal to the diameter of the carbon nanotube to be formed, but also less than twice the diameter of the carbon nanotube to be formed. Similarly, the depth H of the groove 710 in the second direction Y is not only greater than or equal to the diameter of the carbon nanotube to be formed, but also less than twice the diameter of the carbon nanotube to be formed. This allows the groove 710 to accommodate only one carbon nanotube in the subsequent formation of the carbon nanotube, avoiding the decrease in device mobility and performance caused by multiple carbon nanotubes forming in the groove 710 and becoming entangled with each other, thereby improving the performance of the semiconductor structure.

[0077] In some exemplary embodiments, removing a portion of the width of the first material layer along a second direction from the sidewall of the first material layer to form a groove surrounded by adjacent second material layers may include:

[0078] Isotropic selective etching is performed along the second direction Y from the sidewall of the first material layer, wherein the selective etching rate of the first material layer is greater than the etching rate of the second material layer.

[0079] Among them, isotropic selective etching can be carried out using wet etching process or isotropic dry etching process.

[0080] For example, the selective etching selectivity ratio for the first material layer 611 and the second material layer 612 is greater than 2. If the etching selectivity ratio is too small, when etching the first material layer 611, the second material layer 612 will also shorten in the Y and Z directions, and it will be unable to form a groove with a certain depth and a small opening. In this way, the carbon nanotubes formed subsequently cannot be retained in the groove.

[0081] The selective etching depth along the second direction Y is related to the diameter of the carbon nanotube to be formed, as can be seen in the aforementioned definition of the depth of the groove 710.

[0082] See also Figure 4 In step S405, the carbon nanotubes are formed in the groove to obtain a fin structure containing the carbon nanotubes.

[0083] Specifically, the substrate with grooves can be immersed in a carbon nanotube solution first, and then the substrate immersed in the carbon nanotube solution can be cleaned to remove the carbon nanotubes deposited outside the grooves and retain the carbon nanotubes deposited inside the grooves.

[0084] The carbon nanotube solution can be either an aqueous phase carbon nanotube solution or an organic phase carbon nanotube solution. Aqueous phase carbon nanotube solutions are used to deposit carbon nanotubes whose surfaces are coated with an aqueous polymer (hereinafter referred to as aqueous phase carbon nanotubes), while organic phase carbon nanotube solutions are used to deposit carbon nanotubes whose surfaces are coated with an organic polymer (hereinafter referred to as organic phase carbon nanotubes). It is understood that aqueous phase carbon nanotubes have hydrophilic surface wettability, while organic phase carbon nanotubes have hydrophobic surface wettability. The concentration of carbon nanotubes in the solution can be set according to the number of carbon nanotubes to be deposited. For organic phase carbon nanotube solutions, the solvent can be benzene, toluene, chloroform, or other organic solvents.

[0085] Figure 8a As shown Figure 7 A schematic diagram showing the deposition of carbon nanotubes after the structure was immersed in a carbon nanotube solution. Figure 8b for Figure 8a A top-down view, along Figure 8b By cross-sectioning the dashed lines in the diagram, we can obtain... Figure 8a The diagram shown is from... Figure 8a and Figure 8b As can be seen, after being soaked in the carbon nanotube solution, carbon nanotubes 810 are deposited on the surface of the substrate 501, in the groove 710, and adhered to the side of the first material layer 611 exposed in the groove and the remaining outer wall of the fin structure.

[0086] The cleaning of the substrate soaked in the carbon nanotube solution can be done using solvents containing carbon nanotubes, such as water, surfactants, xylene, and toluene. In practical applications, to achieve better carbon nanotube deposition and ensure that carbon nanotubes are deposited in each groove, the above soaking and cleaning process can be repeated multiple times.

[0087] In practical applications, the above cleaning process can remove the remaining carbon nanotubes deposited on the outer walls of the fin structure. However, when the surface area of ​​the substrate 501 is large, only most of the carbon nanotubes can be cleaned away, and some carbon nanotubes will inevitably remain on the substrate, such as... Figure 9a and Figure 9b As shown, the Figure 9a for Figure 8a The diagram shows the distribution of carbon nanotubes after cleaning. Figure 9b for Figure 9a A top-down view.

[0088] To avoid the impact of residual carbon nanotubes on device performance, in some exemplary embodiments, such as Figure 10 As shown, after cleaning the substrate soaked in the carbon nanotube solution, the method may further include:

[0089] A plasma dry etching process is used to etch the substrate in a direction perpendicular to the substrate to remove the carbon nanotubes remaining on the substrate surface, thereby obtaining the fin structure 1010 containing carbon nanotubes according to the embodiments of this application.

[0090] Specifically, by using plasma dry etching technology to etch the substrate in a direction perpendicular to the substrate, the residual carbon nanotubes on the substrate can be removed without affecting the carbon nanotubes in the grooves.

[0091] Plasma dry etching can employ oxygen-containing plasma gas, argon-containing plasma gas, etc. When oxygen-containing plasma gas is used, the oxygen in the plasma gas can react with the carbon in the residual carbon nanotubes on the substrate and remove them; when argon-containing plasma gas is used, the residual carbon nanotubes on the substrate can be broken up and removed by physical bombardment.

[0092] In practical applications, considering that oxygen atoms carry a negative charge, in order to facilitate the control of the above etching process and improve the removal of carbon nanotubes remaining on the substrate surface, argon can be used for charge balance. Therefore, the etching gas in the above plasma dry etching process can be a plasma gas containing oxygen and argon.

[0093] In some exemplary embodiments, after obtaining the fin structure containing the carbon nanotubes, the method may further include: forming a gate structure on the fin structure, and forming source / drain regions on both sides of the gate structure on the fin structure, the source / drain regions being in contact with the carbon nanotubes in the fin structure, thereby forming a semiconductor structure of a carbon nanotube field-effect transistor, wherein the carbon nanotubes in the fin structure serve as the channel of the carbon nanotube field-effect transistor, and the gate structure is used to control the carbon nanotubes to realize the on and off of the device.

[0094] In this application embodiment, carbon nanotubes are selectively deposited at equal intervals in the vertical direction through patterned grooves to form a fin structure containing carbon nanotubes. Compared with planar carbon nanotube transistors, the current of the transistor using the fin structure containing carbon nanotubes is determined by the height in the vertical direction, which is suitable for current enhancement of ultra-high integration devices with transistor size miniaturized to the nanoscale.

[0095] Accordingly, this application also provides an electronic device, which includes any of the semiconductor structures described above in the embodiments of this application.

[0096] Because semiconductor structures offer superior performance, and the electronic device employs such a structure, its performance is correspondingly enhanced. The electronic device can be any electronic product or device, such as a mobile phone, tablet computer, laptop computer, netbook, game console, television, VCD player, DVD player, navigator, camera, camcorder, voice recorder, MP3 player, MP4 player, PSP, etc., or it can be an intermediate product incorporating the semiconductor device, such as a motherboard.

[0097] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: Substrate; A fin structure containing carbon nanotubes is located on the substrate. The fin structure includes alternating stacked first and second material layers. The surface wettability of the first material layer is consistent with the surface wettability of the carbon nanotubes, and the surface wettability of the second material layer is different from the surface wettability of the first material layer. The fin structure extends along a first direction. The first material layer has grooves extending along a second direction formed on both sides, and the carbon nanotubes are located in the grooves; the second direction is perpendicular to the first direction, and the first direction and the second direction are parallel to the surface of the substrate.

2. The semiconductor structure according to claim 1, characterized in that, The thickness of the first material layer is greater than or equal to the diameter of the carbon nanotube, and the depth of the groove in the second direction is greater than or equal to the diameter of the carbon nanotube.

3. The semiconductor structure according to claim 2, characterized in that, The thickness of the first material layer is less than twice the diameter of the carbon nanotube, and the depth of the groove in the second direction is less than twice the diameter of the carbon nanotube.

4. The semiconductor structure according to claim 1, characterized in that, When the surface wettability of the carbon nanotube is hydrophilic, the first material layer is composed of silicon dioxide, and the second material layer is composed of silicon.

5. The semiconductor structure according to any one of claims 1 to 4, characterized in that, Also includes: A gate structure is located on the fin structure; The source / drain regions are located on the fin structures on both sides of the gate structure and are in contact with the carbon nanotubes in the fin structures.

6. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided, the substrate comprising a substrate and alternatingly stacked first and second material layers on the substrate, the first and second material layers extending along a first direction, the surface wettability of the first material layer being consistent with the surface wettability of the carbon nanotubes to be formed, and the surface wettability of the second material layer being different from the surface wettability of the first material layer. A portion of the width of the first material layer is removed from the sidewall of the first material layer along a second direction to form a groove surrounded by adjacent second material layers; the second direction is parallel to the substrate surface and perpendicular to the first direction; The carbon nanotubes are formed within the groove to obtain a fin structure containing the carbon nanotubes.

7. The forming method according to claim 6, characterized in that, The thickness of the first material layer is greater than or equal to the diameter of the carbon nanotube, and the depth of the groove in the second direction is greater than or equal to the diameter of the carbon nanotube.

8. The forming method according to claim 7, characterized in that, The thickness of the first material layer is less than twice the diameter of the carbon nanotube, and the depth of the groove in the second direction is less than twice the diameter of the carbon nanotube.

9. The forming method according to claim 6, characterized in that, The process of forming the carbon nanotubes within the groove to obtain a fin structure containing the carbon nanotubes includes: The substrate with the grooves formed thereon is immersed in a carbon nanotube solution; The substrate, after being immersed in the carbon nanotube solution, is cleaned to remove carbon nanotubes deposited outside the grooves.

10. The forming method according to claim 9, characterized in that, After cleaning the substrate soaked in the carbon nanotube solution, the method further includes: A plasma dry etching process is used to etch the substrate in a direction perpendicular to the substrate to remove carbon nanotubes remaining on the substrate surface.

11. The forming method according to claim 10, characterized in that, The etching gas in the plasma dry etching process is a plasma gas containing oxygen and argon.

12. The forming method according to claim 6, characterized in that, The process of removing a portion of the width of the first material layer along a second direction from the sidewall of the first material layer to form a groove surrounded by adjacent second material layers includes: Isotropic selective etching is performed along the second direction from the sidewall of the first material layer; the selective etching rate on the first material layer is greater than the etching rate on the second material layer.

13. The forming method according to any one of claims 6 to 12, characterized in that, After obtaining the fin structure containing the carbon nanotubes, the method may further include: A gate structure is formed on the fin structure; On the fin structure, source / drain regions are formed on both sides of the gate structure, and the source / drain regions are in contact with the carbon nanotubes in the fin structure.

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