Display panel, electronic device including the same, and method of manufacturing the same

Abstract

A display panel, an electronic device including the display panel, and a method of manufacturing the display panel are provided, the display panel including: a transistor; an organic insulating layer on the transistor and including a recess; an inorganic insulating layer on the organic insulating layer and including a tip extending toward a center of the recess; a first pixel electrode and a second pixel electrode on the inorganic insulating layer; a first intermediate layer on the first pixel electrode; a second intermediate layer on the second pixel electrode; a dummy intermediate layer on the recess of the organic insulating layer and separated from the first and second intermediate layers by the tip of the inorganic insulating layer and the recess of the organic insulating layer; an intermediate insulating layer on the dummy intermediate layer and in contact with each of the first and second intermediate layers; and a counter electrode on the first and second intermediate layers.

Description

[0001] This application is based on and claims priority to Korean Patent Application No. 10-2025-0049143, filed on April 15, 2025, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] One or more aspects relate to a display panel, an electronic device including the display panel, and a method of manufacturing the display panel. Background Technology

[0003] The display panel includes display elements such as organic light-emitting diodes and transistors on a substrate, and operates by causing the display elements to emit light.

[0004] Each pixel of the display panel has a display element such as an organic light-emitting diode (OLED), which includes an intermediate layer disposed between a pixel electrode and a counter electrode and contains an emission layer. The display panel controls the emission level or brightness level of each pixel via transistors electrically connected to the pixel electrodes. Some layers included in the intermediate layer of the display element are commonly disposed in multiple display elements. Summary of the Invention

[0005] One or more aspects include a display panel for achieving high-quality images, an electronic device including the display panel, and a method for manufacturing the display panel. However, these aspects are examples and do not limit the scope of disclosure.

[0006] Additional aspects will be set forth in part in the description below, and in part will be apparent from the description, or may be learned by the aspects presented in practice.

[0007] According to one or more aspects, a display panel includes: a transistor on a substrate; an organic insulating layer on the transistor and including a recess; an inorganic insulating layer on the organic insulating layer, the inorganic insulating layer including a tip extending toward the center of the recess; a first pixel electrode and a second pixel electrode disposed on the inorganic insulating layer; a first intermediate layer on the first pixel electrode; a second intermediate layer on the second pixel electrode; a dummy intermediate layer in the recess of the organic insulating layer, the dummy intermediate layer being separated from the first intermediate layer and the second intermediate layer, the first intermediate layer, the second intermediate layer and the dummy intermediate layer having the same composition; an intermediate insulating layer on the dummy intermediate layer and in contact with each of the first intermediate layer and the second intermediate layer; and a counter electrode on the first intermediate layer and the second intermediate layer.

[0008] In one aspect, the first intermediate layer may include a first-1 emitting unit, a first charge generating layer and a second-1 emitting unit, and the first charge generating layer may be spaced apart from the counter electrode by the intermediate insulating layer in the region where it overlaps with the groove of the organic insulating layer.

[0009] In one aspect, the intermediate insulating layer can be positioned between the first pixel electrode and the second pixel electrode.

[0010] In one aspect, at least a portion of the intermediate insulating layer may be disposed between the tip of the dummy intermediate layer and the inorganic insulating layer.

[0011] In one aspect, at least a portion of the intermediate insulating layer may be disposed between the dummy intermediate layer and the portion of the first intermediate layer disposed at the tip of the inorganic insulating layer.

[0012] In one aspect, the intermediate insulating layer may include a first intermediate insulating layer and a second intermediate insulating layer, wherein, in cross-section, at least a portion of the first intermediate insulating layer is positioned between the first intermediate layer and the dummy intermediate layer, and in cross-section, at least a portion of the second intermediate insulating layer is positioned between the second intermediate layer and the dummy intermediate layer, and the first intermediate insulating layer and the second intermediate insulating layer may be spaced apart from each other.

[0013] In one aspect, the distance between the upper surface of the substrate and the upper surface of the intermediate insulating layer can be greater than the distance between the upper surface of the substrate and the upper surface of the inorganic insulating layer.

[0014] In one aspect, the intermediate insulating layer may include organic insulating materials.

[0015] In one aspect, the intermediate insulating layer may also include a black material.

[0016] In one aspect, the display panel may further include: a pixel defining layer disposed on a first pixel electrode and a second pixel electrode, the pixel defining layer including a first pixel opening exposing a portion of the first pixel electrode, a second pixel opening exposing a portion of the second pixel electrode, and a separator opening aligned with a groove of an organic insulating layer.

[0017] In one aspect, the intermediate insulating layer can be arranged within the separator opening of the pixel defining layer.

[0018] In one aspect, the tip of the inorganic insulating layer may protrude more than the side surface of the groove defined by the organic insulating layer in a direction toward the center of the groove.

[0019] In one aspect, the counter electrode can contact the intermediate insulating layer.

[0020] In one aspect, the counter electrodes may include: a first pair of electrodes disposed on a first intermediate layer; and a second pair of electrodes disposed on a second intermediate layer, wherein the first pair of electrodes and the second pair of electrodes may be spaced apart from each other.

[0021] According to one or more aspects, a display panel includes: a transistor on a substrate; an organic insulating layer on the transistor and including a recess; an inorganic insulating layer on the organic insulating layer, the inorganic insulating layer including a tip extending toward the center of the recess; a first pixel electrode and a second pixel electrode on the inorganic insulating layer; a first intermediate layer on the first pixel electrode; a second intermediate layer on the second pixel electrode; a dummy intermediate layer in the recess of the organic insulating layer, the dummy intermediate layer being separated from the first intermediate layer and the second intermediate layer, the first intermediate layer, the second intermediate layer and the dummy intermediate layer having the same composition; a first pair of electrodes disposed on the first intermediate layer; and a second pair of electrodes disposed on the second intermediate layer, the second pair of electrodes being spaced apart from the first pair of electrodes, wherein each of the first pair of electrodes and the second pair of electrodes may be spaced apart from the dummy intermediate layer.

[0022] According to one or more aspects, an electronic device includes a display module comprising a display panel, a power module, a memory, and a processor configured to provide image data signals and input control signals to the display module, wherein the display panel may include: a transistor on a substrate; an organic insulating layer on the transistor and including a recess; an inorganic insulating layer on the organic insulating layer, the inorganic insulating layer including a tip extending toward the center of the recess; a first pixel electrode and a second pixel electrode disposed on the inorganic insulating layer; a first intermediate layer on the first pixel electrode; a second intermediate layer on the second pixel electrode; a dummy intermediate layer in the recess of the organic insulating layer, the dummy intermediate layer being separated from the first intermediate layer and the second intermediate layer, the first intermediate layer, the second intermediate layer, and the dummy intermediate layer having the same composition; an intermediate insulating layer on the dummy intermediate layer and in contact with each of the first intermediate layer and the second intermediate layer; and a counter electrode on the first intermediate layer and the second intermediate layer.

[0023] In one aspect, the first intermediate layer may include a first-1 emitting unit, a first charge generating layer and a second-1 emitting unit, and the first charge generating layer may be spaced apart from the counter electrode by the intermediate insulating layer in the region where it overlaps with the groove of the organic insulating layer.

[0024] According to one or more aspects, a method of manufacturing a display panel includes: forming an organic insulating layer on a transistor; forming an inorganic insulating layer on the organic insulating layer, the inorganic insulating layer including a first opening; removing a portion of the organic insulating layer in a region overlapping with the first opening of the inorganic insulating layer to form a groove of the organic insulating layer and a tip of the inorganic insulating layer; forming a pixel electrode on the inorganic insulating layer; disposing an intermediate layer on the pixel electrode and the groove, such that the tip of the inorganic insulating layer and the groove of the organic insulating layer separate the intermediate layer to form a dummy intermediate layer in the groove, the intermediate layer including a first emitting unit, a charge generating layer and a second emitting unit; forming an intermediate insulating layer on the dummy intermediate layer; and forming a counter electrode on the intermediate layer.

[0025] In one aspect, after the counter electrode is formed, the charge-generating layer can be separated from the counter electrode by an intermediate insulating layer in the region where it overlaps with the groove of the organic insulating layer.

[0026] In one aspect, the method of manufacturing a display panel may further include: forming a pixel defining layer disposed on a pixel electrode, the pixel defining layer including a pixel opening exposing a portion of the pixel electrode and a separator opening connected to a first opening of an inorganic insulating layer and exposing a tip of the inorganic insulating layer.

[0027] In one aspect, the intermediate insulating layer may include organic insulating materials.

[0028] In one aspect, the intermediate insulating layer may include a black organic insulating material. Attached Figure Description

[0029] The above and other aspects, features and advantages of the disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, wherein: Figure 1A It is a block diagram based on one aspect of electronic equipment; Figure 1B It is a schematic diagram of electronic devices based on various aspects; Figure 2 It is a schematic plan view based on one side of the display panel; Figure 3A It is a schematic plan view based on a portion of one side of the display panel; Figure 3B It is a schematic plan view based on a portion of one side of the display panel; Figure 4 It is a schematic cross-sectional view based on one aspect of the display element; Figure 5 It is along Figure 3A A schematic cross-sectional view of the display panel taken from one side by line I-I'; Figure 6 It is along Figure 3AA schematic cross-sectional view of the display panel taken from one side by line I-I'; Figure 7 It is along Figure 3A A schematic cross-sectional view of the display panel taken from one side by line I-I'; Figure 8 It is along Figure 3A A schematic cross-sectional view of the display panel taken from one side by line I-I'; Figure 9 It is along Figure 3A A schematic cross-sectional view of the display panel taken by line I-I'; and Figures 10 to 17 This is a sequential cross-sectional view showing a method for manufacturing a display panel according to one aspect. Detailed Implementation

[0030] Reference will now be made in detail to aspects, examples of which are shown in the accompanying drawings, wherein the same reference numerals always denote the same elements. In this respect, the aspects presented may take different forms and should not be construed as limited to the description set forth herein. Therefore, aspects are described below only by reference to the accompanying drawings to explain aspects of this specification. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression “at least one of a, b, and c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0031] In the following contexts, the terms “first,” “second,” etc., are not used to limit the meaning, but rather to distinguish one component from another.

[0032] Depending on various factors, the x-axis, y-axis, and z-axis are not limited to three axes in an orthogonal coordinate system, but can be interpreted in a general sense that includes all three axes. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0033] Here, unless the context clearly indicates otherwise, singular expressions include plural expressions.

[0034] In the following contexts, terms such as “comprising,” “including,” or “having” mean that the features or components described in the specification are present, and do not exclude the possibility that one or more other features or components may be added.

[0035] Here, when a portion of a membrane, region, element, etc. is disposed on or on another portion, this not only indicates that the portion is directly on top of the other portion, but also that another membrane, region, element, etc. is located in between.

[0036] In the accompanying drawings, the dimensions of elements may be exaggerated or reduced for ease of description. For example, the dimensions and thickness of each element shown in the drawings are arbitrarily shown for ease of description, and therefore one or more aspects need not be limited to what has been shown.

[0037] In some other possible aspects of the implementation, a particular process sequence may be performed in a different order than that described. For example, two processes described consecutively may be performed substantially simultaneously, or they may be performed in the reverse order in which they are described.

[0038] In the following respects, it will be understood that when a layer, region, or element is referred to as being connected to another layer, region, or element, that layer, region, or element may be directly or indirectly connected to said other layer, region, or element. For example, it will be understood in this specification that when a layer, region, or element is referred to as being in contact with or electrically connected to another layer, region, or element, that layer, region, or element may be directly or indirectly in contact with or electrically connected to said other layer, region, or element.

[0039] Figure 1A It is a block diagram based on one aspect of electronic device 1. Figure 1B It is a schematic diagram of electronic devices based on various aspects.

[0040] Reference Figure 1A According to one aspect, the electronic device 1 may include a display module 11, a processor 12, a memory 13, and a power module 14.

[0041] The display module 11 may include a display panel 10 according to one aspect (see...) Figures 2 to 3B as well as Figures 5 to 9 ).

[0042] The processor 12 may include at least one of a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0043] The memory 13 can store the data information required for the operation of the processor 12 or the display module 11. When the processor 12 executes the application stored in the memory 13, image data signals and / or input control signals can be sent to the display module 11, and the display module 11 can process the received signals and output image information through the display screen.

[0044] The power module 14 may include a power module (such as a power adapter or battery device) and a power conversion module, which converts the power supplied by the power module to generate the power required for the operation of the electronic device 1.

[0045] At least one of the components of the aforementioned electronic device 1 may be included in a display device including the display module 11. Additionally, some of the modules functionally included within the module may be included in the display device, while other modules may be disposed separately from the display device. For example, the display device may include the display module 11, and the processor 12, memory 13, and power module 14 may be disposed within the electronic device 1 as devices other than the display device.

[0046] Reference Figure 1B This includes a display panel 10 based on one side (see...) Figures 2 to 3B as well as Figures 5 to 9 The various electronic devices can include not only image display electronic devices such as smartphones 1a, tablet PCs 1b, laptops 1c, TVs 1d, and desktop monitors 1e, but also wearable electronic devices including display modules such as smart glasses 1f, head-mounted displays 1g, and smartwatches 1h, as well as vehicle electronic devices including display modules such as dashboards, central instrument panels, CIDs (central information displays) mounted on dashboards, and interior mirror displays.

[0047] Figure 2 It is a schematic plan view based on one side of the display panel 10.

[0048] Reference Figure 2 The display panel 10 may include a display area DA and a non-display area NDA located outside the display area DA.

[0049] The display area DA can display images using pixels P arranged within it. Each pixel P can include a display element such as a light-emitting diode (LED). Each pixel P can emit light, for example, red, green, blue, or white.

[0050] The non-display area NDA can be located outside the display area DA and may not display an image, and may surround the display area DA. Drivers, etc., that provide electrical signals or power to the display area DA can be arranged in the non-display area NDA. Pads (also known as "solder pads") can be located in the non-display area NDA. Pads can be electrically connected to electronic components or printed circuit boards.

[0051] like Figure 2As shown, in one aspect, the display area DA can be a polygon (e.g., a rectangle) whose length in the first direction (e.g., the x-direction) is less than its length in the second direction (e.g., the y-direction). However, this aspect is not limited to this. In another aspect, the display area DA can be a polygon (e.g., a rectangle) whose length in the second direction (e.g., the y-direction) is less than its length in the first direction (e.g., the x-direction). Figure 2 The illustration shows that the display area DA is approximately square, but this aspect is not limited to this. In one aspect, the display area DA can have various shapes (such as an N-sided polygon (N is a natural number greater than or equal to 3) other than a rectangle or square, a circle, or an ellipse). Figure 2 As shown, the display area DA can be a polygon with rounded corners, but in another respect, the corners of the display area DA can have a shape that includes vertices where straight lines intersect.

[0052] The display panel 10 may include light-emitting diodes (LEDs) as display elements, and the LEDs may be organic light-emitting diodes (OLEDs) including an organic emitting layer. Optionally, the LEDs may be inorganic light-emitting diodes (LEDs) including an inorganic emitting layer. The size of the LEDs may be on the micrometer or nanometer scale. For example, the LEDs may be micro LEDs. Optionally, the LEDs may be quantum dot LEDs including a quantum dot emitting layer.

[0053] Figure 3A It is a schematic plan view of a portion of the display panel 10. Figure 3B It is a schematic plan view of a portion of the display panel 10.

[0054] Figure 3A The first pixel P1, the second pixel P2 and the third pixel P3, the inorganic insulating layer 120, the pixel defining layer 130 and the separator SEP in the display area DA of the display panel 10 are shown. Figure 3B The pixel electrode 210 and the inorganic insulating layer 120 (excluding) are shown. Figure 3A (Pixel-defining layer 130 shown in the figure).

[0055] Reference Figure 3A and Figure 3B The first pixel P1, the second pixel P2, and the third pixel P3 can be arranged in the display area DA of the display panel 10. In one aspect, each of the first pixel P1, the second pixel P2, and the third pixel P3 may include a display element such as a light-emitting diode and pixel circuitry electrically connected to the display element. For example, the first pixel P1 may include a first light-emitting diode LED1 (see...). Figure 4 The second pixel P2 may include a second light-emitting diode LED2 (see...) and a first pixel circuit, and the second pixel P2 may include a second light-emitting diode LED2 (see...) Figure 4The second pixel circuit, and the third pixel P3 may include a third light-emitting diode LED3 (see...) Figure 4 ) and the third pixel circuit.

[0056] In one aspect, the first pixel P1, the second pixel P2, and the third pixel P3 may include first pixels P1, second pixels P2, and third pixels P3 that emit light of different colors. For example, the first pixel P1 may emit red light, the second pixel P2 may emit green light, and the third pixel P3 may emit blue light. Red light may be light in the wavelength range of about 580 nm to about 780 nm, green light may be light in the wavelength range of about 495 nm to about 580 nm, and blue light may be light in the wavelength range of about 400 nm to about 495 nm. In another aspect, each of the first pixel P1, the second pixel P2, and the third pixel P3 may emit white light. The following description will primarily focus on the case where the first pixel P1, the second pixel P2, and the third pixel P3 emit light of different colors.

[0057] The first pixel P1, the second pixel P2, and the third pixel P3 can be arranged in a pattern such as stripes or pentiles. ® A regular pattern arrangement, such as a layout. In one aspect, first pixel P1 and second pixel P2 can alternately form a first pixel column along a second direction (y-direction), and second pixel P2 and third pixel P3 can alternately form a second pixel column along the second direction (y-direction). The first pixel column and the second pixel column can be arranged alternately along a first direction (x-direction).

[0058] The inorganic insulating layer 120 can be stacked with display elements of the first pixel P1, the second pixel P2, and the third pixel P3. For example, as Figure 3B As shown, the inorganic insulating layer 120 can be stacked with the first pixel electrode 210a of the first pixel P1, the second pixel electrode 210b of the second pixel P2, and the third pixel electrode 210c of the third pixel P3. For example, the inorganic insulating layer 120 can be disposed below the first pixel electrode 210a of the first pixel P1, the second pixel electrode 210b of the second pixel P2, and the third pixel electrode 210c of the third pixel P3.

[0059] The inorganic insulating layer 120 may include a first opening 120OP between adjacent pixels among the first pixel P1, the second pixel P2, and the third pixel P3. For example, the first opening 120OP of the inorganic insulating layer 120 may be located between the first pixel P1 and the second pixel P2, and between the second pixel P2 and the third pixel P3.

[0060] The first pixel electrode 210a of the first pixel P1, the second pixel electrode 210b of the second pixel P2, and the third pixel electrode 210c of the third pixel P3 may include contact portions 210p respectively electrically connected to the first pixel circuit of the first pixel P1, the second pixel circuit of the second pixel P2, and the third pixel circuit of the third pixel P3. The structure of each of the first pixel circuit of the first pixel P1, the second pixel circuit of the second pixel P2, and the third pixel circuit of the third pixel P3 may be as described below. Figure 5 The pixel circuit PC described corresponds to this. The contact portion 210p can be positioned below the penetration point (see reference). Figure 5 The organic insulating layer 110 and inorganic insulating layer 120 are described in an opening, and can be electrically connected to the transistor TFT (see...). Figure 5 ).

[0061] The pixel defining layer 130 can define multiple pixel openings 130OP1, 130OP2, and 130OP3. The pixel defining layer 130 can define the emission regions of a first pixel P1, a second pixel P2, and a third pixel P3 respectively through the multiple pixel openings 130OP1, 130OP2, and 130OP3. For example, the emission region of the first pixel P1 can be defined by the first pixel opening 130OP1, the emission region of the second pixel P2 can be defined by the second pixel opening 130OP2, and the emission region of the third pixel P3 can be defined by the third pixel opening 130OP3.

[0062] In the planar view, each of the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3 may have an approximately rectangular shape, but the disclosure is not limited thereto. In one aspect, each of the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3 may have a polygonal shape, a circular shape, an elliptical shape, etc., other than a rectangular shape. In another aspect, the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3 may have a chamfered shape.

[0063] In one aspect, the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3 can have different sizes (or areas). For example, the size (or area) of the third pixel opening 130OP3 can be larger than the size (or area) of the first pixel opening 130OP1 and the second pixel opening 130OP2, and the size (or area) of the first pixel opening 130OP1 can be larger than or equal to the size (or area) of the second pixel opening 130OP2. In another aspect, the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3 can have the same size (or area).

[0064] Pixel defining layer 130 may define separator openings 130OPs. The separator openings 130OPs of pixel defining layer 130 may be stacked with (or connected to) a first opening 120OP of inorganic insulating layer 120. The separator openings 130OPs of pixel defining layer 130 may be located between adjacent pixel openings. For example, the separator openings 130OPs of pixel defining layer 130 may be located between a first pixel opening 130OP1 and a second pixel opening 130OP2, and between a second pixel opening 130OP2 and a third pixel opening 130OP3. In a plan view, a plurality of separator openings 130OPs may surround at least a portion of each of the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3.

[0065] The pixel defining layer 130 may include an organic insulating material such as benzocyclobutene (BCB), polyimide, or hexamethyldisiloxane (HMDSO). The pixel defining layer 130 may be black. In one aspect, the pixel defining layer 130 may include a light-blocking material and may be set to black. The light-blocking material may include carbon black, carbon nanotubes, resins or pastes including black dyes, metal particles such as nickel (Ni), aluminum (Al), molybdenum (Mo), and alloys thereof, metal oxide particles (e.g., chromium oxide), or metal nitride particles (e.g., chromium nitride). When the pixel defining layer 130 includes a light-blocking material, external light reflection caused by the metal structure disposed beneath the pixel defining layer 130 can be reduced.

[0066] The display panel 10 may include separators SEPs. In one aspect, each of the separators SEPs may include a portion of an inorganic insulating layer 120 exposed by separator openings 130OPs of the pixel defining layer 130 (e.g., the tip 120T of the inorganic insulating layer 120 (see [link to relevant documentation]). Figure 5 )) and organic insulating layer 110 (see Figure 5 The groove 110G (see) Figure 5 In the plan view, the separator SEP may surround at least a portion of each of the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3. In the plan view, the separator SEP may completely surround each of the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3. In one aspect, the separator SEP is shown as a plurality of spaced apart from each other, but is not limited thereto. For example, in the plan view, the separator SEP surrounding each of the first pixel opening 130OP1, the second pixel opening 130OP2, and the third pixel opening 130OP3 may have the shape of an opening on at least one side.

[0067] The separator SEP separates the intermediate layer 220 of the first pixel P1, the second pixel P2, and the third pixel P3 (see...). Figure 4 This reduces leakage current through the intermediate layer 220 between adjacent pixels.

[0068] Figure 4 It is a schematic cross-sectional view based on one aspect of the display element.

[0069] Reference Figure 4 According to one aspect of this disclosure, the display element may be a light-emitting diode (LED). Each of the first LED1 included in the first pixel P1, the second LED2 included in the second pixel P2, and the third LED3 included in the third pixel P3 may include a pixel electrode (or anode) 210, a counter electrode (or cathode) 230, and an intermediate layer 220 located between the pixel electrode 210 and the counter electrode 230.

[0070] Pixel electrodes 210 can be independently disposed in each of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3. For example, the first light-emitting diode LED1 may include a first pixel electrode 210a, the second light-emitting diode LED2 may include a second pixel electrode 210b, and the third light-emitting diode LED3 may include a third pixel electrode 210c.

[0071] Pixel electrode 210 may include transparent conductive oxides, such as indium tin oxide (ITO), indium zinc oxide (IZO), and zinc oxide (ZnO). x The pixel electrode 210 may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or compounds thereof. For example, the pixel electrode 210 may have a three-layer structure of ITO / Ag / ITO.

[0072] The counter electrode 230 may be disposed on the intermediate layer 220. The counter electrode 230 may comprise a metal, alloy, conductive compound, or combination thereof having a low work function. For example, the counter electrode 230 may comprise a transparent layer (or a translucent layer) comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or alloys thereof. Optionally, the counter electrode 230 may also comprise ITO, IZO, or ZnO contained in the transparent layer (or translucent layer) comprising the aforementioned materials. x Or a layer of In2O3.

[0073] The intermediate layer 220 may comprise a polymer or low-molecular-weight organic material that emits light of a predetermined color. In addition to various organic substances, the intermediate layer 220 may also comprise metal-containing compounds such as organometallic compounds and inorganic substances such as quantum dots. In one aspect, the intermediate layer 220 may comprise two or more emission units sequentially stacked between the pixel electrode 210 and the counter electrode 230, and a charge generation layer CGL disposed between the two emission units. A light-emitting diode including an intermediate layer 220 containing multiple emission units and a charge generation layer CGL may be referred to as a series light-emitting diode. Each of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3 has a structure in which multiple emission units are stacked (e.g., a series structure), thereby improving color purity and emission efficiency.

[0074] The intermediate layer 220 of each of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3 may include a first emitting unit EU1 and a second emitting unit EU2 stacked in sequence, and a charge generation layer CGL located between the first emitting unit EU1 and the second emitting unit EU2. The intermediate layer 220 of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3 may be referred to as the first intermediate layer 220a (see...). Figure 5 ), second intermediate layer 220b (see Figure 5 ) and the third intermediate layer.

[0075] The intermediate layer 220 of each of the first light-emitting diodes LED1, LED2, and LED3 may include multiple emission layers. For example, the first emission unit EU1 of each of the first light-emitting diodes LED1, LED2, and LED3 may include a lower emission layer 222, and the second emission unit EU2 of each of the first light-emitting diodes LED1, LED2, and LED3 may include an upper emission layer 225.

[0076] Each of the lower emitting layer 222 and the upper emitting layer 225 can be independently disposed by patterning on each of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3. For example, the first emitting unit EU1 of the first light-emitting diode LED1 may include a first lower emitting layer 222a, and the second emitting unit EU2 of the first light-emitting diode LED1 may include a first upper emitting layer 225a superimposed on the first lower emitting layer 222a. The first emitting unit EU1 of the second light-emitting diode LED2 may include a second lower emitting layer 222b, and the second emitting unit EU2 of the second light-emitting diode LED2 may include a second upper emitting layer 225b superimposed on the second lower emitting layer 222b. The first emitting unit EU1 of the third light-emitting diode LED3 may include a third lower emitting layer 222c, and the second emitting unit EU2 of the third light-emitting diode LED3 may include a third upper emitting layer 225c superimposed on the third lower emitting layer 222c.

[0077] In one aspect, the first lower emitting layer 222a, the second lower emitting layer 222b, and the third lower emitting layer 222c can emit light of different colors. In another aspect, the first upper emitting layer 225a, the second upper emitting layer 225b, and the third upper emitting layer 225c can emit light of different colors. For example, the first lower emitting layer 222a and the first upper emitting layer 225a can emit red light, the second lower emitting layer 222b and the second upper emitting layer 225b can emit green light, and the third lower emitting layer 222c and the third upper emitting layer 225c can emit blue light.

[0078] The first lower emitting layer 222a, the second lower emitting layer 222b, and the third lower emitting layer 222c, as well as the first upper emitting layer 225a, the second upper emitting layer 225b, and the third upper emitting layer 225c, may each comprise an organic material containing a fluorescent or phosphorescent material that emits red, green, or blue light. The first lower emitting layer 222a, the second lower emitting layer 222b, and the third lower emitting layer 222c, as well as the first upper emitting layer 225a, the second upper emitting layer 225b, and the third upper emitting layer 225c, may be organic emitting layers comprising low-molecular-weight or high-molecular-weight organic substances.

[0079] In one aspect, the first lower emitting layer 222a, the second lower emitting layer 222b, and the third lower emitting layer 222c, as well as the first upper emitting layer 225a, the second upper emitting layer 225b, and the third upper emitting layer 225c, may include a host material and a dopant material. The dopant material is a material that emits light of a specific color and may include a luminescent material. The luminescent material may include at least one of phosphorescent dopant, fluorescent dopant, and quantum dot. The host material is the primary material of the emitting layers and is the material that helps the dopant material emit light.

[0080] A charge generation layer CGL can be disposed between the lower emission layer 222 and the upper emission layer 225. The charge generation layer CGL may include a negative charge generation layer n-CGL and a positive charge generation layer p-CGL. The negative charge generation layer n-CGL can be disposed on the second common layer 223, and the positive charge generation layer p-CGL can be disposed on the negative charge generation layer n-CGL.

[0081] In one aspect, each of the negative charge generating layer n-CGL and the positive charge generating layer p-CGL can be integrally formed across the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3. In another aspect, the negative charge generating layer n-CGL can be integrally formed across the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3, and the positive charge generating layer p-CGL can be patterned and independently disposed on each of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3.

[0082] The negative charge generation layer n-CGL can be an n-type charge generation layer. The negative charge generation layer n-CGL can supply electrons. The negative charge generation layer n-CGL can include an n-type host material and an n-type dopant. The n-type dopant material can be a metal of Group 1 or Group 2 of the periodic table, an organic material capable of donating electrons, or a mixture thereof. For example, the n-type dopant material can be an alkali metal or an alkaline earth metal. The negative charge generation layer n-CGL can be formed from an organic layer doped with an alkali metal such as lithium (Li), sodium (Na), potassium (K), or cesium (Cs), or an alkaline earth metal such as magnesium (Mg), strontium (Sr), barium (Ba), or radium (Ra), but this disclosure is not limited thereto. The n-type host material can include an organic material capable of transferring electrons. For example, the n-type host material may include at least one of Alq3 (tris(8-hydroxyquinoline)aluminum), Liq (lithium 8-hydroxyquinoline), PBD (2-(4-biphenyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole), TAZ (3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole), spiro-PBD and BAlq (bis(2-methyl-8-hydroxyquinoline)-4-(phenylphenol)aluminum), SAlq, TPBi (2,2',2''-(1,3,5-phenyltriyl)-tris(1-phenyl-1-H-benzimidazole)), oxadiazole, triazole, phenanthroline, benzoxazole and benzothiazole, and this disclosure is not limited thereto.

[0083] The positive charge generation layer p-CGL can be a p-type charge generation layer. The positive charge generation layer p-CGL can supply holes. The positive charge generation layer p-CGL can include a p-type host material and a p-type dopant material. The p-type dopant material can include metal oxides, organic materials such as tetrafluoro-tetracyanoquinone dimethane (F4-TCNQ), HAT-CN (hexaazabenzphenanthrene-hexacarboxynitrile), and hexaazabenzphenanthrene, or materials such as V₂O₅, MoO₂, etc. x The p-type host material may include metal materials containing at least one of organic materials capable of transporting holes, such as NPD (N,N'-bis(naphthyl-1-yl)-N,N'-bis(phenyl)dimethylbenzidine), TPD (N,N'-bis-(3-methylphenyl)-N,N'-diphenylbenzidine), and MTDATA (4,4',4''-tris(N-(3-methylphenyl)-N-phenylamino)-triphenylamine), but this disclosure is not limited thereto.

[0084] The first emission unit EU1 may further include a first-1 common layer 221-1, a first-2 common layer 221-2, and a second common layer 223. The first-1 common layer 221-1 may be disposed on the pixel electrode 210, and the first-2 common layer 221-2 may be disposed on the first-1 common layer 221-1. The second common layer 223 may be disposed on the lower emission layer 222.

[0085] Each of the first-1 common layer 221-1 and the first-2 common layer 221-2 can be disposed between the pixel electrode 210 and the lower emission layer 222. For example, each of the first-1 common layer 221-1 and the first-2 common layer 221-2 can be disposed between the first pixel electrode 210a and the first lower emission layer 222a, between the second pixel electrode 210b and the second lower emission layer 222b, and between the third pixel electrode 210c and the third lower emission layer 222c.

[0086] The hole transport region may include a first common layer 221-1 and a first common layer 221-2. The hole transport region may have a single-layer or multi-layer structure. For example, the first common layer 221-1 of the hole transport region may be a hole injection layer (HIL), and the first common layer 221-2 may be a hole transport layer (HTL). Additionally, although not shown, the hole transport region may also include an electron blocking layer (EBL). Each of the first common layer 221-1 and the first common layer 221-2 may be integrally formed across a first light-emitting diode LED1, a second light-emitting diode LED2, and a third light-emitting diode LED3.

[0087] The second common layer 223 can be disposed between the lower emitter layer 222 and the charge generation layer CGL. For example, the second common layer 223 can be disposed between the first lower emitter layer 222a and the charge generation layer CGL, the second lower emitter layer 222b and the charge generation layer CGL, and the third lower emitter layer 222c and the charge generation layer CGL. The second common layer 223 can be integrally formed across the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3. The second common layer 223 can be an electron transport layer (ETL). The second common layer 223 can be disposed below the negative charge generation layer n-CGL. The electron transport layer and the negative charge generation layer n-CGL can include the same material. The negative charge generation layer n-CGL can be a layer doped with an n-type dopant in the same material as the electron transport layer.

[0088] The second emitting unit EU2 may include a third common layer 224, a fourth-first common layer 227-1, and a fourth-second common layer 227-2. The second emitting unit EU2 may also include a light-emitting diode (LED) buffer layer 226. The third common layer 224 may be disposed on the charge generation layer CGL. The LED buffer layer 226 may be disposed on the upper emitting layer 225. The fourth-first common layer 227-1 may be disposed on the LED buffer layer 226, and the fourth-second common layer 227-2 may be disposed on the fourth-first common layer 227-1.

[0089] The third common layer 224 can be disposed between the charge generation layer CGL and the upper emitting layer 225. The third common layer 224 can be disposed between the positive charge generation layer p-CGL and the upper emitting layer 225. For example, the third common layer 224 can be disposed between the charge generation layer CGL and the first upper emitting layer 225a, between the charge generation layer CGL and the second upper emitting layer 225b, and between the charge generation layer CGL and the third upper emitting layer 225c. The third common layer 224 can be integrally formed across the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3.

[0090] The third common layer 224 can be a hole transport layer (HTL) that can transport holes generated in the charge generation layer CGL to the second emitter unit EU2.

[0091] Each of the LED buffer layer 226, the 4-1 common layer 227-1, and the 4-2 common layer 227-2 can be disposed between the upper emitting layer 225 and the counter electrode 230.

[0092] A light-emitting diode buffer layer 226 may be disposed between the upper emitting layer 225 and the fourth-first common layer 227-1. The light-emitting diode buffer layer 226 may comprise inorganic materials such as silicon oxide, silicon nitride, and / or silicon oxynitride.

[0093] The electron transport region may include a 4-1 common layer 227-1 and a 4-2 common layer 227-2. The electron transport region may have a single-layer or multi-layer structure. For example, the 4-1 common layer 227-1 may be an electron transport layer (ETL), and the 4-2 common layer 227-2 may be an electron injection layer (EIL). Each of the 4-1 common layer 227-1 and the 4-2 common layer 227-2 may be integrally formed across a first light-emitting diode LED1, a second light-emitting diode LED2, and a third light-emitting diode LED3.

[0094] Figure 5 It is along Figure 3A A schematic cross-sectional view of the display panel 10 taken from one side by line I-I'. Figure 6 It is along Figure 3A A schematic cross-sectional view of the display panel 10 taken from one side by line I-I'.

[0095] Reference Figure 5 and Figure 6 The display panel 10 may include a substrate 100, a transistor TFT on the substrate 100, an organic insulating layer 110 disposed on the transistor TFT, and display elements (e.g., a first light-emitting diode LED1, a second light-emitting diode LED2, and a third light-emitting diode LED3) on the organic insulating layer 110. Figure 4 The display element can be electrically connected to a transistor TFT.

[0096] The substrate 100 may comprise glass, metal, or polymer resin. The polymer resin may comprise polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose acetate propionate, or mixtures thereof. In one aspect, the substrate 100 may have a multilayer structure comprising at least two matrix layers, each comprising a polymer resin as described above, and an inorganic layer disposed between the matrix layers.

[0097] A buffer layer 101 may be disposed on the substrate 100. The buffer layer 101 may comprise an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride. The buffer layer 101 may increase the flatness of the upper surface of the substrate 100, or prevent or minimize the penetration of impurities from the substrate 100 side into the active layer Act of the transistor TFT.

[0098] The pixel circuit PC can be disposed on the buffer layer 101. The pixel circuit PC may include a transistor TFT and a capacitor Cst. The transistor TFT may include an active layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0099] An active layer Act may be disposed on the buffer layer 101. In one aspect, the active layer Act may comprise a silicon-based semiconductor material, such as amorphous silicon or polycrystalline silicon. In another aspect, the active layer Act may comprise an oxide semiconductor material selected from at least one of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), aluminum (Al), cesium (Cs), cerium (Ce), and zinc (Zn).

[0100] The gate insulating layer 103 may be disposed on the active layer Act, and the gate electrode GE may be disposed on the gate insulating layer 103 to be superimposed on the active layer Act in a planar view. The gate electrode GE may include conductive materials such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), indium tin oxide (ITO), or indium zinc oxide (IZO), and may be a multilayer structure or a single-layer structure including the above materials.

[0101] A first interlayer insulating layer 105 can be disposed on the gate electrode GE, and a second capacitor electrode CE2 can be disposed on the first interlayer insulating layer 105. At least a portion of the gate electrode GE can be stacked with the second capacitor electrode CE2 in a planar view and serve as the first capacitor electrode CE1 of the capacitor Cst. In other words, the gate electrode GE and the first capacitor electrode CE1 can be integrally disposed. The second capacitor electrode CE2 can include conductive materials such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), indium tin oxide (ITO), or indium zinc oxide (IZO), and can be a multilayer structure or a single-layer structure including the above materials.

[0102] The second interlayer insulating layer 107 can be disposed on the second capacitor electrode CE2, and the source electrode SE and drain electrode DE can be disposed on the second interlayer insulating layer 107. Both the source electrode SE and the drain electrode DE can comprise conductive materials such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), indium tin oxide (ITO), or indium zinc oxide (IZO), and can be multilayer or single-layer structures comprising the aforementioned materials. For example, both the source electrode SE and the drain electrode DE can have a Ti / Al / Ti multilayer structure.

[0103] Each of the gate insulating layer 103, the first interlayer insulating layer 105, and the second interlayer insulating layer 107 may include an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, and may be a multilayer structure or a single-layer structure including the aforementioned materials.

[0104] An organic insulating layer 110 may be disposed on a pixel circuit PC. The organic insulating layer 110 may include a recess 110G. The recess 110G may be a shape in which a portion of the organic insulating layer 110 is removed in a direction toward the upper surface of the substrate 100. For example, the organic insulating layer 110 may have an undercut shape having a side surface recessed from the side surface of the tip 120T of the inorganic insulating layer 120, which will be described later.

[0105] The organic insulating layer 110 may include organic insulating materials. For example, the organic insulating layer 110 may include benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), polystyrene, polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or mixtures thereof.

[0106] The inorganic insulating layer 120 may be disposed on the organic insulating layer 110. The inorganic insulating layer 120 may include a first opening 120OP that overlaps with (or is connected to) the groove 110G of the organic insulating layer 110. The first opening 120OP of the inorganic insulating layer 120 may be located between the first light-emitting diode LED1 and the second light-emitting diode LED2. For example, the first opening 120OP of the inorganic insulating layer 120 may be located between the first pixel electrode 210a and the second pixel electrode 210b.

[0107] The inorganic insulating layer 120 may include a tip 120T that overlaps with the groove 110G of the organic insulating layer 110 and extends toward the center of the groove 110G. The tip 120T of the inorganic insulating layer 120 may be exposed through the separator openings 130OPs of the pixel defining layer 130. The tip 120T of the inorganic insulating layer 120 may protrude beyond the side surface of the pixel defining layer 130 defining the separator openings 130OPs in a direction toward the center of the groove 110G. For example, the tip 120T of the inorganic insulating layer 120 may be defined as a portion that protrudes further than the side surface of the groove 110G defining the organic insulating layer 110. That is, the side surface of the tip 120T of the inorganic insulating layer 120 may protrude toward the center of the groove 110G than the side surface of the groove 110G defining the organic insulating layer 110. In one aspect, the tip 120T of the inorganic insulating layer 120 may overlap with a portion of the dummy intermediate layer 220d.

[0108] For example, the inorganic insulating layer 120 may include silicon nitride (SiN) x Inorganic insulating materials.

[0109] The first light-emitting diode (LED1) and the second light-emitting diode (LED2) can be spaced apart from each other on the inorganic insulating layer 120. The first light-emitting diode (LED1) may include a first pixel electrode 210a, a first intermediate layer 220a, and a counter electrode 230. The second light-emitting diode (LED2) may include a second pixel electrode 210b, a second intermediate layer 220b, and a counter electrode 230.

[0110] The first pixel electrode 210a and the second pixel electrode 210b can be spaced apart from each other on the inorganic insulating layer 120. The first pixel electrode 210a and the second pixel electrode 210b can be spaced apart from each other, and the separator SEP can be located between the first pixel electrode 210a and the second pixel electrode 210b. For example, the first pixel electrode 210a and the second pixel electrode 210b can be spaced apart from each other, and the tip 120T of the inorganic insulating layer 120 and the groove 110G of the organic insulating layer 110 can both be located between the first pixel electrode 210a and the second pixel electrode 210b.

[0111] A pixel defining layer 130 may be disposed on the first pixel electrode 210a and the second pixel electrode 210b. The pixel defining layer 130 may cover the edges of the first pixel electrode 210a and the second pixel electrode 210b. The pixel defining layer 130 may include a first pixel opening 130OP1 exposing a portion of the first pixel electrode 210a and a second pixel opening 130OP2 exposing a portion of the second pixel electrode 210b. The pixel defining layer 130 may include separator openings 130OPs located between the first light-emitting diode LED1 and the second light-emitting diode LED2 and superimposed on (or connected to) the first opening 120OP of the inorganic insulating layer 120.

[0112] The separator SEP can be defined by the groove 110G of the organic insulating layer 110 and the tip 120T of the inorganic insulating layer 120 in the area exposed by the separator openings 130OPs. The separator SEP can be located between the first light-emitting diode LED1 and the second light-emitting diode LED2 to separate the first intermediate layer 220a of the first light-emitting diode LED1 from the second intermediate layer 220b of the second light-emitting diode LED2.

[0113] The intermediate layer 220 may include a first intermediate layer 220a, a second intermediate layer 220b, and a dummy intermediate layer 220d. The first intermediate layer 220a may be disposed on the first pixel electrode 210a, and the second intermediate layer 220b may be disposed on the second pixel electrode 210b. The dummy intermediate layer 220d may be disposed in (or on) a groove 110G in the organic insulating layer 110. Figure 5In this context, the upper surface of the dummy intermediate layer 220d is depicted as being disposed below the inorganic insulating layer 120, but it is not limited to this case; the upper surface of the dummy intermediate layer 220d may be disposed above the upper surface of the inorganic insulating layer 120.

[0114] Intermediate layer 220 can be divided into a first intermediate layer 220a, a second intermediate layer 220b, and a dummy intermediate layer 220d by separators SEP. That is, intermediate layer 220 can be divided into the first intermediate layer 220a, the second intermediate layer 220b, and the dummy intermediate layer 220d by the tip 120T of inorganic insulating layer 120 and the groove 110G of organic insulating layer 110. For example, dummy intermediate layer 220d can be separated from the first intermediate layer 220a and the second intermediate layer 220b in the separator openings 130OPs. Because the first intermediate layer 220a and the second intermediate layer 220b are separated from each other and the dummy intermediate layer 220d is located between the first intermediate layer 220a and the second intermediate layer 220b, leakage current flowing through intermediate layer 220 between adjacent first light-emitting diodes LED1 and LED2 can be reduced or prevented. Therefore, display panel 10 can display high-quality images without any blemishes or color mixing.

[0115] For reference Figure 4 Each of the first intermediate layer 220a and the second intermediate layer 220b may include a plurality of emitting units and a charge generation layer disposed between the plurality of emitting units. For example, the first intermediate layer 220a may include a first-1 emitting unit EU1a, a second-1 emitting unit EU2a, and a first charge generation layer CGLa disposed between the first-1 emitting unit EU1a and the second-1 emitting unit EU2a. For example, the second intermediate layer 220b may include a first-2 emitting unit EU1b, a second-2 emitting unit EU2b, and a second charge generation layer CGLb disposed between the first-2 emitting unit EU1b and the second-2 emitting unit EU2b. That is, each of the first light-emitting diode LED1 and the second light-emitting diode LED2 may be a series-connected light-emitting diode.

[0116] The first intermediate layer 220a's first-1 transmitting unit EU1a may include the first lower transmitting layer 222a (see...). Figure 4 First lower emission layer 222a (see...) Figure 4 The first pixel aperture 130OP1 can be located in the first pixel opening. The second-1 emission unit EU2a of the first intermediate layer 220a may include the first upper emission layer 225a (see...). Figure 4 The first upper emission layer 225a can be set in the first pixel aperture 130OP1. The first lower emission layer 222a (see...) Figure 4 ) and the first upper emission layer 225a (see Figure 4They can be stacked on top of each other in the first pixel opening 130OP1.

[0117] The first and second transmission units EU1b of the second intermediate layer 220b may include the second lower transmission layer 222b (see...). Figure 4 The second lower emission layer 222b can be disposed in the second pixel opening 130OP2. The second-2 emission unit EU2b of the second intermediate layer 220b may include the second upper emission layer 225b (see...). Figure 4 The second upper emission layer 225b can be set in the second pixel aperture 130OP2. The second lower emission layer 222b (see...) Figure 4 ) and the second upper emission layer 225b (see Figure 4 They can be stacked on top of each other in the second pixel opening 130OP2.

[0118] The dummy intermediate layer 220d may include a first dummy layer EU1d, a second dummy layer EU2d, and a dummy charge generation layer CGLd disposed between the first dummy layer EU1d and the second dummy layer EU2d. Each of the first dummy layer EU1d and the second dummy layer EU2d may not include an emission layer.

[0119] Each of the multiple common layers included in the intermediate layer 220 can be formed across the first light-emitting diode LED1 and the second light-emitting diode LED2, and can be separated and spaced apart by a separator SEP. For example, the first-1 emission unit EU1a of the first intermediate layer 220a, the first-2 emission unit EU1b of the second intermediate layer 220b, and the first dummy layer EU1d of the dummy intermediate layer 220d can all include a reference. Figure 4 The first-1 common layer 221-1, the first-2 common layer 221-2, and the second common layer 223 described herein, and the first-1 transmitting unit EU1a of the first intermediate layer 220a, the first-2 transmitting unit EU1b of the second intermediate layer 220b, and the first dummy layer EU1d of the dummy intermediate layer 220d can be separated and spaced apart by a separator SEP. For example, the second-1 transmitting unit EU2a of the first intermediate layer 220a, the second-2 transmitting unit EU2b of the second intermediate layer 220b, and the second dummy layer EU2d of the dummy intermediate layer 220d can all include references. Figure 4 The third common layer 224, the fourth-1 common layer 227-1 and the fourth-2 common layer 227-2 are described, and the second-1 transmitting unit EU2a of the first intermediate layer 220a, the second-2 transmitting unit EU2b of the second intermediate layer 220b and the second dummy layer EU2d of the dummy intermediate layer 220d can be separated and spaced apart by the separator SEP.

[0120] Includes the charge generation layer CGL in the intermediate layer 220 (see Figure 4The first charge generation layer CGLa of the first intermediate layer 220a, the second charge generation layer CGLb of the second intermediate layer 220b, and the dummy charge generation layer CGLd of the dummy intermediate layer 220d can be separated and spaced apart by the separator SEP.

[0121] An intermediate insulating layer 150 may be disposed on a dummy intermediate layer 220d. An intermediate insulating layer 150 may be disposed within a separator opening 130OPs. In one aspect, the intermediate insulating layer 150 may be located between a first light-emitting diode LED1 and a second light-emitting diode LED2. For example, the intermediate insulating layer 150 may be located between a first pixel electrode 210a and a second pixel electrode 210b. For example, the intermediate insulating layer 150 may not be superimposed on the first pixel electrode 210a and the second pixel electrode 210b. For example, the intermediate insulating layer 150 may be located between a first intermediate layer 220a and a second intermediate layer 220b. In one aspect, at least a portion of the intermediate insulating layer 150 may be disposed within a groove 110G of the organic insulating layer 110. In one aspect, at least a portion of the intermediate insulating layer 150 may be superimposed on the tip 120T of the inorganic insulating layer 120. In one aspect, at least a portion of the intermediate insulating layer 150 may be disposed between the tip 120T of the inorganic insulating layer 120 and the dummy intermediate layer 220d. For example, the intermediate insulating layer 150 may be disposed between the portion of the first intermediate layer 220a disposed on the tip 120T of the inorganic insulating layer 120 (or the portion of the first intermediate layer 220a adjacent to the tip 120T of the inorganic insulating layer 120) and the dummy intermediate layer 220d, and between the portion of the second intermediate layer 220b disposed on the tip 120T of the inorganic insulating layer 120 (or the portion of the second intermediate layer 220b adjacent to the tip 120T of the inorganic insulating layer 120) and the dummy intermediate layer 220d.

[0122] In one aspect, the intermediate insulating layer 150 may contact each of the first intermediate layer 220a and the second intermediate layer 220b.

[0123] In one aspect, the distance between the upper surface of the intermediate insulating layer 150 and the upper surface of the substrate 100 can be greater than the distance between the upper surface of the inorganic insulating layer 120 and the upper surface of the substrate 100.

[0124] In one aspect, such as Figure 5 As shown, the distance between the upper surface of the intermediate insulating layer 150 and the upper surface of the substrate 100 can be smaller than the distance between the upper surface of the pixel defining layer 130 and the upper surface of the substrate 100. However, this disclosure is not limited thereto, as... Figure 6As shown, the distance between the upper surface of the intermediate insulating layer 150 and the upper surface of the substrate 100 can be greater than the distance between the upper surface of the pixel defining layer 130 and the upper surface of the substrate 100. In another aspect, the distance between the upper surface of the intermediate insulating layer 150 and the upper surface of the substrate 100 can be substantially equal to the distance between the upper surface of the pixel defining layer 130 and the upper surface of the substrate 100.

[0125] The intermediate insulating layer 150 may include an organic insulating material. For example, the intermediate insulating layer 150 may also include a black material (e.g., carbon black, carbon nanotubes, black pigment, or black dye). That is, the intermediate insulating layer 150 may be black. Because the intermediate insulating layer 150 is black, the black visibility characteristics of the display panel 10 can be improved.

[0126] In one aspect, the counter electrode 230 may be disposed on the first intermediate layer 220a, the second intermediate layer 220b, and the intermediate insulating layer 150. In another aspect, the counter electrode 230 may be in contact with the intermediate insulating layer 150. In yet another aspect, the counter electrode 230 may be integrally disposed across the first light-emitting diode LED1 and the second light-emitting diode LED2.

[0127] Each of the first charge-generating layer CGLa and the second charge-generating layer CGLb can be spaced apart from the counter electrode 230 by an intermediate insulating layer 150 in the region overlapping with the groove 110G of the organic insulating layer 110 or in the separator openings 130OPs. The portions of the first intermediate layer 220a disposed on the tip 120T of the inorganic insulating layer 120 and the portions of the second intermediate layer 220b disposed on the tip 120T of the inorganic insulating layer 120 can be covered by the intermediate insulating layer 150. For example, even if the portions of the first charge-generating layer CGLa disposed on the tip 120T of the inorganic insulating layer 120 and the portions of the second charge-generating layer CGLb disposed on the tip 120T of the inorganic insulating layer 120 are exposed by the separator openings 130OPs, the first charge-generating layer CGLa and the second charge-generating layer CGLb are covered by the intermediate insulating layer 150, thereby not contacting the counter electrode 230, so that each of the first charge-generating layer CGLa and the second charge-generating layer CGLb can be electrically insulated from the counter electrode 230. Through the intermediate insulating layer 150, not only are the first intermediate layer 220a and the second intermediate layer 220b separated from each other, but each of the first charge generating layer CGLa and the second charge generating layer CGLb is stably insulated from the counter electrode 230, thereby reducing or preventing current leakage between the first light-emitting diode LED1 and the second light-emitting diode LED2, between the first charge generating layer CGLa and the counter electrode 230, and between the second charge generating layer CGLb and the counter electrode 230.

[0128] References are omitted in the following aspects. Figure 5 Redundant descriptions are omitted, and only the differences are described.

[0129] Figure 7 It is along Figure 3A A schematic cross-sectional view of the display panel 10 taken from one side by line I-I'.

[0130] Reference Figure 7 The intermediate insulating layer 150a may include a first intermediate insulating layer 150a1 and a second intermediate insulating layer 150a2 spaced apart from each other.

[0131] In one aspect, at least a portion of the first intermediate insulating layer 150a1 and at least a portion of the second intermediate insulating layer 150a2 can be disposed between the tip 120T of the inorganic insulating layer 120 and the dummy intermediate layer 220d. In cross-section, at least a portion of the first intermediate insulating layer 150a1 can be located between the first intermediate layer 220a and the dummy intermediate layer 220d. In cross-section, at least a portion of the second intermediate insulating layer 150a2 can be located between the second intermediate layer 220b and the dummy intermediate layer 220d. For example, the first intermediate insulating layer 150a1 can be disposed between the portion of the first intermediate layer 220a disposed on the tip 120T of the inorganic insulating layer 120 and the dummy intermediate layer 220d. For example, the second intermediate insulating layer 150a2 can be disposed between the portion of the second intermediate layer 220b disposed on the tip 120T of the inorganic insulating layer 120 and the dummy intermediate layer 220d.

[0132] In one aspect, the first intermediate insulating layer 150a1 may contact the first intermediate layer 220a, and the second intermediate insulating layer 150a2 may contact the second intermediate layer 220b. In another aspect, the first intermediate insulating layer 150a1 may contact the first charge-generating layer CGLa, and the second intermediate insulating layer 150a2 may contact the second charge-generating layer CGLb.

[0133] In one aspect, the distance between the top of the first intermediate insulating layer 150a1 and the upper surface of the substrate 100 can be greater than the distance between the upper surface of the inorganic insulating layer 120 and the upper surface of the substrate 100. The distance between the top of the second intermediate insulating layer 150a2 and the upper surface of the substrate 100 can be greater than the distance between the upper surface of the inorganic insulating layer 120 and the upper surface of the substrate 100.

[0134] In one aspect, the counter electrode 230 may be disposed on the first intermediate layer 220a, the second intermediate layer 220b, the intermediate insulating layer 150a, and the dummy intermediate layer 220d. In another aspect, the counter electrode 230 may be in contact with each of the first intermediate insulating layer 150a1, the second intermediate insulating layer 150a2, and the dummy intermediate layer 220d.

[0135] The first charge-generating layer CGLa can be spaced apart from the counter electrode 230 by a first intermediate insulating layer 150a1 in the region overlapping with the groove 110G of the organic insulating layer 110 or in the separator openings 130OPs. Because the end of the first intermediate layer 220a disposed on the tip 120T of the inorganic insulating layer 120 is in contact with the first intermediate insulating layer 150a1, the end of the first charge-generating layer CGLa is not exposed, and therefore the first charge-generating layer CGLa can be electrically insulated from the counter electrode 230. Because the end of the second intermediate layer 220b disposed on the tip 120T of the inorganic insulating layer 120 is in contact with the second intermediate insulating layer 150a2, the end of the second charge-generating layer CGLb is not exposed, and therefore the second charge-generating layer CGLb can be electrically insulated from the counter electrode 230. Therefore, since each of the first charge-generating layer CGLa and the second charge-generating layer CGLb is stably insulated from the counter electrode 230, current leakage between the first charge-generating layer CGLa and the counter electrode 230 and between the second charge-generating layer CGLb and the counter electrode 230 can be reduced or prevented.

[0136] Figure 8 It is along Figure 3A A schematic cross-sectional view of the display panel 10 taken from one side by line I-I'.

[0137] Reference Figure 8 The counter electrode 230 may include a first counter electrode 230a and a second counter electrode 230b. That is, the first light-emitting diode LED1 may include a first pixel electrode 210a, a first intermediate layer 220a, and a first counter electrode 230a, and the second light-emitting diode LED2 may include a second pixel electrode 210b, a second intermediate layer 220b, and a second counter electrode 230b. In one aspect, the first counter electrode 230a and the second counter electrode 230b may be spaced apart from each other and may be electrically insulated.

[0138] In one aspect, each of the first pair of electrodes 230a and the second pair of electrodes 230b may not be superimposed on the dummy intermediate layer 220d. In another aspect, each of the first pair of electrodes 230a and the second pair of electrodes 230b may be spaced apart from the dummy intermediate layer 220d.

[0139] The first pair of electrodes 230a may be spaced apart from the portion of the first charge generating layer CGLa disposed on the tip 120T of the inorganic insulating layer 120. For example, the second pair of electrodes 230b may be spaced apart from the portion of the second charge generating layer CGLb disposed on the tip 120T of the inorganic insulating layer 120.

[0140] Figure 9 It is along Figure 3AA schematic cross-sectional view of the display panel 10, taken from one side by line I-I'. Figure 9 References are omitted in the text. Figure 8 Redundant descriptions are omitted, and only the differences are described.

[0141] Reference Figure 9 The intermediate insulating layer 150 is omitted, and the counter electrode 230 may include a first pair of electrodes 230a and a second pair of electrodes 230b spaced apart from each other.

[0142] exist Figure 8 and Figure 9 In this aspect, the first pair of electrodes 230a and the second pair of electrodes 230b are spaced apart from the first charge-generating layer CGLa and the second charge-generating layer CGLb, respectively, so that the first pair of electrodes 230a can be electrically insulated from the first charge-generating layer CGLa, and the second pair of electrodes 230b can be electrically insulated from the second charge-generating layer CGLb. Therefore, current leakage between the first charge-generating layer CGLa and the first pair of electrodes 230a, and between the second charge-generating layer CGLb and the second pair of electrodes 230b, can be reduced or prevented.

[0143] Figures 10 to 17 This is a sequential cross-sectional view illustrating a method for manufacturing the display panel 10 according to one aspect. In the cross-sectional view, Figures 10 to 17 The sequence shows the reference. Figure 5 The described part corresponds to the method for manufacturing the display panel 10.

[0144] According to one or more aspects, a method of manufacturing a display panel may include: forming an organic insulating layer on a transistor; forming an inorganic insulating layer on the organic insulating layer, the inorganic insulating layer including a first opening; removing a portion of the organic insulating layer in a region overlapping with the first opening of the inorganic insulating layer to form a groove of the organic insulating layer and a tip of the inorganic insulating layer; forming a pixel electrode on the inorganic insulating layer; forming an intermediate layer on the pixel electrode, the intermediate layer including a first emitting unit, a charge generating layer and a second emitting unit, and forming a dummy intermediate layer in the groove of the organic insulating layer; forming an intermediate insulating layer on the dummy intermediate layer; and forming a counter electrode on the intermediate layer. In one aspect, the method of manufacturing a display panel may further include forming a pixel defining layer disposed on the pixel electrode, the pixel defining layer including a pixel opening exposing a portion of the pixel electrode and a separator opening connected to the first opening of the inorganic insulating layer and exposing the tip of the inorganic insulating layer.

[0145] Figure 10 The diagram illustrates the operation of forming a pixel circuit PC including a transistor TFT on a substrate 100 and forming an organic insulating layer 110 on the transistor TFT.

[0146] Reference Figure 10A pixel circuit PC including a transistor TFT can be formed on the substrate 100. For example, a buffer layer 101 can be formed on the substrate 100, and a pixel circuit PC including a transistor TFT and a capacitor Cst can be formed on the buffer layer 101. The transistor TFT may include an active layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE, and the capacitor Cst may include a first capacitor electrode CE1 and a second capacitor electrode CE2.

[0147] An active layer Act can be formed on the buffer layer 101. A gate insulating layer 103 can be formed on the active layer Act. A gate electrode GE can be formed on the gate insulating layer 103 to be stacked with the active layer Act in a planar view. A first interlayer insulating layer 105 can be formed on the gate electrode GE. A second capacitor electrode CE2 can be formed on the first interlayer insulating layer 105. At least a portion of the gate electrode GE can be formed to be stacked with the second capacitor electrode CE2 in a planar view. For example, the gate electrode GE can be used as the first capacitor electrode CE1 of the capacitor Cst. A second interlayer insulating layer 107 can be formed on the second capacitor electrode CE2. A source electrode SE and a drain electrode DE can be formed on the second interlayer insulating layer 107.

[0148] Each of the gate insulating layer 103, the first interlayer insulating layer 105, and the second interlayer insulating layer 107 may include an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, and may be a multilayer structure or a single-layer structure including the aforementioned materials.

[0149] An organic insulating layer 110 may be formed on a transistor TFT. For example, the organic insulating layer 110 may be formed on a second interlayer insulating layer 107. The organic insulating layer 110 may be a planarization layer having a flat upper surface. The organic insulating layer 110 may include an organic insulating material. For example, the organic insulating layer 110 may include benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), polystyrene, polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or mixtures thereof.

[0150] Figure 11 The operation of forming an inorganic insulating layer 120 including a first opening 120OP on an organic insulating layer 110 is shown.

[0151] Reference Figure 11An inorganic insulating layer 120 can be formed on the organic insulating layer 110, and a portion of the inorganic insulating layer 120 can be removed to form a first opening 120OP. For example, an inorganic insulating material can be deposited on the organic insulating layer 110 to form the inorganic insulating layer 120, and the first opening 120OP of the inorganic insulating layer 120 can be formed by a dry etching process.

[0152] The first opening 120OP of the inorganic insulating layer 120 can be formed as the first light-emitting diode LED1 located later (see Figure 17 ) and the second light-emitting diode LED2 (see Figure 17 Between. For example, the first opening 120OP of the inorganic insulating layer 120 can be formed located between the first pixel electrode 210a, which will be described later (see Figure 13 ) and the second pixel electrode 210b (see Figure 13 )between.

[0153] The inorganic insulating layer 120 can be made of materials such as silicon nitride (SiN). x Inorganic insulating materials are formed, for example, ).

[0154] Figure 12 The operation of forming a groove 110G of the organic insulating layer 110 and a tip 120T of the inorganic insulating layer 120 by removing a portion of the organic insulating layer 110 in the region overlapping with the first opening 120OP of the inorganic insulating layer 120 is shown.

[0155] Reference Figure 12 A portion of the organic insulating layer 110 can be removed in the region overlapping with the first opening 120OP of the inorganic insulating layer 120, allowing the organic insulating layer 110 to have an undercut shape. That is, the portion of the organic insulating layer 110 exposed by the first opening 120OP of the inorganic insulating layer 120 can be removed. This portion of the organic insulating layer 110 can be removed to give the organic insulating layer 110 a side surface that is deeper than the side surface of the inorganic insulating layer 120 defining the first opening 120OP, thereby forming a groove 110G in the organic insulating layer 110. For example, this portion of the organic insulating layer 110 can be removed using a dry etching process to form the groove 110G.

[0156] When the groove 110G of the organic insulating layer 110 is formed, the tip 120T of the inorganic insulating layer 120 can be formed to have a side surface that protrudes toward the center of the groove 110G of the organic insulating layer 110 than the side surface of the groove 110G of the organic insulating layer 110.

[0157] Figure 13The operation of forming pixel electrodes (e.g., first pixel electrode 210a and second pixel electrode 210b) on inorganic insulating layer 120 is shown.

[0158] Reference Figure 13 A first pixel electrode 210a and a second pixel electrode 210b can be formed on the inorganic insulating layer 120. The first pixel electrode 210a and the second pixel electrode 210b can be formed to be spaced apart from each other. For example, the first pixel electrode 210a and the second pixel electrode 210b can be formed to be spaced apart from each other, and the tip 120T of the inorganic insulating layer 120 and the groove 110G of the organic insulating layer 110 are located between the first pixel electrode 210a and the second pixel electrode 210b.

[0159] Each of the first pixel electrode 210a and the second pixel electrode 210b may include a transparent conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO). x The materials used may be indium oxide (In₂O₃), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), gallium zinc oxide (GZO), or aluminum zinc oxide (AZO). Each of the first pixel electrode 210a and the second pixel electrode 210b may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or compounds thereof. For example, each of the first pixel electrode 210a and the second pixel electrode 210b may have a three-layer structure of ITO / Ag / ITO.

[0160] Figure 14 Operation of forming a pixel defining layer 130 disposed on a first pixel electrode 210a and a second pixel electrode 210b is shown. The pixel defining layer 130 includes a first pixel opening 130OP1 that exposes a portion of the first pixel electrode 210a, a second pixel opening 130OP2 that exposes a portion of the second pixel electrode 210b, and a separator opening 130OPs that is connected to the first opening 120OP of the inorganic insulating layer 120 and exposes the tip 120T of the inorganic insulating layer 120.

[0161] Reference Figure 14 A pixel defining layer 130 can be formed on the first pixel electrode 210a and the second pixel electrode 210b. A first pixel opening 130OP1 exposing a portion of the first pixel electrode 210a, a second pixel opening 130OP2 exposing a portion of the second pixel electrode 210b, and a separator opening 130OPs connected to the first opening 120OP of the inorganic insulating layer 120 and exposing the tip 120T of the inorganic insulating layer 120 can be formed by removing a portion of the pixel defining layer 130.

[0162] The tip 120T of the inorganic insulating layer 120 and the groove 110G of the organic insulating layer 110 exposed by the separator openings 130OPs of the pixel limiting layer 130 can form a separator SEP.

[0163] Figure 15 The diagram illustrates the formation of a first intermediate layer 220a on a first pixel electrode 210a, comprising a first-1 emission unit EU1a, a first charge generation layer CGLb, and a second-1 emission unit EU2a; the formation of a second intermediate layer 220b on a second pixel electrode 210b, comprising a first-2 emission unit EU1b, a second charge generation layer CGLb, and a second-2 emission unit EU2b; and the formation of a dummy intermediate layer 220d in a groove 110G of the organic insulating layer 110.

[0164] Reference Figure 15 An intermediate layer 220 can be formed on the first pixel electrode 210a, the second pixel electrode 210b, and the groove 110G of the organic insulating layer 110. The intermediate layer 220 can be separated into a first intermediate layer 220a, a second intermediate layer 220b, and a dummy intermediate layer 220d by a separator SEP. That is, the intermediate layer 220 can be separated into a first intermediate layer 220a, a second intermediate layer 220b, and a dummy intermediate layer 220d by the tip 120T of the inorganic insulating layer 120 and the groove 110G of the organic insulating layer 110. For example, the first intermediate layer 220a can be formed on the first pixel electrode 210a, the second intermediate layer 220b can be formed on the second pixel electrode 210b, and the dummy intermediate layer 220d can be formed in (or on) the groove 110G of the organic insulating layer 110.

[0165] The first-1 transmitting unit EU1a of the first intermediate layer 220a, the first-2 transmitting unit EU1b of the second intermediate layer 220b, and the first dummy layer EU1d of the dummy intermediate layer 220d can be formed to be separated and spaced apart by a separator SEP. Each of the first-1 transmitting unit EU1a of the first intermediate layer 220a, the first-2 transmitting unit EU1b of the second intermediate layer 220b, and the first dummy layer EU1d of the dummy intermediate layer 220d can include the same material. For example, each of the first-1 transmitting unit EU1a of the first intermediate layer 220a, the first-2 transmitting unit EU1b of the second intermediate layer 220b, and the first dummy layer EU1d of the dummy intermediate layer 220d can include a reference material. Figure 4 The first-1 common layer 221-1, the first-2 common layer 221-2, and the second common layer 223 are described.

[0166] The first intermediate layer 220a's first-1 transmitting unit EU1a may include the first lower transmitting layer 222a (see...). Figure 4The first and second transmission units EU1b of the second intermediate layer 220b may include the second lower transmission layer 222b (see...). Figure 4 Furthermore, the first dummy layer EU1d of the dummy intermediate layer 220d may not include the emission layer. The first lower emission layer 222a (see...) Figure 4 ) and the second lower emission layer 222b (see Figure 4 They can be formed in the first pixel opening 130OP1 and the second pixel opening 130OP2, respectively.

[0167] The second-1 transmitting unit EU2a of the first intermediate layer 220a, the second-2 transmitting unit EU2b of the second intermediate layer 220b, and the second dummy layer EU2d of the dummy intermediate layer 220d can be formed to be separated and spaced apart by a separator SEP. Each of the second-1 transmitting unit EU2a of the first intermediate layer 220a, the second-2 transmitting unit EU2b of the second intermediate layer 220b, and the second dummy layer EU2d of the dummy intermediate layer 220d can include the same material. Each of the second-1 transmitting unit EU2a of the first intermediate layer 220a, the second-2 transmitting unit EU2b of the second intermediate layer 220b, and the second dummy layer EU2d of the dummy intermediate layer 220d can include a reference material. Figure 4 The third common layer 224, the fourth-1st common layer 227-1, and the fourth-2nd common layer 227-2 are described.

[0168] The second-1 transmitting unit EU2a of the first intermediate layer 220a may include the first upper transmitting layer 225a (see...). Figure 4 The second-2 transmitting unit EU2b of the second intermediate layer 220b may include the second upper transmitting layer 225b (see...). Figure 4 The second dummy layer EU2d of the dummy intermediate layer 220d may not include the emission layer. The first upper emission layer 225a (see...) Figure 4 ) and the second upper emission layer 225b (see Figure 4 They can be formed in the first pixel opening 130OP1 and the second pixel opening 130OP2, respectively.

[0169] Includes the charge generation layer CGL in the intermediate layer 220 (see Figure 4 The first charge generation layer CGLa of the first intermediate layer 220a, the second charge generation layer CGLb of the second intermediate layer 220b, and the dummy charge generation layer CGLd of the dummy intermediate layer 220d can be formed to be separated by the separator SEP.

[0170] Figure 16 The operation of forming an intermediate insulating layer 150 on a dummy intermediate layer 220d is shown.

[0171] Reference Figure 16 An intermediate insulating layer 150 can be formed on the dummy intermediate layer 220d within the separator opening 130OPs. The intermediate insulating layer 150 can be formed between the first light-emitting diode LED1 and the second light-emitting diode LED2. For example, the intermediate insulating layer 150 can be located between the first pixel electrode 210a and the second pixel electrode 210b. Alternatively, the intermediate insulating layer 150 can be located between the first intermediate layer 220a and the second intermediate layer 220b.

[0172] In one aspect, at least a portion of the intermediate insulating layer 150 may be formed in the groove 110G of the organic insulating layer 110. In another aspect, at least a portion of the intermediate insulating layer 150 may be formed between the tip 120T of the inorganic insulating layer 120 and the dummy intermediate layer 220d. For example, the intermediate insulating layer 150 may be formed between the portion of the first intermediate layer 220a disposed on the tip 120T of the inorganic insulating layer 120 and the dummy intermediate layer 220d, and between the portion of the second intermediate layer 220b disposed on the tip 120T of the inorganic insulating layer 120 and the dummy intermediate layer 220d.

[0173] In one aspect, such as referring to Figure 7 As shown, the intermediate insulating layer 150 can be formed to include a first intermediate insulating layer 150a1 and a second intermediate insulating layer 150a2 spaced apart from each other. In this case, at least a portion of the first intermediate insulating layer 150a1 can be formed between the first intermediate layer 220a and the dummy intermediate layer 220d, and at least a portion of the second intermediate insulating layer 150a2 can be formed between the second intermediate layer 220b and the dummy intermediate layer 220d.

[0174] The intermediate insulating layer 150 can be formed of an organic insulating material. For example, the intermediate insulating layer 150 can be formed by further including a black material (e.g., carbon black, carbon nanotubes, black pigment or black dye).

[0175] Figure 17 The operation of forming counter electrode 230 on intermediate layer 220 is shown.

[0176] Reference Figure 17A counter electrode 230 can be formed on the first intermediate layer 220a and the second intermediate layer 220b. In one aspect, the counter electrode 230 can be integrally formed across the first intermediate layer 220a and the second intermediate layer 220b. The counter electrode 230 can be formed on the intermediate insulating layer 150. Each of the first charge generating layer CGL1 and the second charge generating layer CGL2b can be spaced apart from the counter electrode 230 by the intermediate insulating layer 150. In one aspect, the portion of the first intermediate layer 220a disposed on the tip 120T of the inorganic insulating layer 120 and the portion of the second intermediate layer 220b disposed on the tip 120T of the inorganic insulating layer 120 can be formed to contact the intermediate insulating layer 150.

[0177] In one aspect, such as referring to Figure 8 and Figure 9 As described, the counter electrode 230 may be formed to include a first pair of electrodes 230a and a second pair of electrodes 230b that are patterned and spaced apart from each other.

[0178] The display panel and the electronic device including the display panel can improve the display quality and reliability of the display panel. The above effects are exemplary, and the scope of disclosure is not limited to these effects.

[0179] The mentioned aspects have been described with reference to one aspect shown in the accompanying drawings; however, this is merely an example, and those skilled in the art will understand that various modifications and variations can be made to this aspect. Therefore, the scope of protection of the mentioned aspects should be determined by the appended claims.

Claims

1. A display panel, the display panel comprising: Transistors, on a substrate; An organic insulating layer is disposed on the transistor and includes grooves; An inorganic insulating layer is disposed on the organic insulating layer, the inorganic insulating layer including a tip extending toward the center of the groove; The first pixel electrode and the second pixel electrode are disposed on the inorganic insulating layer; A first intermediate layer is disposed on the first pixel electrode; The second intermediate layer is disposed on the second pixel electrode; A dummy intermediate layer is disposed in the groove of the organic insulating layer. The dummy intermediate layer is separate from the first intermediate layer and the second intermediate layer. The first intermediate layer, the second intermediate layer and the dummy intermediate layer have the same composition. An intermediate insulating layer is disposed on the dummy intermediate layer and contacts each of the first intermediate layer and the second intermediate layer; as well as The electrodes are disposed on the first intermediate layer and the second intermediate layer.

2. The display panel according to claim 1, wherein, The first intermediate layer includes a first-1 emission unit, a first charge generation layer, and a second-1 emission unit. In the region where the groove overlaps with the organic insulating layer, the first charge-generating layer is spaced apart from the counter electrode by the intermediate insulating layer.

3. The display panel according to claim 1, wherein, The intermediate insulating layer is located between the first pixel electrode and the second pixel electrode.

4. The display panel according to claim 1, wherein, At least a portion of the intermediate insulating layer is disposed between the dummy intermediate layer and the tip of the inorganic insulating layer.

5. The display panel according to claim 1, wherein, At least a portion of the intermediate insulating layer is disposed between the dummy intermediate layer and the portion of the first intermediate layer disposed at the tip of the inorganic insulating layer.

6. The display panel according to claim 1, wherein, The intermediate insulating layer includes a first intermediate insulating layer and a second intermediate insulating layer, wherein, in cross-section, at least a portion of the first intermediate insulating layer is positioned between the first intermediate layer and the dummy intermediate layer, and in cross-section, at least a portion of the second intermediate insulating layer is positioned between the second intermediate layer and the dummy intermediate layer. The first intermediate insulating layer and the second intermediate insulating layer are spaced apart from each other.

7. The display panel according to claim 1, wherein, The distance between the upper surface of the substrate and the upper surface of the intermediate insulating layer is greater than the distance between the upper surface of the substrate and the upper surface of the inorganic insulating layer.

8. The display panel according to claim 1, wherein, The intermediate insulating layer comprises an organic insulating material.

9. The display panel according to claim 1, further comprising: A pixel defining layer is disposed on the first pixel electrode and the second pixel electrode, the pixel defining layer including a first pixel opening exposing a portion of the first pixel electrode, a second pixel opening exposing a portion of the second pixel electrode, and a separator opening aligned with the groove of the organic insulating layer.

10. The display panel according to claim 9, wherein, The intermediate insulating layer is disposed within the separator opening of the pixel defining layer.

11. The display panel according to claim 1, wherein, The tip of the inorganic insulating layer protrudes beyond the side surface of the organic insulating layer that defines the groove in a direction toward the center of the groove.

12. The display panel according to claim 1, wherein, The counter electrode is in contact with the intermediate insulating layer.

13. The display panel according to claim 1, wherein, The counter electrode includes: a first pair of electrodes disposed on the first intermediate layer; and a second pair of electrodes disposed on the second intermediate layer. The first pair of electrodes and the second pair of electrodes are spaced apart from each other.

14. An electronic device, the electronic device comprising: Display module, including display panel; Power module; Memory; And a processor, configured to provide image data signals and input control signals to the display module. The display panel includes: Transistors, on a substrate; An organic insulating layer is disposed on the transistor and includes grooves; An inorganic insulating layer is disposed on the organic insulating layer, the inorganic insulating layer including a tip extending toward the center of the groove; The first pixel electrode and the second pixel electrode are disposed on the inorganic insulating layer; A first intermediate layer is disposed on the first pixel electrode; The second intermediate layer is disposed on the second pixel electrode; A dummy intermediate layer is disposed in the groove of the organic insulating layer. The dummy intermediate layer is separate from the first intermediate layer and the second intermediate layer. The first intermediate layer, the second intermediate layer and the dummy intermediate layer have the same composition. An intermediate insulating layer is disposed on the dummy intermediate layer and contacts each of the first intermediate layer and the second intermediate layer; and The electrodes are disposed on the first intermediate layer and the second intermediate layer.

15. The electronic device according to claim 14, wherein, The first intermediate layer includes a first-1 emission unit, a first charge generation layer, and a second-1 emission unit. In the region where the groove overlaps with the organic insulating layer, the first charge-generating layer is spaced apart from the counter electrode by the intermediate insulating layer.

16. A method for manufacturing a display panel, the method comprising: An organic insulating layer is formed on the transistor; An inorganic insulating layer is formed on the organic insulating layer, the inorganic insulating layer including a first opening; A portion of the organic insulating layer is removed in the region overlapping with the first opening of the inorganic insulating layer to form a groove in the organic insulating layer and a tip in the inorganic insulating layer; A pixel electrode is formed on the inorganic insulating layer; An intermediate layer is provided on the pixel electrode and the groove, such that the tip of the inorganic insulating layer and the groove of the organic insulating layer separate the intermediate layer to form a dummy intermediate layer in the groove. The intermediate layer includes a first emission unit, a charge generation layer and a second emission unit. An intermediate insulating layer is formed on the dummy intermediate layer; as well as A counter electrode is formed on the intermediate layer.

17. The method according to claim 16, wherein, After the counter electrode is formed, the charge generating layer is spaced apart from the counter electrode by the intermediate insulating layer in the region where it overlaps with the groove of the organic insulating layer.

18. The method according to claim 16, further comprising: A pixel defining layer is formed on the pixel electrode, the pixel defining layer including a pixel opening that exposes a portion of the pixel electrode and a separator opening that is connected to the first opening of the inorganic insulating layer and exposes the tip of the inorganic insulating layer.

19. The method of claim 16, wherein, The intermediate insulating layer comprises an organic insulating material.

20. The method of claim 16, wherein, The intermediate insulating layer comprises a black organic insulating material.

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