A method for forming a staircase-shaped morphology, a semiconductor structure and a semiconductor device
Patent Information
- Application Number
- CN202611432932.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-09-15
- Publication Date
- 2026-10-23
AI Technical Summary
[0002]在阶梯形的氧化层(OX)形貌制备过程中,采用二次曝光工艺达到底层氧化层为阶梯状的目的;首先,采用一种图案化光罩,在氧化层上进行第一次涂覆光刻胶、曝光、刻蚀、去除光刻胶以及酸槽清洗;接着,采用另一种图案化光罩,进行第二次涂覆光刻胶、曝光、刻蚀、去除光刻胶以及酸槽清洗,最终形成底层氧化层的阶梯状形貌;但该工艺需要两套光罩进行二次曝光,生产效率低,制备成本高
本发明在初始氧化层上引入第一抗反射薄膜,采用仅一套预设光罩进行一次曝光后在得到的中间氧化层上引入第二抗反射薄膜,刻蚀即可得到具有阶梯形形貌的氧化层,也即在整个阶梯形形貌的制备过程中,通过分步引入两层抗反射薄膜,只需一套预设光罩进行一次曝光,后续无需再引入另一套光罩进行二次曝光,即可精确地在氧化层中得到期望的阶梯形形貌;相比于现有的二次曝光工艺,有效提高了生产效率,降低了制备成本,还能够在一定程度上改善氧化层的形貌缺陷。
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Figure CN122971193A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for forming a stepped morphology, a semiconductor structure, and a semiconductor device. Background Technology
[0002] In the process of preparing a stepped oxide (OX) morphology, a double exposure process is used to achieve the goal of a stepped bottom oxide layer. First, a patterned photomask is used to coat the oxide layer with photoresist, expose, etch, remove the photoresist, and clean it in an acid bath. Then, another patterned photomask is used to coat the oxide layer with photoresist, expose, etch, remove the photoresist, and clean it in an acid bath, finally forming the stepped morphology of the bottom oxide layer. However, this process requires two sets of photomasks for double exposure, resulting in low production efficiency and high preparation cost. Summary of the Invention
[0003] To address the problems of the prior art, embodiments of the present invention provide a method for forming a stepped morphology, a semiconductor structure, and a semiconductor device. The technical solution is as follows: On one hand, the present invention provides a method for forming a stepped morphology, comprising: A first anti-reflective film is formed on an initial structure; the initial structure includes a substrate and an initial oxide layer, the initial oxide layer being located on the substrate, and the first anti-reflective film covering the initial oxide layer; Based on a preset photomask, a patterned photoresist is formed on the first anti-reflective film; the preset photomask has multiple preset process windows; According to the patterned photoresist, the first anti-reflective film and the initial oxide layer are etched to form multiple etch windows of different depths in the initial oxide layer to obtain an intermediate oxide layer; the depth of each etch window is related to the critical dimension of each preset process window; Remove the patterned photoresist and any remaining first antireflective film; A second anti-reflective film is formed on the intermediate oxide layer having multiple etching windows; the second anti-reflective film covers the intermediate oxide layer and fills each of the etching windows; The second antireflective film and the intermediate oxide layer are etched to form a stepped morphology in the intermediate oxide layer, thereby obtaining the oxide layer.
[0004] Furthermore, during the etching process that forms the intermediate oxide layer, the polymer byproducts generated during etching accumulate in each of the etching windows to form an etching stop layer. The degree of accumulation of the etching stop layer in each of the etching windows is related to the critical dimensions of each of the preset process windows, and is used to control the depth of each of the etching windows.
[0005] Furthermore, the etching gas used to etch the first antireflective film and the initial oxide layer includes a fluorine-containing gas, wherein the volume percentage of the fluorine-containing gas in the etching gas is 30% to 90%.
[0006] Further, the etching of the first antireflective film and the initial oxide layer according to the patterned photoresist, forming multiple etching windows of different depths in the initial oxide layer to obtain the intermediate oxide layer includes: The first antireflective film is etched according to the patterned photoresist to form a plurality of initial windows of different depths; the depth of each initial window is related to the critical dimensions of each preset process window; In the region of each initial window, the initial oxide layer is etched to form a plurality of etched windows; the height difference between two etched windows is greater than or equal to the height difference between the corresponding two initial windows.
[0007] Further, the etching of the second antireflective film and the intermediate oxide layer to form a stepped morphology in the intermediate oxide layer, resulting in an oxide layer comprising: The second antireflective film is planarized until the surface of the intermediate oxide layer is exposed; the remaining portion of the second antireflective film is located in each of the etching windows; The exposed surface area in the intermediate oxide layer is etched; The residual portion of the second antireflective film is removed to obtain the oxide layer having the aforementioned stepped morphology.
[0008] Furthermore, at least one of the patterned photoresist, the first antireflective film, and the second antireflective film is removed by dry etching.
[0009] Furthermore, the cavity pressure for etching at least one of the first antireflective film, the initial oxide layer, the second antireflective film, and the intermediate oxide layer is 50mT to 200mT.
[0010] Furthermore, the high-frequency power for etching at least one of the first antireflective film, the initial oxide layer, the second antireflective film, and the intermediate oxide layer is 300W to 800W, and the low-frequency power is 100W to 1500W.
[0011] On the other hand, the present invention also provides a semiconductor structure including a substrate and an oxide layer, the oxide layer being located on the substrate and having a stepped morphology, the stepped morphology being formed based on the method for forming a stepped morphology as described in any of the preceding claims.
[0012] On the other hand, the present invention also provides a semiconductor device, which is fabricated based on the semiconductor structure described above.
[0013] Implementing this invention has the following beneficial effects: This invention introduces a first anti-reflective film onto the initial oxide layer. After a single exposure using only one preset photomask, a second anti-reflective film is introduced onto the resulting intermediate oxide layer. Etching then yields an oxide layer with a stepped morphology. In other words, by introducing two anti-reflective films stepwise during the entire process of preparing the stepped morphology, only one preset photomask is needed for a single exposure, eliminating the need for a second exposure using another photomask. This allows for precise attainment of the desired stepped morphology within the oxide layer. Compared to existing double-exposure processes, this invention effectively improves production efficiency, reduces manufacturing costs, and can also improve the morphology defects of the oxide layer to a certain extent. Attached Figure Description
[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0015] Figure 1 A flowchart illustrating a method for forming a stepped morphology according to an embodiment of the present invention; Figure 2 A flowchart illustrating a method for preparing an intermediate oxide layer according to an embodiment of the present invention; Figure 3 A flowchart illustrating an etching method for a second anti-reflective film and an intermediate oxide layer, provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of a semiconductor structure provided in an embodiment of the present invention.
[0016] The attached figures are labeled as follows: 100 - Substrate, 200 - Oxide layer, 210 - Initial oxide layer, 211 - Initial window, 220 - Intermediate oxide layer, 221 - Etched window, 300 - First anti-reflective film, 400 - Patterned photoresist, 500 - Second anti-reflective film, 600 - Oxide pad layer. Detailed Implementation
[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0018] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe specific objects or a sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or server that comprises a series of steps or units is not necessarily limited to those explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or devices.
[0019] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that the depth direction of an element or layer is perpendicular to the surface of the element or layer, and the cross-sectional direction of an element or layer is parallel to the surface of the element or layer. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this invention, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion. When discussing a second element, component, region, layer, or portion, it does not imply that the invention necessarily contains a first element, component, region, layer, or portion.
[0020] To address the problems of low production efficiency and high cost caused by using two sets of photomasks for secondary exposure in existing stepped oxide layer morphologies, this invention provides a method for forming stepped morphologies, a semiconductor structure, and a semiconductor device. The semiconductor device is fabricated based on the semiconductor structure. The method for forming stepped morphologies is used to form stepped morphologies of the oxide layer in the semiconductor structure. First, a first anti-reflective film is formed on an initial structure including a substrate and an initial oxide layer, the first anti-reflective film covering the initial oxide layer. Then, based on a preset photomask with multiple preset process windows, a pattern is formed on the first anti-reflective film. A patterned photoresist is applied; then, based on the patterned photoresist, a first anti-reflective film and an initial oxide layer are etched to form multiple etch windows of different depths in the initial oxide layer. The depth of each etch window is related to the critical dimensions of each preset process window, resulting in an intermediate oxide layer; next, the patterned photoresist and the remaining first anti-reflective film are removed; a second anti-reflective film is formed on the intermediate oxide layer with multiple etch windows, which covers the intermediate oxide layer and fills each etch window; the second anti-reflective film and the intermediate oxide layer are etched to form a stepped morphology in the intermediate oxide layer, resulting in an oxide layer.
[0021] Thus, compared to the existing double exposure process, this method of forming a stepped morphology introduces a first anti-reflective film on the initial oxide layer, and after one exposure using only one set of preset photomasks, introduces a second anti-reflective film on the resulting intermediate oxide layer. Etching can then produce an oxide layer with a stepped morphology. The entire process of preparing the stepped morphology only requires one exposure using one set of preset photomasks, which effectively improves production efficiency, reduces preparation costs, and can also improve the morphology defects of the oxide layer to a certain extent.
[0022] The following is in conjunction with the appendix Figure 1-3 A method for forming a stepped morphology provided in an embodiment of the present invention will be described in detail.
[0023] First, refer to Figure 1 A first anti-reflective film is formed on the initial structure.
[0024] The initial structure includes a substrate 100 and an initial oxide layer 210. The substrate 100 is made of silicon, such as monocrystalline silicon, polycrystalline silicon, SOI, and sapphire, which can provide good mechanical support to support the formation process of the stepped morphology and the stable progress of subsequent semiconductor processes. The initial oxide layer 210 is located on the substrate 100 and is used to achieve electrical isolation between the final semiconductor devices. In some optional embodiments, the initial oxide layer 210 is made of silicon oxide, which has good isolation performance.
[0025] In some exemplary embodiments, the initial structure further includes an oxide pad 600 located between the substrate 100 and the initial oxide layer 210. The oxide pad 600 is a thin layer that can serve as a buffer layer to alleviate stress generated between the formation process of the stepped morphology and subsequent processing processes and the silicon substrate 100, thereby preventing cracking or defects in the substrate 100 material. At the same time, it can protect the surface of the substrate 100 from etching damage.
[0026] The first anti-reflective film 300 covers the initial oxide layer 210. Specifically, the first anti-reflective film 300 can be a BARC (Bottom Anti-Reflective Coating) material, which can be formed as a whole layer of the first anti-reflective film 300 by coating it on the surface of the initial oxide layer 210 away from the substrate 100. In some exemplary embodiments, the first anti-reflective film 300 is formed by spin coating and gradient thermal curing process, or by chemical vapor deposition (CVD) and other processes.
[0027] Next, refer to Figure 1 Based on a preset photomask, a patterned photoresist 400 is formed on the first anti-reflective film 300.
[0028] The preset photomask has multiple preset process windows. In the process of forming the patterned photoresist 400, a whole layer of photoresist is first coated on the first anti-reflective film 300. Then, according to the multiple preset process windows of the preset photomask, the photoresist layer material is patterned and etched at the positions corresponding to the preset process windows to remove the photoresist layer material below the preset window position and form the patterned photoresist.
[0029] It should be noted that in the entire process of forming this stepped morphology, only one photomask is required, without the need for other photomasks with different patterns. The process only requires one step of coating the photoresist material, one exposure, and one etching of the photoresist material to form the patterned photoresist 400. Combined with the previously formed first anti-reflective film 300 and the subsequently formed second anti-reflective film 500, the oxide layer 200 with a stepped morphology can be accurately formed. Compared with the existing double exposure process using two sets of photomasks, this effectively improves production efficiency, shortens the production cycle, and reduces production costs.
[0030] Next, refer to Figure 1 Based on the patterned photoresist, the first anti-reflective film and the initial oxide layer are etched to form multiple etching windows of different depths in the initial oxide layer, thus obtaining the intermediate oxide layer.
[0031] The depth of each etched window 221 is related to the critical dimension (CD) of each preset process window, so that etched windows 221 of different depths can be formed under preset process windows of different critical dimensions through a synchronous etching process. In some exemplary embodiments, the depth of each etched window 221 is positively correlated with the critical dimension of each preset process window, that is, the larger the critical dimension of the preset process window, the deeper the etched window 221 corresponding to the preset process window formed by this step.
[0032] Specifically, during the etching process of forming the intermediate oxide layer 220, the etching of the first anti-reflective film 300 and the initial oxide layer 210 will generate polymer byproducts. The polymer byproducts generated by the etching accumulate on each etching window 221 to form an etching stop layer (not shown), which can affect the depth of each etching window 221 and effectively form a depth difference between different etching windows 221 in the first anti-reflective film 300 and the initial oxide layer 210.
[0033] Furthermore, the degree of accumulation of the etching stop layer in each etching window 221 is related to the critical size of each preset process window, which is used to control the depth of each etching window 221. That is, below the position corresponding to the preset process window, different degrees of polymer by-product accumulation will be formed in different etching areas of the first anti-reflective film 300 (and the initial oxide layer 210). The accumulation of polymer by-products will affect the etching process. Etching continues during the accumulation process. Since the critical size of different preset process windows is different, the corresponding etching area size is different, which makes the etching rate of different etching areas different. Ultimately, this is reflected in the difference in etching depth of different etching areas, forming various etching windows 221 with different depths.
[0034] For example, in some alternative embodiments, the degree of accumulation of the etch stop layer in each etch window 221 is positively correlated with the critical size of each preset process window; in other exemplary embodiments, the degree of accumulation of the etch stop layer in each etch window 221 is negatively correlated with the critical size of each preset process window.
[0035] In some exemplary embodiments, during the etching of the first antireflective film 300 and the initial oxide layer 210, polymer byproducts are partially or completely etched away as the etching process continues to form an etch stop layer, which has different effects on the etching rate of different etched areas and ultimately affects the depth of each etch window 221. That is, the etch stop layer is generated and partially or completely etched away at the same time, and a separate removal step is no longer required to remove the etch stop layer.
[0036] In other preferred embodiments, after the steps that expose the etch stop layer, such as after forming the etch window 221 to obtain the oxide layer 200, or after removing the patterned photoresist 400, or after removing the residual first anti-reflective film 300, or after etching to remove the second anti-reflective film 500, a single etching step is used to remove the residual etch stop layer, so as to avoid the residual etch stop layer affecting the reliability of subsequent process and the performance of the final semiconductor device. In some exemplary embodiments, the etch stop layer can be removed by wet etching. The polymer byproducts generated during the etching of the first anti-reflective film 300 are relatively light and easy to remove by wet etching, reducing the removal difficulty and also helping to improve the morphological defects of the oxide layer 200 and the semiconductor structure.
[0037] In some exemplary embodiments, the etch stop layer covers the bottom wall of the etch window 221; in other exemplary embodiments, the etch stop layer covers the sidewalls and bottom wall of the etch window 221.
[0038] Specifically, in this step, the etching gas used to etch the first antireflective film 300 and the initial oxide layer 210 includes a fluorine-containing gas. This fluorine-containing gas is conducive to the generation of polymer byproducts, thereby facilitating the formation of an etching stop layer during the etching process. This allows the etching rate to be affected to different degrees by the accumulation of polymer byproducts in different etching regions, ultimately resulting in height differences between each etching window 221.
[0039] The volume percentage of fluorine-containing gas in the etching gas is 30% to 90%; understandably, the volume percentage of fluorine-containing gas in the etching gas can be any value within the range of 30% to 90%; for example, the volume percentage of fluorine-containing gas in the etching gas can be 30%, 40%, 50%, 55%, 60%, 65%, 70%, 80%, 84%, 90%, etc.; within this volume percentage range, more polymer by-products can be generated, so as to form etching windows 221 of different depths according to different etching area sizes; in some preferred embodiments, the volume percentage of fluorine-containing gas in the etching gas is 30% to 80%.
[0040] Specifically, such as Figure 2 As shown, in some exemplary embodiments, the step of etching the first antireflective film and the initial oxide layer according to the patterned photoresist, forming multiple etching windows of different depths in the initial oxide layer to obtain the intermediate oxide layer, includes: The first antireflective film is etched according to the patterned photoresist to form a plurality of initial windows of different depths; the depth of each initial window is related to the critical dimensions of each preset process window; In the region of each initial window, the initial oxide layer is etched to form a plurality of etched windows; the height difference between two etched windows is greater than or equal to the height difference between the corresponding two initial windows.
[0041] During the entire formation process of the intermediate oxide layer 220 by etching, the first anti-reflective film 300 covering the initial oxide layer 210 is preferentially etched. Furthermore, polymer byproducts are generated during the etching of the first anti-reflective film 300, resulting in a certain height difference between the initial windows 211 of different key sizes during the etching of the first anti-reflective film 300. Subsequent etching will then reach the initial oxide layer 210.
[0042] The depth of each initial window 211 is related to the critical size of each preset process window, so that during the etching of the first anti-reflective film 300, initial windows 211 of different depths are formed in the first anti-reflective film 300 corresponding to different preset process windows. In some exemplary embodiments, the depth of each initial window 211 is positively correlated with the critical size of each preset process window, that is, the larger the critical size of the preset process window, the deeper the corresponding initial window 211 is.
[0043] In some exemplary embodiments, the height difference generated on different initial windows 211 in the first antireflective film 300 will continue or be transferred to the oxide layer 200 to form a height difference in the oxide layer 200 as the initial oxide layer 210 is etched. At this time, the height difference between the two etched windows 221 is equal to the height difference between the corresponding two initial windows 211.
[0044] In some other exemplary embodiments, the height difference generated on different initial windows 211 in the first antireflective film 300 will further increase as the initial oxidation etching process continues, that is, further increase the height difference between each etched window 221 in the oxide layer 200. At this time, the height difference between two etched windows 221 is greater than the height difference between the corresponding two initial windows 211.
[0045] In some exemplary embodiments, after obtaining the initial window 211, in the step of etching the initial oxide layer 210 to form multiple etched windows 221, the etching gas used has a higher etching selectivity for the oxide layer 200 material than for the first antireflective film 300 material, so as to improve the etching effectiveness and etching reliability of the initial oxide layer 210, and effectively transfer or even expand the height difference in the first antireflective film 300 to the intermediate oxide layer 220.
[0046] Next, refer to Figure 1 Remove the patterned photoresist and the remaining first anti-reflective film.
[0047] Specifically, in some exemplary embodiments, at least one of the patterned photoresist 400, the first anti-reflective film 300, and the subsequent second anti-reflective film 500 is removed by dry etching; in some preferred embodiments, the patterned photoresist 400, the first anti-reflective film 300, and the second anti-reflective film 500 can all be removed by dry etching, specifically in the same dry etching machine, that is, sharing the same dry etching machine, without the need to introduce an additional machine specifically for removing photoresist, thus saving equipment and process costs.
[0048] Next, refer to Figure 1 A second anti-reflective film is formed on an intermediate oxide layer having multiple etched windows; the second anti-reflective film covers the intermediate oxide layer and fills each etched window.
[0049] The second anti-reflective film 500 can use the same material and the same formation process as the first anti-reflective film 300. Specifically, a whole layer of the second anti-reflective film 500 can be formed by coating it on the intermediate oxide layer 220 to cover the surface of the intermediate oxide layer 220. At the same time, the material of the second anti-reflective film 500 fills the etching window 221 during the formation process.
[0050] Next, refer to Figure 1 The second antireflective film and the intermediate oxide layer are etched to form a stepped morphology in the intermediate oxide layer, thus obtaining the oxide layer.
[0051] Specifically, such as Figure 3 As shown, in some exemplary embodiments, etching the second antireflective film and the intermediate oxide layer to form a stepped morphology in the intermediate oxide layer to obtain the oxide layer includes: The second antireflective film is planarized until the surface of the intermediate oxide layer is exposed; the remaining portion of the second antireflective film is located in each of the etching windows; The exposed surface area in the intermediate oxide layer is etched; The residual portion of the second antireflective film is removed to obtain the oxide layer having the aforementioned stepped morphology.
[0052] Before planarization of the second anti-reflective film 500, the etching window 221 of the intermediate oxide layer 220 is filled and covered by the second anti-reflective film 500, and the surface of the intermediate oxide layer 220 is also covered with a second anti-reflective film 500 of a specific thickness. The planarization process is used to remove the second anti-reflective film 500 material covering the surface of the intermediate oxide layer 220. The portion of the second anti-reflective film 500 material filling the etching window 221 and located below the surface of the intermediate oxide layer 220 is retained to facilitate subsequent etching of the intermediate oxide layer 220.
[0053] The planarization process may include chemical mechanical polishing (CMP), which removes part of the second antireflective film 500 material covering the surface of the intermediate oxide layer 220 by grasping the etching endpoint. The etching is precise and controllable, with good stability, and can effectively expose the intermediate oxide layer 220 so that the intermediate oxide layer 220 can be etched to form a stepped morphology in the future.
[0054] During the etching process of the intermediate oxide layer 220, the etched height is consistent in the exposed area of the intermediate oxide layer 220 surface, but there is a height difference between the intermediate oxide layer 220 material covered by the residual part of the second anti-reflective film 500. In addition, the key dimensions of different etching windows 221 are different, and the residual height of the corresponding residual part of the second anti-reflective film 500 is also different. As a result, in the structure formed by this etching step, the surface height of the exposed intermediate oxide layer 220 after etching is almost flush, and the surface of the residual part of the second anti-reflective film 500 in different areas is almost flush. However, there are height differences between the surface height of the exposed intermediate oxide layer 220 after etching, the surface height of each etching window 221 covered by the residual part of the second anti-reflective film 500, and the surface height of the unexposed intermediate oxide layer 220, which exhibits a stepped morphology.
[0055] After removing the residual portion of the second antireflective film 500, the remaining intermediate oxide layer 220 material forms an oxide layer 200 with a stepped morphology.
[0056] Specifically, the cavity pressure for etching at least one of the first antireflective film 300, the initial oxide layer 210, the second antireflective film 500, and the intermediate oxide layer 220 is 50 mT to 200 mT. Understandably, the cavity pressure can be any value within the range of 50 mT to 200 mT. For example, the cavity pressure can be 50 mT, 75 mT, 100 mT, 120 mT, 150 mT, 180 mT, 200 mT, etc. Within this cavity pressure range, the ion bombardment energy can be controlled, effectively regulating the directionality, rate, selectivity, and uniformity of etching, thereby improving the controllability, precision, and stability of etching.
[0057] In some exemplary embodiments, the cavity pressure for etching the first antireflective film 300 is 50 mT to 200 mT; in some exemplary embodiments, the cavity pressure for etching the initial oxide layer 210 is 50 mT to 200 mT; in some exemplary embodiments, the cavity pressure for etching the second antireflective film 500 is 50 mT to 200 mT; in some exemplary embodiments, the cavity pressure for etching the intermediate oxide layer 220 is 50 mT to 200 mT; in other exemplary embodiments, the cavity pressure for etching the first antireflective film 300, the initial oxide layer 210, the second antireflective film 500, and the intermediate oxide layer 220 is maintained at 50 mT to 200 mT.
[0058] Specifically, the high-frequency power for etching at least one of the first anti-reflective film 300, the initial oxide layer 210, the second anti-reflective film 500, and the intermediate oxide layer 220 is 300W to 800W, and the low-frequency power is 100W to 1500W. Understandably, the high-frequency power can be any value from 300W to 800W, and the low-frequency power can be any value from 100W to 1500W. For example, the high-frequency power can be 300W, 350W, 400W, 500W, 600W, or 700W. High-frequency power can be 100W, 200W, 300W, 500W, 750W, 1000W, 1250W, 1500W, etc.; among them, high-frequency power can control the plasma concentration used for etching, thereby controlling and improving the etching rate, selectivity and chemical activity, while low-frequency power can control the ion bombardment energy, thereby controlling the directionality and aspect ratio of etching, and enhancing the anisotropy of etching. Within this range of high-frequency and low-frequency power, the accuracy, controllability and stability of etching can be improved synergistically.
[0059] On the other hand, the present invention provides a semiconductor structure, such as Figure 4 As shown, the semiconductor structure includes a substrate 100 and an oxide layer 200. The oxide layer 200 is located on the substrate 100 and has a stepped morphology. The stepped morphology is formed based on the stepped morphology formation method described above. It is covered with two anti-reflection films, but only requires one exposure using a photomask to stably prepare it. It has high morphology accuracy and few defects, which is beneficial to improving the performance of the semiconductor structure.
[0060] In some exemplary embodiments, the semiconductor structure further includes an oxide pad 600 located between the substrate 100 and the oxide layer 200. The oxide pad 600 acts as a buffer to prevent damage or defects to the surface of the substrate 100 during the formation of the stepped morphology and subsequent semiconductor processes. Furthermore, the oxide pad 600 can passivate dangling bonds on the surface of the silicon substrate 100 and provide a small tolerance space during photolithography or etching, thereby improving the process tolerance.
[0061] On the other hand, the semiconductor device provided by this invention is fabricated based on the semiconductor structure described above, resulting in high device morphology precision and significantly improved device performance. This semiconductor device includes, but is not limited to, at least one of diodes, bipolar junction transistors (BJTs), field-effect transistors (MOSFETs / JFETs), insulated-gate bipolar junction transistors (IGBTs), complementary metal-oxide-semiconductor (CMOS), high-voltage power field-effect transistors (DMOS), thyristors (SCRs), and BCD devices. The BCD device combines BJT, CMOS, and DMOS processes, achieving high integration and high efficiency with low power consumption. This semiconductor device can be applied to any electronic product or device, such as mobile phones, tablets, laptops, netbooks, game consoles, televisions, VCDs, DVDs, navigators, cameras, camcorders, voice recorders, MP3 players, MP4 players, and PSPs, and can also be used in intermediate products of electronic devices to improve their performance.
[0062] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A method for forming a stepped morphology, characterized in that, include: A first anti-reflective film is formed on the initial structure; The initial structure includes a substrate and an initial oxide layer, the initial oxide layer being located on the substrate, and the first anti-reflective film covering the initial oxide layer; Based on a preset photomask, a patterned photoresist is formed on the first anti-reflective film; The preset photomask has multiple preset process windows; Based on the patterned photoresist, the first anti-reflective film and the initial oxide layer are etched to form multiple etched windows of different depths in the initial oxide layer, thereby obtaining an intermediate oxide layer. The depth of each etching window is related to the critical dimensions of each preset process window; Remove the patterned photoresist and any remaining first antireflective film; A second anti-reflective film is formed on the intermediate oxide layer having multiple etching windows; The second anti-reflective film covers the intermediate oxide layer and fills each of the etched windows; The second antireflective film and the intermediate oxide layer are etched to form a stepped morphology in the intermediate oxide layer, thereby obtaining the oxide layer.
2. The method for forming a stepped morphology according to claim 1, characterized in that, During the etching process that forms the intermediate oxide layer, the polymer byproducts generated during etching accumulate in each of the etching windows to form an etching stop layer. The degree of accumulation of the etching stop layer in each of the etching windows is related to the critical dimensions of each of the preset process windows, and is used to control the depth of each of the etching windows.
3. The method for forming a stepped morphology according to claim 1, characterized in that, The etching gas used to etch the first antireflective film and the initial oxide layer includes a fluorine-containing gas, wherein the volume percentage of the fluorine-containing gas in the etching gas is 30% to 90%.
4. The method for forming a stepped morphology according to claim 1, characterized in that, The step of etching the first antireflective film and the initial oxide layer according to the patterned photoresist, forming multiple etching windows of different depths in the initial oxide layer to obtain the intermediate oxide layer, includes: The first antireflective film is etched according to the patterned photoresist to form a plurality of initial windows of different depths; the depth of each initial window is related to the critical dimensions of each preset process window; In the region of each initial window, the initial oxide layer is etched to form a plurality of etched windows; the height difference between two etched windows is greater than or equal to the height difference between the corresponding two initial windows.
5. The method for forming a stepped morphology according to claim 1, characterized in that, The etching of the second antireflective film and the intermediate oxide layer to form a stepped morphology in the intermediate oxide layer, resulting in an oxide layer comprising: The second antireflective film is planarized until the surface of the intermediate oxide layer is exposed; the remaining portion of the second antireflective film is located in each of the etching windows; The exposed surface area in the intermediate oxide layer is etched; The residual portion of the second antireflective film is removed to obtain the oxide layer having the aforementioned stepped morphology.
6. The method for forming a stepped morphology according to any one of claims 1-5, characterized in that, At least one of the patterned photoresist, the first antireflective film, and the second antireflective film is removed by dry etching.
7. The method for forming a stepped morphology according to any one of claims 1-5, characterized in that, The cavity pressure for etching at least one of the first antireflective film, the initial oxide layer, the second antireflective film, and the intermediate oxide layer is 50 mT to 200 mT.
8. The method for forming a stepped morphology according to any one of claims 1-5, characterized in that, The high-frequency power for etching at least one of the first antireflective film, the initial oxide layer, the second antireflective film, and the intermediate oxide layer is 300W to 800W, and the low-frequency power is 100W to 1500W.
9. A semiconductor structure, characterized in that, The device includes a substrate and an oxide layer, the oxide layer being located on the substrate and having a stepped morphology, the stepped morphology being obtained based on the method for forming a stepped morphology as described in any one of claims 1-8.
10. A semiconductor device, characterized in that, It is prepared based on the semiconductor structure described in claim 9.