Plasma processing apparatus, bias power supply, and plasma processing method

Abstract

Disclosed is a plasma processing apparatus including a chamber, a substrate support section, a gas supply section, a high-frequency power supply, and a bias power supply. The high-frequency power supply is configured to supply a source high-frequency signal in order to generate plasma from a processing gas. The bias power supply is configured to generate voltage pulses at time intervals that are inverses of a first frequency in order to introduce ions from the plasma to a substrate on the substrate support section, thereby supplying a sequence of voltage pulses to the substrate support section. The bias power supply is configured to increase or decrease voltage levels of a plurality of voltage pulses included in the sequence in stages over a period having a time length that is an inverse of a second frequency, and to repeat the period, the second frequency being lower than the first frequency and included in a range of 20 kHz or more and 100 kHz or less.

Description

Technical Field

[0001] The exemplary embodiments of this disclosure relate to a plasma processing apparatus, a bias power supply, and a plasma processing method. Background Technology

[0002] A plasma processing apparatus is used to perform plasma processing on a substrate. The plasma processing apparatus described in Patent Document 1 includes a source RF generation unit and first and second bias RF generation units. The source RF generation unit generates a source RF signal for plasma generation. The first and second bias RF generation units are coupled to a substrate support unit. The frequency of the bias signal generated by the first bias RF generation unit is different from the frequency of the bias signal generated by the second bias RF generation unit.

[0003] Existing technical documents Patent documents Patent Document 1: Japanese Patent Application Publication No. 2022-41874 Summary of the Invention

[0004] The problem that the invention aims to solve This disclosure provides a technique for suppressing an increase in the number of bias power sources and obtaining different ion energy distributions.

[0005] Methods for solving problems In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support within the chamber, a gas supply unit, a high-frequency power supply, and a bias power supply. The gas supply unit is configured to supply a processing gas into the chamber. The high-frequency power supply is configured to supply a source high-frequency signal for generating plasma from the processing gas. The bias power supply is configured to generate voltage pulses at time intervals that are the reciprocal of a first frequency in order to introduce ions from the plasma onto the substrate on the substrate support, thereby supplying a sequence of voltage pulses to the substrate support. The bias power supply is configured to periodically increase or decrease the voltage level of the plurality of voltage pulses included in the sequence within a period having a time length that is the reciprocal of a second frequency, and to repeat this period, wherein the second frequency is lower than the first frequency and is contained in the range of 20 kHz to 100 kHz.

[0006] Invention Effects According to one exemplary embodiment, a technique is provided to suppress the increase in the number of bias power sources and obtain different ion energy distributions. Attached Figure Description

[0007] Figure 1 This is a diagram illustrating a structural example of a plasma processing system.

[0008] Figure 2 This is a diagram that schematically illustrates a plasma processing apparatus of an exemplary embodiment.

[0009] Figure 3 This is a diagram that schematically illustrates a bias power supply in an exemplary embodiment.

[0010] Figure 4 This is a diagram illustrating a sequence of voltage pulses that a bias power supply can output in an exemplary embodiment.

[0011] Figure 5 (a) is a graph showing the distribution of ion energy in an example of a sequence where multiple voltage pulses have the same voltage level. Figure 5 (b) is a graph showing the distribution of ion energy in an example using a biased RF signal. Figure 5 (c) is a diagram that roughly represents the distribution of ion energy in an example where the voltage levels of multiple voltage pulses in the sequence increase or decrease in stages.

[0012] Figure 6 This is a diagram illustrating another example of a sequence of voltage pulses that a bias power supply in an exemplary embodiment can output.

[0013] Figure 7 This is a diagram illustrating another example of a sequence of voltage pulses that a bias power supply can output according to an exemplary embodiment.

[0014] Figure 8 This is a flowchart illustrating an exemplary embodiment of a plasma processing method.

[0015] Figure 9 It is applicable Figure 8 A partially enlarged cross-sectional view of a substrate in an example of the plasma processing method shown.

[0016] Figure 10 This is a timing diagram related to a step of a plasma processing method according to an exemplary embodiment.

[0017] Figure 11 This is a cross-sectional view of a substrate associated with an exemplary embodiment of a plasma processing method.

[0018] Figure 12 This is a cross-sectional view of a substrate associated with an exemplary embodiment of a plasma processing method.

[0019] Figure 13 This is a block diagram of a processing circuit that performs the actions described in this manual on a computer. Detailed Implementation

[0020] Hereinafter, various exemplary embodiments will be described in detail with reference to the accompanying drawings. Furthermore, in each drawing, the same or corresponding parts are labeled with the same reference numerals.

[0021] Figure 1 This is a diagram illustrating a structural example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. Furthermore, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas outlet for discharging gas from the plasma processing space. The gas supply port is connected to the gas supply unit 20 (described later), and the gas outlet is connected to the exhaust system 40 (described later). The substrate support 11 is disposed within the plasma processing space and has a substrate support surface for supporting a substrate.

[0022] The plasma generation unit 12 is configured to generate plasma from at least one process gas supplied to the plasma processing space. The plasma generated in the plasma processing space can be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR), helicon wave plasma (HWP), or surface wave plasma (SWP), etc. Alternatively, various types of plasma generation units, including AC (alternating current) plasma generation units and DC (direct current) plasma generation units, can be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes both RF (radio frequency) and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0023] The control unit 2 processes computer-executable commands that cause the plasma processing apparatus 1 to perform the various processes described herein. The control unit 2 can be configured to control various elements of the plasma processing apparatus 1 in a manner that executes the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 can be configured to perform various control actions by reading a program from the storage unit 2a2 and executing the read program. The program may be pre-stored in the storage unit 2a2 or retrieved via a medium when needed. The retrieved program is stored in the storage unit 2a2 and read and executed by the processing unit 2a1. The medium may be various storage media readable by the computer 2a, or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 can communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

[0024] Hereinafter, a structural example of a capacitively coupled plasma processing device, which is one example of plasma processing device 1, will be described. Figure 2 This is a diagram illustrating a structural example of a capacitively coupled plasma processing device.

[0025] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. Additionally, the plasma processing apparatus 1 includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet includes a spray head 13. The substrate support 11 is disposed within the plasma processing chamber 10. The spray head 13 is disposed above the substrate support 11. In one embodiment, the spray head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the spray head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The spray head 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0026] The substrate support portion 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 when viewed from above. The substrate W is disposed on the central region 111a of the main body portion 111, and the ring assembly 112 is disposed on the annular region 111b of the main body portion 111 in such a way that it surrounds the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as an annular support surface for supporting the ring assembly 112.

[0027] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The conductive component of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b disposed within the ceramic component 1111a. The ceramic component 1111a has a central region 111a. In one embodiment, the ceramic component 1111a also has an annular region 111b. Alternatively, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating component, may have an annular region 111b. In this case, the ring assembly 112 may be disposed on either the annular electrostatic chuck or the annular insulating component, or on both the electrostatic chuck 1111 and the annular insulating component. Alternatively, at least one RF / DC electrode coupled to the RF power supply 31 and / or DC power supply 32 (described later) may be disposed within the ceramic component 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When the bias RF signal and / or DC signal (described later) are supplied to the at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Alternatively, the conductive components of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Alternatively, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode.

[0028] The ring assembly 112 includes one or more annular components. In one embodiment, the one or more annular components include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0029] Additionally, the substrate support 11 may include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows in the flow path 1110a. In one embodiment, the flow path 1110a is formed within the base 1110, and one or more heaters are disposed within the ceramic component 1111a of the electrostatic chuck 1111. Furthermore, the substrate support 11 may also include a heat transfer gas supply section configured to supply heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.

[0030] The spray head 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The spray head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s through the plurality of gas inlets 13c. Additionally, the spray head 13 includes at least one upper electrode. Furthermore, in addition to the spray head 13, the gas inlet unit may also include one or more side gas injectors (SGIs) mounted on one or more openings formed in the sidewall 10a.

[0031] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from a corresponding gas source 21 to the spray head 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may also include at least one flow modulation device for modulating or pulsed the flow rate of the at least one processing gas.

[0032] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This causes at least one processing gas supplied to the plasma processing space 10s to form plasma. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to at least one lower electrode, a bias potential can be generated on the substrate W, introducing ionic components from the formed plasma into the substrate W.

[0033] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is configured to be coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may also be configured to generate multiple source RF signals with different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0034] The second RF generation unit 31b is configured to be coupled to at least one lower electrode via at least one impedance matching circuit to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than that of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may also be configured to generate multiple bias RF signals with different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In addition, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0035] Alternatively, the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In one embodiment, the first DC generating unit 32a is configured to be connected to at least one lower electrode to generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generating unit 32b is configured to be connected to at least one upper electrode to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.

[0036] In various embodiments, the first and second DC signals can be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses can have rectangular, trapezoidal, triangular, or combinations thereof pulse waveforms. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses based on the DC signals is connected between the first DC generation unit 32a and at least one lower electrode. Therefore, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses can have positive or negative polarity. Additionally, the sequence of voltage pulses can also include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. Furthermore, the first and second DC generation units 32a and 32b can be provided based on the RF power supply 31, or the first DC generation unit 32a can be provided instead of the second RF generation unit 31b.

[0037] The exhaust system 40 can be connected, for example, to a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is adjusted using the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0038] Furthermore, in the plasma processing apparatus 1, the aforementioned control unit 2 is used as the main control unit. Additionally, in the plasma processing apparatus 1, the aforementioned first RF generation unit 31a is used as a high-frequency power supply for generating a source RF signal (source high-frequency signal) for plasma generation.

[0039] The following, with Figure 1 and Figure 2 Refer to together Figure 3 and Figure 4 . Figure 3 This is a diagram that schematically illustrates a bias power supply in an exemplary embodiment. Figure 4 This is a diagram illustrating a sequence of voltage pulses that a bias power supply can output in an exemplary embodiment. For example... Figure 3 As shown, the plasma processing apparatus 1 includes a bias power supply 50. The bias power supply 50 is used in the plasma processing apparatus 1 as a bias power supply for the first DC generation unit 32a described above. Furthermore, the plasma processing apparatus 1 including this bias power supply 50 may also omit the second RF generation unit 31b.

[0040] like Figure 4As shown, the bias power supply 50 is configured to supply a sequence S of voltage pulses VP to the substrate support 11 in order to introduce ions from the plasma in the plasma processing chamber 10 to the substrate W on the substrate support 11. VP In sequence S VP The time interval Ti (minimum time interval) for generating voltage pulses VP is the reciprocal of the first frequency. The first frequency is, for example, above 200kHz and below 1MHz. The first frequency can also be below 800kHz. The first frequency can be, for example, 400kHz.

[0041] like Figure 4 As shown, the bias power supply 50 can adjust the sequence S VP The voltage levels of multiple voltage pulses VP in the sequence. The bias power supply 50 can make the sequence S within a period CY of the reciprocal of the second frequency, i.e., the time length Tc. VP The voltage levels of the multiple voltage pulses VP contained therein increase or decrease in stages, and repeat in a cycle CY. The second frequency is lower than the first frequency. The second frequency is contained in the range of above 20kHz and below 100kHz. Figure 4 In the example shown, within the period CY, the sequence S VP The voltage level of the multiple voltage pulses VP contained therein increases in stages.

[0042] Furthermore, each of the multiple voltage pulses VP has a voltage level that is negative relative to the reference potential V0. The voltage level of each voltage pulse VP is the difference between the reference potential V0 and the potential of the voltage pulse. The reference potential V0 can be, for example, ground potential (0V).

[0043] The bias power supply 50 can be configured to change the duty cycle of the voltage pulse VP. The duty cycle is L. ON / L Ti Here, L ON L is the length of time during which the voltage pulse VP is in the ON state within the time interval Ti. Ti This is the duration of the time interval Ti. The duty cycle can be set to, for example, 0.2.

[0044] In one embodiment, the bias power supply 50 may include a variable DC power supply 51 and a pulse generator 52. The variable DC power supply 51 is configured to adjust the voltage level of its output voltage from its negative terminal. The positive terminal of the variable DC power supply 51 is connected to ground or a reference potential line. The negative terminal of the variable DC power supply 51 is electrically coupled to the substrate support 11 via the pulse generator 52. The pulse generator 52 is configured to generate a sequence S of voltage pulses VP by pulsedizing the output voltage of the variable DC power supply 51. VP .

[0045] The bias power supply 50 may include a control unit 50c as at least one control unit. The control unit 50c may include a power control unit 51c. The power control unit 51c controls the variable DC power supply 51 to change the voltage level of the output voltage of the variable DC power supply 51. By controlling the voltage level of the output voltage of the variable DC power supply 51 through the power control unit 51c, the sequence S is adjusted. VP The voltage level of the voltage pulse VP in the circuit. For example, the voltage level of the output voltage of the variable DC power supply 51 is adjusted by the control of the power supply control unit 51c, and the sequence S is made within the period CY. VP The voltage levels of the multiple voltage pulses VP contained therein increase or decrease in stages.

[0046] The pulse generator 52 may include a switching circuit 52s. The bias power supply 50, by alternately switching the switching circuit 52s on and off, is able to output a sequence S of voltage pulses VP. VP At least one control unit of the bias power supply 50 may further include a pulse control unit 52c. In one embodiment, the control unit 50c may include the pulse control unit 52c. The opening and closing of the switching circuit 52s is controlled by the pulse control unit 52c. In addition, the duty cycle of the voltage pulse VP is controlled by the pulse control unit 52c. In addition, the pulse control unit 52c may be part of the pulse generator 52. The pulse control unit 52c may also be located outside the pulse generator 52. In addition, the power supply control unit 51c may be configured together with the variable DC power supply 51 to form the power supply device 51S. The power supply control unit 51c may also be located outside the power supply device 51S. In addition, the power supply control unit 51c and the pulse control unit 52c may also be configured as a single control unit. The single control unit may be part of one of the power supply device 51S and the pulse generator 52, or it may be separate from them. The single control unit may be control unit 50c or control unit 2.

[0047] The following is for reference Figure 5 of (a), Figure 5 (b) and Figure 5 (c) Figure 5 (a) is a graph showing the distribution of ion energy in an example of multiple voltage pulses in a sequence having the same voltage level. Figure 5 (b) is a graph showing the distribution of ion energy in an example using a biased RF signal. Figure 5 (c) is a diagram that roughly represents the distribution of ion energy in an example where the voltage levels of multiple voltage pulses in the sequence increase or decrease in stages.

[0048] In sequence S VP When the voltage levels of multiple voltage pulses VP within a given range are fixed and identical, such as... Figure 5As shown in (a), the energy distribution E1 of the ions supplied to the substrate on the substrate support 11 has a relatively narrow width centered on its peak. That is, in sequence S VP When the voltage levels of multiple voltage pulses VP within a given sequence are fixed and identical, the monochromaticity of the ion energy is high. Furthermore, the energy of the peak value of distribution E1 can be adjusted by modifying the sequence S. VP The fixed voltage level of multiple voltage pulses VP within the circuit is varied. On the other hand, when using a bias RF signal as electrical bias, such as... Figure 5 As shown in (b), the energy distribution E2 of the ions supplied to the substrate on the substrate support 11 has a relatively wide width.

[0049] Sequence S within period CY VP When the voltage level of multiple voltage pulses VP increases or decreases in stages, the energy distribution E3 of the ions supplied to the substrate on the substrate support 11 is as follows: Figure 5 As shown in (c), there is a distribution containing multiple peaks. The multiple peaks in distribution E3 are related to the sequence S within the period CY. VP The peak value corresponding to the voltage level of each of the multiple voltage pulses VP in the image. For example... Figure 5 As shown in (c), distribution E3 becomes the same as... Figure 5 The distribution E2 shown in (b) is similar to the distribution shown in the diagram. Therefore, based on the bias power supply 50, it is possible to achieve this through a single power supply. Figure 5 The energy distribution of highly monochromatic ions shown in (a) and Figure 5 (c) shows an energy distribution with a relatively wide width. That is, according to the bias power supply 50, it is possible to suppress the increase in the number of bias power supplies and obtain different ion energy distributions. Therefore, according to the plasma processing apparatus 1, the space for bias power supplies around the chamber 10 can be reduced.

[0050] The following is for reference Figure 6 and Figure 7 . Figure 6 and Figure 7 These are diagrams illustrating a sequence of voltage pulses that a bias power supply in an exemplary embodiment can output, representing another example. Figure 4 In the example shown, the sequence S is within the period CY. VP The voltage level of multiple voltage pulses VP increases in stages. For example... Figure 6 As shown, the bias power supply 50 can also make the sequence S within the period CY. VP The voltage levels of multiple voltage pulses VP decrease in stages. Additionally, as... Figure 4 and Figure 7 As shown in the comparison, the bias power supply 50 can also change the sequence S. VPThe duty cycle of each of the multiple voltage pulses VP in the process.

[0051] The following is for reference Figures 8-12 A plasma processing method according to an exemplary embodiment will be described. Furthermore, the control of each part in the plasma processing apparatus 1 will also be described with reference to these figures. Figure 8 This is a flowchart illustrating an exemplary embodiment of a plasma processing method. Figure 9 It is applicable Figure 8 A partially enlarged cross-sectional view of a substrate in an example of the plasma processing method shown. Figure 10 This is a timing diagram related to a step of a plasma processing method according to an exemplary embodiment. Figure 11 and Figure 12 These are cross-sectional views of a substrate, representing an example of a plasma processing method according to an exemplary embodiment. Figure 8 In the plasma processing method shown (hereinafter referred to as "method MT"), each part of the plasma processing apparatus 1 can be controlled by the control unit 2.

[0052] like Figure 8 As shown, method MT includes steps ST1, ST2, and ST3. Method MT may also include step STJ.

[0053] In step ST1, substrate W is prepared. Substrate W is transported into chamber 10 by a conveying device (e.g., a conveying robot). Substrate W is placed on substrate support 11 within chamber 10. During the execution of method MT, substrate W may be held by electrostatic chuck 1111.

[0054] like Figure 9 As shown, the substrate W may include a first region R1 and a second region R2. The first region R1 may have at least one recess R1a. The first region R1 may have multiple recesses R1a. Each recess R1a may be a recess for forming a contact hole. The recesses R1a may be filled by the second region R2. The second region R2 may be configured to cover the first region R1.

[0055] In one embodiment, the first region R1 comprises silicon and nitrogen. The first region R1 may comprise silicon nitride (SiN). x The first region R1 can be, for example, a region formed by CVD or other methods, or a region obtained by silicon nitride. The first region R1 may contain silicon nitride (SiN). x The first part and the second part containing silicon carbide (SiC). In this case, the first part has a recess R1a.

[0056] The aspect ratio of the recess R1a can be, for example, 3 or more, or 4 or more, 5 or more, or 10 or more. Furthermore, the aspect ratio of the recess R1a represents the ratio of the depth of the recess R1a to its maximum width.

[0057] The second region R2 contains silicon and oxygen. The second region R2 may contain silicon oxide (SiO2). x The second region R2 can be, for example, a region formed by CVD or other methods, or a region obtained by silicon oxidation.

[0058] The substrate W may also include a third region R3. The third region R3 is disposed on the second region R2. The third region R3 may contain metal, carbon, and nitrogen. The metal here includes tungsten. The third region R3 may have an opening OP3. The width of the opening OP3 may correspond to the width of the recess R1a.

[0059] The substrate W may include a base region UR and at least one raised region RA disposed on the base region UR. The base region UR and the at least one raised region RA are covered by a first region R1. The base region UR may contain silicon. A plurality of raised regions RA are located on the base region UR. A recess R1a of the first region R1 is located between the plurality of raised regions RA. Each raised region RA may form a gate region of a transistor.

[0060] The substrate W may include a mask MK. The mask MK is disposed on a third region R3. The mask MK may contain metal or silicon. The mask MK may have an opening OPM. The opening OPM corresponds to the opening OP3 of the third region R3.

[0061] Furthermore, the substrate W prepared in process ST1 can be used as a result of plasma etching. Figure 9 The shape shown can also be derived from the initial provision to the plasma processing chamber 10. Figure 9 The shape shown.

[0062] In method MT, step ST2 is then executed. In step ST2, control unit 2 controls gas supply unit 20 to supply processing gas into chamber 10.

[0063] The processing gas may contain metals constituting the chemical species from the plasma and etching components for etching the second region R2. In one example, the processing gas may contain a metal-containing gas. The processing gas may contain etching component gases. The processing gas may contain carbon-containing gases. The processing gas may contain hydrogen-containing gases. Additionally, in one example, the processing gas may contain at least one metal-containing gas selected from the group consisting of tungsten-containing gases, molybdenum-containing gases, and titanium-containing gases just before the first region R1 is exposed. In one example, the processing gas contains a halide gas as an etching component. The metal-containing gas may be a metal halide-containing gas. Furthermore, the etching component is a component used to etch the second region R2.

[0064] The metal-containing gas may include at least one selected from the group consisting of tungsten-containing gases, molybdenum-containing gases, and titanium-containing gases. The tungsten-containing gas may include tungsten halide gas. The tungsten halide gas may include at least one selected from tungsten hexafluoride (WF6), tungsten hexabromide (WBr6), tungsten hexachloride (WCl6), and WF5Cl gas. The tungsten-containing gas may include tungsten hexacarbonyl (W(CO)6) gas. The molybdenum-containing gas may include molybdenum halide gas. The molybdenum halide gas may include at least one selected from the group consisting of molybdenum hexafluoride (MoF6) gas and molybdenum hexachloride (MoCl6) gas. The titanium-containing gas may include titanium tetrachloride (TiCl4).

[0065] The etching component gas includes halogenated gases. The halogenated gas may contain at least one gas selected from the group consisting of fluorine-containing gases, chlorine-containing gases, and bromine-containing gases. The fluorine-containing gas may contain fluorocarbon gases.

[0066] The carbon-containing gas may include at least one selected from the group consisting of CH4 gas, C2H2 gas, C2H4 gas, CH3F gas, CH2F2 gas, CHF3 gas and CO gas.

[0067] The hydrogen-containing gas may include at least one selected from the group consisting of H2 gas, SiH4 gas and NH3 gas.

[0068] The processing gas may also include rare gases such as argon, helium, xenon, or neon. For example, the processing gas may include nitrogen (N2).

[0069] In method MT, step ST3 is then performed. In step ST3, the second region R2 is etched using plasma PL generated from the process gas within chamber 10. In step ST3, the second region R2 can be etched such that the shoulder portion SH in the recess R1a of the first region R1 is exposed. Step ST3 is performed while the process gas supplied in step ST2 is present in the chamber. Step ST3 can also be performed during the execution of step ST2.

[0070] Figure 10 This is a timing diagram related to a step of a plasma processing method according to an exemplary embodiment. Figure 10 In this context, "HF" indicates the power level of the source high-frequency signal HF supplied by the first RF generation unit 31a for plasma generation. Additionally, "MF" ON indicates that the first sequence is supplied from the bias power supply 50 to the substrate support unit 11, and "MF" OFF indicates that the first sequence is stopped. Figure 4 , Figure 6 or Figure 7 As shown, the first sequence is a sequence S of multiple voltage pulses VP that periodically increase or decrease the voltage level within the period CY. VP Additionally, "LF" ON indicates that a second sequence is supplied from the bias power supply 50 to the substrate support 11, and "LF" OFF indicates that the supply of the second sequence is stopped. The second sequence is a sequence S of multiple identical voltage pulses VP with a fixed voltage level. VP .

[0071] like Figure 10 As shown, process ST3 includes a first period P1, a second period P2, a third period P3, and a fourth period P4. In the first period P1, to generate plasma PL from the process gas, control unit 2 controls the first RF generation unit 31a (i.e., a high-frequency power supply) to supply a source high-frequency signal HF having a first power level L1. In the first period P1, the supply of the first and second sequences can be stopped. In the first period P1, chemical seeds from plasma PL are deposited on the surface of substrate W, such as... Figure 11 As shown, a sediment DP is formed. In one embodiment, the sediment DP may contain the aforementioned metallic substances such as tungsten and WF6.

[0072] The second period P2 is the period following or immediately after the first period P1. In the second period P2, to generate plasma PL from the process gas, the control unit 2 controls the first RF generation unit 31a to supply a source high-frequency signal HF having a second power level L2. The second power level L2 can be lower than the first power level L1. Additionally, in the second period P2, the control unit 2 controls the bias power supply 50 to supply a first sequence to the substrate support 11. The maximum voltage level of the plurality of voltage pulses VP in the first sequence in the second period P2 can be lower than the fixed voltage level of the plurality of voltage pulses VP in the second sequence in the third period P3 and the fourth period P4. In the second period P2, ions from the plasma PL are introduced into the deposit DP, and the deposit DP is modified. Furthermore, it is possible that, in the second period P2, the deposit DP, after being etched by ions from the plasma PL, can be reattached to the shoulder portion SH, etc.

[0073] The third period P3 is the period following or immediately after the second period P2. In the third period P3, to generate plasma PL from the process gas, the control unit 2 controls the first RF generation unit 31a to supply a source high-frequency signal HF with a third power level L3. The third power level L3 may be lower than the first power level L1. The third power level L3 may be the same as or different from the second power level L2. Additionally, in the third period P3, the control unit 2 controls the bias power supply 50 to supply a second sequence to the substrate support 11. In the third period P3, high-energy ions are introduced from the plasma PL into the deposit DP, and the deposit DP on the second region R2 and the second region R2 are etched. Furthermore, the angular distribution of ions in the third period P3 is sometimes wider than the angular distribution of ions in the fourth period P4.

[0074] The fourth period P4 is the period following or immediately after the third period P3. During the fourth period P4, the control unit 2 controls the first RF generation unit 31a to set the power level of the source high-frequency signal HF to a fourth power level L4. The fourth power level L4 is lower than the second power level L2 and the third power level L3. The fourth power level L4 can be zero. Additionally, during the fourth period P4, the control unit 2 controls the bias power supply 50 to supply a second sequence to the substrate support 11. During the fourth period P4, ions remaining in the plasma PL within the chamber 10 are introduced into the substrate W to further etch the second region R2. During the fourth period P4, the ion flux and ion energy are appropriately adjusted to supply ions to the second region R2 with relatively high vertical advance. Thus, a high verticality (e.g., see reference) is achieved by etching the second region R2, forming a shape on the substrate W. Figure 12 Furthermore, at the end of the fourth period P4, the deposit DP on the substrate W can disappear.

[0075] In the next step STJ, it is determined whether a stopping condition is met. For example, the stopping condition is met if the cycle including steps ST2 and ST3 is repeated a predetermined number of times. If the stopping condition is not met, the cycle including steps ST2 and ST3 is repeated. On the other hand, if the stopping condition is met, method MT ends.

[0076] The following describes examples of processing circuits that can be used as one or more processing circuits in a plasma processing device, such as control unit 2, control unit 50c, power control unit 51c, and pulse control unit 52c. Figure 13 This is a block diagram of a processing circuit that performs the actions described in this specification on a computer. Figure 13The diagram illustrates a processing circuit 130 capable of controlling control processes on any computer. The flowchart's descriptions or function blocks represent portions of modules, segments, or code containing one or more executable instructions for implementing specific logical functions or steps of the processing. As will be understood by those skilled in the art, other embodiments having functions capable of being executed in a sequence different from that shown or described, such as substantially simultaneous or in the reverse order, are included within the scope of the exemplary embodiments of this disclosure, depending on the associated functions. The various elements, features, and processes described in this specification can be used independently of each other or combined in various ways. Any combination and partial combination that can be conceived can be included within the scope of this disclosure.

[0077] exist Figure 13 In this embodiment, the processing circuit 130 includes a CPU 1200 that implements one or more control processes described above / below. Processing data and commands can be stored in the memory 1202. These processing data and commands can also be stored on a storage medium 1204 such as a hard disk drive (HDD) or portable storage medium, or they can be stored remotely. Furthermore, the present disclosure as described in the claims is not limited to the form of a computer-readable medium storing the processing commands of this invention. For example, these commands can also be stored on any other information processing device such as a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or a server and / or computer that communicates with the processing circuit 130.

[0078] Furthermore, the present disclosure described in the claims can be provided as a utility program, a background daemon, a component of an operating system, or a combination thereof. The present disclosure described in the claims can also be executed in conjunction with CPU 1200 and operating systems known to those skilled in the art, such as Microsoft Windows (registered trademark), UNIX (registered trademark), Solaris (registered trademark), LINUX (registered trademark), and Apple MAC-OS.

[0079] The hardware elements for constructing the processing circuit 130 can be implemented using various circuit elements. Furthermore, the functions of each of the above-described embodiments can be implemented using a circuit that includes one or more processing circuits. For example... Figure 13 As shown, the processing circuit includes a processing device that executes a specific program, such as a processing unit (CPU) 1200. The processing circuit also includes application-specific integrated circuits (ASICs), conventional circuit components configured to perform the described functions, and other devices.

[0080] exist Figure 13In this embodiment, the processing circuit 130 includes a CPU 1200 that performs the above-described processing. The processing circuit 130 may be a general-purpose computer or a specific special-purpose machine. In one embodiment, when the processing device 1200 is programmed to control the plasma generation unit 12 and the gas supply unit 20, and / or the bias power supply 50, the processing circuit 130 functions as a specific special-purpose machine.

[0081] Alternatively, as those skilled in the art will understand, the CPU 1200 may also be implemented using an FPGA, ASIC, PLD, and / or discrete logic circuits. Furthermore, the CPU 1200 may also be implemented as multiple processing devices that cooperate in a manner that executes the processes of the present invention described above in parallel.

[0082] Figure 13 The processing circuitry 130 also includes a network controller 1206 for interface connection with network 1228, such as an Intel Ethernet PRO network interface card from Intel Corporation. As will be understood, network 1228 can be a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof. It may also include subnetworks such as PSTN or ISDN. Network 1228 can also be a wired network such as Ethernet, or a wireless network such as cellular networks including EDGE, 3G, or 4G wireless cellular systems. The wireless network can also be Wi-Fi, Bluetooth (registered trademark), or any other known form of wireless communication.

[0083] The processing circuitry 130 also includes a display device controller 1208 for interface connection with display devices 1210 such as monitors, graphics cards, and graphics adapters. A general-purpose I / O interface 1212 interfaces with a keyboard and / or mouse 1214, and a touch panel 1216 integrated with or separate from the display device 1210. The general-purpose I / O interface also connects to various peripheral devices 1218 such as printers and scanners.

[0084] The storage device controller 1224 is connected to the storage medium disk 1204 via communication buses 1226 such as ISA, EISA, VESA, and PCI. All components of the processing circuit 130 are interconnected. General features and functions of the display device 1210, keyboard and / or mouse 1214, display device controller 1208, storage device controller 1224, network controller 1206, sound controller 1220, and general-purpose I / O interface 1212 are assumed to be known in this specification for simplicity and are omitted from description.

[0085] The exemplary circuit elements described in this disclosure can be substituted with other elements and may have a different configuration than the examples described in this specification. Furthermore, circuits configured to implement the features described in this specification can be implemented using multiple circuit units (e.g., chips), or these features can be incorporated into the circuitry of a single chipset.

[0086] The functions and features described in this specification can also be performed by various components distributed across the system. For example, more than one processing device may perform the functions of the system, in which case the processing device is distributed across multiple components communicating within the network. As components of the distributed configuration, in addition to various human-machine interfaces and communication devices (display monitors, smartphones, tablets, personal digital assistants (PDAs), etc.), more than one client device and server device capable of sharing processing may also be included. The network can be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system can be received by direct user input, or remotely in real time or as batch processing. Furthermore, a portion of the embodiments may be implemented on modules or hardware different from those described above. Therefore, other embodiments are also included in the claims.

[0087] The above descriptions have illustrated various exemplary embodiments, but the embodiments are not limited to these exemplary embodiments. Various additions, omissions, substitutions, and modifications are possible. Furthermore, elements from different embodiments can be combined to form other embodiments.

[0088] As can be understood from the above description, various embodiments of this disclosure have been described in this specification for illustrative purposes, and various modifications can be made without departing from the scope and spirit of this disclosure. Therefore, the various embodiments disclosed in this specification are not intended to be limiting, and the true scope and spirit are indicated by the appended claims.

[0089] Various exemplary embodiments included in this disclosure are described below in [E1] to [E19].

[0090] [E1] A plasma processing device, have: Chamber; The substrate support portion within the cavity; The gas supply unit is configured to supply processing gas into the chamber. The high-frequency power supply is configured to supply a high-frequency signal for generating plasma from the processed gas; and The bias power supply is configured to introduce ions from the plasma onto the substrate on the substrate support by generating voltage pulses at time intervals that are the reciprocal of a first frequency, thereby supplying a sequence of voltage pulses to the substrate support. The bias power supply is configured to: periodically increase or decrease the voltage level of a plurality of voltage pulses contained in the sequence within a period having a time length that is the reciprocal of a second frequency, and repeat the period, wherein the second frequency is lower than the first frequency and is contained in a range of more than 20 kHz and less than 100 kHz.

[0091] [E2] The plasma processing apparatus as described in E1 The plurality of voltage pulses each have a negative voltage level relative to the reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.

[0092] [E3] Plasma processing apparatus as described in E1 or E2 The bias power supply includes: Variable DC power supply; A pulse generator is configured to generate a sequence of voltage pulses by pulsedizing the output voltage of the variable DC power supply; and At least one control unit is configured to control the variable DC power supply and the pulse generator. The at least one control unit is configured to control the variable DC power supply to change the voltage level of the output voltage, so that the voltage level of the plurality of voltage pulses increases or decreases in stages.

[0093] [E4] The plasma processing apparatus as described in any one of E1 to E3, It also has a main control unit. The main control unit is configured to perform the following steps when the substrate, which includes a first region containing silicon and nitrogen and a second region containing silicon and oxygen, is placed on the substrate support: (a) Supplying processing gas from the gas supply unit into the chamber; and (b) Etching the second region using plasma generated from the processing gas within the chamber. The process described in (b) includes the following steps: (b1) During the first period, in order to generate plasma from the process gas in the chamber and deposit chemical seeds from the plasma on the substrate, the source high-frequency signal having a first power level is supplied from the high-frequency power supply; (b2) In a second period following the first period, in order to generate plasma from the process gas, a source high-frequency signal having a second power level lower than the first power level is supplied from the high-frequency power supply, the process including: the sequence of voltage pulses supplied from the bias power supply to the substrate support; (b3) In a third period following the second period, in order to generate plasma from the process gas and etch the second region, a source high-frequency signal having a third power level lower than the first power level is supplied from the high-frequency power supply. This process includes: supplying the sequence of voltage pulses from the bias power supply to the substrate support; and (b4) In a fourth period following the third period, in order to further etch the second region using the plasma generated from the processing gas, a sequence of voltage pulses is supplied from the bias power supply to the substrate support, the process including: setting the power level of the source high-frequency signal to a fourth power level that is lower than the second power level and the third power level. The bias power supply is configured as follows: In (b3) and (b4), the voltage levels of the plurality of voltage pulses contained in the sequence are set to substantially fixed levels. In (b2), the voltage level of the multiple voltage pulses contained in the sequence within the period is increased or decreased in stages, and the period is repeated.

[0094] [E5] The plasma processing apparatus as described in E4 The bias power supply is configured such that the maximum voltage level of the plurality of voltage pulses in (b2) is set to a level lower than the voltage level of the plurality of voltage pulses in (b3) and (b4).

[0095] [E6] Plasma processing apparatus as described in E4 or E5 The fourth power level is zero.

[0096] [E7] The plasma processing apparatus as described in any one of E4 to E6, The second power level and the third power level are the same as each other.

[0097] [E8] The plasma processing apparatus according to any one of E4 to E7 The processing gas contains metals that constitute the chemical species and etching components for etching the second region.

[0098] [E9] Plasma processing apparatus as described in E4~E8 The main control unit is configured to repeat (b).

[0099] [E10] The plasma processing apparatus described in E1 to E9 The bias power supply is configured to change the duty cycle of the voltage pulse.

[0100] [E11] A bias power supply used in a plasma processing apparatus. include: Variable DC power supply; A pulse generator is configured to generate a sequence of voltage pulses by pulsedizing the output voltage of the variable DC power supply; and At least one control unit is configured to control the variable DC power supply and the pulse generator. The at least one control unit is configured as follows: In order to introduce ions from plasma within the chamber of the plasma processing apparatus into the substrate on the substrate support within that chamber, the pulse generator is controlled to generate voltage pulses at time intervals that are the reciprocal of a first frequency and to supply the sequence to the substrate support. In order to periodically increase or decrease the voltage level of a plurality of voltage pulses contained in the sequence within a period having a time length that is the reciprocal of the second frequency, and to repeat the period, the variable DC power supply is controlled to change the voltage level of the output voltage, wherein the second frequency is lower than the first frequency and is contained in the range of 20 kHz or higher and 100 kHz or lower.

[0101] [E12] According to the bias power supply described in E11 The plurality of voltage pulses each have a negative voltage level relative to the reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.

[0102] [E13] A plasma processing method, The process includes the following steps: (a) A substrate is prepared in the chamber of a plasma processing apparatus, the substrate comprising a first region containing silicon and nitrogen and a second region containing silicon and oxygen; (b) Supplying processing gas into the chamber of the plasma processing apparatus; and (c) Etching the second region using plasma generated from the processing gas within the chamber. The plasma processing apparatus includes a bias power supply configured to generate voltage pulses at time intervals that are the reciprocal of a first frequency in order to introduce ions from the plasma onto the substrate on a substrate support within the chamber, thereby supplying a sequence of voltage pulses to the substrate support. The (c) comprises: periodically increasing or decreasing the voltage level of a plurality of voltage pulses contained in the sequence within a period having a time length that is the reciprocal of the second frequency, and repeating the period, wherein the second frequency is lower than the first frequency and is contained in a range of more than 20 kHz and less than 100 kHz.

[0103] [E14] The plasma processing method as described in E13 The plasma processing apparatus includes a high-frequency power supply configured to supply a source high-frequency signal for generating plasma from the processing gas. The (c) procedure includes the following steps: (c1) In order to generate plasma from the process gas in the chamber during the first period and deposit chemical seeds from the plasma on the substrate, the source high-frequency signal having a first power level is supplied from the high-frequency power supply; (c2) In a second period following the first period, in order to generate plasma from the process gas, a source high-frequency signal having a second power level lower than the first power level is supplied from the high-frequency power supply, the process including: the sequence of voltage pulses supplied from the bias power supply to the substrate support; (c3) In a third period following the second period, in order to generate plasma from the process gas and etch the second region, a source high-frequency signal having a third power level lower than the first power level is supplied from the high-frequency power supply. This process includes: supplying the sequence of voltage pulses from the bias power supply to the substrate support; and (c4) In a fourth period following the third period, in order to further etch the second region using the plasma generated from the processing gas, a sequence of voltage pulses is supplied from the bias power supply to the substrate support. This step includes setting the power level of the source high-frequency signal to a fourth power level that is lower than the second power level and the third power level. In (c3) and (c4), the voltage levels of the plurality of voltage pulses contained in the sequence are set to substantially fixed levels. In (c2), the voltage level of the plurality of voltage pulses contained in the sequence within the period increases or decreases in stages, and the period is repeated.

[0104] [E15] The plasma processing method as described in E14 The maximum voltage level of the plurality of voltage pulses in (c2) is lower than the voltage level of the plurality of voltage pulses in (c3) and (c4).

[0105] [E16] Plasma processing methods as described in E14 or E15 The fourth power level is zero.

[0106] [E17] The plasma processing method as described in any one of E14 to E16, The second power level and the third power level are the same as each other.

[0107] [E18] The plasma processing method as described in any one of E14 to E17, The processing gas contains metals that constitute the chemical species and etching components for etching the second region.

[0108] [E19] The plasma processing method as described in any one of E13 to E18, Repeat step (c).

[0109] Explanation of reference numerals in the attached figures 1…Plasma processing device, 10…Plasma processing chamber, 11…Substrate support, 12…Plasma generation unit, 20…Gas supply unit, 50…Bias power supply, 50c…Control unit, 51c…Power control unit, 51…Variable DC power supply, 52…Pulse generator.

Claims

1. A plasma processing device, have: chamber; The substrate support portion within the cavity; The gas supply unit is configured to supply processing gas into the chamber. The high-frequency power supply is configured to supply a high-frequency signal for generating plasma from the processed gas; and The bias power supply is configured to introduce ions from the plasma onto the substrate on the substrate support by generating voltage pulses at time intervals that are the reciprocal of a first frequency, thereby supplying a sequence of voltage pulses to the substrate support. The bias power supply is configured to: periodically increase or decrease the voltage level of a plurality of voltage pulses contained in the sequence within a period having a time length that is the reciprocal of a second frequency, and repeat the period, wherein the second frequency is lower than the first frequency and is contained in a range of more than 20 kHz and less than 100 kHz.

2. The plasma processing apparatus as described in claim 1, The plurality of voltage pulses each have a negative voltage level relative to the reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.

3. The plasma processing apparatus as described in claim 1 or 2, The bias power supply includes: Variable DC power supply; The pulse generator is configured to generate a sequence of voltage pulses by pulsedizing the output voltage of the variable DC power supply. as well as At least one control unit is configured to control the variable DC power supply and the pulse generator. The at least one control unit is configured to control the variable DC power supply to change the voltage level of the output voltage, so that the voltage level of the plurality of voltage pulses increases or decreases in stages.

4. The plasma processing apparatus as described in claim 1 or 2, It also has a main control unit. The main control unit is configured to perform the following steps when the substrate, which includes a first region containing silicon and nitrogen and a second region containing silicon and oxygen, is placed on the substrate support: (a) Supplying processing gas from the gas supply unit into the chamber; as well as (b) Etching the second region using plasma generated from the processing gas within the chamber. The process described in (b) includes the following steps: (b1) During the first period, in order to generate plasma from the process gas in the chamber and deposit chemical seeds from the plasma on the substrate, the source high-frequency signal having a first power level is supplied from the high-frequency power supply; (b2) In a second period following the first period, in order to generate plasma from the process gas, a source high-frequency signal having a second power level lower than the first power level is supplied from the high-frequency power supply, the process including: the sequence of voltage pulses supplied from the bias power supply to the substrate support; (b3) In a third period following the second period, in order to generate plasma from the process gas and etch the second region, a source high-frequency signal having a third power level lower than the first power level is supplied from the high-frequency power supply. This process includes: supplying the sequence of voltage pulses from the bias power supply to the substrate support; and (b4) In a fourth period following the third period, in order to further etch the second region using the plasma generated from the processing gas, a sequence of voltage pulses is supplied from the bias power supply to the substrate support, the process including: setting the power level of the source high-frequency signal to a fourth power level that is lower than the second power level and the third power level. The bias power supply is configured as follows: In (b3) and (b4), the voltage levels of the plurality of voltage pulses contained in the sequence are set to substantially fixed levels. In (b2), the voltage level of the multiple voltage pulses contained in the sequence within the period is increased or decreased in stages, and the period is repeated.

5. The plasma processing apparatus as described in claim 4, The bias power supply is configured such that the maximum voltage level of the plurality of voltage pulses in (b2) is set to a level lower than the voltage level of the plurality of voltage pulses in (b3) and (b4).

6. The plasma processing apparatus as described in claim 4, The fourth power level is zero.

7. The plasma processing apparatus as described in claim 4, The second power level and the third power level are the same as each other.

8. The plasma processing apparatus as described in claim 4, The processing gas contains metals that constitute the chemical species and etching components for etching the second region.

9. The plasma processing apparatus as described in claim 4 The main control unit is configured to repeat (b).

10. The plasma processing apparatus as described in claim 1 or 2, The bias power supply is configured to change the duty cycle of the voltage pulse.

11. A bias power supply used in a plasma processing apparatus, include: Variable DC power supply; The pulse generator is configured to generate a sequence of voltage pulses by pulsedizing the output voltage of the variable DC power supply. as well as At least one control unit is configured to control the variable DC power supply and the pulse generator. The at least one control unit is configured as follows: In order to introduce ions from plasma within the chamber of the plasma processing apparatus into the substrate on the substrate support within that chamber, the pulse generator is controlled to generate voltage pulses at time intervals that are the reciprocal of a first frequency and to supply the sequence to the substrate support. In order to periodically increase or decrease the voltage level of a plurality of voltage pulses contained in the sequence within a period having a time length that is the reciprocal of the second frequency, and to repeat the period, the variable DC power supply is controlled to change the voltage level of the output voltage, wherein the second frequency is lower than the first frequency and is contained in the range of 20 kHz or higher and 100 kHz or lower.

12. The bias power supply as described in claim 11, The plurality of voltage pulses each have a negative voltage level relative to the reference potential, and the voltage level of each of the plurality of voltage pulses is the difference between the reference potential and the potential of the voltage pulse.

13. A plasma treatment method, The process includes the following steps: (a) A substrate is prepared in the chamber of a plasma processing apparatus, the substrate comprising a first region containing silicon and nitrogen and a second region containing silicon and oxygen; (b) Supplying processing gas into the chamber of the plasma processing apparatus; and (c) Etching the second region using plasma generated from the processing gas within the chamber. The plasma processing apparatus includes a bias power supply configured to generate voltage pulses at time intervals that are the reciprocal of a first frequency in order to introduce ions from the plasma onto the substrate on a substrate support within the chamber, thereby supplying a sequence of voltage pulses to the substrate support. The (c) comprises: periodically increasing or decreasing the voltage level of a plurality of voltage pulses contained in the sequence within a period having a time length that is the reciprocal of the second frequency, and repeating the period, wherein the second frequency is lower than the first frequency and is contained in a range of more than 20 kHz and less than 100 kHz.

14. The plasma processing method as described in claim 13, The plasma processing apparatus includes a high-frequency power supply configured to supply a source high-frequency signal for generating plasma from the processing gas. The (c) procedure includes the following steps: (c1) In order to generate plasma from the process gas in the chamber during the first period and deposit chemical seeds from the plasma on the substrate, the source high-frequency signal having a first power level is supplied from the high-frequency power supply; (c2) In a second period following the first period, in order to generate plasma from the process gas, a source high-frequency signal having a second power level lower than the first power level is supplied from the high-frequency power supply, the process including: the sequence of voltage pulses supplied from the bias power supply to the substrate support; (c3) In a third period following the second period, in order to generate plasma from the process gas and etch the second region, a source high-frequency signal having a third power level lower than the first power level is supplied from the high-frequency power supply. This process includes: supplying the sequence of voltage pulses from the bias power supply to the substrate support. as well as (c4) In a fourth period following the third period, in order to further etch the second region using the plasma generated from the processing gas, a sequence of voltage pulses is supplied from the bias power supply to the substrate support. This step includes setting the power level of the source high-frequency signal to a fourth power level that is lower than the second power level and the third power level. In (c3) and (c4), the voltage levels of the plurality of voltage pulses contained in the sequence are set to substantially fixed levels. In (c2), the voltage levels of the plurality of voltage pulses contained in the sequence within the period increase or decrease in stages, and the period is repeated.

15. The plasma processing method as described in claim 14, The maximum voltage level of the plurality of voltage pulses in (c2) is lower than the voltage level of the plurality of voltage pulses in (c3) and (c4).

16. The plasma processing method as described in claim 14 or 15, The fourth power level is zero.

17. The plasma processing method as described in claim 14 or 15, The second power level and the third power level are the same as each other.

18. The plasma processing method as described in claim 14 or 15, The processing gas contains metals that constitute the chemical species and etching components for etching the second region.

19. The plasma processing method according to any one of claims 13 to 15, Repeat step (c).

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