A multi-pulse power supply and host computer adaptive cooperative control system based on power module control

Abstract

The present application belongs to the technical field of vacuum coating, and provides a multi-pulse power supply and host computer adaptive collaborative control system based on power module control, which couples multiple arc source pulse power supplies and workpiece bias power supplies to the same host computer for collaborative control, thereby realizing flexible regulation of film layer structure composition and performance. By matching the pulse intensity of each arc source, customization of each target material element in the film layer can be realized; by matching the pulse phase of each arc source, several elements can be used as precursors or post-positioned components of the main component of the film, realizing customization of multi-layer films in the super-nano scale; according to the relationship between the gas discharge and metal discharge time, the bias pulse is phase-matched with the bias pulse, and the energy of the metal and gas molecules can be distinguished and adjusted; by adjusting the bias pulse and the arc source pulse to the same frequency and phase, the advantages of high-density plasma during the pulse period can be fully utilized, and the film layer deposition rate and compactness can be significantly improved.

Description

Technical Field

[0001] This invention relates to the field of vacuum coating technology, and in particular to a method for adapting and coordinating the control of a multi-pulse power supply and a host machine based on power module control. Specifically, it is applied to multi-arc ion plating (MAIP) equipment to achieve flexible and precise control of the composition, structure and properties of thin films. Background Technology

[0002] In modern industrial manufacturing, thin film technology is widely used in fields such as machinery, electronics, aerospace, and medical devices to improve the surface properties of materials, including hardness, wear resistance, corrosion resistance, and conductivity. Multi-arc ion plating technology, due to its advantages such as high ionization rate (close to 100%), fast deposition rate, and strong film-substrate adhesion, has become an important method for preparing high-quality hard coatings.

[0003] Traditional multi-arc ion plating equipment typically features multiple independent arc sources, each powered by an independent DC or pulse power supply, with the workpiece bias power supply also operating independently. While this control method is simple, it suffers from significant technical bottlenecks:

[0004] 1) Lack of coordinated control capability: There is a lack of precise timing and phase coordination between the arc sources and between the arc sources and the bias power supply. The deposition process depends on the superposition effect of the independent parameters of each power supply, and it is impossible to achieve active and precise intervention in the thin film growth process.

[0005] 2) Difficulty in controlling the film structure: Due to the lack of synergistic control, it is difficult to accurately control the deposition order and ratio of different target elements, making it impossible to achieve complex, ultra-nanoscale multilayer or gradient film structures. The range of control over film composition and performance is limited, resulting in poor flexibility.

[0006] 3) Poor process stability and repeatability: Each power source operates independently, and its start-up, shutdown, and pulse fluctuations are random, resulting in unstable process and difficulty in ensuring the consistency of membrane performance between batches.

[0007] 4) Low energy utilization efficiency: The timing of bias application cannot be optimized based on plasma state (such as the time window of metal discharge and gas discharge), resulting in inaccurate ion energy control, which may affect the compactness and stress state of the film.

[0008] For example, when preparing multi-component multilayer composite coatings such as TiN / TiCN / CrN, traditional methods can only achieve this by alternately turning on the arc source of different target materials. This is not only inefficient, but also results in rough interlayer transitions, making it impossible to form an ideal ultra-nanoscale structure.

[0009] Therefore, there is an urgent need for a method that can achieve multi-power source coordinated control in order to overcome the limitations of existing technologies and realize intelligent and precise control of the thin film growth process. Summary of the Invention

[0010] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a method for the adaptive and coordinated control of a multi-pulse power supply and a host computer based on power module control. This method uses a central host computer to perform unified and precise coordinated control of multiple arc source pulse power supplies and workpiece bias power supplies, thereby achieving flexible modulation of the thin film composition, structure, and properties, and significantly improving the stability and repeatability of the process. Specifically, as follows:

[0011] A method for adaptive and coordinated control of a multi-pulse power supply and a host computer based on power module control is characterized by coupling multiple arc source pulse power supplies and workpiece bias power supplies to the same host computer for coordinated control, specifically including the following steps:

[0012] 1. Development of the Pulse Arc Power Supply: The pulse arc power supply is an independently developed electron-enhancing emission power supply, consisting of two modules: a DC terminal and a pulse terminal. The DC terminal current range is adjustable from 0-200 A, the pulse terminal average current output range is adjustable from 0-100 A, the pulse peak current is adjustable from 0-2000 A, the frequency range is 0-1000 Hz, and the pulse width range is adjustable from 0-1000 μs. The parameter ranges and operating modes of both modules were edited using FPGA Verilog.

[0013] 2. Development of workpiece bias power supply: The workpiece bias power supply is a self-developed pulse bias power supply with an adjustable frequency of 0-5000 Hz, sufficient to cover the frequency range of pulse arc power supplies. The voltage is adjustable from 0-1000 V, and the duty cycle is adjustable from 0-100%.

[0014] 3. System Construction: A pulse power supply control system will be built, comprising one master controller (host), 2-5 slave pulse power supplies (each supplying power to an arc source), and at least one pulse bias power supply (supplying power to the workpiece). All communication between the master controller and the pulse arc power supplies and pulse bias power supplies will be established via a stable RS485 bus. The RS485 communication transmission module will be programmed in C language to precisely control the timing relationships between the pulse arc power supplies, as well as the timing and phase relationships between the pulse arc power supplies and the workpiece bias power supply.

[0015] 4. Core Control Unit: An FPGA (Field-Programmable Gate Array) serves as the core control unit, responsible for scheduling the underlying timing logic and pulse signals to ensure high-speed and precise control. The host computer interaction and instruction parsing section is written in FPGA Verilog language to implement human-computer interaction and the issuance of control commands.

[0016] 5. Pulse intensity matching: By uniformly setting and adjusting the peak pulse current of each slave pulse power supply through the host, the evaporation rate of each arc source can be precisely controlled, thereby customizing the composition ratio of each target element in the thin film.

[0017] 6. Pulse phase matching: By precisely adjusting the phase difference of the pulses output from each slave pulse power supply through the host, one or more elements can be used as precursors or post-components of the main thin film component, thereby constructing an ultra-nanoscale multilayer film structure.

[0018] 7. Bias Phase Coordination: Based on the temporal relationship between gas discharge and metal discharge during the pulse, the host adjusts the phase sequence of the pulsed bias power supply to precisely match the phase of each arc source pulse, thereby distinguishing and regulating the energy of metal ions and gas ions.

[0019] 8. Synchronous Enhanced Deposition: The bias pulse and the arc source pulse are adjusted to be in the same frequency and phase, making full use of the high-density plasma generated during the pulse to significantly improve the deposition rate and compactness of the film.

[0020] Compared with existing technologies, this invention achieves unified and precise coordinated control of multiple arc source pulse power supplies and workpiece bias power supplies through a central host, thereby enabling flexible modulation of the thin film composition, structure, and properties, and significantly improving the stability and repeatability of the process. Specifically, it includes the following beneficial effects:

[0021] 1. This invention enables precise customization of thin film composition and flexible construction of complex structures such as ultra-nanoscale multilayer films and gradient films by synergistically controlling the intensity and phase of multi-arc source pulses, greatly expanding the design space of thin film materials.

[0022] 2. By matching the phase of the bias pulse and the arc source pulse, this invention can apply different energies to metal ions and gas ions at different time windows, thereby achieving independent control of film stress, compactness and bonding force.

[0023] 3. By synchronizing the bias voltage with the arc source pulse, this invention can maximize the utilization of the high-density plasma generated by the pulse discharge, significantly improve the deposition rate, and obtain a denser and higher-performance thin film.

[0024] 4. In this invention, all power supply control parameters are uniformly set and scheduled by the host, ensuring the continuity of control commands and the accuracy of execution, eliminating random errors caused by independent control to the greatest extent, and ensuring the high stability and repeatability of the process.

[0025] 5. This invention is based on a hierarchical control architecture using FPGA Verilog and C language, which realizes the automated execution of complex control logic, reduces the difficulty and uncertainty of human operation, and provides a possibility for intelligent continuous coating production in the AI ​​era. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the multi-pulse power supply collaborative control system architecture of the present invention; the diagram clearly shows the connection relationship and signal flow between the host computer, the main controller, each power module, and the components inside the vacuum chamber;

[0027] Figure 2 This is the FPGA Verilog general control diagram of the present invention; the FPGA Verilog general control template is used to edit the peak current, frequency and pulse width of each slave pulse power supply and the pulse voltage, frequency and duty cycle of the workpiece pulse bias power supply.

[0028] Figure 3 This is a diagram of the RS485 top-level driver module of the present invention; the RS485 top-level driver module adopts a programming language to realize automatic DE / RE timing, a three-stage state machine, and is compatible with pulse power supply host computer communication;

[0029] Figure 4 This is a timing diagram of the coordinated control of multi-arc source pulse and bias pulse of the present invention. The arc pulse and the workpiece bias pulse start pulse are in phase, but the workpiece bias pulse is applied for a shorter time. By utilizing the preferential ionization characteristic of Ar gas at the front end of the arc pulse, the same frequency sputtering enhancement is achieved.

[0030] Figure 5 This is a timing diagram of the coordinated control of multi-arc source pulse and bias pulse in this invention. The starting pulse of the workpiece bias pulse in this diagram lags behind the arc pulse, shielding the etching effect of Ar+ ions at the front end. It only utilizes the characteristic of metal ionization enhancement at the rear end of the arc pulse to achieve the same frequency deposition enhancement.

[0031] Figure 6 This is a timing diagram of the coordinated control of multi-arc source pulse and bias pulse of the present invention; the diagram realizes that the arc pulse and the workpiece bias pulse have the same frequency and pulse width, with no phase difference, maximizing the utilization of pulsed plasma and realizing high-speed and high-density thin film deposition;

[0032] Figure 7 This is a waveform diagram of the arc source pulse in operation according to the present invention;

[0033] Figure 8 This is a graph showing the test results of the relationship between the average substrate current and the pulse width in this invention;

[0034] Figure 9 This is a diagram showing the relationship between the four stages of electron and ion transport in space according to the present invention. Detailed Implementation

[0035] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and should not be construed as limiting the scope of the invention.

[0036] I. System Overall Architecture

[0037] like Figure 1 As shown, the present invention provides a multi-pulse power supply and host computer adaptation and coordination control system based on power module control, which mainly includes a host computer, a main controller host, multiple arc source pulse power supply modules, a workpiece pulse bias power supply and an RS485 differential communication bus.

[0038] The host computer connects to the main controller via Ethernet communication to issue all power parameter configuration commands, enable human-machine interaction, and monitor the system's operating status in real time. The main controller has a built-in FPGA core control unit and a C language upper-level control program. The FPGA is responsible for generating low-level high-precision timing logic, scheduling multiple pulse phases, and outputting synchronous pulse signals. The C language program is responsible for parsing the host computer's Ethernet commands, verifying parameters, issuing control commands to each slave power supply via the RS485 bus, and collecting real-time operating status feedback from each power supply.

[0039] The arc source pulse power supply module includes one master pulse power supply and 2 to 10 slave pulse power supplies. Each pulse power supply integrates a DC output module and a pulse output module. Each pulse power supply is independently connected to a single metal or alloy arc source target material in the vacuum coating equipment. The workpiece pulse bias power supply is independently connected to the workpiece stage inside the vacuum chamber and is used to apply an adjustable negative pulse bias voltage to the workpiece.

[0040] II. Hardware Parameter Configuration

[0041] In this embodiment, the DC output module has an adjustable DC current range of 0~200 A; the pulse output module has an adjustable average current of 0~100 A, an adjustable peak pulse current of 0~2000 A, an adjustable pulse output frequency of 0~1000 Hz, and an adjustable pulse width of 0~1000 μs. The workpiece pulse bias power supply has an adjustable output voltage of 0~-1000 V, an adjustable output frequency of 0~1000 Hz, and an adjustable pulse duty cycle of 0~100%. The arc source target material in the vacuum chamber can be a Ti, Cr, Al, or Ta elemental metal target, or a CrAl or NiCr alloy target.

[0042] In actual coating processes, operators can select appropriate target combinations based on the desired film composition. For example, when preparing a TiN hard coating, a Ti target can be used as the arc source target, and nitrogen gas can be introduced as the reaction gas; when preparing a TiAlN composite coating, both Ti and Al targets can be used simultaneously, and the atomic ratio of Ti to Al in the film can be controlled by adjusting the intensity ratio of the two arc source pulses.

[0043] III. FPGA Core Control Unit

[0044] like Figure 2 As shown, the FPGA core control unit uses Verilog hardware description language to write the control logic, which includes a general timing control template, an RS485 bus driver module, and a multi-channel pulse phase synchronization scheduling module.

[0045] The general-purpose timing control template features a three-stage state machine architecture. It allows for editing and configuring the peak current, output frequency, and pulse width parameters of each arc source pulse power supply, as well as the pulse voltage, output frequency, and duty cycle parameters of the workpiece pulse bias power supply. The three-stage state machine comprises three main states: idle, parameter loading, and pulse output. Transitions between states are controlled by the system clock cycle and external trigger signals, ensuring the stability and predictability of the timing logic. This general-purpose control template is parameterized and configurable, allowing for reloading of the system clock frequency, data bit width, and maximum timing count. It is compatible with all Xilinx and Intel FPGA chips. The three-stage state machine logic incorporates a two-stage synchronous anti-metastable circuit, eliminating combinational logic latching issues, and achieving microsecond-level timing control accuracy.

[0046] The multi-channel pulse phase synchronization scheduling module can independently configure the pulse phase difference between any two arc source pulse power supplies, and can also independently configure the phase lag or lead time between any arc source pulse and workpiece bias pulse. The phase adjustment time range covers one pulse cycle (i.e., 0~360°).

[0047] In the implementation, the FPGA internally maintains a high-precision system clock counter, with the rising and falling edges of each pulse signal using this counter as the time reference. When a pulse needs to generate a phase shift, the corresponding phase shift amount is simply added to the count comparison value of that pulse. For example, if the system clock frequency is 100 MHz (clock period 10 ns), to generate a 100 μs phase lag, 10,000 clock cycles are added to the count comparison value of that pulse.

[0048] IV. RS485 Communication Bus Driver

[0049] like Figure 3 As shown, the RS485 differential communication bus serves as the unified communication link between the main controller and all arc source pulse power supplies and workpiece bias power supplies. The RS485 hardware driver incorporates automatic DE / RE transceiver switching timing and employs a three-stage state machine logic to achieve stable transmission and reception of differential signals.

[0050] The RS485 driver module incorporates a two-stage register synchronization circuit to suppress metastability in external differential received signals. Upon triggering a transmit request, the DE control pin is automatically pulled high to switch the transmit mode; after the entire frame of serial data is transmitted, the DE pin is automatically pulled low to switch to receive mode. The serial communication protocol standard is 8N1 (8 data bits, no parity bit, 1 stop bit), and the baud rate can be configured to 9600 bps, 19200 bps, or 115200 bps. It supports single-byte command issuance and single-byte status data feedback, and can be expanded with a FIFO buffer to achieve multi-byte frame transmission and reception. It also supports CRC16 checksum to adapt to the Modbus-RTU industrial communication protocol.

[0051] In actual communication, the main controller acts as the communication master station, while each arc source pulse power supply and workpiece bias power supply acts as a slave station. The master station polls the status registers of each slave station via the RS485 bus to obtain real-time operating parameters such as output current, voltage, temperature, and fault codes of each power supply. At the same time, the master station writes the control parameters sent by the host computer into the parameter registers of each slave station via the RS485 bus, realizing remote control and parameter configuration of each power supply.

[0052] V. Coordinated Control of Multi-Arc Source Pulse and Bias Pulse

[0053] The system includes multiple timing-based operating modes for coordinated operation of arc source pulses and workpiece bias pulses, as follows: Figure 4 , Figure 5 , Figure 6 As shown.

[0054] Mode 1: Same-frequency sputtering enhancement mode (e.g.) Figure 4 (As shown). The arc source pulse and the workpiece bias pulse have the same frequency, but the workpiece bias pulse width is smaller than the arc source pulse width, and the rising edge of the bias pulse is aligned synchronously with the rising edge of the arc source pulse. In this mode, the preferential ionization of argon gas at the arc pulse tip is utilized to achieve ion sputtering cleaning of the workpiece surface. Specifically, in the initial stage of arc pulse activation, argon molecules in the vacuum chamber are first ionized to form Ar⁺ ions. At this time, a negative bias voltage is simultaneously applied to the workpiece, and the Ar⁺ ions are accelerated and bombard the workpiece surface under the action of the electric field, removing surface contaminants and oxide layers, thus achieving the sputtering cleaning effect.

[0055] Mode 2: Co-frequency deposition enhancement mode (e.g.) Figure 5(As shown). The arc source pulse and the workpiece bias pulse have the same frequency, and the rising edge of the workpiece bias pulse lags behind the rising edge of the arc source pulse, with the lag time adjustable from 0 to 100 μs. In this mode, the excessive etching effect of argon ions at the front end is shielded, and deposition enhancement is achieved solely using the metal plasma at the rear end of the arc pulse. Specifically, after the arc pulse is turned on, it first undergoes an argon ionization stage, during which the workpiece bias voltage is zero or at a low potential to avoid excessive sputtering of Ar⁺ on the workpiece surface; after the arc pulse enters the stage of large-scale metal ion precipitation, the rising edge of the workpiece bias pulse arrives, and a negative bias voltage is applied to accelerate the metal ions, achieving efficient deposition enhancement.

[0056] Mode 3: Co-frequency coupled high-density plasma deposition mode (e.g.) Figure 6 (As shown). The arc source pulse and the workpiece bias pulse are of the same frequency, pulse width, and phase difference, and the workpiece is synchronously subjected to the maximum negative bias voltage at the moment the arc pulse starts. In this mode, the high-density metal plasma is utilized to the maximum extent throughout the entire cycle, significantly improving the deposition rate and film density. Throughout the entire cycle of the arc pulse, high-density metal ions are continuously accelerated by the electric field and deposited vertically on the workpiece surface, achieving high-speed and high-density thin film deposition.

[0057] VI. Pulse Intensity Matching Control

[0058] In actual coating processes, the composition of the film is customized through pulse intensity matching control. The host computer sets the peak pulse current of different arc source pulse power supplies. By adjusting the proportion of the peak current within the range of 0~2000 A, the evaporation rate and metal ion flux of different target metals are controlled, thereby continuously regulating the atomic ratio of different target elements inside the composite film, and realizing the preparation of single metal-rich films, uniformly mixed films, or gradient films.

[0059] For example, when preparing a TiAlN composite coating, if a uniformly mixed film with a Ti:Al atomic ratio of 1:1 is required, the peak pulse current of both the Ti target arc source and the Al target arc source can be set to the same value (e.g., 800 A). If a Ti-rich film (Ti:Al = 3:1) is required, the peak current of the Ti target can be set to 1200 A and the peak current of the Al target can be set to 400 A. By linearly adjusting the peak current ratio of each arc source, the film composition can be continuously adjusted within the range of 0% to 100%.

[0060] VII. Pulse Phase Matching Control

[0061] Continuous deposition of ultra-nano multilayer films is achieved through a pulse phase-matching control method. The main controller FPGA independently configures the phase difference of the output pulses from any two arc source pulse power supplies, with the phase difference adjustment range being 0° to 360°. Continuous deposition of ultra-nano multilayer films is achieved by time-division multiplexing different metal ion currents.

[0062] For example, in the fabrication of TiN / CrN nanolayered films, the Ti target arc source pulse and the Cr target arc source pulse are set to the same frequency and pulse width, but with a 180° phase difference between them. When the Ti target arc source pulse is on, Ti ions are precipitated in large quantities and deposited on the workpiece surface to form a TiN layer; when the Ti target arc source pulse is off and the Cr target arc source pulse is on, Cr ions are precipitated in large quantities and deposited to form a CrN layer. By controlling the precipitation time ratio of the two types of ions within each pulse cycle, the thickness of each film can be precisely controlled at the nanoscale. If the pulse frequency is 500 Hz (period 2 ms) and the pulse width is 500 μs, then the TiN layer and the CrN layer are each deposited for 500 μs, and the thickness of each layer can be controlled within the range of several nanometers to tens of nanometers after conversion by the deposition rate.

[0063] 8. Workpiece bias pulse phase coordinated control

[0064] The workpiece bias pulse phase coordinated control includes two independent ion energy regulation methods.

[0065] Method 1: High-energy bombardment of metal ions to enhance adhesion. The rising edge of the workpiece bias pulse is delayed by 5–100 μs compared to the rising edge of the arc source pulse. In the initial stage of the arc pulse, when only Ti or Cr ions are deposited, the workpiece bias is 0 V, and the metal ions are deposited smoothly on the workpiece surface in a low-energy state. In the latter half of the arc pulse, when a large amount of nitrogen gas ionizes to generate N⁺ gas ions, a negative bias of -400 to -800 V is applied to the workpiece to accelerate the gas ions, solidifying the film layer and improving its density, while simultaneously preventing excessive sputtering of the metal layer. This method is suitable for applications requiring good adhesion at the film-substrate interface while maintaining high density within the film layer.

[0066] Method 2: Synchronous Plasma High-Speed ​​Dense Deposition. All arc source pulses and workpiece bias pulses are set to have the same frequency, pulse width, and zero phase difference. At the instant the arc pulse starts, a negative bias voltage of -200 to -500 V is synchronously applied to the workpiece. Throughout the cycle, high-density metal ions are accelerated by the electric field and deposited vertically onto the workpiece surface, significantly improving the deposition rate and film density. This method is suitable for applications requiring high deposition rate and film density, but with relatively low requirements for interfacial adhesion.

[0067] IX. Hierarchical Control Architecture

[0068] The main controller adopts a layered control architecture. The upper-layer C language program is responsible for Ethernet command parsing, automated process scheduling, and fault logic judgment; the lower-layer FPGA Verilog logic is responsible for nanosecond-level multi-channel pulse timing synchronization, RS485 underlying hardware transceiver driving, and real-time pulse waveform output. The hardware and software are layered and decoupled, supporting continuous automated coating process operation and adapting to intelligent mass production scenarios.

[0069] In actual operation, operators set a complete coating process formula via a host computer (including parameters such as current, frequency, pulse width, and phase difference of each arc source, as well as voltage, frequency, duty cycle, and phase lag of the bias power supply). The host computer sends the formula parameters to the C language program of the main controller via Ethernet. After verifying and parsing the parameters, the C language program sends the configuration parameters of each power supply to the corresponding slave power supply via RS485 bus. At the same time, the C language program configures timing parameters (such as the phase offset and pulse width of each pulse) into the FPGA registers. The FPGA independently generates each high-precision pulse signal based on these parameters and synchronously triggers each power supply module via RS485 bus. Throughout the coating process, each power supply module reports its operating status (actual output current, voltage, temperature, etc.) to the main controller in real time via RS485 bus, which is then summarized by the C language program and uploaded to the host computer for display via Ethernet.

[0070] All operating parameters and pulse timing phase configurations of the arc source pulse power supply and workpiece bias power supply are uniformly scheduled by the main controller, eliminating random errors caused by the independent operation of a single power supply, such as start-up, shutdown, and pulse fluctuations. This ensures the consistency of film composition, thickness, and mechanical properties of the same batch of coated workpieces, significantly improving process repeatability.

[0071] Example 1: Differentiated Regulation of Ion Energy

[0072] This embodiment illustrates a specific implementation method for increasing the bombardment energy of metal ions during the deposition process to enhance the film-substrate adhesion, while simultaneously reducing the energy of gas ions to avoid excessive sputtering.

[0073] The arc source pulse operates, with a fixed pulse peak current of 600 A. For example... Figure 7 As shown. Five different process parameters were compared: frequency / pulse width of 300 Hz / 220 μs, 280 Hz / 240 μs, 270 Hz / 255 μs, 250 Hz / 270 μs, and 210 Hz / 300 μs. The test results show that as the pulse width increases, the average substrate current increases, such as... Figure 8 As shown.

[0074] According to the principle of cathode arc ion plating discharge, the establishment of the cold field discharge sheath layer preferentially involves the ionization of Ar gas, followed by the evaporation, ionization, and emission of target atoms. Therefore, the increase in average substrate current with increasing pulse width is due to the ionization of gas over time. Based on this mechanism, the time window for metal discharge and gas discharge is determined by presetting the timing of the arc source pulse on the host computer. The workpiece bias power supply is set to pulse mode, with its frequency the same as the arc source pulse frequency. Simultaneously, the host computer controls the phase of the bias pulse to lag behind the arc source pulse by a specific time. The lag time can be modulated according to the specific experimental requirements and can be set to 100 μs.

[0075] Based on this, in the early stage of Ar ion generation, the workpiece bias voltage is at a low potential or zero potential to reduce the bombardment of Ar ions on the film layer and reduce the stress of the film layer; when the target ion current is enhanced and the gas ion current is weakened, the bias pulse reaches a high potential (e.g. -500 V) to accelerate the target ions and make them bombard the film surface, which plays a role in consolidating the film layer and improving its density, while avoiding excessive sputtering caused by the newly deposited target atomic layer.

[0076] In actual operation, if the lag time is set to 50 μs, the workpiece bias voltage is zero within the first 50 μs after the arc pulse is turned on. Ar⁺ ions diffuse freely to the workpiece surface but are not accelerated by the electric field. The bombardment energy is low and will not cause obvious sputtering etching. After 50 μs, the rising edge of the bias pulse arrives and a -500 V bias voltage is applied to the workpiece. At this time, the arc pulse has entered the stage of large-scale metal ion precipitation. Under the action of a strong electric field, the metal ions bombard the workpiece surface at high speed to achieve dense deposition.

[0077] Example 2: Customization of Membrane Composition

[0078] Figure 9 A diagram showing the relationship between the four stages of electron and ion transport in space. Figure 9 a) is a waveform diagram of the substrate current. Figure 9 b) is a waveform diagram of the charged particle flow collected on the probe in region 1. Figure 9 c) is the substrate current waveform diagram. Figure 9 As can be seen in b), after the substrate is grounded, a negative signal appears first, which is the electron flow reaching the probe, followed by a positive signal, which is the ion flow.

[0079] from Figure 9 As shown in b), the measured waveform can be divided into four stages. Stage 1: The number of electrons increases rapidly, and the electron flow waveform is relatively steep. This is because after the pulse is turned on, the electrons have high energy under the action of the pulse voltage. High-energy electrons generate a large number of secondary electrons through collisions. This "avalanche" growth leads to a rapid increase in the electron flow rate and a steep rising edge. In this stage, the number of ions also increases due to the ionization caused by electron collisions and diffuses along the direction of electron movement. Stage 2: The number of electrons continues to increase, and ions also diffuse to the substrate position. At this time, electrons and ions neutralize at the substrate. When the pulse ends, the number of electrons decreases rapidly, and the number of electrons received by the substrate decreases rapidly. Ions continue to move towards the substrate due to the inertia of bipolar diffusion, forming a transition from electron flow to ion flow (stage 3). After the ion flow reaches its peak, because the ions carry different energies, the time it takes to reach the probe position also varies, thus forming stage 4 where the ion flow slowly decreases.

[0080] For the matrix current, the ionization of electrons near the substrate and the superposition of diffused ions form the first peak; after the pulse is turned off, the number of ions decreases and the matrix current gradually decreases; after the pulse current is completely turned off, the electrons disappear and the ions are not lost on the matrix, thus forming the second matrix current peak.

[0081] Based on the above mechanism, the host computer sends instructions to the main controller, which then sends parameters to the corresponding slave pulse power supplies via an RS485 bus. Since electrons preferentially reach the substrate, the host can control the pulse signal output of different arc sources, creating a phase difference between them. This allows the electrons from the first target to reach the substrate to collide and ionize the delayed target atoms that evaporate from the second target. By adjusting the phase relationship between the two, the ratio of different target atoms in the final deposited film can be precisely controlled, achieving continuous adjustability of films with different elemental ratios.

[0082] For example, in the preparation of Ti-Cr composite films, the rising edge of the Ti target arc source pulse is set 50 μs earlier than the rising edge of the Cr target arc source pulse. After the Ti target arc source pulse is turned on, high-energy electrons preferentially reach the vicinity of the substrate; 50 μs later, the Cr target arc source pulse is turned on, and Cr atoms evaporate into the plasma region. At this time, the high-energy electrons generated by the Ti target collide with Cr atoms and ionize them, improving the ionization rate and deposition efficiency of Cr. By adjusting the phase difference between the Ti target and the Cr target (0 to 1 pulse cycle), the ratio of Ti to Cr atoms in the film can be continuously adjusted over a wide range.

[0083] Example 3: Mass Production Application

[0084] In continuous automated coating production scenarios, operators pre-store multiple coating process formulas (such as TiN hard coating formulas, TiAlN composite coating formulas, TiN / CrN nano multilayer film formulas, etc.) in the host computer. During production, operators select the appropriate formula according to product requirements and start the coating program with one click.

[0085] The main controller's C language program automatically parses the formula parameters and sequentially configures the peak current, frequency, and pulse width of each arc source pulse power supply via the RS485 bus; configures the voltage, frequency, and duty cycle of the workpiece bias power supply; and configures the phase offset of each pulse channel within the FPGA. After configuration, the FPGA synchronously starts the output of each pulse channel according to the set timing parameters, and the entire coating process runs fully automatically.

[0086] During the coating process, the main controller collects the operating status parameters of each power supply in real time. If any power supply malfunctions (such as overcurrent, overtemperature, or communication timeout), the C language program immediately executes fault protection logic (such as shutting down all pulse outputs and sending alarm information to the host computer) to ensure the safety of the equipment and workpiece. After each coating cycle is completed, the system automatically records complete process parameters and operating data, facilitating subsequent quality traceability and process optimization.

[0087] Since the operating parameters and timing of all power supplies are uniformly scheduled by the main controller, random errors caused by clock drift, startup delay differences and other factors when each power supply operates independently are eliminated, ensuring a high degree of consistency in film composition, thickness and mechanical properties between different workpieces within the same batch and between different batches.

[0088] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A multi-pulse power supply and host computer adaptation and coordination control system based on power module control, characterized in that, Includes a host computer, a main controller, multiple arc source pulse power supply modules, a workpiece pulse bias power supply, and an RS485 differential communication bus; The host computer is connected to the main controller host via Ethernet communication and is used to issue all power parameter configuration commands, human-computer interaction, and real-time monitoring of system operation status. The main controller host has a built-in FPGA core control unit and a C language upper-level control program. The FPGA is responsible for generating low-level high-precision timing logic, scheduling multiple pulse phases, and outputting synchronous pulse signals. The C language program is responsible for parsing the host computer Ethernet instructions, verifying parameters, sending control instructions to each slave power supply through the RS485 bus, and collecting real-time operating status feedback of each power supply. The arc source pulse power supply module includes 1 main pulse power supply and 2-10 slave pulse power supplies. Each pulse power supply integrates a DC output module and a pulse output module. Each pulse power supply is independently connected to a single metal / alloy arc source target in the vacuum coating equipment. The workpiece pulse bias power supply is independently connected to the workpiece stage inside the vacuum chamber and is used to apply an adjustable negative pulse bias to the workpiece. The RS485 differential communication bus serves as a unified communication link between the main controller and all arc source pulse power supplies and workpiece bias power supplies. The RS485 hardware driver has a built-in automatic DE / RE transmit / receive switching timing and uses a three-stage state machine logic to achieve stable transmission and reception of differential signals.

2. The adaptive and coordinated control system for a multi-pulse power supply and a host computer based on power module control as described in claim 1, characterized in that: The DC output module outputs a DC current range adjustable from 0 to 200 A; the pulse output module has an average current adjustable from 0 to 100 A, a peak pulse current adjustable from 0 to 2000 A, a pulse output frequency adjustable from 0 to 1000 Hz, and a pulse width adjustable from 0 to 1000 μs; the workpiece pulse bias power supply has an output voltage adjustable from 0 to 1000 V, an output frequency adjustable from 0 to 1000 Hz, and a pulse duty cycle adjustable from 0 to 100%; the arc source target material in the vacuum chamber is selected from Ti, Cr, Al, and Ta elemental metal targets, or CrAl and NiCr alloy targets.

3. The adaptive and coordinated control system for a multi-pulse power supply and a host based on power module control as described in claim 1, characterized in that: The FPGA core control unit uses Verilog hardware description language to write the control logic, which includes a general timing control template, an RS485 bus driver module, and a multi-channel pulse phase synchronization scheduling module. The general timing control template is a three-segment state machine architecture, which can be edited and configured with the peak current, output frequency, and pulse width parameters of each arc source pulse power supply, and the pulse voltage, output frequency, and duty cycle parameters of the workpiece pulse bias power supply can also be configured. The multi-channel pulse phase synchronization scheduling module can independently configure the pulse phase difference between any two arc source pulse power supplies, and can also independently configure the phase lag / lead time between any arc source pulse and workpiece bias pulse, with the phase adjustment time range covering one pulse cycle.

4. The adaptive and coordinated control system for a multi-pulse power supply and a host based on power module control as described in claim 1, characterized in that: The system includes multiple timing-based operating modes for coordinated operation of arc source pulses and workpiece bias pulses: Mode 1: Same frequency sputtering enhancement mode; the arc source pulse and the workpiece bias pulse have the same frequency, the workpiece bias pulse pulse width is smaller than the arc source pulse pulse width, the rising edge of the bias pulse is aligned and synchronized with the rising edge of the arc source pulse, and the workpiece surface is ion sputtered and cleaned by preferential ionization of argon gas at the front end of the arc pulse. Mode 2: Co-frequency deposition enhancement mode; the arc source pulse and the workpiece bias pulse are at the same frequency, and the rising edge of the workpiece bias pulse lags behind the rising edge of the arc source pulse. The lag time is adjustable from 0 to 100 μs, shielding the front end from excessive argon ion etching, and only using the metal plasma at the back end of the arc pulse to achieve deposition enhancement. Mode 3: Co-frequency coupled high-density plasma deposition mode; The arc source pulse and the workpiece bias pulse are of the same frequency, pulse width and phase difference. The workpiece is synchronously subjected to the maximum negative bias voltage at the moment the arc pulse is turned on, so as to maximize the use of the full-cycle high-density metal plasma to improve the deposition rate and film density.

5. The adaptive and coordinated control system for a multi-pulse power supply and a host based on power module control as described in claim 1, characterized in that: The RS485 driver module has a built-in two-level register synchronization circuit to suppress metastability of external differential received signals. When a transmit request is triggered, the DE control pin is automatically pulled high to switch the transmit mode. After the entire frame of serial data is transmitted, the DE pin is automatically pulled low to switch to the receive mode. The serial communication protocol standard is 8N1, the baud rate is configurable to 9600 / 19200 / 115200, it supports single-byte command issuance and single-byte status data return, and it can expand the FIFO buffer to realize multi-byte frame transmission and reception. CRC16 check is adapted to the Modbus-RTU industrial communication protocol.

6. A method for adaptive and coordinated control of a multi-pulse power supply and a host based on power module control, implemented using the control system described in any one of claims 1-5, characterized in that, The pulse intensity matching control method is as follows: the host computer sets the peak pulse current of different arc source pulse power supplies respectively, and controls the evaporation rate of different target metals and the flux of metal ions by adjusting the numerical ratio of the peak current in the range of 0-2000 A. The atomic ratio of different target elements inside the composite film is continuously adjusted to achieve the preparation of a single metal-rich, uniformly mixed metal gradient film.

7. The method for adaptive and coordinated control of a multi-pulse power supply and a host based on power module control as described in claim 6, characterized in that: The pulse phase matching control method is as follows: the main controller FPGA independently configures the phase difference of the output pulses of any two arc source pulse power supplies, and the phase difference adjustment range is 0-360°. The continuous deposition of ultra-nano multilayer films is achieved by time-division precipitation of different metal ion currents.

8. The method for adaptive and coordinated control of a multi-pulse power supply and a host based on power module control as described in claim 6, characterized in that: Workpiece bias pulse phase coordinated control includes two independent ion energy regulation methods: Method 1: High-energy bombardment of metal ions to enhance bonding force control; the rising edge of the workpiece bias pulse lags the rising edge of the arc source pulse by 5-100 μs. In the initial stage of the arc pulse, when only metal Ti / Cr ions are deposited, the workpiece bias is 0 V, and the metal ions are deposited smoothly at low energy. In the latter half of the arc pulse, when a large amount of nitrogen gas is ionized to generate N⁺ gas ions, a negative bias of -400-800V is applied to the workpiece to accelerate the gas ions, solidify the film layer and improve its density, while avoiding excessive sputtering of the metal layer. Method 2: Synchronous plasma high-speed dense deposition; all arc source pulses and workpiece bias pulses are set to the same frequency, pulse width and zero phase difference. At the moment the arc pulse starts, a negative bias voltage of -200 to -500V is applied to the workpiece simultaneously. High-density metal ions are accelerated by the electric field and vertically deposited on the workpiece surface throughout the cycle, which improves the deposition rate and film density.

9. The method for adaptive and coordinated control of a multi-pulse power supply and a host based on power module control as described in claim 6, characterized in that: The main controller adopts a hierarchical control architecture: the upper-layer C language program is responsible for Ethernet command parsing, automated scheduling of process flow, and fault logic judgment; the lower-layer FPGA Verilog logic is responsible for nanosecond-level multi-channel pulse timing synchronization, RS485 underlying hardware transceiver driving, and real-time pulse waveform output. The software and hardware are layered and decoupled, supporting continuous automated coating process operation and adapting to intelligent mass production scenarios.

10. The method for adaptive and coordinated control of a multi-pulse power supply and a host based on power module control as described in claim 6, characterized in that: The operating parameters and pulse timing phase configuration of all arc source pulse power supplies and workpiece bias power supplies are uniformly scheduled by the main controller, eliminating random errors caused by the independent operation of a single power supply, such as start-up, shutdown, and pulse fluctuations, ensuring the consistency of film composition, thickness, and mechanical properties of the same batch of coated workpieces, and improving process repeatability. The FPGA general control template is a parameterized and configurable design that can reload the system clock frequency, data bit width, and maximum timing count. It is compatible with all Xilinx and Intel FPGA chips. The three-stage state machine logic has a built-in two-level synchronous anti-metastable circuit, no combinational logic latching problem, and timing control accuracy can reach the microsecond level.

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