Method for reducing trapezoidal defects on the surface of silicon carbide epitaxial wafer

Abstract

The present application belongs to the technical field of epitaxial growth, and particularly relates to a method for reducing trapezoidal defects on the surface of a silicon carbide epitaxial wafer. The method provided by the present application can more effectively and stably reduce the trapezoidal defects on the surface of the SiC epitaxial wafer, can significantly reduce the trapezoidal defect density to an ultra-low level (≤0.1 / cm 2 ), and meanwhile ensure that the overall defect density on the surface of the epitaxial wafer is maintained at 0.3 / cm 2 . Therefore, the product quality and market competitiveness are greatly improved. The present application is outstanding in inhibiting the trapezoidal defects on the surface of the silicon carbide epitaxial wafer, effectively avoids the control problem caused by the fact that the C / Si process window is too sensitive to temperature and pressure fluctuations in the traditional process, and even can be compatible with some substrate materials with low defect control requirements, and has the significant advantages of high process stability and cost-effectiveness.

Description

Technical Field

[0001] This invention belongs to the field of epitaxial growth technology, specifically relating to a method for reducing trapezoidal defects on the surface of silicon carbide epitaxial wafers. Background Technology

[0002] SiC epitaxy is the cornerstone of modern high-performance power semiconductor devices. Its core function is to epitaxially grow a single-crystal thin film with higher crystal quality and precisely controllable electrical parameters (such as thickness and doping concentration) on a SiC single-crystal substrate that has been cut to a specific crystal orientation (usually an off-axis substrate) using methods such as chemical vapor deposition (CVD). This epitaxial layer directly constitutes the voltage blocking layer and channel active region of power devices (such as MOSFETs and Schottky diodes), and its quality directly determines the final performance and reliability of the device. Ideal epitaxial growth aims for a perfect step-flow growth mode, where adsorbed atoms migrate and bond orderly along atomic steps on the substrate surface, thus "replicating" a perfect crystal structure. However, even slight fluctuations in process parameters or defects in the substrate itself can disrupt this ideal process, inducing various crystal defects. One typical example posing a significant threat to device performance is the "ladder defect." Its harm to device performance is fatal and multifaceted: First, as an effective carrier scattering and recombination center, it significantly reduces the majority carrier mobility, leading to an increase in the device's specific on-resistance and conduction loss; more seriously, when bipolar devices (such as PiN diodes and IGBTs) are working, the injected minority carriers will accumulate at the stacking faults, inducing defects to rapidly expand and spread within the base plane. This process will directly lead to the drift of the device's forward voltage, a surge in leakage current, and even complete functional failure, which is the core bottleneck restricting the long-term reliability of the device.

[0003] Current mainstream improvement methods focus on optimizing the C / Si ratio and reactant gas flow rate during epitaxial growth. However, this approach has significant limitations: First, the effective process window is extremely narrow (the C / Si ratio typically needs to be strictly controlled between 0.9 and 1.2), making it highly sensitive to temperature and pressure fluctuations and resulting in poor process stability. Second, the effectiveness of this method is highly dependent on the flow field uniformity of a specific reaction chamber, and the process parameters are difficult to reproduce across different devices, leading to high costs for process development and porting. Furthermore, existing methods mostly focus on the homogenization control of macroscopic gas phase conditions, failing to precisely intervene at the atomic scale in the initial stage of trapezoidal defect formation—i.e., the atomic adsorption and migration dynamics at the edge of the substrate surface steps—thus, the suppression effect has reached a bottleneck. Summary of the Invention

[0004] The purpose of this invention is to provide a method for reducing trapezoidal defects on the surface of silicon carbide epitaxial wafers. The method provided by this invention can more effectively and stably reduce trapezoidal defects on the surface of SiC epitaxial wafers.

[0005] To achieve the above objectives, the present invention provides the following technical solution: This invention provides a method for reducing trapezoidal defects on the surface of silicon carbide epitaxial wafers, comprising the following steps: The silicon carbide substrate is etched to obtain the etched silicon carbide substrate; Using carbon source, silicon source, catalyst source and nitrogen as raw materials, low-speed growth, medium-speed growth and high-speed growth are performed sequentially on the surface of the etched silicon carbide substrate to obtain an N-type doped epitaxial buffer layer. A silicon carbide epitaxial layer is grown on the surface of the N-type doped epitaxial buffer layer using carbon source, silicon source and catalyst source as raw materials; The growth rate of the low-speed growth is 2-4 micrometers / hour; The growth rate of the medium-speed growth is 5~10 micrometers / hour; The growth rate of the high-speed growth is 40-45 micrometers / hour.

[0006] Preferably, the etching method is hydrogen etching; The etching process includes performing a first etching and a second etching sequentially.

[0007] Preferably, the conditions for the first etching include: a hydrogen gas flow rate of 120-140 standard liters per minute, a temperature of 1100-1300°C, a pressure of 130-170 millibars, and a rotation speed of 450-550 rpm. The conditions and parameters for the second etching include: a hydrogen gas flow rate of 120-140 standard liters per minute, a temperature of 1500-1700°C, a pressure of 90-120 millibars, and a rotation speed of 450-550 rpm.

[0008] Preferably, the carbon source includes at least one of propane and ethylene; The silicon source includes at least one of silane and tetrachlorosilane; The catalyst source includes hydrogen chloride.

[0009] Preferably, during the low-speed growth process, the flow rate of the carbon source is 5-10 sccm, the flow rate of the silicon source is 10-20 sccm, and the flow rate of the catalyst source is 100-200 sccm. The temperature for the low-speed growth is 1500~1700℃; The nitrogen doping concentration in the first N-type doped epitaxial buffer layer obtained by the low-speed growth is 9 × 10⁻⁶. 18 ~15×10 18 cm -3 ; The thickness of the first N-type doped epitaxial buffer layer is 0.1~0.5 micrometers.

[0010] Preferably, during the medium-speed growth process, the flow rate of the carbon source is 15-20 sccm, the flow rate of the silicon source is 60-80 sccm, and the flow rate of the catalyst source is no more than 1000 sccm. The temperature for medium-speed growth is 1500~1700℃; The nitrogen doping concentration in the second N-type doped epitaxial buffer layer obtained by medium-speed growth is 5 × 10⁻⁶. 18 ~9×10 18 cm -3 ; The thickness of the second N-type doped epitaxial buffer layer is 0.1~0.5 micrometers.

[0011] Preferably, during the high-speed growth process, the flow rate of the carbon source is 140-150 sccm, the flow rate of the silicon source is 600-700 sccm, and the flow rate of the catalyst source is no more than 5000 sccm. The temperature for the high-speed growth is 1500~1700℃; The nitrogen doping concentration in the third N-type doped epitaxial buffer layer obtained by high-speed growth is 1×10⁻⁶. 18 ~5×10 18 cm -3 ; The thickness of the third N-type doped epitaxial buffer layer is 1~2 micrometers.

[0012] Preferably, the conditions for growing the silicon carbide epitaxial layer include: the flow rate of the carbon source is 120~180 sccm, the flow rate of the silicon source is 500~700 sccm, the flow rate of the catalyst source is 3000~5000 sccm; the growth rate is 40~60 micrometers / hour; and the temperature is 1500~1700℃.

[0013] Preferably, after growing the silicon carbide epitaxial layer, the process further includes reducing the temperature of the reaction chamber to 600-900°C, which is required for equipment standby, and then removing the epitaxial wafer.

[0014] This invention provides a method for reducing trapezoidal defects on the surface of a silicon carbide epitaxial wafer, comprising the following steps: etching a silicon carbide substrate to obtain an etched silicon carbide substrate; using carbon source, silicon source, catalyst source, and nitrogen as raw materials, sequentially performing low-speed growth, medium-speed growth, and high-speed growth on the surface of the etched silicon carbide substrate to obtain an N-type doped epitaxial buffer layer; using carbon source, silicon source, and catalyst source as raw materials, growing a silicon carbide epitaxial layer on the surface of the N-type doped epitaxial buffer layer; the growth rate of the low-speed growth is 2-4 micrometers / hour; the growth rate of the medium-speed growth is 5-10 micrometers / hour; and the growth rate of the high-speed growth is 40-45 micrometers / hour.

[0015] Compared with the prior art, the beneficial effects of the present invention include: (1) This invention alleviates trapezoidal defects by growing buffer layers at different growth rates (growth speeds). The core physical principle is that this design essentially introduces a transition region between the substrate and the epitaxial main layer, where lattice stress and defect evolution dynamics are finely controlled, thereby effectively "intercepting" or "passivating" defects extending from the substrate. This invention can significantly reduce the density of trapezoidal defects to an ultra-low level (≤0.1 defects / cm²). 2 At the same time, ensure that the overall defect density on the epitaxial wafer surface is maintained at 0.3 defects / cm². 2 The following measures will significantly improve product quality and market competitiveness.

[0016] (2) The present invention has outstanding performance in suppressing trapezoidal defects on the surface of silicon carbide epitaxial wafers, effectively avoiding the control problems caused by the excessive sensitivity of the C / Si process window to temperature and pressure fluctuations in traditional processes. It can even be compatible with some substrate materials with lower defect control requirements, and has significant advantages of high process stability and cost-effectiveness.

[0017] (3) The method of the present invention can significantly reduce and optimize the distribution of trapezoidal defects while avoiding the introduction of other types of defects, thereby ensuring that the overall defect level of the epitaxial wafer remains low and providing reliable wafer surface quality assurance for subsequent device fabrication.

[0018] (4) The present invention aims to block the root cause of defect nucleation and expansion by using an innovative, multi-stage synergistic process sequence to maintain efficient growth. Attached Figure Description

[0019] Figure 1 A flowchart illustrating the method provided by the present invention; Figure 2 The surface defect test results of the silicon carbide epitaxial wafer obtained in Example 1; Figure 3 The results show the surface defect test results of the silicon carbide epitaxial wafer obtained in Comparative Example 1. Detailed Implementation

[0020] This invention provides a method for reducing trapezoidal defects on the surface of silicon carbide epitaxial wafers, comprising the following steps: The silicon carbide substrate is etched to obtain the etched silicon carbide substrate; Using carbon source, silicon source, catalyst source and nitrogen as raw materials, low-speed growth, medium-speed growth and high-speed growth are performed sequentially on the surface of the etched silicon carbide substrate to obtain an N-type doped epitaxial buffer layer. A silicon carbide epitaxial layer is grown on the surface of the N-type doped epitaxial buffer layer using carbon source, silicon source and catalyst source as raw materials; The growth rate of the low-speed growth is 2-4 micrometers / hour; The growth rate of the medium-speed growth is 5~10 micrometers / hour; The growth rate of the high-speed growth is 40-45 micrometers / hour.

[0021] The present invention involves etching a silicon carbide substrate to obtain an etched silicon carbide substrate.

[0022] In this invention, the etching method is preferably hydrogen etching; the etching preferably includes performing a first etching and a second etching sequentially.

[0023] In this invention, the preferred etching conditions include: a hydrogen gas flow rate of 120-140 standard liters per minute (specifically 120, 130, or 140 standard liters per minute), a temperature of 1100-1300°C (specifically 1100, 1200, or 1300°C), a pressure of 130-170 millibars (specifically 130, 140, 150, 160, or 170 millibars), and a rotation speed of 450-550 rpm (specifically 450, 500, or 550 rpm). During the etching process, the temperature control system dynamically adjusts the heater's power output based on real-time monitoring data from the internal temperature probe to overcome various disturbances and ensure the temperature remains stable within a set point of ±0.5°C or even smaller fluctuations. By controlling the opening degree of the outlet throttle valve through feedback, the input rate of the reactant gas and the pumping rate of the vacuum system are balanced in real time, thereby precisely maintaining the set low-pressure state. At the same time, the base of the supporting substrate is rotated, and the time averaging effect is used to optimize the uniformity of airflow and temperature distribution within the cavity.

[0024] In this invention, the preferred etching conditions include: a hydrogen gas flow rate of 120-140 standard liters per minute (specifically 120, 130, or 140 standard liters per minute), a temperature of 1500-1700°C (specifically 1500, 1600, or 1700°C), a pressure of 90-120 millibars (specifically 90, 100, 110, or 120 millibars), and a rotation speed of 450-550 rpm (specifically 450, 500, or 550 rpm).

[0025] This invention employs a two-step etching process, achieving an optimized switch from "kinetic control" to "thermodynamic and transport control" of the surface reaction process through coordinated segmented control of temperature and pressure parameters. The combination of medium temperature and high pressure in the first step ensures comprehensive and uniform etching of surface contaminants and shallow damage by hydrogen atoms, providing a clean and uniform starting point for subsequent processing. The combination of high temperature and low pressure in the second step, while greatly increasing the etching reaction rate, significantly enhances the diffusion coefficient and desorption rate of reaction byproducts by reducing pressure, effectively suppressing local supersaturation and redeposition of silicon- and carbon-containing gaseous species on the surface.

[0026] After obtaining the etched silicon carbide substrate, the present invention uses carbon source, silicon source, catalyst source and nitrogen as raw materials to sequentially perform low-speed growth, medium-speed growth and high-speed growth on the surface of the etched silicon carbide substrate to obtain an N-type doped epitaxial buffer layer.

[0027] In this invention, the carbon source preferably includes at least one of propane and ethylene; the silicon source preferably includes at least one of silane and tetrachlorosilane; and the catalyst source preferably includes hydrogen chloride.

[0028] In this invention, the growth rate of the low-speed growth is 2 to 4 micrometers / hour, specifically 2 micrometers / hour, 3 micrometers / hour, or 4 micrometers / hour.

[0029] In this invention, during the low-speed growth process, the flow rate of the carbon source is preferably 5-10 sccm (specifically, it can be 5 sccm, 6 sccm, 6.6 sccm, 7 sccm, 8 sccm, 9 sccm, or 10 sccm), the flow rate of the silicon source is preferably 10-20 sccm (specifically, it can be 10 sccm, 11 sccm, 12 sccm, 13 sccm, 14 sccm, 15 sccm, 16 sccm, 16.4 sccm, 17 sccm, 18 sccm, 19 sccm, or 20 sccm), and the flow rate of the catalyst source is preferably 100-200 sccm (specifically, it can be 100 sccm, 120 sccm, 140 sccm, 160 sccm, 180 sccm, or 200 sccm); the temperature of the low-speed growth is preferably 1500-1700℃ (specifically, it can be 1500℃, 1600℃, or 1700℃). In this invention, the nitrogen doping concentration in the first N-type doped epitaxial buffer layer obtained by low-speed growth is preferably 9 × 10⁻⁶. 18 ~15×10 18 cm -3 (Specifically, it can be 9×10) 18 cm -3 10×10 18 cm -3 11×10 18cm -3 12×10 18 cm -3 13×10 18 cm -3 14×10 18 cm -3 15×10 18 cm -3 The thickness of the first N-type doped epitaxial buffer layer is preferably 0.1 to 0.5 micrometers (specifically, it can be 0.1 micrometers, 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, or 0.5 micrometers).

[0030] In this invention, the growth rate of the medium-speed growth is 5 to 10 micrometers / hour, specifically 5 micrometers / hour, 6 micrometers / hour, 7 micrometers / hour, 8 micrometers / hour, 9 micrometers / hour, and 10 micrometers / hour.

[0031] In this invention, during the medium-speed growth process, the flow rate of the carbon source is preferably 15-20 sccm (specifically, 15 sccm, 16 sccm, 17 sccm, 18 sccm, 19 sccm, or 20 sccm), the flow rate of the silicon source is preferably 60-80 sccm (specifically, 60 sccm, 62 sccm, 64 sccm, 66 sccm, 68 sccm, 70 sccm, 72 sccm, 74 sccm, 76 sccm, 78 sccm, or 80 sccm), and the flow rate of the catalyst source is preferably no more than 1000 sccm (specifically, 860 sccm); the temperature of the medium-speed growth is preferably 1500-1700℃ (specifically, 1500℃, 1600℃, or 1700℃). In this invention, the nitrogen doping concentration in the second N-type doped epitaxial buffer layer obtained by the medium-speed growth is preferably 5 × 10⁻⁶. 18 ~9×10 18 cm -3 (Specifically, it can be 5×10) 18 cm -3 6×10 18 cm -3 7×10 18 cm -3 8×10 18 cm -3 9×10 18 cm -3 The thickness of the second N-type doped epitaxial buffer layer is preferably 0.1 to 0.5 micrometers (specifically, it can be 0.1 micrometers, 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, or 0.5 micrometers).

[0032] In this invention, the high-speed growth rate is 40-45 micrometers / hour, specifically 40 micrometers / hour, 41 micrometers / hour, 42 micrometers / hour, 43 micrometers / hour, 44 micrometers / hour, and 45 micrometers / hour.

[0033] In this invention, during the high-speed growth process, the flow rate of the carbon source is preferably 140-150 sccm (specifically, it can be 140 sccm, 141 sccm, 142 sccm, 142.5 sccm, 143 sccm, 144 sccm, 145 sccm, 146 sccm, 147 sccm, 148 sccm, 149 sccm, or 150 sccm), and the flow rate of the silicon source is preferably 600-700 sccm (600 sccm, 6...). The flow rates of the catalyst source are preferably no more than 5000 sccm (specifically, 4497 ​​sccm); the high-speed growth temperature is preferably 1500~1700℃ (specifically, 1500℃, 1600℃, or 1700℃). In this invention, the nitrogen doping concentration in the third N-type doped epitaxial buffer layer obtained by high-speed growth is preferably 1×10⁻⁶. 18 ~5×10 18 cm -3 (Specifically, it can be 1×10) 18 cm -3 2×10 18 cm -3 3×10 18 cm -3 4×10 18 cm -3 5×10 18 cm -3 The thickness of the third N-type doped epitaxial buffer layer is preferably 1 to 2 micrometers.

[0034] In this invention, the N-type doped epitaxial buffer layer preferably includes a first N-type doped epitaxial buffer layer, a second N-type doped epitaxial buffer layer, and a third N-type doped epitaxial buffer layer stacked sequentially.

[0035] After obtaining the N-type doped epitaxial buffer layer, the present invention uses carbon source, silicon source and catalyst source as raw materials to grow silicon carbide epitaxial layer on the surface of the N-type doped epitaxial buffer layer.

[0036] In this invention, the carbon source preferably includes at least one of propane and ethylene; the silicon source preferably includes at least one of silane and tetrachlorosilane; and the catalyst source preferably includes hydrogen chloride.

[0037] In this invention, the preferred conditions for growing the silicon carbide epitaxial layer include: a carbon source flow rate of 120-180 sccm (specifically, 120 sccm, 130 sccm, 135 sccm, 140 sccm, 150 sccm, 160 sccm, 170 sccm, or 180 sccm), and a silicon source flow rate of 500-700 sccm (500 sccm, 508 sccm, 520 sccm, 540 sccm, 560 sccm, 580 sccm, 600 sccm, 620 sccm, or 6...). The catalyst source flow rate is 3000~5000 sccm (specifically 3000 sccm, 3500 sccm, 4000 sccm, 4500 sccm, 4580 sccm, 5000 sccm); the growth rate is 40~60 micrometers / hour (specifically 40 micrometers / hour, 50 micrometers / hour, 60 micrometers / hour); and the temperature is 1500~1700℃ (specifically 1500℃, 1600℃, 1700℃). In this invention, the thickness of the silicon carbide epitaxial layer is preferably 10 micrometers.

[0038] In this invention, after growing the silicon carbide epitaxial layer, it is also preferable to reduce the temperature of the reaction chamber to 600~900℃ (specifically 600℃, 700℃, 800℃, or 900℃) required for equipment standby, and then remove the epitaxial wafer.

[0039] Unless otherwise specified, the materials and equipment used in this invention are all commercially available products in the field.

[0040] The technical solutions of this invention will be clearly and completely described below with reference to the embodiments thereof. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0041] Example 1 First, the SiC substrate is loaded onto a dedicated tray in the transfer chamber. Then, a robotic arm transports the tray along with the substrate to the designated growth area in the reaction chamber. The ambient gas in the reaction chamber is replaced with hydrogen (H2), and the etching process for the substrate is initiated, performing the first and second etching processes sequentially to obtain the etched silicon carbide substrate. Specifically: The conditions for the first etching are as follows: the flow rate of hydrogen is 120 standard liters per minute, the temperature is 1200°C, the cavity pressure is set to 150 mbar, and at the same time, the base supporting the substrate is controlled to rotate at a speed of 500 rpm, using the time averaging effect to optimize the uniformity of airflow and temperature distribution in the cavity. The conditions for the second etching are as follows: keep the hydrogen flow rate and rotation speed constant, further increase the reaction temperature to 1600°C, and adjust the pressure inside the chamber to 110 mbar. Under these conditions, hydrogen etching is performed. At a temperature of 1600℃, propane (flow rate 6.6 sccm), silane (flow rate 16.4 sccm), hydrogen chloride (flow rate 200 sccm), and nitrogen were introduced into the reaction chamber to grow a first N-type doped epitaxial buffer layer on the surface of an etched silicon carbide substrate at a growth rate of 4 μm / h. The nitrogen doping concentration was 12E18cm⁻¹. -3 The thickness is 0.5 micrometers; Maintaining a constant reaction temperature, the flow rates of propane (18 sccm), silane (64 sccm), and hydrogen chloride (860 sccm) were adjusted to grow a second N-type doped epitaxial buffer layer on the surface of the first N-type doped epitaxial buffer layer at a growth rate of 7.5 μm / h. The nitrogen doping concentration was 8E18 cm⁻¹. -3 Between these, the thickness is 0.5 micrometers; Maintaining a constant reaction temperature, and adjusting the flow rates of propane (142.5 sccm), silane (646.7 sccm), and hydrogen chloride (4497 sccm), a third N-type doped epitaxial buffer layer was grown on the surface of the second N-type doped epitaxial buffer layer at a growth rate of 45 μm / h. The nitrogen doping concentration was 1E18 cm⁻¹. -3 Between these, the thickness is 1 micrometer; While maintaining a stable temperature, the flow rates of propane (135 sccm), silane (508 sccm), and hydrogen chloride (4580 sccm) were adjusted to grow a silicon carbide epitaxial layer with a thickness of 10 micrometers on the surface of the third N-type doped epitaxial buffer layer at a growth rate of 50 micrometers / hour. After epitaxial growth is completed, the temperature of the reaction chamber is reduced to 600°C, which is required for equipment standby. Finally, the robotic arm is used to remove the completed epitaxial wafer through the transfer chamber, thus obtaining the silicon carbide epitaxial wafer.

[0042] In this embodiment, the silicon carbide epitaxial wafer was scanned by a testing device to obtain surface defects such as... Figure 2As can be seen, the number of trapezoidal defects a is 2ea, the number of triangular defects b is 11ea, the number of stacking faults c is 8ea, and the number of particles d is 1ea. Trapezoidal defects account for 10% of the total number of defects, and the average defect density is 0.01ea / cm³. 2 The overall defect density on the surface of this SiC epitaxial wafer is 0.2ea / cm². 2 The present invention can reduce and improve the density of trapezoidal defects without causing an increase in other types of defects, thus maintaining the overall defect density at a low level.

[0043] Comparative Example 1 First, the SiC substrate is loaded onto a dedicated tray in the transfer chamber. Then, a robotic arm is used to transfer the tray, along with the substrate, to the designated growth area in the reaction chamber. The ambient gas in the reaction chamber is replaced with hydrogen (H2), and the etching process on the substrate is initiated to obtain the etched silicon carbide substrate. Specifically: The etching conditions are as follows: the hydrogen flow rate is 131 standard liters per minute, the temperature is 1630°C, the cavity pressure is set to 110 mbar, and the substrate is controlled to rotate at 500 rpm to optimize the uniformity of airflow and temperature distribution in the cavity by using the time averaging effect. At a temperature of 1630°C, propane (flow rate 141 sccm), silane (flow rate 641 sccm), hydrogen chloride (flow rate 3800 sccm), and nitrogen were introduced into the reaction chamber to grow a first N-type doped epitaxial buffer layer on the surface of an etched silicon carbide substrate at a growth rate of 42 μm / h. The nitrogen doping concentration was 8E18 cm⁻¹. -3 The thickness is 1 micrometer; Maintaining a constant reaction temperature, the flow rates of propane (141 sccm), silane (641 sccm), and hydrogen chloride (3800 sccm) were adjusted to grow a second N-type doped epitaxial buffer layer on the surface of the first N-type doped epitaxial buffer layer at a growth rate of 42 μm / h. The nitrogen doping concentration was 1E18 cm⁻¹. -3 The thickness is 1 micrometer; While maintaining a stable temperature, the flow rates of propane (161 sccm), silane (641 sccm), and hydrogen chloride (4200 sccm) were adjusted to grow a silicon carbide epitaxial layer with a thickness of 10 micrometers on the surface of the second N-type doped epitaxial buffer layer at a growth rate of 52 micrometers / hour. After epitaxial growth is completed, the temperature of the reaction chamber is reduced to 600°C, which is required for equipment standby. Finally, the robotic arm is used to remove the completed epitaxial wafer through the transfer chamber, thus obtaining the silicon carbide epitaxial wafer.

[0044] The silicon carbide epitaxial wafer obtained in this comparative example was scanned by testing equipment, and surface defects were found, such as... Figure 3 As can be seen, the number of trapezoidal defects (a) is 3839ea, the number of triangular defects (b) is 1ea, the number of stacking faults (c) is 17ea, and the number of particles (d) is 1ea. Trapezoidal defects account for 99.5% of the total number of defects, with an average defect density of 23.55ea / cm³. 2 The overall defect density on the surface of this SiC epitaxial wafer is 23.67ea / cm². 2 .

[0045] Although the above embodiments have provided a detailed description of the present invention, they are only some embodiments of the present invention, and not all embodiments. Other embodiments can be obtained based on these embodiments without creative effort, and these embodiments all fall within the protection scope of the present invention.

Claims

1. A method for reducing trapezoidal defects on the surface of silicon carbide epitaxial wafers, characterized in that, Includes the following steps: The silicon carbide substrate is etched to obtain the etched silicon carbide substrate; Using carbon source, silicon source, catalyst source and nitrogen as raw materials, low-speed growth, medium-speed growth and high-speed growth are performed sequentially on the surface of the etched silicon carbide substrate to obtain an N-type doped epitaxial buffer layer. A silicon carbide epitaxial layer is grown on the surface of the N-type doped epitaxial buffer layer using carbon source, silicon source and catalyst source as raw materials; The growth rate of the low-speed growth is 2-4 micrometers / hour; The growth rate of the medium-speed growth is 5~10 micrometers / hour; The growth rate of the high-speed growth is 40-45 micrometers / hour.

2. The method according to claim 1, characterized in that, The etching method is hydrogen etching; The etching process includes performing a first etching and a second etching sequentially.

3. The method according to claim 2, characterized in that, The conditions and parameters for the first etching include: a hydrogen gas flow rate of 120-140 standard liters per minute, a temperature of 1100-1300°C, a pressure of 130-170 millibars, and a rotation speed of 450-550 rpm. The conditions and parameters for the second etching include: a hydrogen gas flow rate of 120-140 standard liters per minute, a temperature of 1500-1700°C, a pressure of 90-120 millibars, and a rotation speed of 450-550 rpm.

4. The method according to claim 1, characterized in that, The carbon source includes at least one of propane and ethylene; The silicon source includes at least one of silane and tetrachlorosilane; The catalyst source includes hydrogen chloride.

5. The method according to claim 1 or 4, characterized in that, During the low-speed growth process, the flow rate of the carbon source is 5-10 sccm, the flow rate of the silicon source is 10-20 sccm, and the flow rate of the catalyst source is 100-200 sccm. The temperature for the low-speed growth is 1500~1700℃; The nitrogen doping concentration in the first N-type doped epitaxial buffer layer obtained by the low-speed growth is 9 × 10⁻⁶. 18 ~15×10 18 cm -3 ; The thickness of the first N-type doped epitaxial buffer layer is 0.1~0.5 micrometers.

6. The method according to claim 1 or 4, characterized in that, During the medium-speed growth process, the flow rate of the carbon source is 15-20 sccm, the flow rate of the silicon source is 60-80 sccm, and the flow rate of the catalyst source is no more than 1000 sccm. The temperature for medium-speed growth is 1500~1700℃; The nitrogen doping concentration in the second N-type doped epitaxial buffer layer obtained by medium-speed growth is 5 × 10⁻⁶. 18 ~9×10 18 cm -3 ; The thickness of the second N-type doped epitaxial buffer layer is 0.1~0.5 micrometers.

7. The method according to claim 1 or 4, characterized in that, During the high-speed growth process, the flow rate of the carbon source is 140~150 sccm, the flow rate of the silicon source is 600~700 sccm, and the flow rate of the catalyst source is no more than 5000 sccm. The temperature for the high-speed growth is 1500~1700℃; The nitrogen doping concentration in the third N-type doped epitaxial buffer layer obtained by high-speed growth is 1×10⁻⁶. 18 ~5×10 18 cm -3 ; The thickness of the third N-type doped epitaxial buffer layer is 1~2 micrometers.

8. The method according to claim 1, characterized in that, The conditions and parameters for growing silicon carbide epitaxial layers include: the flow rate of the carbon source is 120~180 sccm, the flow rate of the silicon source is 500~700 sccm, the flow rate of the catalyst source is 3000~5000 sccm; the growth rate is 40~60 micrometers / hour; and the temperature is 1500~1700℃.

9. The method according to claim 1, characterized in that, After growing the silicon carbide epitaxial layer, the process also includes reducing the temperature of the reaction chamber to 600-900°C, which is required for equipment standby, and then removing the epitaxial wafer.

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