A silicon carbide crystal annealing method and system based on in-situ defect healing
Patent Information
- Application Number
- CN202611143457.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-30
- Publication Date
- 2026-10-27
AI Technical Summary
[0003]传统碳化硅晶体退火方法通常由操作人员根据经验设定固定的退火温度和时长,并在退火前统一执行或不执行空气暴露处理,这种方式中退火参数的确定依赖主观经验,难以针对不同的退火任务目标进行针对性的调整,导致退火后晶体质量不稳定,同时空气暴露与否缺乏定量判别依据,无法根据退火目标选择暴露时长,容易造成退火效率低下或引入不必要的杂质干扰
[0075]本发明为解决背景技术所述问题,首先利用碳化硅加热炉对原始碳化硅衬底进行缓冲层构建,通过预处理、退火环境构建和缓冲层生长,在原始碳化硅衬底表面形成了与衬底共价键合的石墨烯缓冲层。进一步的,根据退火任务目标构建退火任务评价函数,整合了晶体形貌特征、拉曼光谱特征和光电子特征三个特征,并通过特征权重集反映了不同退火任务目标对各特征的侧重程度,从而对应不同的退火任务都具有较高的适应性。本方案还通过响应面选取多个候选退火参数集并计算候选评价值,再拟合二阶退火评价模型并求解驻点,确定了使退火任务评价函数输出值最大的最优退火参数组合,从而实现了退火参数的自动化寻优。最后,本发明通过在不同测试暴露时长下进行退火测试并构建晶体缺陷曲线,并结合最优退火参数中的目标最高温度进行坐标索引,再根据晶体缺陷系数和消耗时长系数加权计算综合判别因子,最终确定最优暴露时长,从而判断是否需要进行空气暴露处理以及具体的暴露时长。因此,本发明可提高退火参数与退火任务目标的匹配度,降低退火后碳化硅晶体的缺陷密度。
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Abstract
Description
Technical Field
[0001] This invention relates to the field of silicon carbide technology, and in particular to a silicon carbide crystal annealing method and system based on in-situ defect healing. Background Technology
[0002] Silicon carbide (SiC) crystals, as third-generation semiconductor materials, have high application value in high-temperature, high-frequency, and high-power devices. However, SiC crystals are prone to surface defects such as dangling bonds and dislocations during growth and processing, which can reduce the electrical performance and reliability of devices. Constructing a buffer layer on the surface of a SiC substrate through high-temperature annealing followed by subsequent annealing is a key process for repairing surface defects and improving crystal quality. The selection of annealing parameters and whether air exposure is required before annealing directly affect the decoupling degree of the buffer layer and the defect density of the final crystal.
[0003] Traditional silicon carbide crystal annealing methods typically involve operators setting fixed annealing temperatures and durations based on experience, and uniformly performing or omitting air exposure treatment before annealing. In this approach, the determination of annealing parameters relies on subjective experience, making it difficult to make targeted adjustments for different annealing objectives. This results in unstable crystal quality after annealing. Furthermore, the lack of quantitative criteria for determining whether or not air exposure is required makes it impossible to select the exposure time based on the annealing objective, which can easily lead to low annealing efficiency or the introduction of unnecessary impurities. Summary of the Invention
[0004] This invention provides a silicon carbide crystal annealing method based on in-situ defect healing and a computer-readable storage medium. Its main purpose is to improve the matching degree between annealing parameters and annealing task objectives, and reduce the defect density of silicon carbide crystals after annealing.
[0005] To achieve the above objectives, the present invention provides a silicon carbide crystal annealing method based on in-situ defect healing, comprising:
[0006] Construct a silicon carbide heating furnace, which includes: a vacuum unit and a sample placement unit;
[0007] A buffer layer was constructed on the pre-obtained raw silicon carbide substrate using a silicon carbide heating furnace to obtain buffered silicon carbide crystals;
[0008] Receive the annealing task objective and the set of annealing parameters to be optimized, and construct the annealing task evaluation function based on the annealing task objective;
[0009] The optimal annealing parameter set is obtained by optimizing the annealing parameter set to be optimized using the annealing task evaluation function.
[0010] Based on the optimal annealing parameter set, the buffer layer exposure of the buffer silicon carbide crystal is determined, and the exposure determination result is: air exposure treatment or non-exposure treatment.
[0011] If the exposure determination result is air exposure treatment, then the buffer silicon carbide crystal is exposed to air to obtain the silicon carbide crystal to be annealed.
[0012] If the exposure determination result is non-exposure treatment, then the buffer silicon carbide crystal will be used as the silicon carbide crystal to be annealed.
[0013] A buffer layer annealing treatment was performed on the silicon carbide crystal to be annealed using a silicon carbide heating furnace and an optimal annealing parameter set to obtain the target silicon carbide crystal, thus completing the silicon carbide crystal annealing.
[0014] Optionally, the step of constructing a buffer layer on the pre-obtained raw silicon carbide substrate using a silicon carbide heating furnace to obtain a buffered silicon carbide crystal includes:
[0015] The original silicon carbide substrate is pretreated to obtain a pretreated silicon carbide substrate. The pretreatment includes polishing, cutting and ultrasonic treatment.
[0016] A pretreated silicon carbide substrate is placed in a sample placement unit in a silicon carbide heating furnace to obtain a fixed silicon carbide substrate;
[0017] An annealing environment was constructed for a fixed silicon carbide substrate using a vacuum unit and a preset target mixed gas to obtain the silicon carbide substrate to be grown.
[0018] A buffer layer is grown on the silicon carbide substrate to be grown, resulting in a buffered silicon carbide crystal.
[0019] Optionally, constructing the annealing task evaluation function based on the annealing task objective includes:
[0020] An annealing evaluation feature set is constructed, which includes: crystal morphology features, Raman spectral features, and photoelectronic features;
[0021] A feature weight set is set based on the annealing task objective, wherein the sum of the weights of each feature in the feature weight set is 1;
[0022] An evaluation function for the annealing task is constructed using the feature weight set and the annealing evaluation feature set.
[0023] Optionally, the step of optimizing the annealing parameter set to be optimized using the annealing task evaluation function to obtain the optimal annealing parameter set includes:
[0024] The annealing parameters to be optimized are extracted sequentially from the set of annealing parameters to be optimized. The extracted annealing parameters to be optimized are numerically set based on the preset parameter constraint range to obtain the set of annealing parameters to be tested.
[0025] The test annealing parameter set is obtained by summarizing the test annealing parameter sets corresponding to the annealing parameters to be optimized.
[0026] Response surface selection is performed based on the set of annealing parameters to be tested, resulting in multiple candidate annealing parameter sets;
[0027] Calculate multiple candidate evaluation values based on multiple candidate annealing parameter sets and annealing task evaluation functions;
[0028] A second-order polynomial fitting is performed based on multiple candidate evaluation values and multiple candidate annealing parameter sets to obtain a second-order annealing evaluation model.
[0029] The optimal parameter set is obtained by searching for the optimal parameters based on the second-order annealing evaluation model.
[0030] Optionally, the step of determining the exposure of the buffer layer of the buffered silicon carbide crystal based on the optimal annealing parameter set to obtain the exposure determination result includes:
[0031] Define a test exposure duration set, which includes multiple test exposure durations;
[0032] Test exposure durations are extracted sequentially from the test exposure duration set, and buffer layer annealing tests are performed based on the extracted test exposure durations to obtain crystal defect curves;
[0033] The crystal defect curves corresponding to each test exposure duration are summarized to obtain a set of crystal defect curves;
[0034] The target maximum temperature of the buffer silicon carbide crystal is determined based on the optimal annealing parameter set.
[0035] Based on the target maximum temperature, coordinate indexing is performed on the crystal defect curve set to obtain the target defect coordinate point set, which includes multiple target defect coordinate points;
[0036] Exposure discrimination results are generated based on the target defect coordinate point set.
[0037] Optionally, the step of performing buffer layer annealing tests based on the extracted test exposure time to obtain crystal defect curves includes:
[0038] The pre-constructed test silicon carbide crystal is exposed to air based on the test exposure time to obtain the test crystal to be annealed, wherein the test silicon carbide crystal contains a buffer layer;
[0039] The preset initial maximum temperature is recorded as the maximum annealing temperature;
[0040] The test crystal to be annealed was annealed using a silicon carbide heating furnace and the highest annealing temperature to obtain the annealed test crystal.
[0041] Defect identification is performed on the annealed test crystal to obtain defect data of the test crystal;
[0042] The maximum annealing temperature is updated based on the preset temperature change value to obtain the updated annealing temperature;
[0043] The updated annealing temperature is used as the initial maximum temperature, and the step of exposing the pre-built test silicon carbide crystal to air based on the test exposure time is returned until the maximum annealing temperature is fully covered.
[0044] The highest annealing temperature and test crystal defect data are summarized separately to obtain the highest annealing temperature set and the test crystal defect dataset.
[0045] Crystal defect curves are constructed based on the highest annealing temperature set and the test crystal defect dataset.
[0046] Optionally, the defect identification of the annealed test crystal to obtain test crystal defect data includes:
[0047] Microscopic scanning was performed on the annealed test crystal to obtain the crystal morphology image;
[0048] Based on the test crystal morphology image, crystal morphology features are extracted to obtain the test crystal morphology features;
[0049] The Raman spectrum of the annealed test crystal was obtained by laser emission from a pre-constructed laser generator.
[0050] Spectral features were extracted from the crystal Raman spectrum to obtain the spectral features of the test crystal.
[0051] X-ray emission was performed on the annealed test crystal to obtain the crystal photoelectron spectrum;
[0052] The elemental distribution characteristics of the crystal are extracted based on the crystal photoelectron spectroscopy to obtain the distribution characteristics of the test crystal.
[0053] By combining the morphological characteristics, spectral characteristics, and distribution characteristics of the test crystal, the defect data of the test crystal are obtained.
[0054] Optionally, constructing the crystal defect curve based on the highest annealing temperature set and the test crystal defect dataset includes:
[0055] For each test crystal defect data point in the test crystal defect dataset, perform the following operation:
[0056] Defect evaluation is performed based on the test crystal morphology, spectral characteristics, and distribution characteristics in the test crystal defect data to obtain the crystal defect factor;
[0057] By summarizing the crystal defect factors, a set of crystal defect factors is obtained;
[0058] The crystal defect curve is obtained by curve fitting based on the set of highest annealing temperatures and the set of crystal defect factors. The horizontal and vertical axes of the crystal defect curve represent the highest annealing temperature and the crystal defect factor, respectively.
[0059] Optionally, generating the exposure discrimination result based on the target defect coordinate point set includes:
[0060] The target defect coordinates are extracted sequentially from the target defect coordinate set, and the target crystal defect factor and target exposure time corresponding to the extracted target defect coordinates are identified respectively.
[0061] The target crystal defect factor and the target exposure time are normalized to obtain the crystal defect coefficient and the consumption time coefficient.
[0062] The comprehensive discrimination factor is calculated based on the crystal defect coefficient and the consumption time coefficient.
[0063] The comprehensive discrimination factors corresponding to the coordinate points of each target defect are summarized to obtain the comprehensive discrimination factor set;
[0064] Identify the largest discriminant factor in the comprehensive discriminant factor set, and record the target exposure duration corresponding to the largest discriminant factor as the optimal exposure duration;
[0065] Exposure discrimination results are generated based on the optimal exposure duration.
[0066] To achieve the above objectives, the present invention also provides a silicon carbide crystal annealing system based on in-situ defect healing, comprising:
[0067] A buffer layer growth module is used to construct a silicon carbide heating furnace, which includes a vacuum unit and a sample placement unit. The silicon carbide heating furnace is used to construct a buffer layer on the pre-acquired original silicon carbide substrate to obtain buffered silicon carbide crystals.
[0068] The annealing parameter generation module is used to receive the annealing task objective and the set of annealing parameters to be optimized, construct the annealing task evaluation function according to the annealing task objective, and use the annealing task evaluation function to optimize the set of annealing parameters to be optimized to obtain the optimal annealing parameter set.
[0069] The silicon carbide air exposure module is used to determine the exposure of the buffer silicon carbide crystal based on the optimal annealing parameter set, and obtain the exposure determination result. The exposure determination result is either air exposure treatment or non-exposure treatment. If the exposure determination result is air exposure treatment, the buffer silicon carbide crystal is exposed to obtain the silicon carbide crystal to be annealed. If the exposure determination result is non-exposure treatment, the buffer silicon carbide crystal is used as the silicon carbide crystal to be annealed.
[0070] The buffer layer annealing module is used to perform buffer layer annealing on the silicon carbide crystal to be annealed using a silicon carbide heating furnace and an optimal annealing parameter set, so as to obtain the target silicon carbide crystal.
[0071] To address the above problems, the present invention also provides an electronic device, the electronic device comprising:
[0072] Memory, storing at least one instruction;
[0073] The processor executes the instructions stored in the memory to implement the silicon carbide crystal annealing method based on in-situ defect healing described above.
[0074] To address the aforementioned problems, the present invention also provides a computer-readable storage medium storing at least one instruction, which is executed by a processor in an electronic device to implement the aforementioned silicon carbide crystal annealing method based on in-situ defect healing.
[0075] To address the problems described in the background section, this invention first constructs a buffer layer on a pristine silicon carbide substrate using a silicon carbide heating furnace. Through pretreatment, annealing environment construction, and buffer layer growth, a graphene buffer layer covalently bonded to the substrate is formed on the surface of the pristine silicon carbide substrate. Furthermore, an annealing task evaluation function is constructed based on the annealing task objectives, integrating three features: crystal morphology, Raman spectroscopy, and photoelectronic characteristics. The feature weight set reflects the degree of emphasis placed on each feature by different annealing task objectives, thus demonstrating high adaptability to various annealing tasks. This scheme also selects multiple candidate annealing parameter sets through response surface methodology and calculates candidate evaluation values. Then, a second-order annealing evaluation model is fitted and stationary points are solved to determine the optimal annealing parameter combination that maximizes the output value of the annealing task evaluation function, thereby achieving automated optimization of annealing parameters. Finally, this invention constructs crystal defect curves by conducting annealing tests at different exposure durations, and uses coordinate indexing based on the target maximum temperature in the optimal annealing parameters. A comprehensive discrimination factor is then calculated by weighting the crystal defect coefficient and the consumption time coefficient to ultimately determine the optimal exposure duration. This allows for the determination of whether air exposure treatment is necessary and, if so, the specific exposure duration. Therefore, this invention can improve the matching degree between annealing parameters and annealing task objectives, and reduce the defect density of silicon carbide crystals after annealing. Attached Figure Description
[0076] Figure 1 This is a schematic flowchart of a silicon carbide crystal annealing method based on in-situ defect healing provided in an embodiment of the present invention.
[0077] Figure 2 This is a functional block diagram of a silicon carbide crystal annealing system based on in-situ defect healing provided in an embodiment of the present invention;
[0078] Figure 3 This is a schematic diagram of an electronic device that implements the silicon carbide crystal annealing method based on in-situ defect healing, according to an embodiment of the present invention.
[0079] Explanation of reference numerals in the attached figures:
[0080] 10. Electronic device; 11. Processor; 12. Memory; 13. Bus.
[0081] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0082] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
[0083] This application provides a silicon carbide crystal annealing method based on in-situ defect healing. The executing entity of the silicon carbide crystal annealing method based on in-situ defect healing includes, but is not limited to, at least one of the following electronic devices that can be configured to execute the method provided in this application embodiment: a server, a terminal, etc. In other words, the silicon carbide crystal annealing method based on in-situ defect healing can be executed by software or hardware installed on a terminal device or a server device, and the software can be a blockchain platform. The server includes, but is not limited to, a single server, a server cluster, a cloud server, or a cloud server cluster.
[0084] Reference Figure 1 The diagram shown is a schematic flowchart of a silicon carbide crystal annealing method based on in-situ defect healing according to an embodiment of the present invention. In this embodiment, the silicon carbide crystal annealing method based on in-situ defect healing includes:
[0085] S1. Construct a silicon carbide heating furnace, which includes a vacuum unit and a sample placement unit.
[0086] It is understood that the silicon carbide heating furnace refers to equipment used for high-temperature annealing of silicon carbide crystals. The vacuum unit refers to a component capable of evacuating the furnace cavity of the silicon carbide heating furnace, used to remove air from the furnace cavity before annealing. The sample placement unit refers to a support within the furnace cavity of the silicon carbide heating furnace used to fix the silicon carbide substrate (such as the original silicon carbide substrate). Optionally, the sample placement unit is a graphite crucible, a quartz boat, a ceramic holder, etc. In addition to the aforementioned vacuum unit and sample placement unit, the silicon carbide heating furnace also includes a temperature control unit and a gas supply unit. The temperature control unit refers to a temperature control device composed of an infrared thermometer, a PID controller, and heating elements, used to regulate the temperature of the furnace cavity in the silicon carbide heating furnace. The gas supply unit refers to equipment used to supply gas, for example, supplying the target mixed gas for subsequent processing. Optionally, an RTP-300 rapid heat treatment furnace is used as the silicon carbide heating furnace in this embodiment.
[0087] S2. A buffer layer is constructed on the pre-obtained original silicon carbide substrate using a silicon carbide heating furnace to obtain a buffered silicon carbide crystal.
[0088] Understandably, the "original silicon carbide substrate" refers to a silicon carbide crystal that requires subsequent annealing, such as a 4H-SiC substrate. This original silicon carbide substrate lacks a buffer layer on its surface and contains dangling bonds and surface defects. Therefore, a buffer layer covalently bonded to the original silicon carbide substrate needs to be constructed on its surface through high-temperature annealing. The "buffered silicon carbide crystal" refers to a silicon carbide crystal obtained after growing a buffer layer on the surface of the original silicon carbide substrate. The buffer layer on the surface of this buffered silicon carbide crystal is connected to the original silicon carbide substrate through Si-C covalent bonds.
[0089] In detail, the process of constructing a buffer layer on the pre-obtained raw silicon carbide substrate using a silicon carbide heating furnace to obtain a buffered silicon carbide crystal includes:
[0090] The original silicon carbide substrate is pretreated to obtain a pretreated silicon carbide substrate. The pretreatment includes polishing, cutting and ultrasonic treatment.
[0091] A pretreated silicon carbide substrate is placed in a sample placement unit in a silicon carbide heating furnace to obtain a fixed silicon carbide substrate;
[0092] An annealing environment was constructed for a fixed silicon carbide substrate using a vacuum unit and a preset target mixed gas to obtain the silicon carbide substrate to be grown.
[0093] A buffer layer is grown on the silicon carbide substrate to be grown, resulting in a buffered silicon carbide crystal.
[0094] It should be explained that the pretreated silicon carbide substrate refers to the original silicon carbide substrate after pretreatment, wherein pretreatment refers to operations such as polishing, cutting, and ultrasonic treatment of the original silicon carbide substrate. The fixed silicon carbide substrate refers to the pretreated silicon carbide substrate placed in the sample placement unit. The target mixed gas refers to a gas mixture with a certain composition and proportion, which is used to provide the required atmosphere during the annealing process. The target mixed gas can be determined according to the specified preparation process, such as argon gas with a purity of 99%. The silicon carbide substrate to be grown refers to the fixed silicon carbide substrate after the annealing environment is constructed, wherein the annealing environment is constructed by repeatedly evacuating the furnace cavity of the silicon carbide heating furnace through a vacuum unit and filling it with the target mixed gas to remove residual air and moisture in the furnace cavity. The above-mentioned buffer layer growth on the silicon carbide substrate to be grown refers to annealing the silicon carbide substrate to be grown, thereby generating a buffer layer on the surface of the silicon carbide substrate to be grown. This buffer layer is graphene.
[0095] For example, a certain original silicon carbide substrate is a 4H-SiC substrate. First, the 4H-SiC substrate is mechanically polished, and then the mechanically polished 4H-SiC substrate is cut into 3 pieces. 3mm small pieces were ultrasonically cleaned to obtain a pretreated silicon carbide substrate. This pretreated silicon carbide substrate was placed in a sample placement unit, where it served as a fixed silicon carbide substrate. The target mixed gas, determined according to relevant process specifications, was 99% pure argon gas, with a flow rate of 0.1 L / min. Next, the furnace cavity of the silicon carbide furnace containing the fixed silicon carbide substrate was evacuated twice using a vacuum unit. The target mixed gas was then introduced into the furnace cavity according to the flow rate, completing the annealing environment construction. At this point, the fixed silicon carbide... The substrate is the silicon carbide substrate to be grown. The temperature of the silicon carbide substrate to be grown is controlled by a temperature control unit to achieve annealing of the silicon carbide substrate to be grown. Optionally, the annealing is carried out in the following way: the silicon carbide substrate to be grown is heated from room temperature to 1000°C at a heating rate of 325°C / min. After heating to 1000°C, the silicon carbide substrate to be grown is heated to 1550°C at a heating rate of 183°C / min. Finally, the silicon carbide substrate to be grown at 1550°C is naturally cooled to room temperature to complete the growth of the buffer layer. The temperature and heating rate involved in the above annealing process can be set according to the specific process standard.
[0096] S3. Receive the annealing task objective and the set of annealing parameters to be optimized, and construct the annealing task evaluation function based on the annealing task objective.
[0097] It is clear that the annealing task objective refers to the goal of subsequent buffer layer annealing treatment of buffered silicon carbide crystals, such as obtaining high-quality quasi-suspended graphene or studying the hydrogenation effect of silicon carbide crystals. The annealing task evaluation function is a function that quantifies the degree to which a certain annealing parameter (such as a subsequent set of candidate annealing parameters) achieves the annealing task objective. The larger the output value of the annealing task evaluation function, the better the completion effect of the buffer layer annealing treatment performed according to the corresponding annealing parameters (such as a subsequent set of candidate annealing parameters) on the annealing task objective.
[0098] In detail, the step of constructing the annealing task evaluation function based on the annealing task objective includes:
[0099] An annealing evaluation feature set is constructed, which includes: crystal morphology features, Raman spectral features, and photoelectronic features;
[0100] A feature weight set is set based on the annealing task objective, wherein the sum of the weights of each feature in the feature weight set is 1;
[0101] An evaluation function for the annealing task is constructed using the feature weight set and the annealing evaluation feature set.
[0102] It should be explained that the annealing evaluation feature set refers to a collection of multiple annealing evaluation features, wherein the annealing evaluation features are crystal morphology features, Raman spectral features, or photoelectronic features. The crystal morphology features refer to the features representing the microscopic geometric morphology of the silicon carbide crystal surface. These crystal morphology features are extracted from the crystal morphology image. The acquisition method and meaning of the crystal morphology image are the same as those of the subsequent test crystal morphology image. Optionally, surface roughness is extracted from the crystal morphology image and used as the crystal morphology feature. Surface roughness refers to a quantitative value reflecting the degree of height fluctuation on the silicon carbide crystal surface. The larger the surface roughness, the more uneven and defective the silicon carbide crystal surface, i.e., the smaller the output value of the annealing task evaluation function. The surface roughness is extracted by calculating the mean square error of the pixel values of each pixel in the crystal morphology image; this mean square error is the surface roughness. The pixel value of each pixel in the crystal morphology image represents the height value. The Raman spectral features refer to the characteristics representing the defect density of silicon carbide crystals. These Raman spectral features are extracted from Raman spectra, and the method of obtaining these Raman spectra is the same as that of obtaining the subsequent crystal Raman spectra.
[0103] Optionally, the ID / IG ratio is extracted from the Raman spectrum. This ID / IG ratio is a Raman spectral characteristic, referring to the ratio of the peak intensities of the ld peak to the lg peak in the Raman spectrum. A larger ID / IG ratio indicates a higher defect density in the silicon carbide crystal (i.e., a more disordered lattice arrangement in the silicon carbide crystal), resulting in a smaller annealing task evaluation function. The photoelectronic characteristics refer to the features representing the distribution of chemical composition on the surface of the silicon carbide crystal. These photoelectronic characteristics are extracted from the photoelectron spectrum of the silicon carbide crystal, and the method for obtaining the photoelectron spectrum here is the same as the method for obtaining the subsequent crystal photoelectron spectrum.
[0104] Preferably, the Si-C peak area ratio or CO peak area ratio is extracted from the photoelectron spectroscopy. The Si-C peak area ratio refers to the proportion of the peak area attributable to Si-C bonds (i.e., the portion corresponding to 283.0~283.8 eV) in the C1s spectrum of the photoelectron spectroscopy to the total peak area of the C1s spectrum. A larger Si-C peak area ratio indicates a less complete buffer layer coverage of the silicon carbide crystal, resulting in a smaller output value of the annealing task evaluation function. The CO peak area ratio refers to the proportion of the peak area attributable to CO bonds (i.e., the portion corresponding to 286 eV) in the C1s spectrum of the photoelectron spectroscopy to the total peak area of the C1s spectrum. A larger CO peak area ratio indicates more severe oxidation of the silicon carbide crystal surface, resulting in a smaller output value of the annealing task evaluation function. The feature weight set refers to a collection of multiple feature weights, where each feature weight refers to the calculated weight of a specific annealing evaluation feature in the annealing evaluation feature set. The specific method for setting the feature weight set based on the annealing task objective is as follows: The specific weights for different annealing evaluation features are assigned according to the annealing task objective. For example, if the annealing task objective is to obtain high-quality quasi-suspended graphene, the main focus is on whether the silicon carbide crystal has few defects and whether the buffer layer is completely decoupled. In this case, the feature weights for Raman spectral features (such as the ID / IG ratio) can be set to 0.5, photoelectronic features (such as the Si-C peak area ratio) to 0.3, and crystal morphology features (such as surface roughness) to 0.2. If the annealing task objective is to study the hydrogenation effect of silicon carbide crystals, the feature weights corresponding to Raman spectral features can be increased while the feature weights corresponding to photoelectronic features can be decreased.
[0105] Furthermore, the specific method for constructing the annealing task evaluation function using the feature weight set and the annealing evaluation feature set is as follows: First, normalize each annealing evaluation feature in the annealing evaluation feature set. Min-Max normalization can be used for normalization, where normalization can be performed within a set feature range. Then, subtract the normalized annealing evaluation feature from the value 1 and multiply it by the corresponding feature weight. The multiplied values are then accumulated, and the accumulated result is the output value of the annealing task evaluation function.
[0106] For example, given a candidate annealing parameter set with a surface roughness of 0.35 nm, an ID / IG ratio of 0.59, and a Si-C peak area ratio of 0.08, the normalized surface roughness, ID / IG ratio, and Si-C peak area ratio are 0.182, 0.255, and 0.462, respectively. With set feature weights of 0.2, 0.5, and 0.3, the output value of the annealing task evaluation function is: .
[0107] S4. Optimize the annealing parameter set to be optimized using the annealing task evaluation function to obtain the optimal annealing parameter set.
[0108] Understandably, the set of annealing parameters to be optimized refers to a collection of multiple annealing parameters to be optimized. These parameters refer to the annealing parameters used in the subsequent buffer layer annealing treatment of the silicon carbide crystal to be annealed. Optionally, these parameters may include the highest annealing temperature (e.g., the target highest temperature), the holding time at the highest temperature, the heating rate, and the annealing pressure. The set of optimal annealing parameters refers to a collection of multiple optimal annealing parameters. These optimal annealing parameters refer to the optimized annealing parameters.
[0109] In detail, the optimization of the annealing parameter set to be optimized using the annealing task evaluation function to obtain the optimal annealing parameter set includes:
[0110] The annealing parameters to be optimized are extracted sequentially from the set of annealing parameters to be optimized. The extracted annealing parameters to be optimized are numerically set based on the preset parameter constraint range to obtain the set of annealing parameters to be tested.
[0111] The test annealing parameter set is obtained by summarizing the test annealing parameter sets corresponding to the annealing parameters to be optimized.
[0112] Response surface selection is performed based on the set of annealing parameters to be tested, resulting in multiple candidate annealing parameter sets;
[0113] Calculate multiple candidate evaluation values based on multiple candidate annealing parameter sets and annealing task evaluation functions;
[0114] A second-order polynomial fitting is performed based on multiple candidate evaluation values and multiple candidate annealing parameter sets to obtain a second-order annealing evaluation model.
[0115] The optimal parameter set is obtained by searching for the optimal parameters based on the second-order annealing evaluation model.
[0116] Furthermore, the parameter constraint range refers to the normal range of a certain annealing parameter to be optimized, which is set manually. This parameter constraint range can be set by the numerical range of the corresponding annealing parameter to be optimized in previous annealing processes or by relevant industry standards. The test annealing parameter set refers to a set of multiple discrete values selected at equal intervals within the parameter constraint range, and each discrete value is a test annealing parameter. The candidate annealing parameter set refers to a set of multiple candidate annealing parameters selected through response surface methodology. The candidate annealing parameters in this set correspond one-to-one with the annealing parameters to be optimized in the set of annealing parameters to be optimized. Response surface methodology selection refers to selecting parameters from each test annealing parameter set in the test annealing parameter set using experimental design methods such as CCD (Central Design Computation) or Box-Behnken design, thereby forming multiple candidate annealing parameter sets. The second-order annealing evaluation model refers to a quadratic polynomial regression model with candidate annealing parameters as independent variables and candidate evaluation values as dependent variables.
[0117] Optionally, the above-mentioned second-order polynomial fitting based on multiple candidate evaluation values and multiple candidate annealing parameter sets refers to: using the least squares method to perform multivariate nonlinear regression on the candidate annealing parameter sets and corresponding candidate evaluation values, thereby solving for each regression coefficient in the quadratic polynomial regression model. The quadratic polynomial regression model after solving is the second-order annealing evaluation model. The specific method for finding the optimal parameters based on the second-order annealing evaluation model includes: calculating multiple partial derivatives of the second-order annealing evaluation model, constructing a system of zero-solution equations based on each partial derivative, solving the system of zero-solution equations, and obtaining the stationary point. The specific parameters of each annealing parameter to be optimized corresponding to the stationary point are the optimal annealing parameter set.
[0118] Optionally, specific methods for calculating multiple candidate evaluation values based on multiple candidate annealing parameter sets and annealing task evaluation functions include:
[0119] For each of the multiple candidate annealing parameter sets, perform the following operation:
[0120] Based on the candidate annealing parameter set, a buffer layer annealing test was performed to obtain the silicon carbide crystal to be evaluated.
[0121] The annealing task evaluation function is used to evaluate the silicon carbide crystal to be evaluated, and candidate evaluation values are obtained.
[0122] The candidate evaluation values corresponding to each candidate annealing parameter set are summarized to obtain multiple candidate evaluation values.
[0123] It should be explained that the silicon carbide crystal to be evaluated refers to the silicon carbide crystal after undergoing a buffer layer annealing test. The buffer layer annealing test, performed according to a set of candidate annealing parameters, means that the silicon carbide crystal to be evaluated is annealed according to each candidate annealing parameter in the set. This annealing operation is the same as the subsequent buffer layer annealing process, thus obtaining the silicon carbide crystal to be evaluated. Here, the silicon carbide crystal to be evaluated refers to the silicon carbide crystal used for the buffer layer annealing test, and this silicon carbide crystal to be evaluated has already had a buffer layer constructed through the aforementioned buffer layer growth steps. Furthermore, to ensure that each silicon carbide crystal to be evaluated undergoes the same buffer layer annealing test, the silicon carbide crystal to be evaluated is not subjected to air exposure treatment or subjected to air exposure treatment for the same duration for each silicon carbide crystal to be evaluated. The candidate evaluation value refers to the numerical value that quantifies the defects of the silicon carbide crystal to be evaluated. The specific evaluation method is as follows: First, data is collected on the silicon carbide crystal to be evaluated based on the annealing evaluation feature set to obtain the specific values corresponding to each annealing evaluation feature. These specific values are then substituted into the annealing task evaluation function. The output value of the annealing task evaluation function after substitution is the candidate evaluation value.
[0124] S5. Based on the optimal annealing parameter set, perform buffer layer exposure discrimination on the buffer silicon carbide crystal to obtain the exposure discrimination result, where the exposure discrimination result is: air exposure treatment or non-exposure treatment.
[0125] It is clear that the exposure discrimination result refers to the result obtained after the buffer layer exposure discrimination. Among them, air exposure treatment means that before performing buffer layer annealing treatment on the buffer silicon carbide crystal, it is necessary to place the buffer silicon carbide crystal in the air environment for a specific period of time, such as the subsequent test exposure time. Non-exposure treatment means that the above placement process is not required before performing buffer layer annealing treatment on the buffer silicon carbide crystal. Since the buffer layer on the surface of the silicon carbide crystal has high surface activity and chemical potential after the growth of the buffer layer (i.e., the aforementioned buffer silicon carbide crystal), if the buffer silicon carbide crystal is exposed to air, the buffer layer will rapidly adsorb oxygen, water vapor, and hydrocarbons to form an adsorption layer. This adsorption layer will accelerate the intercalation reaction of hydrogen atoms to the interface between the buffer layer and the silicon carbide substrate during the subsequent buffer layer annealing process, thereby promoting the transformation of the buffer layer into quasi-suspended graphene and improving the annealing efficiency. If the annealing task is to conduct related research on silicon carbide crystals, such as the hydrogenation effect of silicon carbide crystals, it is necessary to avoid interference from external impurities. That is, under this annealing task objective, the air exposure time should be reduced or air exposure should be eliminated.
[0126] In detail, the step of performing buffer layer exposure discrimination on the buffered silicon carbide crystal based on the optimal annealing parameter set to obtain the exposure discrimination result includes:
[0127] Define a test exposure duration set, which includes multiple test exposure durations;
[0128] Test exposure durations are extracted sequentially from the test exposure duration set, and buffer layer annealing tests are performed based on the extracted test exposure durations to obtain crystal defect curves;
[0129] The crystal defect curves corresponding to each test exposure duration are summarized to obtain a set of crystal defect curves;
[0130] The target maximum temperature of the buffer silicon carbide crystal is determined based on the optimal annealing parameter set.
[0131] Based on the target maximum temperature, coordinate indexing is performed on the crystal defect curve set to obtain the target defect coordinate point set, which includes multiple target defect coordinate points;
[0132] Exposure discrimination results are generated based on the target defect coordinate point set.
[0133] It should be explained that the test exposure duration set refers to a collection of multiple test exposure durations, where the test exposure duration refers to the selected air exposure duration during previous production or experimental processes of silicon carbide crystals, such as: 0 minutes (no air exposure), 30 minutes, 2 hours, 6 hours, 24 hours, and 72 hours. The aforementioned crystal defect curve refers to the curve showing the relationship between the maximum annealing temperature and the crystal defect factor. The horizontal and vertical axes of this crystal defect curve represent the maximum annealing temperature and the crystal defect factor, respectively. The specific methods for obtaining the maximum annealing temperature and the crystal defect factor will be given in subsequent embodiments. The target maximum temperature refers to the highest annealing temperature of the optimal annealing parameter set buffered silicon carbide crystal in the subsequent buffer layer annealing step. The target defect coordinate point set refers to a collection of multiple target defect coordinate points, where each target defect coordinate point refers to the coordinate point on a certain crystal defect curve corresponding to the target maximum temperature.
[0134] Specifically, the step of performing a buffer layer annealing test based on the extracted test exposure time to obtain a crystal defect curve includes:
[0135] The pre-constructed test silicon carbide crystal is exposed to air based on the test exposure time to obtain the test crystal to be annealed, wherein the test silicon carbide crystal contains a buffer layer;
[0136] The preset initial maximum temperature is recorded as the maximum annealing temperature;
[0137] The test crystal to be annealed was annealed using a silicon carbide heating furnace and the highest annealing temperature to obtain the annealed test crystal.
[0138] Defect identification is performed on the annealed test crystal to obtain defect data of the test crystal;
[0139] The maximum annealing temperature is updated based on the preset temperature change value to obtain the updated annealing temperature;
[0140] The updated annealing temperature is used as the initial maximum temperature, and the step of exposing the pre-built test silicon carbide crystal to air based on the test exposure time is returned until the maximum annealing temperature is fully covered.
[0141] The highest annealing temperature and test crystal defect data are summarized separately to obtain the highest annealing temperature set and the test crystal defect dataset.
[0142] Crystal defect curves are constructed based on the highest annealing temperature set and the test crystal defect dataset.
[0143] It should be explained that the test silicon carbide crystal refers to the silicon carbide crystal used for air exposure, and the method of obtaining this test silicon carbide crystal is the same as that of obtaining the buffer silicon carbide crystal described above. The test crystal to be annealed refers to the test silicon carbide crystal after completing the air exposure for the test exposure time. The initial maximum temperature refers to the highest annealing temperature at the beginning of annealing the test crystal to be annealed, wherein the maximum annealing temperature refers to the highest temperature reached during the annealing process. This maximum annealing temperature can be set to the minimum value of the parameter constraint range corresponding to the maximum annealing temperature or set by relevant operators based on previous annealing experience. The aforementioned annealing process for the crystal to be annealed refers to annealing the crystal using other parameters from the optimal annealing parameter set to obtain the annealed test crystal. Here, "other parameters" refers to the optimal annealing parameters other than the highest annealing temperature; that is, replacing the optimal annealing parameter here with the highest annealing temperature, making the highest annealing temperature a unique variable. Furthermore, the optimal annealing parameter set contains multiple optimal annealing parameters, one of which is the highest annealing temperature. To ensure that the highest annealing temperature is a unique variable, it can be continuously changed. This scheme updates the highest annealing temperature based on a preset temperature change value, thus changing the highest annealing temperature. The changed highest annealing temperature then replaces the optimal annealing parameter corresponding to the highest annealing temperature in the optimal annealing parameter set, and the aforementioned annealing process is performed based on the replaced optimal annealing parameter set. Since the highest annealing temperature has a significant impact on the decoupling degree and hydrogenation degree of the buffer layer, test crystal defect data of silicon carbide crystals annealed at different highest annealing temperatures are obtained. The test crystal defect data refers to the collection of test crystal morphological characteristics, test crystal spectral characteristics, and test crystal distribution characteristics.
[0144] Furthermore, the temperature change value refers to a manually set temperature value used to update the maximum annealing temperature. This temperature change value can be set according to the precision of the specific operation; the higher the precision, the smaller the temperature change value. The updated annealing temperature refers to the updated maximum annealing temperature. Updating means adding the temperature change value to the maximum annealing temperature, and the result is the updated annealing temperature. The maximum annealing temperature coverage means that all updated maximum annealing temperatures cover the parameter constraint range corresponding to the maximum annealing temperature.
[0145] In detail, the defect identification of the annealed test crystal to obtain test crystal defect data includes:
[0146] Microscopic scanning was performed on the annealed test crystal to obtain the crystal morphology image;
[0147] Based on the test crystal morphology image, crystal morphology features are extracted to obtain the test crystal morphology features;
[0148] The Raman spectrum of the annealed test crystal was obtained by laser emission from a pre-constructed laser generator.
[0149] Spectral features were extracted from the crystal Raman spectrum to obtain the spectral features of the test crystal.
[0150] X-ray emission was performed on the annealed test crystal to obtain the crystal photoelectron spectrum;
[0151] The elemental distribution characteristics of the crystal are extracted based on the crystal photoelectron spectroscopy to obtain the distribution characteristics of the test crystal.
[0152] By combining the morphological characteristics, spectral characteristics, and distribution characteristics of the test crystal, the defect data of the test crystal are obtained.
[0153] It should be explained that the test crystal morphology image refers to the image obtained after microscopic scanning of the annealed test crystal. This test crystal morphology image shows the height distribution at various locations in the annealed test crystal. The microscopic scanning step described above can be performed using atomic force microscopy (AFM) or scanning electron microscopy (SEM). The test crystal morphology features refer to the characteristics representing the microscopic geometric morphology of the annealed test crystal surface. The method for obtaining these test crystal morphology features is the same as that used in step S3 above. The laser generating device refers to the device used to emit laser light onto the annealed test crystal to obtain its Raman spectrum. The crystal Raman spectrum refers to the scattering spectrum generated by the annealed test crystal under laser excitation. The test crystal spectral features refer to the characteristics representing the defect density of the annealed test crystal. The method for obtaining these test crystal spectral features is the same as that used in step S3 above. The crystal photoelectron spectrum refers to the photoelectron spectrum (XPS) of the annealed test crystal. The test crystal distribution characteristics refer to the characteristics representing the distribution of chemical composition on the surface of the annealed test crystal. The extraction method of the test crystal distribution characteristics is the same as the extraction method of the photoelectronic characteristics in step S3 above.
[0154] In detail, the construction of crystal defect curves based on the highest annealing temperature set and the test crystal defect dataset includes:
[0155] For each test crystal defect data point in the test crystal defect dataset, perform the following operation:
[0156] Defect evaluation is performed based on the test crystal morphology, spectral characteristics, and distribution characteristics in the test crystal defect data to obtain the crystal defect factor;
[0157] By summarizing the crystal defect factors, a set of crystal defect factors is obtained;
[0158] The crystal defect curve is obtained by curve fitting based on the set of highest annealing temperatures and the set of crystal defect factors. The horizontal and vertical axes of the crystal defect curve represent the highest annealing temperature and the crystal defect factor, respectively.
[0159] It should be explained that the crystal defect factor refers to the quantitative value of defects in the annealed crystal. The larger the crystal defect factor, the more severe the defects in the annealed crystal. Optionally, the specific steps of the above defect evaluation are as follows: First, substitute the morphological characteristics, spectral characteristics, and distribution characteristics of the test crystal into the above annealing task evaluation function to obtain the function output value. Finally, perform negative correlation on the function output value to obtain the crystal defect factor. Negative correlation refers to the step of making the crystal defect factor inversely proportional to the function output value, such as taking a negative value or an inverse ratio. The above curve fitting based on the highest annealing temperature set and the crystal defect factor set refers to using the least squares polynomial regression method, with the highest annealing temperature as the independent variable and the crystal defect factor as the dependent variable, to construct a smooth curve, which is the crystal defect curve.
[0160] In detail, the generation of exposure discrimination results based on the target defect coordinate point set includes:
[0161] The target defect coordinates are extracted sequentially from the target defect coordinate set, and the target crystal defect factor and target exposure time corresponding to the extracted target defect coordinates are identified respectively.
[0162] The target crystal defect factor and the target exposure time are normalized to obtain the crystal defect coefficient and the consumption time coefficient.
[0163] The comprehensive discrimination factor is calculated based on the crystal defect coefficient and the consumption time coefficient.
[0164] The comprehensive discrimination factors corresponding to the coordinate points of each target defect are summarized to obtain the comprehensive discrimination factor set;
[0165] Identify the largest discriminant factor in the comprehensive discriminant factor set, and record the target exposure duration corresponding to the largest discriminant factor as the optimal exposure duration;
[0166] Exposure discrimination results are generated based on the optimal exposure duration.
[0167] It should be explained that the target crystal defect factor refers to the ordinate value corresponding to the target defect coordinate point. The target exposure time refers to the abscissa value corresponding to the target defect coordinate point. The crystal defect coefficient refers to the normalized target crystal defect factor, wherein the normalization method is as follows: obtain the ordinate values corresponding to each target defect coordinate point in the target defect coordinate point set, and the maximum and minimum values among these ordinate values constitute the normalized numerical range. Within this normalized numerical range, the target crystal defect factor is normalized to its minimum and maximum values. The consumption time coefficient refers to the normalized target exposure time, and the normalization method is the same as that of the target crystal defect factor mentioned above, and will not be repeated here. The comprehensive discrimination factor refers to a value that quantifies the quality of the target exposure time. The larger the comprehensive discrimination factor, the fewer defects in the silicon carbide crystal produced after buffer layer annealing under the corresponding target exposure time, or the less air exposure time is required, and the higher the overall buffer layer annealing efficiency.
[0168] Furthermore, the specific method for calculating the comprehensive discrimination factor based on the crystal defect coefficient and consumption time coefficient is as follows: ,in, Indicates the comprehensive discriminant factor. and These represent the calculated weights of the crystal defect coefficient and the consumption time coefficient, respectively. The sum of these calculated weights is 1, and is set by the relevant operators, with a default value of 0.5. The maximum discriminant factor refers to the comprehensive discriminant factor with the largest value in the set of comprehensive discriminant factors. The above-mentioned generation of exposure discrimination results based on optimal exposure time means that: if the optimal exposure time is not 0, then air exposure treatment is recorded as the exposure discrimination result; if the optimal exposure time is 0, then non-exposure treatment is recorded as the exposure discrimination result.
[0169] S6. If the exposure determination result is air exposure treatment, then the buffer silicon carbide crystal is exposed to obtain silicon carbide crystal to be annealed.
[0170] It is clear that the silicon carbide crystal to be annealed refers to the buffered silicon carbide crystal after exposure treatment, wherein the exposure treatment means: exposing the buffered silicon carbide crystal to air for exposure for an optimal duration.
[0171] S7. If the exposure determination result is non-exposure treatment, then the buffer silicon carbide crystal will be used as the silicon carbide crystal to be annealed.
[0172] Understandably, when the exposure determination result is non-exposure treatment, the buffer silicon carbide crystal can be directly subjected to subsequent buffer layer annealing treatment, that is, at this time the buffer silicon carbide crystal is the silicon carbide crystal to be annealed.
[0173] S8. Using a silicon carbide heating furnace and the optimal annealing parameter set, a buffer layer annealing treatment is performed on the silicon carbide crystal to be annealed to obtain the target silicon carbide crystal, thus completing the silicon carbide crystal annealing.
[0174] It is clear that the target silicon carbide crystal refers to the silicon carbide crystal to be annealed after the buffer layer annealing process has been completed.
[0175] Optionally, the specific steps of the above-mentioned buffer layer annealing treatment include: placing the silicon carbide crystal to be annealed in the sample placement unit, and using the vacuum unit to evacuate the placed silicon carbide crystal twice. After evacuation, the furnace cavity of the silicon carbide heating furnace is replaced with argon-hydrogen gas, and the gas pressure in the furnace cavity is maintained at one atmosphere. The hydrogen in the argon-hydrogen gas is 4 vol%, and the gas flow rate of the argon-hydrogen gas is 0.15 L / min. The furnace cavity is heated within 2 minutes, so that the temperature in the furnace cavity rises to 800°C, and is maintained at this temperature for 20 minutes. After that, the silicon carbide crystal to be annealed at this temperature is allowed to cool naturally. After cooling, the buffer layer annealing operation is completed.
[0176] To address the problems described in the background section, this invention first constructs a buffer layer on a pristine silicon carbide substrate using a silicon carbide heating furnace. Through pretreatment, annealing environment construction, and buffer layer growth, a graphene buffer layer covalently bonded to the substrate is formed on the surface of the pristine silicon carbide substrate. Furthermore, an annealing task evaluation function is constructed based on the annealing task objectives, integrating three features: crystal morphology, Raman spectroscopy, and photoelectronic characteristics. The feature weight set reflects the degree of emphasis placed on each feature by different annealing task objectives, thus demonstrating high adaptability to various annealing tasks. This scheme also selects multiple candidate annealing parameter sets through response surface methodology and calculates candidate evaluation values. Then, a second-order annealing evaluation model is fitted and stationary points are solved to determine the optimal annealing parameter combination that maximizes the output value of the annealing task evaluation function, thereby achieving automated optimization of annealing parameters. Finally, this invention constructs crystal defect curves by conducting annealing tests at different exposure durations, and uses coordinate indexing based on the target maximum temperature in the optimal annealing parameters. A comprehensive discrimination factor is then calculated by weighting the crystal defect coefficient and the consumption time coefficient to ultimately determine the optimal exposure duration. This allows for the determination of whether air exposure treatment is necessary and, if so, the specific exposure duration. Therefore, this invention can improve the matching degree between annealing parameters and annealing task objectives, and reduce the defect density of silicon carbide crystals after annealing.
[0177] like Figure 2 The diagram shown is a functional block diagram of a silicon carbide crystal annealing system based on in-situ defect healing provided in an embodiment of the present invention.
[0178] The silicon carbide crystal annealing system 100 based on in-situ defect healing described in this invention can be installed in electronic devices. Depending on the functions implemented, the silicon carbide crystal annealing system 100 may include a buffer layer growth module 101, an annealing parameter generation module 102, a silicon carbide air exposure module 103, and a buffer layer annealing module 104. The module described in this invention can also be referred to as a unit, which refers to a series of computer program segments that can be executed by the processor of an electronic device and can perform a fixed function, and which are stored in the memory of the electronic device.
[0179] The buffer layer growth module 101 is used to construct a silicon carbide heating furnace, wherein the silicon carbide heating furnace includes a vacuum unit and a sample placement unit. The silicon carbide heating furnace is used to construct a buffer layer on the pre-acquired original silicon carbide substrate to obtain a buffered silicon carbide crystal.
[0180] The annealing parameter generation module 102 is used to receive the annealing task objective and the set of annealing parameters to be optimized, construct an annealing task evaluation function according to the annealing task objective, and use the annealing task evaluation function to optimize the set of annealing parameters to be optimized to obtain the optimal annealing parameter set.
[0181] The silicon carbide air exposure module 103 is used to perform buffer layer exposure discrimination on the buffer silicon carbide crystal based on the optimal annealing parameter set, and obtain the exposure discrimination result. The exposure discrimination result is: air exposure treatment or non-exposure treatment. If the exposure discrimination result is air exposure treatment, the buffer silicon carbide crystal is exposed to obtain the silicon carbide crystal to be annealed. If the exposure discrimination result is non-exposure treatment, the buffer silicon carbide crystal is used as the silicon carbide crystal to be annealed.
[0182] The buffer layer annealing module 104 is used to perform buffer layer annealing treatment on the silicon carbide crystal to be annealed using a silicon carbide heating furnace and an optimal annealing parameter set, so as to obtain the target silicon carbide crystal.
[0183] In detail, the modules in the silicon carbide crystal annealing system 100 based on in-situ defect healing described in this embodiment of the invention employ the same methods as described above during use. Figure 1 The method used is the same as the silicon carbide crystal annealing method based on in-situ defect healing described in the previous section, and can produce the same technical effect, so it will not be repeated here.
[0184] like Figure 3 The diagram shown is a schematic representation of an electronic device that implements a silicon carbide crystal annealing method based on in-situ defect healing, according to an embodiment of the present invention.
[0185] The electronic device 1 may include a processor 10, a memory 11 and a bus 12, and may also include a computer program stored in the memory 11 and executable on the processor 10, such as a silicon carbide crystal annealing method program based on in-situ defect healing.
[0186] The memory 11 includes at least one type of readable storage medium, such as flash memory, portable hard drive, multimedia card, card-type memory (e.g., SD or DX memory), magnetic memory, disk, optical disk, etc. In some embodiments, the memory 11 can be an internal storage unit of the electronic device 1, such as a portable hard drive. In other embodiments, the memory 11 can be an external storage device of the electronic device 1, such as a plug-in portable hard drive, smart media card (SMC), secure digital card (SD), flash card, etc., equipped on the electronic device 1. Furthermore, the memory 11 includes both internal storage units and external storage devices of the electronic device 1. The memory 11 can be used not only to store application software and various types of data installed on the electronic device 1, such as the code of a silicon carbide crystal annealing method program based on in-situ defect healing, but also to temporarily store data that has been output or will be output.
[0187] In some embodiments, the processor 10 may be composed of integrated circuits, such as a single packaged integrated circuit or multiple integrated circuits with the same or different functions, including combinations of one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips. The processor 10 is the control unit of the electronic device, connecting various components of the entire electronic device through various interfaces and lines. It executes programs or modules stored in the memory 11 (e.g., a silicon carbide crystal annealing method program based on in-situ defect healing) and calls data stored in the memory 11 to perform various functions of the electronic device 1 and process data.
[0188] The bus 12 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus 12 can be divided into an address bus, a data bus, a control bus, etc. The bus 12 is configured to realize the connection and communication between the memory 11 and at least one processor 10, etc.
[0189] Figure 3 Only electronic devices with components are shown; it will be understood by those skilled in the art that... Figure 3 The structure shown does not constitute a limitation on the electronic device 1, and may include fewer or more components than shown, or combine certain components, or have different component arrangements.
[0190] For example, although not shown, the electronic device 1 may also include a power supply (such as a battery) to power the various components. Preferably, the power supply can be logically connected to the at least one processor 10 through a power management device, thereby enabling functions such as charging management, discharging management, and power consumption management. The power supply may also include one or more DC or AC power supplies, recharging devices, power fault detection circuits, power converters or inverters, power status indicators, and other arbitrary components. The electronic device 1 may also include various sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be described in detail here.
[0191] Furthermore, the electronic device 1 may also include a network interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a Wi-Fi interface, a Bluetooth interface, etc.), which is typically used to establish communication connections between the electronic device 1 and other electronic devices.
[0192] Optionally, the electronic device 1 may further include a user interface, which may be a display, an input unit (such as a keyboard), and optionally, a standard wired interface or a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen, etc. The display may also be appropriately referred to as a screen or display unit, used to display information processed in the electronic device 1 and to display a visual user interface.
[0193] The silicon carbide crystal annealing method program based on in-situ defect healing, stored in the memory 11 of the electronic device 1, is a combination of multiple instructions. When run in the processor 10, it can achieve the following:
[0194] Construct a silicon carbide heating furnace, which includes: a vacuum unit and a sample placement unit;
[0195] A buffer layer was constructed on the pre-obtained raw silicon carbide substrate using a silicon carbide heating furnace to obtain buffered silicon carbide crystals;
[0196] Receive the annealing task objective and the set of annealing parameters to be optimized, and construct the annealing task evaluation function based on the annealing task objective;
[0197] The optimal annealing parameter set is obtained by optimizing the annealing parameter set to be optimized using the annealing task evaluation function.
[0198] Based on the optimal annealing parameter set, the buffer layer exposure of the buffer silicon carbide crystal is determined, and the exposure determination result is: air exposure treatment or non-exposure treatment.
[0199] If the exposure determination result is air exposure treatment, then the buffer silicon carbide crystal is exposed to air to obtain the silicon carbide crystal to be annealed.
[0200] If the exposure determination result is non-exposure treatment, then the buffer silicon carbide crystal will be used as the silicon carbide crystal to be annealed.
[0201] A buffer layer annealing treatment was performed on the silicon carbide crystal to be annealed using a silicon carbide heating furnace and an optimal annealing parameter set to obtain the target silicon carbide crystal, thus completing the silicon carbide crystal annealing.
[0202] Specifically, the processor 10's implementation method for the above instructions can be found in [reference needed]. Figures 1 to 3 The descriptions of the relevant steps in the corresponding embodiments are not repeated here.
[0203] Furthermore, if the modules / units integrated in the electronic device 1 are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. The computer-readable storage medium can be volatile or non-volatile. For example, the computer-readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, or a read-only memory (ROM).
[0204] The present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor of an electronic device, can perform the following:
[0205] Construct a silicon carbide heating furnace, which includes: a vacuum unit and a sample placement unit;
[0206] A buffer layer was constructed on the pre-obtained raw silicon carbide substrate using a silicon carbide heating furnace to obtain buffered silicon carbide crystals;
[0207] Receive the annealing task objective and the set of annealing parameters to be optimized, and construct the annealing task evaluation function based on the annealing task objective;
[0208] The optimal annealing parameter set is obtained by optimizing the annealing parameter set to be optimized using the annealing task evaluation function.
[0209] Based on the optimal annealing parameter set, the buffer layer exposure of the buffer silicon carbide crystal is determined, and the exposure determination result is: air exposure treatment or non-exposure treatment.
[0210] If the exposure determination result is air exposure treatment, then the buffer silicon carbide crystal is exposed to air to obtain the silicon carbide crystal to be annealed.
[0211] If the exposure determination result is non-exposure treatment, then the buffer silicon carbide crystal will be used as the silicon carbide crystal to be annealed.
[0212] A buffer layer annealing treatment was performed on the silicon carbide crystal to be annealed using a silicon carbide heating furnace and an optimal annealing parameter set to obtain the target silicon carbide crystal, thus completing the silicon carbide crystal annealing.
[0213] In the embodiments provided by this invention, it should be understood that the disclosed devices, systems, and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative, and actual implementations may have other classification methods.
[0214] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0215] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional modules.
[0216] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.
[0217] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.
Claims
1. A silicon carbide crystal annealing method based on in-situ defect healing, characterized in that, The method includes: Construct a silicon carbide heating furnace, which includes: a vacuum unit and a sample placement unit; A buffer layer was constructed on the pre-obtained raw silicon carbide substrate using a silicon carbide heating furnace to obtain buffered silicon carbide crystals; Receive the annealing task objective and the set of annealing parameters to be optimized, and construct the annealing task evaluation function based on the annealing task objective; The optimal annealing parameter set is obtained by optimizing the annealing parameter set to be optimized using the annealing task evaluation function. Based on the optimal annealing parameter set, the buffer layer exposure of the buffer silicon carbide crystal is determined, and the exposure determination result is: air exposure treatment or non-exposure treatment. If the exposure determination result is air exposure treatment, then the buffer silicon carbide crystal is exposed to air to obtain the silicon carbide crystal to be annealed. If the exposure determination result is non-exposure treatment, then the buffer silicon carbide crystal will be used as the silicon carbide crystal to be annealed. A buffer layer annealing treatment was performed on the silicon carbide crystal to be annealed using a silicon carbide heating furnace and an optimal annealing parameter set to obtain the target silicon carbide crystal, thus completing the silicon carbide crystal annealing.
2. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 1, characterized in that, The process of constructing a buffer layer on a pre-obtained raw silicon carbide substrate using a silicon carbide heating furnace to obtain a buffered silicon carbide crystal includes: The original silicon carbide substrate is pretreated to obtain a pretreated silicon carbide substrate. The pretreatment includes polishing, cutting and ultrasonic treatment. A pretreated silicon carbide substrate is placed in a sample placement unit in a silicon carbide heating furnace to obtain a fixed silicon carbide substrate; An annealing environment was constructed for a fixed silicon carbide substrate using a vacuum unit and a preset target mixed gas to obtain the silicon carbide substrate to be grown. A buffer layer is grown on the silicon carbide substrate to be grown, resulting in a buffered silicon carbide crystal.
3. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 2, characterized in that, The step of constructing the annealing task evaluation function based on the annealing task objective includes: An annealing evaluation feature set is constructed, which includes: crystal morphology features, Raman spectral features, and photoelectronic features; A feature weight set is set based on the annealing task objective, wherein the sum of the weights of each feature in the feature weight set is 1; An evaluation function for the annealing task is constructed using the feature weight set and the annealing evaluation feature set.
4. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 3, characterized in that, The process of optimizing the annealing parameter set using the annealing task evaluation function to obtain the optimal annealing parameter set includes: The annealing parameters to be optimized are extracted sequentially from the set of annealing parameters to be optimized. The extracted annealing parameters to be optimized are numerically set based on the preset parameter constraint range to obtain the set of annealing parameters to be tested. The test annealing parameter set is obtained by summarizing the test annealing parameter sets corresponding to the annealing parameters to be optimized. Response surface selection is performed based on the set of annealing parameters to be tested, resulting in multiple candidate annealing parameter sets; Calculate multiple candidate evaluation values based on multiple candidate annealing parameter sets and annealing task evaluation functions; A second-order polynomial fitting is performed based on multiple candidate evaluation values and multiple candidate annealing parameter sets to obtain a second-order annealing evaluation model. The optimal parameter set is obtained by searching for the optimal parameters based on the second-order annealing evaluation model.
5. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 4, characterized in that, The method of determining the exposure of the buffer layer of the buffered silicon carbide crystal based on the optimal annealing parameter set, and obtaining the exposure determination result, includes: Define a test exposure duration set, which includes multiple test exposure durations; Test exposure durations are extracted sequentially from the test exposure duration set, and buffer layer annealing tests are performed based on the extracted test exposure durations to obtain crystal defect curves; The crystal defect curves corresponding to each test exposure duration are summarized to obtain a set of crystal defect curves; The target maximum temperature of the buffer silicon carbide crystal is determined based on the optimal annealing parameter set. Based on the target maximum temperature, coordinate indexing is performed on the crystal defect curve set to obtain the target defect coordinate point set, which includes multiple target defect coordinate points; Exposure discrimination results are generated based on the target defect coordinate point set.
6. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 5, characterized in that, The buffer layer annealing test based on the extracted test exposure time is used to obtain the crystal defect curve, including: The pre-constructed test silicon carbide crystal is exposed to air based on the test exposure time to obtain the test crystal to be annealed, wherein the test silicon carbide crystal contains a buffer layer; The preset initial maximum temperature is recorded as the maximum annealing temperature; The test crystal to be annealed was annealed using a silicon carbide heating furnace and the highest annealing temperature to obtain the annealed test crystal. Defect identification is performed on the annealed test crystal to obtain defect data of the test crystal; The maximum annealing temperature is updated based on the preset temperature change value to obtain the updated annealing temperature; The updated annealing temperature is used as the initial maximum temperature, and the step of exposing the pre-built test silicon carbide crystal to air based on the test exposure time is returned until the maximum annealing temperature is fully covered. The highest annealing temperature and test crystal defect data are summarized separately to obtain the highest annealing temperature set and the test crystal defect dataset. Crystal defect curves are constructed based on the highest annealing temperature set and the test crystal defect dataset.
7. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 6, characterized in that, The defect identification of the annealed test crystal to obtain test crystal defect data includes: Microscopic scanning was performed on the annealed test crystal to obtain the crystal morphology image; Based on the test crystal morphology image, crystal morphology features are extracted to obtain the test crystal morphology features; The Raman spectrum of the annealed test crystal was obtained by laser emission from a pre-constructed laser generator. Spectral features were extracted from the crystal Raman spectrum to obtain the spectral features of the test crystal. X-ray emission was performed on the annealed test crystal to obtain the crystal photoelectron spectrum; The elemental distribution characteristics of the crystal are extracted based on the crystal photoelectron spectroscopy to obtain the distribution characteristics of the test crystal. By combining the morphological characteristics, spectral characteristics, and distribution characteristics of the test crystal, the defect data of the test crystal are obtained.
8. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 7, characterized in that, The construction of crystal defect curves based on the highest annealing temperature set and the test crystal defect dataset includes: For each test crystal defect data point in the test crystal defect dataset, perform the following operation: Defect evaluation is performed based on the test crystal morphology, spectral characteristics, and distribution characteristics in the test crystal defect data to obtain the crystal defect factor; By summarizing the crystal defect factors, a set of crystal defect factors is obtained; The crystal defect curve is obtained by curve fitting based on the set of highest annealing temperatures and the set of crystal defect factors. The horizontal and vertical axes of the crystal defect curve represent the highest annealing temperature and the crystal defect factor, respectively.
9. The silicon carbide crystal annealing method based on in-situ defect healing as described in claim 8, characterized in that, The generation of exposure discrimination results based on the target defect coordinate point set includes: The target defect coordinates are extracted sequentially from the target defect coordinate set, and the target crystal defect factor and target exposure time corresponding to the extracted target defect coordinates are identified respectively. The target crystal defect factor and the target exposure time are normalized to obtain the crystal defect coefficient and the consumption time coefficient. The comprehensive discrimination factor is calculated based on the crystal defect coefficient and the consumption time coefficient. The comprehensive discrimination factors corresponding to the coordinate points of each target defect are summarized to obtain the comprehensive discrimination factor set; Identify the largest discriminant factor in the comprehensive discriminant factor set, and record the target exposure duration corresponding to the largest discriminant factor as the optimal exposure duration; Exposure discrimination results are generated based on the optimal exposure duration.
10. A silicon carbide crystal annealing system based on in-situ defect healing, characterized in that, The system includes: A buffer layer growth module is used to construct a silicon carbide heating furnace, which includes a vacuum unit and a sample placement unit. The silicon carbide heating furnace is used to construct a buffer layer on the pre-acquired original silicon carbide substrate to obtain buffered silicon carbide crystals. The annealing parameter generation module is used to receive the annealing task objective and the set of annealing parameters to be optimized, construct the annealing task evaluation function according to the annealing task objective, and use the annealing task evaluation function to optimize the set of annealing parameters to be optimized to obtain the optimal annealing parameter set. The silicon carbide air exposure module is used to determine the exposure of the buffer silicon carbide crystal based on the optimal annealing parameter set, and obtain the exposure determination result. The exposure determination result is either air exposure treatment or non-exposure treatment. If the exposure determination result is air exposure treatment, the buffer silicon carbide crystal is exposed to obtain the silicon carbide crystal to be annealed. If the exposure determination result is non-exposure treatment, the buffer silicon carbide crystal is used as the silicon carbide crystal to be annealed. The buffer layer annealing module is used to perform buffer layer annealing on the silicon carbide crystal to be annealed using a silicon carbide heating furnace and an optimal annealing parameter set, so as to obtain the target silicon carbide crystal.
