A testing device and method for the delay time of the action of the overspeed protection of a steam turbine
Patent Information
- Application Number
- CN202611103564.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-23
- Publication Date
- 2026-10-27
AI Technical Summary
现有超速保护动作延迟测试手段存在以下不足:测试信号无法模拟现场信号退化工况;不能完整适配三取二冗余逻辑;录波通道单一,无法全链路观测动作时序;动作时刻依赖人工判读,测试精度低、可复现性差;测试系统缺少电气隔离与独立供电设计,安全性不足
[0024]本发明可模拟理想及多种信号退化工况,适配三取二冗余表决架构,通过五通道同步录波实现全链路动作时刻采集,利用自适应算法自动完成延迟解算、批量测试与预警,测试精度高、安全性强、可复现性好,能够满足汽轮机超速保护系统的测试、校验与诊断需求。
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Figure CN122980975A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of steam turbine control and protection technology, and in particular to a testing device and method for the overspeed protection action delay time of a steam turbine. Background Technology
[0002] Overspeed protection in the digital electro-hydraulic control system (DEH) of steam turbines is a crucial safety feature of steam turbine generator sets, and is generally implemented using a 2-out-of-3 redundancy voting architecture. Existing overspeed protection action delay testing methods have the following shortcomings: the test signal cannot simulate the degradation conditions of the field signal; it cannot fully adapt to the 2-out-of-3 redundancy logic; the waveform recording channel is single, making it impossible to observe the action timing across the entire chain; the action timing relies on manual interpretation, resulting in low test accuracy and poor reproducibility; and the test system lacks electrical isolation and independent power supply design, leading to insufficient safety. Summary of the Invention
[0003] The main objective of this invention is to provide a test method for the overspeed protection action delay time of a steam turbine, and further to provide a test device for the overspeed protection action delay time of a steam turbine that can operate and implement the above method, effectively solving the problems mentioned in the background art.
[0004] The technical solution of the present invention is as follows:
[0005] In the first aspect, a test device for the overspeed protection action delay time of a steam turbine is proposed, including a speed signal generator, a speed card, an overspeed protection relay, a multi-channel waveform recorder, and a power supply unit;
[0006] The speed signal generator is a speed signal generator with a fault injection module, and its output terminal is connected to the input channel of each speed card and the CH1 analog input channel of the multi-channel high-speed waveform recorder.
[0007] The speed control unit comprises at least two independently powered and independently signal-processed speed control units, including at least a first speed control unit and a second speed control unit; the output channel of the first speed control unit is connected to the CH2 digital input channel of the multi-channel high-speed waveform recorder, and the output channel of the second speed control unit is connected to the CH3 digital input channel of the multi-channel high-speed waveform recorder; the output channels of the first speed control unit and the second speed control unit are connected to the coil circuits of the first overspeed protection relay and the second overspeed protection relay according to the three-out-of-two redundancy voting logic of the turbine DEH system;
[0008] The contact circuit of the first overspeed protection relay is connected to the CH4 digital input channel of the multi-channel high-speed waveform recorder, and the contact circuit of the second overspeed protection relay is connected to the CH5 digital input channel of the multi-channel high-speed waveform recorder.
[0009] The multi-channel high-speed waveform recorder meets the requirement of synchronous sampling of all channels, with a sampling rate ≥10kHz and inter-channel delay error ≤0.1ms; it has a built-in adaptive waveform feature recognition algorithm to identify and extract the time T0 when the speed reaches the protection setpoint, the time T1 when the first speed clamp acts, the time T2 when the second speed clamp acts, the time T3 when the first overspeed protection relay acts, and the time T4 when the second overspeed protection relay acts.
[0010] The output terminal of the power supply unit is electrically connected to each speed control component, the first overspeed protection relay, the second overspeed protection relay, and the multi-channel high-speed waveform recorder.
[0011] A further improvement of the present invention is that the fault injection module supports amplitude attenuation. Continuously adjustable, frequency jitter ±0.1Hz ±10Hz adjustable, 0% pulse loss 50% adjustable, DC bias -5V +5V adjustable, and supports ideal operating conditions, single fault, and combined fault output modes.
[0012] A further improvement of the present invention is that the multi-channel high-speed waveform recorder has a switch input response time of ≤1ms, supports pre-triggering ≥1s and edge triggering, and calculates the speed calculation delay, logic voting delay, drive output delay and total action delay based on T0-T4.
[0013] A further improvement of the present invention is that the implementation method of the three-out-of-two redundant voting logic corresponds to the relay connection method as follows: when implemented in the internal software logic of the card, the two overspeed protection relays are connected in parallel; when implemented in series with the output channels of the two cards, the two overspeed protection relays are connected in parallel; when implemented in series with the external relay trigger circuit, the two overspeed protection relays are connected in series.
[0014] A further improvement of the present invention is that the first overspeed protection relay and the second overspeed protection relay are electrically isolated relays with a coil rated voltage of 24VDC, an isolation withstand voltage of ≥1500VAC / 1min, an action time of ≤10ms, and a release time of ≤5ms.
[0015] Secondly, a test method for the overspeed protection action delay time of a steam turbine is proposed, including the following specific steps:
[0016] S1. Construct a five-channel synchronous waveform recording and analysis path, and connect the speed signal, the output of the first speed card, the output of the second speed card, the contact of the first overspeed protection relay, and the contact of the second overspeed protection relay to the corresponding channels of the multi-channel high-speed waveform recorder, and complete the drive connection between the speed card and the dual overspeed protection relays according to the three-out-of-two redundant voting logic.
[0017] S2. Select ideal operating conditions, single fault or combined fault mode, and configure fault injection parameters;
[0018] S3. Configure speed jump parameters, speed card protection settings, waveform recorder sampling rate and trigger conditions, and enable adaptive waveform feature recognition algorithm;
[0019] S4. Start multi-channel synchronous waveform recording, output the speed increase signal, trigger the three-out-of-two logic and the action of the dual relays, and record five-channel waveform data;
[0020] S5, Extract Action Timing The system calculates the rotational speed calculation delay, logic voting delay, drive output delay, and total action delay using a 3-out-of-2 logic implementation method, and performs batch statistics, trend analysis, and early warning.
[0021] A further improvement of this invention is that the delay component is calculated as follows: Speed calculation delay is taken as ( )and( The maximum value in ) when using the card's internal software logic or output channel series connection, the logic voting delay is | When using an external relay series trigger circuit, the logic voting delay is | |, drive output delay is (T1,T2) and (T1, T2), when using the card's internal software logic or output channels in series, the total action delay is min. When using an external relay series trigger circuit, the total action delay is max. .
[0022] A further improvement of the present invention is that the method supports automatic repeated batch testing N times, where N≥10, performing statistical calculations on each delay component, removing outliers, and issuing an early warning when delay anomalies occur.
[0023] The technical effects of this invention are as follows:
[0024] This invention can simulate ideal and various signal degradation conditions, is compatible with a three-out-of-two redundant voting architecture, achieves full-link action moment acquisition through five-channel synchronous waveform recording, and automatically completes delay calculation, batch testing and early warning using an adaptive algorithm. It has high testing accuracy, strong security and good reproducibility, and can meet the testing, verification and diagnosis needs of turbine overspeed protection systems. Attached Figure Description
[0025] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1This is a schematic diagram of the structure of a test device for the overspeed protection action delay time of a steam turbine according to Embodiment 1 of the present invention; Figure 2 This is a flowchart illustrating a method for testing the overspeed protection action delay time of a steam turbine according to Embodiment 2 of the present invention. Detailed Implementation
[0026] Example 1
[0027] This embodiment constructs a test device for the action delay time of turbine overspeed protection. The invention can simulate ideal and various signal degradation conditions, adapt to the three-out-of-two redundant voting architecture, realize the acquisition of the action time of the whole link through five-channel synchronous waveform recording, and automatically complete the delay calculation, batch testing and early warning using an adaptive algorithm. It has high testing accuracy, strong safety and good reproducibility, and can meet the testing, verification and diagnosis needs of turbine overspeed protection system.
[0028] A testing device for the overspeed protection action delay time of a steam turbine, such as... Figure 1 As shown, it includes a speed signal generator, a speed card, an overspeed protection relay, a multi-channel waveform recorder, and a power supply unit;
[0029] The speed signal generator is a speed signal generator with a fault injection module. Its output is connected to the input channels of each speed card and the CH1 analog input channel of the multi-channel high-speed waveform recorder.
[0030] The speed control unit consists of at least two independently powered and independently signal-processed speed control units, including at least a first speed control unit and a second speed control unit; the output channel of the first speed control unit is connected to the CH2 digital input channel of the multi-channel high-speed waveform recorder, and the output channel of the second speed control unit is connected to the CH3 digital input channel of the multi-channel high-speed waveform recorder; the output channels of the first speed control unit and the second speed control unit are connected to the coil circuits of the first overspeed protection relay and the second overspeed protection relay according to the three-out-of-two redundancy voting logic of the turbine DEH system;
[0031] The contact circuit of the first overspeed protection relay is connected to the CH4 digital input channel of the multi-channel high-speed waveform recorder, and the contact circuit of the second overspeed protection relay is connected to the CH5 digital input channel of the multi-channel high-speed waveform recorder. The power supply unit adopts the NDR-240-24 industrial switching power supply, equipped with 4-channel IB2424S-50W isolated DC-DC modules. The electrical parameters are output 24VDC±1%, ripple ≤10mV, single-channel maximum output current ≥5A, and it has overcurrent, overvoltage, short circuit, and overheat protection functions. The power supply method is to provide independent isolated power supply for the first speed card, the second speed card, the dual overspeed protection relays, and the multi-channel high-speed waveform recorder. The protective grounding terminals of all devices are connected to the same grounding copper busbar, and the grounding resistance is ≤4Ω.
[0032] The multi-channel high-speed waveform recorder meets the requirement of synchronous sampling of all channels, with a sampling rate ≥10kHz and inter-channel delay error ≤0.1ms; its built-in adaptive waveform feature recognition algorithm is used to identify and extract the time T0 when the speed reaches the protection setpoint, the time T1 when the first speed clamp operates, the time T2 when the second speed clamp operates, the time T3 when the first overspeed protection relay operates, and the time T4 when the second overspeed protection relay operates.
[0033] The output of the power supply unit is electrically connected to each speed control component, the first overspeed protection relay, the second overspeed protection relay, and the multi-channel high-speed waveform recorder.
[0034] In this embodiment, the speed signal generator uses a NIPXIe-6363 multi-functional data acquisition card, paired with self-developed fault injection host computer software, to output a sine wave signal that perfectly matches the characteristics of the turbine's magnetoelectric speed probe, with a frequency range of... Corresponding turbine speed It fully covers the operating conditions at the rated speed of 3000rpm.
[0035] In this embodiment, the fault injection module supports amplitude attenuation. Continuously adjustable, frequency jitter ±0.1Hz ±10Hz adjustable, 0% pulse loss 50% adjustable, DC bias -5V +5V adjustable, and supports ideal operating conditions, single fault, and combined fault output modes.
[0036] In this embodiment, the parameter range of the fault injection module is amplitude attenuation: 0%. 90% continuously adjustable, with an adjustment step of 1%, this embodiment can achieve high-precision attenuation adjustment, simulating aging of the speed probe and line transmission loss; frequency jitter: ±0.1Hz. Adjustable ±10Hz, jitter frequency 1 100Hz adjustable, simulating electromagnetic interference from on-site frequency converters and motor start-stop; pulse loss: 0%. 50% adjustable, supports both random loss and periodic loss modes, simulating probe contact problems and intermittent signal transmission; DC bias: -5V +5V adjustable, output stability ≤0.1%, zero drift due to poor grounding of analog signal cables and common-mode interference. Output modes support ideal condition, single fault, and combined fault modes, which can be switched with a single button on the host computer. Specifically, the output terminals are connected to the differential input channels of the first and second speed controllers via 50Ω impedance-matched BNC coaxial cables, and simultaneously connected to the CH1 analog input channel of the multi-channel high-speed waveform recorder, ensuring complete synchronization, no attenuation, and no reflection of the three signals.
[0037] In this embodiment, the multi-channel high-speed waveform recorder has a switch input response time of ≤1ms, supports pre-triggering ≥1s and edge triggering, and calculates the rotational speed calculation delay, logic voting delay, drive output delay and total action delay based on T0-T4.
[0038] In this embodiment, the multi-channel high-speed waveform recorder is the Yokogawa DL850E multi-channel high-speed waveform recorder, configured with one isolated analog input module and four isolated digital input modules. The sampling performance is hardware-level synchronous sampling for all channels, with a sampling rate ≥10kHz and inter-channel delay error ≤0.05ms; the digital input response time is ≤0.5ms; it supports pre-trigger duration ≥2s and speed rising edge triggering; the extended functions include automatic batch test data statistics, delay trend curve generation, and threshold warning.
[0039] Specifically, the built-in adaptive waveform feature recognition algorithm is implemented by performing a 10Hz pulse on the CH1 analog speed signal. A 1kHz bandpass filter removes power frequency and high-frequency noise. A zero-crossing detection algorithm calculates the real-time rotational speed, identifying the moment the speed first reaches the protection setpoint, which is marked as T0. For CH2... The CH5 switch signal undergoes 1ms hardware debouncing, and the rising edge transition times from low to high are identified and marked as T1 (CH2), T2 (CH3), T3 (CH4), and T4 (CH5), respectively. Based on the extracted T0-T4 times, each delay component is automatically calculated according to a preset formula.
[0040] In this embodiment, the implementation of the three-out-of-two redundant voting logic corresponds to the relay connection method as follows: when implemented with internal software logic of the card, the two overspeed protection relays are connected in parallel; when implemented with the output channels of the two cards in series, the two overspeed protection relays are connected in parallel; when implemented with an external relay series trigger circuit, the two overspeed protection relays are connected in series.
[0041] In this embodiment, the two cards are powered by independent 24VDC isolated power supplies, with independent grounding, and do not share a ground or power circuit, thus avoiding signal crosstalk and power supply coupling. The core parameters of the cards are differential input, input impedance ≥1MΩ, built-in anti-aliasing filter module with a cutoff frequency of 1kHz, and support for speed protection setting of 0. Adjustable to 6000rpm, filter time constant 1. Adjustable to 100ms, the output is a 24VDC relay contact output with a maximum load current of 200mA, fully compatible with the signal processing logic of the field DEH system; the connection method is that the output channel of the first speed card is connected to the CH2 digital input channel of the multi-channel high-speed waveform recorder, the output channel of the second speed card is connected to the CH3 digital input channel, and the output channels of the two cards are connected to the coil circuit of the dual overspeed protection relay according to the three-out-of-two redundancy voting logic.
[0042] In this embodiment, the first overspeed protection relay and the second overspeed protection relay are electrically isolated relays with a coil rated voltage of 24VDC, an isolation withstand voltage of ≥1500VAC / 1min, an action time of ≤10ms, and a release time of ≤5ms.
[0043] In this embodiment, the electrically isolated relay adopts the Hongfa HF115F / 24VDC-1HS3 industrial relay. Its electrical parameters are: rated coil voltage 24VDC, coil resistance 470Ω, isolation withstand voltage ≥1500VAC / 1min, measured operating time ≤8ms, release time ≤4ms, contact type single-pole single-throw normally open, rated current 5A / 250VAC. The configuration and connection involve two relays of the same model, designated as the first overspeed protection relay and the second overspeed protection relay. The coil circuit and the speed controller output are connected using a 3-out-of-2 logic. The normally open contact circuit of the first relay is connected to the CH4 digital input channel of the waveform recorder, and the normally open contact circuit of the second relay is connected to the CH5 digital input channel of the waveform recorder. The series-parallel matching ensures that the series-parallel connection method of the relays corresponds one-to-one with the 3-out-of-2 logic implementation method.
[0044] Example 2
[0045] This embodiment proposes a test method for the overspeed protection action delay time of a steam turbine, such as... Figure 2 As shown, the specific steps include the following:
[0046] S1. Construct a five-channel synchronous waveform recording and analysis path, and connect the speed signal, the output of the first speed card, the output of the second speed card, the contact of the first overspeed protection relay, and the contact of the second overspeed protection relay to the corresponding channels of the multi-channel high-speed waveform recorder, and complete the drive connection between the speed card and the dual overspeed protection relays according to the three-out-of-two redundant voting logic.
[0047] S2. Select ideal operating conditions, single fault or combined fault mode, and configure fault injection parameters;
[0048] S3. Configure speed jump parameters, speed card protection settings, waveform recorder sampling rate and trigger conditions, and enable adaptive waveform feature recognition algorithm;
[0049] S4. Start multi-channel synchronous waveform recording, output the speed increase signal, trigger the three-out-of-two logic and the action of the dual relays, and record five-channel waveform data;
[0050] S5, Extract Action Timing The system calculates the rotational speed calculation delay, logic voting delay, drive output delay, and total action delay using a 3-out-of-2 logic implementation method, and performs batch statistics, trend analysis, and early warning.
[0051] In this embodiment, the delay component is calculated as follows: the rotational speed calculation delay is taken as ( )and( The maximum value in ) when using the card's internal software logic or output channel series connection, the logic voting delay is | When using an external relay series trigger circuit, the logic voting delay is | |, drive output delay is (T1,T2) and (T1, T2), when using the card's internal software logic or output channels in series, the total action delay is min. When using an external relay series trigger circuit, the total action delay is max. .
[0052] In this embodiment, the method supports automatic repetition of batch testing N times, where N≥10, to perform statistical calculations on each delay component, remove outliers, and issue warnings when delay anomalies occur.
[0053] Example 3
[0054] This embodiment provides an electronic device, including a processor and a memory, wherein the memory stores a computer program that can be called by the processor; the processor executes the above-described method for testing the delay time of a turbine overspeed protection action by calling the computer program stored in the memory.
[0055] The electronic device can vary considerably depending on its configuration or performance. It may include one or more processors (Central Processing Units, CPUs) and one or more memories, wherein the memory stores at least one computer program, which is loaded and executed by the processor to implement the turbine overspeed protection action delay time test method provided in the above-described embodiment. The electronic device may also include other components for implementing its functions; for example, it may have wired or wireless network interfaces and input / output interfaces for data input and output. Details will not be elaborated upon in this embodiment.
[0056] Those skilled in the art will recognize that this invention can be implemented as an apparatus, method, or computer program product. Therefore, this disclosure can be embodied in the following forms: it can be entirely hardware, entirely software (including firmware, resident software, microcode, etc.), or a combination of hardware and software, generally referred to herein as a "circuit," "module," or "apparatus." Furthermore, in some embodiments, the invention can also be implemented as a computer program product contained in one or more computer-readable media, which includes computer-readable program code.
[0057] Any combination of one or more computer-readable media may be used. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor device, or any combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used or combined with an instruction execution device, apparatus, or apparatus.
[0058] This invention is described with reference to flowchart illustrations and block diagrams of methods, apparatus (devices), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and block diagrams, as well as combinations of blocks in the flowchart illustrations and block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing device, generate instructions for implementing the flowchart. Figure 1 One or more processes and boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0059] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and boxes Figure 1 The steps of the function specified in one or more boxes.
[0060] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.
Claims
1. A testing device for the overspeed protection action delay time of a steam turbine, characterized in that: Includes a speed signal generator, speed card, overspeed protection relay, multi-channel waveform recorder, and power supply unit; The speed signal generator is a speed signal generator with a fault injection module, and its output terminal is connected to the input channel of each speed card and the CH1 analog input channel of the multi-channel high-speed waveform recorder. The speed control unit comprises at least two independently powered and independently signal-processed speed control units, including at least a first speed control unit and a second speed control unit; the output channel of the first speed control unit is connected to the CH2 digital input channel of the multi-channel high-speed waveform recorder, and the output channel of the second speed control unit is connected to the CH3 digital input channel of the multi-channel high-speed waveform recorder; the output channels of the first speed control unit and the second speed control unit are connected to the coil circuits of the first overspeed protection relay and the second overspeed protection relay according to the three-out-of-two redundancy voting logic of the turbine DEH system; The contact circuit of the first overspeed protection relay is connected to the CH4 digital input channel of the multi-channel high-speed waveform recorder, and the contact circuit of the second overspeed protection relay is connected to the CH5 digital input channel of the multi-channel high-speed waveform recorder. The multi-channel high-speed waveform recorder meets the requirement of synchronous sampling of all channels, with a sampling rate ≥10kHz and inter-channel delay error ≤0.1ms; Its built-in adaptive waveform feature recognition algorithm is used to identify and extract the time when the speed reaches the protection setpoint T0, the time when the first speed clamp operates T1, the time when the second speed clamp operates T2, the time when the first overspeed protection relay operates T3, and the time when the second overspeed protection relay operates T4. The output terminal of the power supply unit is electrically connected to each speed control component, the first overspeed protection relay, the second overspeed protection relay, and the multi-channel high-speed waveform recorder.
2. The testing device for the overspeed protection action delay time of a steam turbine according to claim 1, characterized in that: The fault injection module supports amplitude attenuation. Continuously adjustable, frequency jitter ±0.1Hz ±10Hz adjustable, 0% pulse loss 50% adjustable, DC bias -5V +5V adjustable, and supports ideal operating conditions, single fault, and combined fault output modes.
3. The testing device for the overspeed protection action delay time of a steam turbine according to claim 2, characterized in that: The multi-channel high-speed waveform recorder has a digital input response time of ≤1ms, supports pre-triggering ≥1s and edge triggering, and is based on... Solve for the speed calculation delay, logic voting delay, drive output delay, and total action delay.
4. The testing device for the overspeed protection action delay time of a steam turbine according to claim 3, characterized in that: The implementation of the three-out-of-two redundant voting logic corresponds to the relay connection method as follows: when implemented with internal software logic of the card, the two overspeed protection relays are connected in parallel; when implemented with the output channels of the two cards in series, the two overspeed protection relays are connected in parallel; when implemented with an external relay series trigger circuit, the two overspeed protection relays are connected in series.
5. The testing device for the overspeed protection action delay time of a steam turbine according to claim 4, characterized in that: The first overspeed protection relay and the second overspeed protection relay are electrically isolated relays with a coil rated voltage of 24VDC, isolation withstand voltage ≥1500VAC / 1min, action time ≤10ms, and release time ≤5ms.
6. A method for testing the overspeed protection action delay time of a steam turbine, implemented based on the testing device described in any one of claims 1-5, characterized in that: The specific steps include the following: S1. Construct a five-channel synchronous waveform recording and analysis path, and connect the speed signal, the output of the first speed card, the output of the second speed card, the contact of the first overspeed protection relay, and the contact of the second overspeed protection relay to the corresponding channels of the multi-channel high-speed waveform recorder, and complete the drive connection between the speed card and the dual overspeed protection relays according to the three-out-of-two redundant voting logic. S2. Select ideal operating conditions, single fault or combined fault mode, and configure fault injection parameters; S3. Configure speed jump parameters, speed card protection settings, waveform recorder sampling rate and trigger conditions, and enable adaptive waveform feature recognition algorithm; S4. Start multi-channel synchronous waveform recording, output the speed increase signal, trigger the three-out-of-two logic and the action of the dual relays, and record five-channel waveform data; S5, Extract Action Timing The system calculates the rotational speed calculation delay, logic voting delay, drive output delay, and total action delay using a 3-out-of-2 logic implementation method, and performs batch statistics, trend analysis, and early warning.
7. The method for testing the overspeed protection action delay time of a steam turbine according to claim 6, characterized in that, The delay component is calculated as follows: the speed calculation delay is taken as ( )and( The maximum value in ) when using the card's internal software logic or output channel series connection, the logic voting delay is | When using an external relay series trigger circuit, the logic voting delay is | |, drive output delay is (T1,T2) and (T1, T2), when using the card's internal software logic or output channels in series, the total action delay is min. When using an external relay series trigger circuit, the total action delay is max. .
8. The method for testing the overspeed protection action delay time of a steam turbine according to claim 7, characterized in that: The method supports automatic repeated batch testing N times, where N≥10, to perform statistical calculations on each delay component, remove outliers, and issue warnings when delay anomalies occur.