Quantum zero-flux closed-loop direct current measurement method and system based on bias magnetic field polarity time domain chopping

Abstract

This invention belongs to the fields of quantum mechanics and power, specifically relating to a quantum zero-flux closed-loop DC current measurement method and system based on time-domain chopping of bias magnetic field polarity. This invention periodically flips the polarity of the bias magnetic field and synchronously switches dual-frequency microwave frequencies; the flipping transition edge opens a multi-functional digital blanking window, isolating electromagnetic transients, freezing PID control quantities and integral terms, and preventing loop lock-up; positive and negative bias steady-state acquisition of feedback magnetic fields and averaging them completely eliminate bias source temperature drift, and, in conjunction with dual-frequency synchronous locking, suppresses diamond NV color center temperature drift. Nanosecond-level timing scheduling is unified by an FPGA five-state finite state machine, and data validity verification is added to improve reliability. This invention solves coupling problems such as frequency mismatch, integral saturation, and transient crosstalk, achieving a measurement error of less than 0.02% over a wide temperature range of 80℃, and exhibiting excellent zero-point stability.

Description

Technical Field

[0001] This invention belongs to the field of quantum precision measurement and DC current detection technology of power systems, specifically relating to a quantum zero flux closed-loop DC current measurement method and system based on bias magnetic field polarity time-domain chopping. Background Technology

[0002] In high-voltage substations of power systems, accurate monitoring of DC grounding currents (such as transformer neutral point bias current shunt, transmission line DC ground return current, and surge arrester microampere-level DC leakage current) is crucial for assessing the operational safety of power grid equipment. In recent years, continuous wave optical detection magnetic resonance (CW-ODMR) quantum magnetic sensors based on diamond NV centers have become a research hotspot in the field of high-precision DC transformers due to their lack of magnetic saturation, zero-point drift-free principle, and atomic-level high linearity.

[0003] In a typical single-axis continuous-wave zero-flux closed-loop current measurement scheme, in order to suppress the drastic drift of the diamond intrinsic zero-field splitting value D(T) with ambient temperature, a dual-frequency microwave lock-in system (i.e., simultaneous tracking) is usually adopted. and (Two spin-level transition branches). Existing research shows that the zero-field splitting parameter D of the diamond NV center varies with temperature at a rate of approximately dD / dT = -74.2 ± 0.7 kHz / K. Within an industrial ambient temperature range of -20°C to +60°C (80°C), the D(T) temperature drift alone can cause an overall ODMR spectral shift of approximately 5.94 MHz, with an equivalent magnetic field drift of approximately 212 μT. Dual-frequency locking, by simultaneously tracking both transition branches, can theoretically suppress this temperature drift effect by more than 10 times, with a residual D(T) temperature drift equivalent magnetic field of approximately 0.265 μT / K.

[0004] To ensure that the two resonance peaks fully open near zero magnetic field, avoid energy level aliasing, and enter the optimal linear frequency discrimination region, the system must actively apply a constant static external bias magnetic field B along the measurement axis of the diamond NV color center. bias (Target magnetic field amplitude, typically 1-10 mT). This bias magnetic field is usually provided by a precision bias coil installed inside the probe and an external constant current source circuit. However, high-precision constant current sources inevitably suffer from temperature drift; the temperature coefficient of a typical precision current source is 6.9~15.5 ppm / °C. (Based on B) biasCalculated at 1 mT, the magnetic field change caused by the temperature drift of the bias source is approximately 6.9-15.5 μT / ℃. At an 80°C temperature difference, the cumulative drift can reach 0.55-1.24 mT. This value is comparable to the bias field itself and far exceeds the residual D(T) temperature drift after dual-frequency locking suppression (0.265 μT / K, approximately 21.2 μT at 80°C). The former is 26-58 times the latter. Therefore, given that dual-frequency locking has solved the D(T) temperature drift issue, the hardware temperature drift of the bias current source becomes the dominant constraint on measurement accuracy.

[0005] To address the temperature drift problem of bias sources, existing literature has proposed relevant solutions. US Patent Publication No. US20200025835A1 discloses a method for suppressing low-frequency drift and 1 / f noise by applying a chopper bias magnetic field to a solid-state spin sensor. Its core idea is to reverse the polarity of the bias magnetic field at known intervals and eliminate the slow drift of the bias source through differential measurement. However, this method has the following shortcomings:

[0006] (1) It only involves open-loop measurement and does not involve the combination of dual-frequency microwave locking and zero-flux closed-loop control;

[0007] (2) The influence of electromagnetic transients at the moment of polarity reversal of the bias field on the stability of the measurement system is not considered;

[0008] (3) The optical measurement crosstalk problem at the flip transition edge is not addressed;

[0009] (4) The synchronous switching control of microwave frequency and bias field polarity is not involved.

[0010] Chinese invention patent CN121164991B discloses a detection method for a marine magnetic field sensor based on diamond NV centers, including: S1 baseline calibration; S2 alternating fluorescence measurement between two single-quantum resonance frequencies and taking the difference to achieve DQ readout; S3 adjusting the triaxial compensation current based on closed-loop control to maintain the operating point of the diamond NV center at zero magnetization bias. However, this patent has the following essential differences:

[0011] (1) Its core is alternating measurement, which involves time-division switching between two frequencies to measure fluorescence and take the difference, rather than locking both frequencies simultaneously. The two have essential differences in timing logic and control strategy.

[0012] (2) Its closed-loop control works under static bias conditions and does not involve the polarity reversal of the bias magnetic field;

[0013] (3) No blanking processing was applied to the transition edge at the instant of polarity reversal of the bias field;

[0014] (4) The synchronous switching control of microwave frequency and bias field reversal is not involved.

[0015] Chinese patent application CN117289185A discloses a closed-loop system for measuring weak magnetic fields based on a carbon-based sensor, involving fluorescence collection, phase-locked amplification, digital PID control, and microwave frequency adaptive tracking. However, it is a single-frequency tracking system rather than a dual-frequency locking system, and it does not involve bias field chopping and transition edge blanking.

[0016] Even when the existing technologies mentioned above are simply combined, and the bias field chopping, dual-frequency (alternating) measurement, and closed-loop control are each combined individually, the following interconnected systemic technical challenges still exist:

[0017] First, there is the mismatch between the polarity reversal of the bias field and the dynamic tracking of the microwave frequency. At the instant the bias magnetic field polarity reverses, the diamond NV color center... and The resonant frequency undergoes a step jump, with a jump amplitude of approximately 2γB. bias (Where γ ≈ 28GHz / T is the electron gyromagnetic ratio of the diamond NV color center). The digital frequency synthesizer needs a certain locking time (usually tens to hundreds of microseconds) to switch from the current frequency to the target frequency. During this period, the microwave frequency cannot accurately lock the resonance peak. If the closed loop is activated rashly, it will lead to error signal distortion or even loop lockout.

[0018] Second, the problem of bidirectional state maintenance and smooth switching of the zero-flux closed loop under polarity chopping conditions. During this period, after multiple control cycles, the integral term of the closed-loop PID controller has accumulated with +B. bias The control input corresponding to steady state. Switch to T. - During a certain period, the polarity and amplitude of the error signal change abruptly. If the PID integral term is not processed in any way, integral saturation will cause the control quantity to overshoot violently, causing the top rail of the feedback current source to saturate.

[0019] Third, there is the problem of separating the time scale of the temperature drift source and optimizing the selection of the chopping frequency. The system exhibits three different time scales of change: bias source temperature drift (time constant from minutes to hours), D(T) temperature drift (time constant from minutes to hours), and polarity reversal transient (time constant from microseconds to milliseconds). The selection of the chopping frequency must simultaneously satisfy multiple constraints.

[0020] Fourth, the electromagnetic transients at the polarity reversal transition edge and crosstalk issues in optical measurements. The electromagnetic transients generated by the bias coil and zero flux feedback coil at the moment of polarity reversal not only affect the stability of the magnetic field establishment, but may also interfere with the preamplifier circuit of the photodetector through electromagnetic coupling, generating optical noise spikes synchronized with the transients.

[0021] The four problems mentioned above are interdependent and mutually restrictive, and must be addressed systematically as a whole. Solving any one of them in isolation will not achieve satisfactory measurement performance. Summary of the Invention

[0022] This invention aims to overcome the technical shortcomings of existing NV color center zero flux closed-loop current measurement schemes, such as the decrease in measurement accuracy caused by the hardware temperature drift of the bias current source, and the failure to solve the problem of switching transients and timing coordination in existing bias field chopping schemes and dual-frequency alternating measurement schemes. It provides a quantum zero flux closed-loop DC current measurement method based on bias magnetic field polarity time-domain chopping. This method converts the bias source temperature drift into a common-mode signal through time-domain polarity chopping and completely eliminates it through algebraic cancellation. It eliminates D(T) temperature drift by simultaneous dual-frequency locking (distinct from existing dual-frequency alternating measurement techniques), isolates the switching transient through a digital blanking window, and achieves nanosecond-level timing coordination of the four components through a five-state finite state machine of an FPGA (Field Programmable Gate Array, a semi-custom integrated circuit whose hardware logic can be defined by the user). This enables high-precision and high-stability DC current measurement over a wide temperature range.

[0023] To achieve the above-mentioned objectives, this invention provides a quantum zero flux closed-loop DC current measurement method based on bias magnetic field polarity time-domain chopping, comprising the following steps:

[0024] Step 1: Using a chopping frequency f chop The direction of the current in the bias coil is periodically reversed, causing the diamond NV color center to alternately be in a positive bias state on the time axis. and reverse bias state ;

[0025] Step 2: Simultaneously with the bias polarity reversal, the FPGA synchronously updates the frequency control word of the digital frequency synthesizer, causing the simultaneously applied dual-frequency microwave signals to synchronously jump from the current frequency to the target frequency. Switch to Dual-frequency microwave frequency from Jump to ,from Switch to Dual-frequency microwave frequency from Jump to ;

[0026] Step 3: At the transition edge of the bias polarity reversal, simultaneously open the digital blanking window, and perform the following operations during the digital blanking window period:

[0027] Block the data acquisition of the photodetector;

[0028] The feedback control quantity of the zero flux closed loop is frozen to maintain its value from the previous moment.

[0029] Freeze the integral term of the PID controller to keep its value unchanged from the previous moment;

[0030] Step 4: After the number blanking window is finished, in During the steady state, dual-frequency microwaves are simultaneously locked. Energy level, closed-loop feedback output ;exist During the steady state, dual-frequency microwaves are simultaneously locked. Energy level, closed-loop feedback output ;

[0031] Step 5: Collect data within an adjacent complete chopping cycle. and Perform the arithmetic mean. Eliminate bias source temperature drift ΔB bias Outputs a true DC magnetic field B ext .

[0032] Furthermore, the chopper modulation, microwave frequency switching, digital blanking window opening and closing, closed-loop activation, and data acquisition described in steps 1-4 are all uniformly controlled by a five-state finite state machine inside the FPGA, with timing accuracy down to the nanosecond level. The five states include: idle state S0, ... Steady-state S1, Flip transition blanking S2, Steady-state S3, flip transition blanking S4.

[0033] A further improvement is made to the chopping frequency f. chop The selection simultaneously satisfies:

[0034] f chop The cutoff frequency is greater than the temperature drift of the bias source and the temperature drift of D(T), where D(T) is the zero-field splitting parameter of the diamond NV color center;

[0035] f chop Control bandwidth of a closed-loop magnetic flux less than zero;

[0036] f chop Avoid power frequencies and their integer multiples.

[0037] A further improvement is made to the chopping frequency f. chop =10Hz.

[0038] A further improvement is made to the duration τ of the digital blanking window. blank Simultaneously satisfy:

[0039] τ blank The transient decay time constant τ of the bias coil inductance is greater than that of the bias coil inductance. L ;

[0040] τ blank Greater than the digital frequency synthesizer lock-in time τ PLL ;

[0041] τblank Less than the chopping period T chop 1 / 10 of.

[0042] A further improvement is made to the duration τ of the digital blanking window. blank =500μs.

[0043] A further improvement is made by freezing the integral term of the PID controller in step 3, and then multiplying the value of the integral term of the PID controller by -1 to preset the polarity at the end of the digital blanking window, under the ideal condition that the bias coil and the feedback coil are completely symmetrical, and then reactivating the closed-loop control.

[0044] Further improvements include the microwave frequency jump amplitude in step 2. Where γ is the electron gyromagnetic ratio of the diamond NV color center, and B bias The bias magnetic field strength is used; the frequency transition process is completed entirely within the digital blanking window, and the microwave frequency is stably locked when the digital blanking window ends.

[0045] A further improvement involves performing a data validity check after each digit blanking window ends and before data acquisition begins:

[0046] Check if the fluorescence signal intensity of the photodetector is within the normal range;

[0047] Check if the closed-loop error signal is within the convergence threshold;

[0048] If any condition is not met, the data for that half-cycle is discarded, and the measurement value from the previous valid cycle is used.

[0049] On the other hand, a quantum zero flux closed-loop DC current measurement system based on bias magnetic field polarity time-domain chopping includes:

[0050] Quantum sensitive unit: contains a diamond NV color center ensemble, which generates fluorescence by laser excitation, and the fluorescence intensity is collected by a photodetector;

[0051] Bias magnetic field generating unit: includes bias coil and precision constant current source, the output of constant current source is connected to H-bridge switching circuit;

[0052] Microwave excitation unit: includes a digital frequency synthesizer and a microwave power amplifier, which can generate dual-frequency microwave signals simultaneously;

[0053] Zero flux feedback unit: includes a feedback coil and a feedback current source;

[0054] Main control unit: FPGA chip, internally implementing a five-state finite state machine, synchronously outputting H-bridge switching instructions, microwave frequency control word update instructions and digital blanking window control signals under the same clock cycle, precisely controlling the timing coordination of bias polarity switching, microwave frequency jumping, digital blanking window opening and closing, closed-loop activation and data acquisition.

[0055] A further improvement is made to the bias magnetic field strength B. bias The value range is 1~10mT;

[0056] The chopping frequency f chop The value range is 5~20Hz;

[0057] Digital blanking window duration τ blank The value range is 200μs to 1ms.

[0058] Compared with the prior art, the beneficial effects of this invention are as follows:

[0059] 1. This invention eliminates bias source temperature drift, achieving long-term zero-point stability. Utilizing the common-mode symmetry characteristics of temperature drift caused by the polarity reversal of the bias magnetic field, this invention completely eliminates constant current source temperature drift through periodic chopping averaging. Bias drift on the order of 0.55~1.24 mT is eliminated over a wide temperature range of 80℃, with a temperature drift coefficient below 0.001% / ℃, achieving atomically stable measurement baseline and overcoming the limitations imposed on zero-point stability by temperature drift in analog devices.

[0060] 2. The dual-frequency synchronous locking of this invention significantly improves accuracy and efficiency compared to alternating measurements. Unlike the existing schemes that use time-division alternating frequency measurement, this invention applies two microwaves simultaneously and tracks the energy level synchronously, eliminating inherent defects such as measurement delay, halved sampling efficiency, and dynamic response distortion caused by time-division switching, thus achieving real-time synchronous high-precision frequency discrimination.

[0061] 3. The multi-module timing coordination of this invention has a unique synergistic effect. When only the chopper, dual-frequency locking, blanking, and integral control modules are combined individually or partially, the full-temperature measurement error reaches a maximum of 8.7%. This invention uses an FPGA five-state finite state machine to uniformly schedule four core technologies, simultaneously solving four major coupling problems: frequency mismatch, integral saturation, electromagnetic transients, and chopper frequency matching. The measurement error is less than 0.02% under an 80℃ temperature difference. Existing patents belong to two technical routes: open-loop chopper and static bias alternating measurement. There is no technical inspiration for combined use, and no systematic solution to coupling interference is disclosed.

[0062] 4. The digital blanking window of this invention achieves three functions in one window: isolating the transient state of the coil inductance, accommodating the microwave phase-locked loop stabilization time, and freezing the PID integral term; the window duration synchronously satisfies the triple constraints of inductance decay, phase-locked loop time, and effective measurement ratio, which is different from the conventional processing approach of simple delay and filtering. There is no similar composite timing design in the existing literature.

[0063] 5. This invention requires minimal hardware modifications and has low engineering implementation costs. Based on the mature CW-ODMR closed-loop hardware architecture, it can be implemented simply by adding a state machine, synchronous frequency hopping, blanking control, and mean value calculation logic to the FPGA. No new hardware is required, and there is no increase in equipment size or material costs. It is suitable for on-site retrofitting of power DC transformers. Attached Figure Description

[0064] Figure 1 It is a comparison curve of the baseline equivalent magnetic field drift as a function of ambient temperature under different compensation schemes;

[0065] Figure 2 This is a comparison chart of the transient response of closed-loop feedback control with and without a digital blanking window.

[0066] Figure 3 It is a timing diagram of bias magnetic field polarity chopper and closed-loop control. Detailed Implementation

[0067] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings.

[0068] Example 1

[0069] This embodiment provides a quantum zero flux closed-loop DC current measurement method based on bias magnetic field polarity time-domain chopping.

[0070] Step 1: Time-domain polar square wave chopper modulation

[0071] A low-frequency control state machine is built inside the FPGA, using a chopping frequency f. chop The direction of the current in the bias coil is periodically reversed, causing the diamond NV color center to alternately be in a positive bias state on the time axis. Time period) and reverse bias state ( (Time period).

[0072] exist The total bias field for the time period is: ;

[0073] exist The total bias field for the time period is: .

[0074] Among them, the temperature drift of the bias magnetic field The sign of the magnetic field flips along with the control polarity, while the actual DC magnetic field to be measured... Its direction and polarity remain unchanged.

[0075] It is the amplitude of the target magnetic field. This indicates that the measurement is applied in the positive direction along the diamond NV color center measurement axis; This indicates that the current is applied in the opposite direction along the measurement axis (achieved by switching the current direction using an H-bridge).

[0076] yes The total magnetic field actually applied by the time-period bias coil; yes The total magnetic field actually applied by the time-period bias coil;

[0077] The chopping frequency The selection of [a] satisfies the following criteria:

[0078] (a) The cutoff frequency is much greater than the bias source temperature drift and D(T) temperature drift (typically <0.01Hz), ensuring that the temperature drift is effectively modulated to the high frequency band;

[0079] (b) A control bandwidth much smaller than that of the zero flux closed loop (typically >100Hz) ensures that the closed loop can be fully established in each steady-state period (establishment time <5ms).

[0080] (c) Avoid power frequency 50Hz and its integer multiples to avoid power crosstalk.

[0081] Preferably, f chop = 10Hz.

[0082] In the odd harmonics (30Hz, 50Hz, 70Hz...) of a 10Hz square wave chopper, although 50Hz coincides with the power frequency, the amplitude of the odd harmonics decreases by 1 / n (the amplitude of the third harmonic is 1 / 3 of the fundamental frequency), and can be further suppressed by subsequent digital filtering.

[0083] In some embodiments, a low-frequency control state machine is built inside the FPGA, with a chopping frequency f. chop The frequency is set to 10Hz. The FPGA outputs a pair of complementary PWM signals through the GPIO port to drive the H-bridge switching circuit to periodically switch the output direction of the bias current source. The H-bridge consists of four MOSFET switches. When the diagonal switches (Q1-Q4 or Q2-Q3) are turned on, the current direction in the bias coil changes accordingly.

[0084] Step 2: Microwave frequency synchronization transition and simultaneous dual-frequency locking

[0085] While the bias field polarity reverses, the FPGA synchronously updates the frequency control word of the digital frequency synthesizer (NCO) under the same clock cycle, enabling the dual-frequency microwave signal ( and The frequency of (simultaneously applied) jumps synchronously from the current value to the target value. Switch to At that time, the dual-frequency microwave frequency from Jump to (Right now Channel switch to frequency, Channel switch to Frequency); from Switch to On the contrary.

[0086] Unlike the alternating measurement of the prior art (CN121164991B) which switches between two frequencies in a time-division manner and applies only one frequency at a time, the present invention adopts dual-frequency simultaneous locking, applies two microwave frequencies at the same time, and tracks two resonance peaks at the same time to achieve real-time synchronous measurement, without the time delay and measurement efficiency loss inherent in alternating measurement.

[0087] Microwave frequency jump amplitude (Where γ ≈ 28 GHz / T is the electron gyromagnetic ratio of the diamond NV color center). Using B bias Calculated at 1mT, Δω ≈ 56 MHz, which is within the NCO's fast frequency hopping capability range. The frequency hopping process is completed entirely within the subsequent digital blanking window.

[0088] Step 3: Transition edge digital blanking and loop closure state maintenance

[0089] At the transition edge of the bias polarity reversal (synchronized with H-bridge switching and NCO frequency control word update), the FPGA opens the digital blanking window and performs the following three operations simultaneously during the digital blanking window:

[0090] (a) Block the data acquisition of the photodetector and discard all fluorescence data within the window;

[0091] (b) Keep the zero flux feedback control quantity unchanged from the previous moment (freeze the PID output).

[0092] (c) Freeze the integral term of the PID controller to prevent erroneous signals during transients from being accumulated into the integral term.

[0093] The duration τ of the digital blanking window blank Simultaneously satisfying three constraints:

[0094] (a) Greater than the transient decay time constant τ of the bias coil inductance L(Typical value 100-300μs) to ensure sufficient decay of electromagnetic transients;

[0095] (b) Greater than the digital frequency synthesizer lockout time τ PLL (Typical value 100-200μs) to ensure that the microwave is stably locked after the frequency jump is completed;

[0096] (c) Less than the chopping period T chop 1 / 10, ensuring that the effective measurement time accounts for >90%. Preferably, τ blank =500μs.

[0097] After the digital blanking window ends, according to and The symmetry of the PID integral term is used to preset the polarity of the PID controller integral term: specifically, the value of the PID controller integral term is multiplied by -1 (i.e., inverted), so that the output polarity of the integral term matches the current bias polarity state, and then the closed-loop control is reactivated.

[0098] Step 4: Bidirectional zero flux closed-loop locking

[0099] After the digital blanking window ends, the FPGA activates the corresponding closed-loop locking channel based on the current bias state. Steady state period (lasting approximately) Dual-frequency microwave simultaneous locking Energy level (simultaneously) (as a supplementary reference), closed-loop feedback output ;exist Steady state period (lasting approximately) Dual-frequency microwave simultaneous locking Energy level (at the same time) (as a supplementary reference), closed-loop feedback output .

[0100] Closed-loop control satisfies the following equations:

[0101] exist Time period: ;

[0102] ;

[0103] exist Time period: ;

[0104] ;

[0105] B ext It is the actual DC magnetic field to be measured, in T, and its direction is along the NV measurement axis;

[0106] ΔB biasIt is the temperature drift (instantaneous deviation) of the bias magnetic field, in T, and can be positive or negative;

[0107] yes The dynamic compensation magnetic field (net increment) output by the time-period feedback coil, in tons (T).

[0108] yes The dynamic compensation magnetic field (net increment) output by the time-period feedback coil, in tons (T).

[0109] Step 5: Algebraic cancellation to reconstruct pure DC

[0110] The digital signal processing unit will process the signals acquired within an adjacent complete chopping cycle. and Perform arithmetic mean calculation:

[0111] ;

[0112] In the mathematical operation of adding and averaging, the bias source temperature drift term ΔB bias Complete common-mode cancellation. The final output B target It achieves bias-free, absolutely accurate measurement of the real DC magnetic field of the copper busbar.

[0113] Preferably, a data validity determination step is performed after each digit blanking window ends and before data acquisition begins:

[0114] (a) Check whether the fluorescence signal intensity of the photodetector is within the normal range (excluding laser power fluctuations or optical alignment misalignment);

[0115] (b) Check whether the closed-loop error signal is within the convergence threshold (excluding the case where the loop is not fully established); if any condition is not met, discard the data of this half-cycle and use the measurement value of the previous valid cycle.

[0116] The core of this invention lies in the systematic timing integration of four elements: bias field chopping (step 1), microwave frequency synchronous switching and dual-frequency simultaneous locking (step 2), digital blanking and closed-loop state maintenance (step 3), and bidirectional zero-flux closed-loop locking (step 4). Steps 2 and 4 together constitute the core feature that distinguishes this invention from existing technologies involving alternating dual-frequency measurements. These five aspects are uniformly scheduled by a five-state finite state machine within the FPGA under the same clock domain, achieving timing accuracy at the nanosecond level. Specifically:

[0117] The bias field chopping and microwave frequency switching are triggered at the same clock beat, ensuring that the microwave frequency and bias field polarity always remain matched;

[0118] The digital blanking window serves three functions simultaneously: isolating inductor transients, accommodating PLL lockout time, and freezing PID integral terms.

[0119] Freezing and polarity preset of the PID integral term ensures a smooth transition of the control quantity after inversion;

[0120] The above four components work together and are uniformly scheduled by the five-state finite state machine (S0-S4) inside the FPGA under the same clock domain, achieving timing accuracy at the nanosecond level.

[0121] In some embodiments, timing control of the FPGA five-state finite state machine (FSM):

[0122] The FPGA internally implements a five-state finite state machine to precisely control the timing coordination of bias polarity, digital blanking window, microwave frequency, and closed-loop activation.

[0123] S0 (Idle State): System initialization, waiting for startup command.

[0124] S1 ( (Steady state): Bias is positive, dual-frequency microwaves are locked simultaneously. Closed-loop activation, data collection in progress. Duration: .

[0125] T chop / 2 is the absolute time base for system timing scheduling (half a period of the physical square wave).

[0126] S2 (Flip transition, blanking): T detected chop When the timer reaches 2, execute the following within the same clock tick:

[0127] (a) Switch the direction of the H-bridge;

[0128] (b) Update the NCO frequency control word to enable dual-frequency microwave from Jump to ;

[0129] (c) Set the blanking flag;

[0130] (d) Freeze the PID output and integral term. Continuous τ blank =500μs.

[0131] S3 ( (Steady-state): Blanking completes, resets the blanking flag, presets the polarity of the PID integral term based on symmetry, activates the closed loop, and simultaneously locks the dual-frequency microwave. Data acquisition resumed. Duration: 49.5ms.

[0132] S4 (Flip Transition, Blanking): Same as S2, but in the opposite direction, switching to S4 within the same clock tick. .

[0133] The state machine is implemented entirely in FPGA hardware logic, with timing accuracy down to the nanosecond level, ensuring strict synchronization of each operation edge.

[0134] In some embodiments, a quantum zero flux closed-loop DC current measurement system based on bias magnetic field polarity time-domain chopping is also provided, comprising:

[0135] Quantum sensitive unit: Contains a diamond NV color center ensemble, installed inside the probe, and generates fluorescence by being excited by a 532nm laser. The fluorescence intensity is collected by a photodetector.

[0136] Bias magnetic field generating unit: includes bias coil (installed inside the probe, in the same direction as the NV color center measurement axis) and external precision constant current source. The output of the constant current source is connected to the H-bridge switching circuit, and the polarity reversal of the bias current is achieved by the FPGA controlling the switching direction of the H-bridge.

[0137] Microwave excitation unit: Includes a digital frequency synthesizer (NCO) and a microwave power amplifier, capable of simultaneously generating dual-frequency microwave signals (frequency corresponding to...). and The frequency control word is updated in real time by the FPGA;

[0138] Zero flux feedback unit: includes a feedback coil (coaxially mounted with the bias coil) and a feedback current source. The FPGA calculates the feedback control quantity based on the error signal demodulated from the fluorescence signal of the photodetector using a PID algorithm.

[0139] Main control unit: FPGA chip, internally implementing a five-state finite state machine, synchronously outputting H-bridge switching instructions, microwave frequency control word update instructions and digital blanking window control signals under the same clock cycle, precisely controlling the timing coordination of bias polarity switching, microwave frequency jumping, digital blanking window opening and closing, closed-loop activation and data acquisition.

[0140] Example 2

[0141] This example is a test case. Figure 1 The uncompensated scheme described herein, which neither employs dual-frequency microwave locking nor bias field chopping, exhibits a baseline drift of approximately 764 μT during testing within an 80°C temperature range. This drift is caused by the combined effect of D(T) temperature drift (contributing approximately 212 μT) and bias source temperature drift (contributing approximately 552 μT), resulting in a relative drift rate of 76.4% with a 1 mT bias field. Because this scheme fails to take any measures to suppress these two types of temperature drift, the baseline exhibits severe linear drift with temperature, making it unsuitable for precise measurements over a wide temperature range.

[0142] The aforementioned dual-frequency locking scheme operates under a dual-frequency microwave locking system but does not implement bias field polarity chopping. In tests with an 80°C temperature difference, dual-frequency locking suppressed D(T) temperature drift by approximately 10 times, with a residual contribution of approximately 21.2 μT. However, the bias source temperature drift contribution remained as high as 552 μT, resulting in a total drift of approximately 573 μT, representing a drift rate of 57.3% relative to a 1 mT bias field. While this scheme effectively solved the D(T) temperature drift problem, it had no effect on suppressing bias source temperature drift, making bias source temperature drift a new dominant issue.

[0143] Figure 1 Quantitative comparison of three curves proves that the baseline drift of both the uncompensated scheme and the dual-frequency locking scheme changes significantly with temperature. The total drift of the two schemes at a temperature difference of 80°C is as high as 764μT and 573μT respectively, which cannot meet the requirements of high-precision measurement. Only the scheme of this invention (hereinafter referred to as this scheme) completely eliminates the temperature drift of the bias source through chopping and phase cancellation, with residual drift of less than 1μT (<0.1%), thus achieving atomic-level baseline solidification.

[0144] exist Figure 2 In the aforementioned scheme without a digital blanking window, no digital blanking window is introduced when the bias field polarity reverses, and the closed-loop PID controller continues to operate during the instant of reversal. During testing, a strong electromagnetic transient is generated in the bias coil and feedback coil at the moment of polarity reversal. The closed-loop error signal jumps instantaneously to its maximum value, and the PID integral term rapidly accumulates this transient error, causing a severe overshoot in the feedback control quantity, with the peak value reaching 320% of the steady-state value. This overshoot causes the input command of the feedback current source to exceed the linear output range and saturate at the top rail, resulting in a brief loss of lock in the closed loop. Recovery requires tens to hundreds of milliseconds of damped oscillation, severely affecting the effective measurement of the steady-state period after the reversal.

[0145] A digital blanking window scheme (in this invention) is proposed, which involves simultaneously opening a 500μs digital blanking window when the bias field polarity reverses. During the window period, the FPGA performs three operations: blocking photodetector data acquisition, freezing the PID output control quantity, and freezing the PID integral term. Test results show that the electromagnetic transient at the moment of reversal is completely isolated within the window period, and the control quantity remains 100% unchanged from its steady-state value before the reversal throughout the entire window period, without any overshoot. After the window ends, the PID integral term is adjusted according to... and The symmetry completes the polarity preset, the closed loop is reactivated, and the control quantity smoothly transitions from 100% to a new steady-state value (such as -100%). The transition process is free of overshoot and oscillation, and the settling time is less than 100μs.

[0146] Figure 2Quantitative comparison of two curves proves that: without a digital blanking window, the flipping transient can cause the control quantity to overshoot by up to 320%, which can easily lead to feedback source saturation and lockout; however, by introducing a 500μs digital blanking window, the transient is completely isolated, and the control quantity after the window ends can be smoothly switched, ensuring the stable operation of the closed-loop system at the moment of polarity reversal, and effectively ensuring that more than 99% of the time in each chopping half-cycle is in an effective measurement state.

[0147] Figure 3 For a single image covering a complete chopper cycle (T) chop The multi-track timing waveform diagram (100ms) shows time (ms) on the horizontal axis and five control tracks on the vertical axis: bias field polarity (square wave, ±1), digital blanking window flag (active high), microwave frequency state (step transition), closed-loop lockout state, and data acquisition state. The alignment of the five tracks on the time axis precisely demonstrates the unified scheduling of bias chopping, microwave frequency hopping, digital blanking window, and closed-loop freeze by the FPGA's five-state finite state machine.

[0148] from Figure 3 It can be seen that the polarity of the bias field is in every 50ms half-cycle (T chop / 2) Switch once, followed immediately by a 500μs digital blanking window (1% of half a cycle) after the switching edge, during which the microwave frequency synchronously jumps Δω=2γB. bias The PLL is locked, and both closed-loop locking and data acquisition are frozen. After the window ends, the closed loop is reactivated, data acquisition resumes, and a steady-state measurement period of 49.5ms is maintained. The switching edges of the four control signals are strictly aligned within nanosecond precision. The bias flip, microwave transition, and blanking trigger are all driven by the same clock cycle, and there are no timing misalignments or race conditions.

[0149] Figure 3 The synchronization relationship of the five trajectories demonstrates that the four-way coordination described in this invention (bias chopping, simultaneous dual-frequency locking, digital blanking window, and PID integral management) is not an independent operation of each module, but rather a deep coupling within the unified timing framework of the FPGA five-state FSM. The occurrence, duration, and end time of each action are subject to strict hardware timing constraints, ensuring that frequency tracking, transient isolation, and smooth closed-loop switching at the moment of polarity reversal do not conflict on the same time axis. Figure 1 Temperature drift elimination and Figure 2 Overshoot-free switching provides an engineering-feasible timing basis.

[0150] Example 3

[0151] To verify the difference between the present invention and the prior art CN121164991B, a comparative experiment was conducted in this embodiment.

[0152] Comparison object: The technical solution of CN121164991B (dual-frequency alternating measurement and closed-loop control, static bias, and biasless field chopping).

[0153] Experimental conditions: Ambient temperature cycling from -20°C to +60°C (80°C temperature difference), B bias =1mT,B ext =100μT.

[0154] The CN121164991B scheme (dual-frequency alternating measurement) involves time-division switching between two single-quantum resonance frequencies, alternating fluorescence measurement and difference calculation, with closed-loop control adjusting the compensation current. The measurement error at an 80℃ temperature difference is approximately 3.8% of full scale, with the main sources of error being:

[0155] 1) The inherent time delay of alternating measurements causes a lag in tracking temperature drift;

[0156] 2) The temperature drift from the bias source cannot be eliminated (the temperature drift under static bias is directly superimposed on the measurement results).

[0157] 3) Without a digital blanking window, the system is sensitive to electromagnetic interference.

[0158] The solution of this invention (dual-frequency simultaneous locking, bias field chopping, digital blanking window and five-state FSM) has a measurement error of less than 0.02% of full scale under a temperature difference of 80℃.

[0159] Therefore, it can be seen that the present invention overcomes the time delay defect of alternating measurement by locking dual frequencies simultaneously, completely eliminates the temperature drift of the bias source by bias field chopping and phase cancellation, and solves the flip transient problem by digital blanking window and FSM timing coordination. Its overall performance is significantly better than the existing technology.

[0160] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A quantum zero-flux closed-loop DC current measurement method based on bias magnetic field polarity time-domain chopping, characterized in that, Includes the following steps: Step 1: Using a chopping frequency f chop The direction of the current in the bias coil is periodically reversed, causing the diamond NV color center to alternately be in a positive bias state on the time axis. and reverse bias state ; Step 2: Simultaneously with the bias polarity reversal, the FPGA synchronously updates the frequency control word of the digital frequency synthesizer, causing the simultaneously applied dual-frequency microwave signals to synchronously jump from the current frequency to the target frequency. Switch to Dual-frequency microwave frequency from Jump to ,from Switch to Dual-frequency microwave frequency from Jump to ; Step 3: At the transition edge of the bias polarity reversal, simultaneously open the digital blanking window, and perform the following operations during the digital blanking window period: Block the data acquisition of the photodetector; The feedback control quantity of the zero flux closed loop is frozen to maintain its value from the previous moment. Freeze the integral term of the PID controller to keep its value unchanged from the previous moment; Step 4: After the number blanking window is finished, in During the steady state, dual-frequency microwaves are simultaneously locked. Energy level, closed-loop feedback output ;exist During the steady state, dual-frequency microwaves are simultaneously locked. Energy level, closed-loop feedback output ; Step 5: Collect data within an adjacent complete chopping cycle. and Perform the arithmetic mean. Eliminate bias source temperature drift Outputs a true DC magnetic field .

2. The method according to claim 1, characterized in that, The chopping frequency The selection simultaneously satisfies: The cutoff frequency is greater than the temperature drift of the bias source and the temperature drift of D(T), where D(T) is the zero-field splitting parameter of the diamond NV color center; f chop Control bandwidth of a closed-loop magnetic flux less than zero; f chop Avoid power frequencies and their integer multiples.

3. The method according to claim 2, characterized in that, The chopping frequency f chop =10Hz.

4. The method according to claim 1, characterized in that, The duration τ of the digital blanking window blank Simultaneously satisfy: τ blank The transient decay time constant τ of the bias coil inductance is greater than that of the bias coil inductance. L ; τ blank Greater than the digital frequency synthesizer lock-in time τ PLL ; τ blank Less than the chopping period T chop 1 / 10 of.

5. The method according to claim 4, characterized in that, The duration τ of the digital blanking window blank =500μs.

6. The method according to claim 1, characterized in that, After freezing the integral term of the PID controller in step 3, at the end of the digital blanking window, the value of the integral term of the PID controller is multiplied by -1 to preset the polarity, and then the closed-loop control is reactivated.

7. The method according to claim 1, characterized in that, Microwave frequency jump amplitude in step 2 Where γ is the electron gyromagnetic ratio of the diamond NV color center, and B bias The bias magnetic field strength is used; the frequency transition process is completed entirely within the digital blanking window, and the microwave frequency is stably locked when the digital blanking window ends.

8. The method according to claim 1, characterized in that, Perform data validity checks after each digit blanking window ends and before data acquisition begins: Check if the fluorescence signal intensity of the photodetector is within the normal range; Check if the closed-loop error signal is within the convergence threshold; If any condition is not met, the data for that half-cycle is discarded, and the measurement value from the previous valid cycle is used.

9. A quantum zero flux closed-loop DC current measurement system based on bias magnetic field polarity time-domain chopping, used to implement the method of any one of claims 1 to 8, characterized in that, include: Quantum sensitive unit: contains a diamond NV color center ensemble, which generates fluorescence by laser excitation, and the fluorescence intensity is collected by a photodetector; Bias magnetic field generating unit: includes bias coil and precision constant current source, the output of constant current source is connected to H-bridge switching circuit; Microwave excitation unit: includes a digital frequency synthesizer and a microwave power amplifier, which can generate dual-frequency microwave signals simultaneously; Zero flux feedback unit: includes a feedback coil and a feedback current source; Main control unit: FPGA chip, internally implementing a five-state finite state machine, synchronously outputting H-bridge switching instructions, microwave frequency control word update instructions and digital blanking window control signals under the same clock cycle, precisely controlling the timing coordination of bias polarity switching, microwave frequency jumping, digital blanking window opening and closing, closed-loop activation and data acquisition.

10. The system according to claim 9, characterized in that, The bias magnetic field strength B bias The value range is 1~10mT; And / or, The chopping frequency f chop The value range is 5~20Hz; And / or, Duration τ of the digital blanking window blank The value range is 200μs to 1ms.

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