A TA loop non-synchronous phase analysis method and system

Abstract

The present application relates to the technical field of power transformer secondary circuit on-site detection, in particular to a TA circuit non-synchronous phase analysis method and system, comprising the following steps: collecting TA secondary current waveform, calculating initial phase through error compensation, sending electrical parameters to the main control host through LoRa, obtaining reference phase, comparing the phase difference between each phase initial phase and reference phase, and outputting three-phase sequence matching result according to the phase difference to distinguish the circuit polarity. In the present application, the initial phase deviation is corrected by error compensation, the absolute phase under non-synchronous clock which is difficult to correspond is converted into determinable phase difference by comparing the reference phase with each phase initial phase, the parameter transmission is guaranteed to be complete by response confirmation and retransmission, the phase difference supports polarity discrimination and three-phase sequence matching, the influence of clock asynchronization, measurement error and communication fluctuation on the analysis result is reduced, and the circuit verification accuracy, reliability and efficiency are improved.

Description

Technical Field

[0001] This invention relates to the field of on-site testing technology for secondary circuits of power transformers, and in particular to a method and system for asynchronous phase analysis of TA circuits. Background Technology

[0002] The field technology of on-site testing of secondary circuits of power transformers involves the on-site acquisition of periodic electrical signals of secondary circuits of power transformers, the measurement of frequency components, and the extraction of phase parameters.

[0003] Current phase detection of current transformer (TA) circuits typically relies on the test excitation at the main control end and the current data at the acquisition end being on the same clock reference. When field equipment is distributed, the synchronization condition is easily affected by communication distance and clock deviation, making it difficult to stably correspond to the phase reference. The acquired waveform will also be superimposed with the inherent measurement error of the equipment, causing initial phase shift. When data transmission is affected by wireless link fluctuations, parameter loss may also occur, which in turn causes deviations in polarity judgment and three-phase sequence matching results. This increases the workload of field verification and repeated testing, and reduces the efficiency and reliability of circuit verification under complex field conditions. Summary of the Invention

[0004] This invention aims to provide a method and system for asynchronous phase analysis of current transformer (TA) circuits. This method performs phase analysis on the power frequency test excitation output by the main control unit and the TA secondary current acquired by the acquisition unit when there is no unified synchronous clock between the main control unit and the acquisition slave unit. By acquiring, compensating for errors, and extracting the initial phase of the TA secondary current waveform, the electrical parameters formed on the acquisition side are wirelessly transmitted to the main control unit via LoRa. The main control unit compares the reference phase formed by its output power frequency test excitation with the initial phase of each phase circuit to obtain the phase difference value of each phase circuit. This allows for the polarity determination of the TA secondary circuit and three-phase phase sequence matching, forming a phase analysis technology solution for TA circuits suitable for asynchronous acquisition conditions.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: a method for asynchronous phase analysis of a TA circuit, comprising the following steps: S1. Obtain the secondary current waveform of the TA. After acquiring a valid AC waveform, stop sampling. Read the built-in error compensation parameters of the device to correct the waveform of the secondary current of the TA. Calculate the current amplitude and initial phase to generate electrical parameters. S2. The electrical parameters are transmitted to the main control host via LoRa wireless. If no host data response message is received, the electrical parameters are retransmitted. The current acquisition task ends after the host data response message is received. S3. Obtain the reference phase output by the main control host, and read the initial phase of each phase circuit after error compensation. Compare the initial phase of each phase circuit with the reference phase and calculate the phase difference. S4. Use the phase difference value to determine the polarity of the TA secondary circuit, and output the three-phase phase sequence matching result according to the phase difference value of each phase circuit.

[0006] Furthermore, S1 includes the calculation of the electrical parameters: Acquire the secondary current waveform of the TA. Stop sampling after acquiring the complete AC waveform and read the built-in error compensation parameters of the device corresponding to the current acquisition channel. The amplitude and phase errors of the TA secondary current waveform are compensated according to the built-in error compensation parameters of the device to obtain the corrected TA secondary current waveform. The current amplitude is calculated based on the corrected TA secondary current waveform, and the initial phase is determined based on the zero-crossing position of the corrected TA secondary current waveform. The current amplitude and the initial phase are then used as the electrical parameters. The device has built-in error compensation parameters including amplitude error compensation parameters and phase error compensation parameters. It reads the amplitude error compensation parameters and the phase error compensation parameters corresponding to the current acquisition channel, corrects the amplitude of the sampled value of the TA secondary current waveform according to the amplitude error compensation parameters, and corrects the phase of the TA secondary current waveform according to the phase error compensation parameters. The device has built-in error compensation parameters, which are determined and written into the device during factory calibration or pre-calibration, and can be directly read during data acquisition.

[0007] Furthermore, S1 also includes acquiring the secondary current waveform of the TA, firstly using a fixed sampling frequency of 50kHz and a 2048-point ring buffer to cyclically store the real-time current waveform, and setting a current amplitude start threshold. When the values ​​of 4 consecutive sampling points exceed the threshold, the complete 50Hz power frequency cycle waveform is automatically locked. Then, a continuous 8-point weighted multi-level mean filtering algorithm is used to filter out high-frequency noise caused by substation switches and coupling.

[0008] Furthermore, in S2, the standardized structure of the host data response message is as follows: 2-byte message header 0x0564, 2-byte data type field, 2-byte data length field, N-byte valid electrical data, 2-byte CRC check field, and 2-byte message tail 0xAA55.

[0009] Furthermore, S3 includes calculating the phase difference value: First, obtain the reference phase output by the main control host, then read the initial phase of each phase circuit after error compensation, and record them according to the order corresponding to each phase circuit. After receiving the initial phase of each phase circuit, the main control host determines the initial phase corresponding to each phase circuit according to the phase and maintains the correspondence between each phase circuit and the corresponding initial phase. According to the correspondence between each phase circuit and its corresponding initial phase, the initial phase corresponding to each phase circuit is selected and compared with the reference phase to obtain the phase difference value corresponding to each phase circuit; Based on the periodic relationship that one power frequency cycle corresponds to 360° phase, the phase difference corresponding to each phase circuit is converted, and the phase difference converted to the range of 0° to 360° is determined as the phase difference value of each phase circuit.

[0010] Furthermore, during the acquisition of the reference phase: The main control host records the start time of the power frequency test excitation while outputting the power frequency test excitation, and uses the start time as the phase start point of the power frequency test excitation; The power frequency period is determined based on the frequency of the power frequency test excitation, and the periodic change of the power frequency test excitation from the phase start point is determined according to the power frequency period. The corresponding phase is determined based on the position of the power frequency test excitation within the power frequency cycle, and the determined phase is used as the reference phase.

[0011] Furthermore, during the conversion of phase differences between each phase circuit: When the calculated phase difference is less than 0°, add 360° to the phase difference to obtain the converted phase difference. When the calculated phase difference is greater than or equal to 360°, reduce the phase difference by 360° until the phase difference is within the range of 0° to 360°. The phase difference within the range of 0° to 360° is determined as the phase difference value of the corresponding phase loop.

[0012] Furthermore, S4 includes determining the polarity of the TA secondary circuit: Set the phase tolerance, and use 0° and 180° as the comparison benchmarks for correct polarity and reverse polarity, respectively; Calculate the first phase deviation between the phase difference value and 0° and the second phase deviation between the phase difference value and 180°, and compare the first phase deviation and the second phase deviation with the allowable phase deviation respectively; When the first phase deviation is not greater than the phase allowable deviation, the polarity of the corresponding TA secondary circuit is determined to be correct; when the second phase deviation is not greater than the phase allowable deviation, the polarity of the corresponding TA secondary circuit is determined to be reversed.

[0013] Furthermore, S4 also includes three-phase sequence matching: The phase difference values ​​corresponding to the three-phase circuits are obtained respectively, and the sequential relationship of the three phase difference values ​​within one power frequency cycle is determined. The order of the three phase differences is compared with the order of the three-phase power frequency test excitation output by the main control host. When the order of the two phases is consistent, the phase correspondence between the three-phase circuit and the three-phase power frequency test excitation is determined. The phase sequence of the three-phase circuit is determined according to the phase correspondence, and the three-phase phase sequence matching result is output.

[0014] A asynchronous phase analysis system for a TA circuit, the system comprising a waveform acquisition module, a transmission module, a calculation module, and a discrimination and matching module.

[0015] The waveform acquisition module is used to acquire the secondary current waveform of the current transformer (TA). After acquiring a valid AC waveform, sampling stops, and the built-in error compensation parameters of the device are read to correct the waveform of the secondary current waveform of the TA. The current amplitude and initial phase are calculated to generate electrical parameters.

[0016] The transmission module is communicatively connected to the waveform acquisition module and is used to transmit the electrical parameters to the main control host via LoRa wireless. If no host data response message is received, the electrical parameters are retransmitted. After receiving the host data response message, the current acquisition task is terminated.

[0017] The calculation module is communicatively connected to the transmission module and is used to obtain the reference phase output by the main control host, read the initial phase of each phase circuit after error compensation, compare the initial phase of each phase circuit with the reference phase, and calculate the phase difference.

[0018] The discrimination and matching module is communicatively connected to the calculation module and is used to use the phase difference value to determine the polarity of the TA secondary circuit and output the three-phase phase sequence matching result according to the phase difference value of each phase circuit.

[0019] Compared with the prior art, the advantages and positive effects of the present invention are as follows: In this invention, sampling ends after a valid AC waveform is acquired, and the current waveform is corrected based on the equipment error compensation parameters. The current amplitude and initial phase are calculated from the correction results, so that the phase information at the acquisition end forms comparable electrical parameters. Wireless transmission, combined with response confirmation and retransmission if no response is received, ensures the integrity of parameter transmission. Then, the reference phase output by the main control host is used as the comparison benchmark to convert the initial phase of each phase circuit into a phase difference value, so that the time deviation introduced by clock asynchrony is converted into a identifiable relative phase relationship. The phase difference result is used to connect the polarity determination of the TA secondary circuit and the three-phase phase sequence matching, reducing the impact of measurement errors and communication fluctuations on the analysis results and improving the accuracy and efficiency of circuit verification. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the overall process of the asynchronous phase analysis method for TA circuits; Figure 2 A schematic diagram of the acquisition and correction of the secondary current waveform of the current transformer (TA). Figure 3 A schematic diagram illustrating the interaction between LoRa electrical parameter transmission and host data response messages; Figure 4 A schematic diagram for phase difference calculation, polarity determination, and three-phase phase sequence matching; Figure 5 This is a schematic diagram of data interaction in a non-synchronous phase analysis system for a TA loop. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0022] In this embodiment, the acquisition slave unit is used to acquire the secondary circuit current of the current transformer (CT), while the main control unit is used to output power frequency test excitation, receive data uploaded by the acquisition slave unit, and perform phase calculations. No unified synchronization clock is set between the main control unit and the acquisition slave unit. The acquisition slave unit does not upload the sampling time to the main control unit as a unified time synchronization basis, and the main control unit does not send a unified clock to the acquisition slave unit. The acquisition slave unit performs CT secondary current waveform acquisition, error compensation, current amplitude calculation, and initial phase extraction locally. The main control unit establishes a reference phase based on the start time recorded when it outputs the power frequency test excitation, and then calculates the phase difference between the received initial phases of each phase circuit.

[0023] In this embodiment, the secondary current waveform of the current transformer (CT) is a sequence of discrete sampled values ​​continuously output by the current acquisition channel of the acquisition unit. The device has built-in error compensation parameters, including amplitude error compensation parameters and phase error compensation parameters, both of which are stored according to the acquisition channel. The current amplitude and initial phase constitute the electrical parameters sent by the acquisition unit to the main control unit. The initial phase is determined by the zero-crossing position of the CT secondary current waveform after error compensation. The reference phase is determined by the main control unit based on the start time of the power frequency test excitation, the excitation frequency, and the position within the current power frequency cycle. The phase difference is the phase result obtained by comparing the initial phase of each phase circuit with the reference phase and processing it according to a 360° period range.

[0024] Example 1 Please see Figure 1-4This embodiment provides a method for asynchronous phase analysis of a current transformer (TA) circuit. After the main control host starts the power frequency test excitation, the acquisition slave begins to read the current sampling values ​​of the corresponding TA secondary circuit. A single acquisition task executes steps S1, S2, S3, and S4 sequentially. S1 outputs the current amplitude and initial phase; S2 sends the aforementioned electrical parameters to the main control host; S3 generates the phase difference values ​​for each phase circuit on the main control host side; and S4 reads the phase difference values ​​and outputs the TA secondary circuit polarity result and the three-phase phase sequence matching result.

[0025] For example, the test object is the secondary circuit of a three-phase current transformer (CT) in a line protection bay within a 110kV substation, with a rated secondary current of 1A. The on-site test is conducted by one operator, who carries a lightweight main control unit and three data acquisition sub-units corresponding to phases A, B, and C into the bay under test. The main control unit weighs 1.35kg, each data acquisition sub-unit weighs 0.32kg, and the total weight of the main unit and three sub-units is approximately 2.31kg, which can be carried and moved by a single person in one trip. The data acquisition sub-units use an openable current sensing structure clamped onto the corresponding CT secondary conductors, eliminating the need to disconnect the CT secondary circuit or add electrical connections to the CT secondary terminals during data acquisition. Both the main unit and the data acquisition sub-units are powered by internal batteries, requiring no additional power lines to be laid on-site.

[0026] After the main control unit and the three-phase acquisition sub-units (A / B / C) are powered on, the three sub-units automatically send heartbeat messages containing device number, channel number, battery status, and communication status at a 1-second heartbeat transmission cycle. The main control unit then enters wireless scanning mode and automatically identifies the devices based on their device numbers and channel identifiers. In this field test, the main control unit took 1.4s, 2.1s, and 2.8s to identify the three acquisition sub-units (A, B, and C) from the start of scanning, and completed automatic network pairing between the three sub-units and the A / B / C phase circuits within 3.2s. The entire networking process did not use GPS, BeiDou, IEEE 1588, or an external synchronization clock, nor was a phase synchronization line laid between the main control unit and the acquisition sub-units. The LoRa wireless link is only used to transmit the electrical parameters and response information already generated by the acquisition sub-units; subsequent communication waits or retransmissions do not alter the already obtained waveform sampling results.

[0027] S1. Obtain the secondary current waveform of the current transformer (CT). After acquiring a valid AC waveform, stop sampling, read the built-in error compensation parameters of the device to correct the waveform of the secondary current waveform of the CT, calculate the current amplitude and initial phase, and generate electrical parameters.

[0028] After the acquisition unit enters the sampling state, the current acquisition channel reads the secondary current sampling value of the current transformer (TA) at a fixed sampling frequency of 50kHz. Each new sampling value is written to the 2048-point circular buffer in the order of sampling. Once the circular buffer is full, the write pointer returns to the starting position, and subsequent sampling values ​​overwrite the earliest written data. Therefore, the buffer always retains the most recent continuous sampling sequence.

[0029] A 50kHz sampling frequency corresponds to a 20μs time interval for a single sampling point, and a 2048-point circular buffer corresponds to a continuous sampling time of approximately 40.96ms. In this 110kV substation field test, the actual output power frequency test excitation frequency of the main control host was 50.000Hz~50.006Hz. Therefore, one power frequency cycle is approximately 19.998ms~20.000ms, and the 2048-point circular buffer can continuously store data for approximately 2.048 50Hz power frequency cycles. Thus, even if the effective AC waveform trigger position occurs in the middle of a power frequency cycle, the buffer still has sufficient historical data before triggering for complete cycle extraction.

[0030] For a 50Hz power frequency current sampled at a 50kHz sampling frequency, the number of sampling points in one power frequency cycle is determined by the ratio of the sampling frequency to the power frequency. The data length stored in the 2048-point ring buffer is greater than one 50Hz power frequency cycle. After waveform triggering, the acquisition unit can obtain a complete 50Hz power frequency cycle from the existing data in the buffer and the continuous sampling data after triggering, without needing to restart the sampling sequence at the time of triggering.

[0031] When the power frequency is 50.000Hz, one complete cycle corresponds to 50kHz ÷ 50Hz = 1000 sampling points; when the output frequency in this experiment increases to 50.006Hz, one cycle corresponds to approximately 999.88 sampling intervals. The equipment determines the boundary of the complete cycle based on the currently measured power frequency cycle and uses existing zero-crossing positioning processing to obtain the start and end positions of the cycle. Therefore, the 2048-point buffer capacity has more than twice the sampling data margin relative to a single cycle.

[0032] During the data acquisition process, a current amplitude trigger threshold is used to determine whether a valid AC input has occurred. The current sampled value is compared with the current amplitude trigger threshold point by point. Once a sampled point exceeds the trigger threshold, continuous counting begins; if the next sampled point also exceeds the trigger threshold, the count continues to increase; if any intermediate sampled point does not exceed the trigger threshold, the continuous counting ends, and counting restarts when a subsequent sampled point exceeds the trigger threshold. When four consecutive sampled points exceed the trigger threshold, the acquisition unit records the current state as a valid AC waveform trigger state.

[0033] In this embodiment, for the secondary circuit of a 1A rated current transformer (TA), the current amplitude start-up threshold of the current acquisition channel is set to 0.050A. This 0.050A is not arbitrarily set, but is determined by the equipment before the on-site task begins, according to the method of "measured no-load noise value + safety margin". Specifically, before the main control host outputs the power frequency test excitation, the three acquisition slave units A / B / C each perform 2s of no-load sampling, corresponding to 100,000 sampling points; the instantaneous absolute peak noise measured by the three channels under no-load conditions is 6.4mA, 6.9mA and 6.6mA respectively. The maximum value of the three channels, 6.9mA, is taken, and an anti-interference margin of not less than 6 times the noise peak value is set, resulting in 6.9mA×6=41.4mA. The equipment then rounds up according to the preset 10mA tuning step to obtain the current amplitude start-up threshold of 50mA for this task, i.e., 0.050A. This threshold is only 5% of the rated secondary current of the transformer (TA) at 1A, which is significantly lower than the actual test current. This ensures reliable start-up of the power frequency test current while suppressing false triggering by electromagnetic noise on site.

[0034] The duration corresponding to the continuous 4-point judgment is 4 × 20 μs = 80 μs. Under the aforementioned 0.050A start-up threshold, no valid waveform false triggers were generated during 10 minutes of continuous monitoring when no test current was output on site. After the main control host outputs a power frequency test current of approximately 0.50A, the A, B, and C phase acquisition sub-units complete the continuous 4-point judgment within 80 μs after entering the threshold range. Using continuous 4-point judgment instead of single-point judgment can avoid triggering the complete cycle processing by a single or a small number of abnormal sampling points caused by switch action spikes in the substation secondary circuit, pulse interference from wireless equipment, or transient coupling of adjacent conductors.

[0035] The current amplitude threshold is a device configuration value used by the current acquisition channel. It is determined before the start of an acquisition task and does not change with individual sampling points during the execution of the current task.

[0036] For example, if the start threshold for all three phases (A / B / C) is set to 0.050A before the start of this data acquisition task, then during this round of testing, even if the instantaneous value of the sampled waveform rises from 0.050A to a peak value of approximately 0.71A, the start threshold remains unchanged at 0.050A and is not adjusted proportionally based on the real-time waveform peak value. The equipment can only re-determine the threshold when the current task ends and the next test object begins, or when the test personnel perform a readjustment operation.

[0037] After a valid AC waveform is triggered, the acquisition unit reads the sampled data saved before the trigger point from the 2048-point circular buffer, and continues to acquire sampled data after the trigger point, forming a continuous sampling sequence in chronological order, and locking a complete 50Hz power frequency cycle from this sequence. After the complete cycle is locked, the current acquisition task stops sampling, and subsequent filtering, error compensation, current amplitude calculation, and initial phase extraction all use the same locked cycle waveform.

[0038] Taking a single test of phase A as an example, when a valid AC trigger occurs, 2048 consecutive sampling points are already stored in the ring buffer. The device locks 1000 sampling points based on the zero-crossing positions before and after the trigger as the complete power frequency cycle of approximately 20,000 ms. Once this cycle is locked, a read-only waveform data area is formed. Even if there is a wait of more than 200 ms during the subsequent LoRa communication phase, this 1000-point cycle data remains unchanged, and no other power frequency cycle is selected. When the same test was repeated 20 times in the field, the complete cycle was locked after each valid trigger, and there was no change in the sampling waveform of the same task due to different communication times.

[0039] The locked 50Hz power frequency cycle waveform enters a continuous 8-point weighted multi-stage mean filtering process. The filtering process moves sequentially along the sampling points, reading eight consecutive sample values ​​at a time. These eight sample values ​​are averaged according to a fixed weighting relationship used by the equipment, and the processing result is written to the filter output sequence. The window moves forward to process the next set of consecutive sample values ​​until the filtering of this locked waveform is complete. This process is used to reduce high-frequency variations in the power frequency current waveform caused by switching actions or line coupling. The same 8-point processing rule is used throughout the entire filtering process of a locked waveform.

[0040] The 8-point window used in this embodiment corresponds to a sampling time width of 8 × 20 μs = 160 μs. The fixed normalized weighting coefficients used in the current equipment are 1, 2, 3, 4, 4, 3, 2, 1, and the sum of each weight is 20. That is, each output point is calculated according to (1 × X1 + 2 × X2 + 3 × X3 + 4 × X4 + 4 × X5 + 3 × X6 + 2 × X7 + 1 × X8) / 20. This set of weights is determined when the equipment program is fixed and will not be changed during this task. The original locked waveform of phase A in the field has a local high-frequency disturbance of about 4.7 kHz superimposed. Before filtering, the maximum instantaneous jump change of adjacent sampling points is about 23.6 mA. After 8-point weighting processing, it is reduced to 6.8 mA, while the effective value change of the 50 Hz fundamental wave is less than 0.15%, thus taking into account both high-frequency change suppression and power frequency waveform preservation.

[0041] After filtering, the acquisition unit reads the corresponding built-in error compensation parameters based on the current current acquisition channel number. The parameters read include the amplitude error compensation parameters and the phase error compensation parameters for that channel. These two types of parameters are written to the device after factory calibration or calibration operations and saved according to the acquisition channel. When performing field acquisition tasks, the saved parameters for the corresponding channel can be read directly.

[0042] The aforementioned error compensation parameters were obtained through factory calibration of the equipment. Specifically, calibration was performed using a standard AC current source with an accuracy class of 0.05 and a standard phase measurement device. At least five measurements were conducted at three amplitude points (0.20A, 0.50A, and 1.00A) and four phase positions (0°, 90°, 180°, and 270°). Channel compensation parameters were calculated based on the amplitude ratio and phase deviation between the standard value and the measured values ​​of each acquisition channel. The average of multiple measurements was then written to the corresponding channel's non-volatile storage area. Therefore, the compensation parameters are derived from standard value calibration, rather than being backfitted from the measured current transformer (TA) results on-site.

[0043] After factory calibration, the amplitude compensation coefficients for the A-phase acquisition unit were 1.0046, and the phase compensation was +0.38°; for the B-phase acquisition unit, the amplitude compensation coefficient was 0.9978, and the phase compensation was -0.43°; and for the C-phase acquisition unit, the amplitude compensation coefficient was 1.0029, and the phase compensation was +0.31°. When verified using a 0.50A, 50Hz standard AC current after calibration, the amplitude measurement errors of the three acquisition units were +0.11%, -0.08%, and +0.14%, respectively, and the residual phase errors were 0.17°, 0.21°, and 0.19°, respectively.

[0044] Amplitude error compensation parameters are used to correct the sampling amplitude of the filtered current transformer (TA) secondary current waveform. The acquisition unit reads the filtered output sequence point by point and corrects the sampling values ​​according to the amplitude error compensation relationship saved for the current channel, generating a sampled sequence with corrected amplitude. Phase error compensation parameters are used to correct the phase shift of the current channel's sampled waveform, and the compensation result is used for subsequent zero-crossing position and initial phase determination. After both types of compensation processing are completed, the corrected TA secondary current waveform used in this task is obtained.

[0045] For example, the uncompensated effective value of phase A in this locking cycle, calculated after filtering, is 0.4977A. After correction using the phase A amplitude compensation coefficient of 1.0046, it is approximately 0.5000A. The corresponding uncompensated zero-crossing calculated phase has a deviation of approximately -0.38° relative to the calibration reference. After adding the +0.38° phase compensation in this channel, this systematic phase deviation is canceled out. Phases B and C read their respective saved compensation parameters for processing, without calling the phase A parameters, thus avoiding the direct superposition of device discreteness between the three independent acquisition sub-units into the three-phase comparison results.

[0046] The current amplitude is calculated based on the corrected secondary current waveform of the current transformer (CT). The calculation input uses only the sampled data after amplitude error compensation, and the calculated current amplitude is written to the electrical parameter data area of ​​this task. This current amplitude is subsequently sent to the main control host along with the initial phase.

[0047] In a field test of a three-phase normal circuit, the main control unit was set with a power frequency test current of approximately 0.50A. After filtering and channel amplitude compensation, the effective values ​​of the secondary currents obtained by the A, B, and C phase acquisition sub-units were 0.5000A, 0.4987A, and 0.5015A, respectively. All three phase measurements were within ±0.5% of the test set value. These amplitude data were simultaneously sent to the main control unit as auxiliary records of the effective test status, allowing test personnel to confirm, in addition to the polarity results, that a test current was indeed flowing through the corresponding current transformer (CT) secondary circuit.

[0048] The initial phase is determined based on the zero-crossing position of the corrected TA secondary current waveform. The acquisition unit sequentially searches for the position where the waveform crosses zero along the sampling points of a complete power frequency cycle, and generates the initial phase based on the position of this zero-crossing position in the current complete power frequency cycle. The phase error compensation parameters of the current channel have already been used to correct the waveform phase, so the initial phase written into the electrical parameters is the compensated result.

[0049] Taking 50Hz and 1000 points / cycle as an example, without considering interpolation, each sampling interval corresponds to approximately 360° / 1000 = 0.36°. In this embodiment, the device further subdivides the zero-crossing points using existing adjacent-point zero-crossing positioning configurations; therefore, the initial phase digital representation resolution is set to 0.01°. On-site sampling of the same A-phase circuit was repeated 20 times. When the test current was maintained around 0.50A, the difference between the maximum and minimum values ​​of the compensated initial phase calculation results was 0.84°, with a standard deviation of approximately 0.22°, satisfying the stability requirements for subsequent polarity and phase sequence determination.

[0050] When the zero-crossing position is located between adjacent discrete sampling points, the specific positioning method is determined by the existing waveform processing configuration of the equipment. This implementation does not change this zero-crossing positioning method. The zero-crossing determination rules for different phase loops remain consistent, so that the initial phase generated by each phase loop can be compared by the main control host according to the same 360° power frequency cycle.

[0051] The three-phase acquisition units (A / B / C) used the same version of waveform processing program and the same zero-crossing judgment rule to avoid additional fixed angle differences caused by different zero-point algorithms for different phases. Based on 20 repeated tests, the single-channel phase repeatability of the three acquisition units under a test current of 0.50A was better than ±0.6°.

[0052] At the end of S1, the acquisition unit obtains at least two data items: current amplitude and initial phase. These two data items maintain a correspondence with the acquisition channel and constitute the electrical parameters for the current task. If S1 does not reach the trigger condition of four consecutive sampling points exceeding the current amplitude start threshold, it will not enter the full power frequency cycle lock, will not generate the electrical parameters for the current task, and the acquisition unit will continue to read the secondary current sampling value of the TA and update the 2048-point ring buffer.

[0053] For example, when the main control unit has not started the test excitation, a field acquisition unit generates a transient spike of approximately 0.061A due to operation of a neighboring circuit. However, this spike only lasts for two sampling points, or approximately 40μs, after which the sampled value drops back to 0.012A. Therefore, the continuous count is reset to zero at the third sampling point, failing to meet the triggering condition of exceeding 0.050A for four consecutive points, and no erroneous electrical parameters are generated. After the main control unit officially outputs a 0.50A power frequency current, there is a continuous threshold exceedance interval much greater than 80μs in each half-cycle, thus enabling stable and effective AC waveform triggering.

[0054] S2. The electrical parameters are sent to the main control host via LoRa wireless. If no host data response message is received, the electrical parameters are resent. The current acquisition task ends after the host data response message is received.

[0055] After S1 generates the electrical parameters, the data acquisition slave unit hands over the current amplitude and initial phase corresponding to the current task to the wireless transmission processing unit, and then transmits them to the main control host via the LoRa wireless link. Upon receiving the data, the main control host identifies the received data and returns a host data response message. The data acquisition slave unit determines whether to continue transmitting data for the current task based on whether it receives this response message.

[0056] In this embodiment, LoRa wireless communication in the 470MHz band is used on site. The actual spatial distance between the host and the acquisition slave is 8m to 32m, with obstructions such as metal doors of protective cabinets, terminal blocks and secondary cables in between.

[0057] The host data response message sequentially sets a 2-byte header (0x0564), a 2-byte data type field, a 2-byte data length field, N bytes of valid electrical data, a 2-byte CRC checksum field, and a 2-byte trailer (0xAA55). The receiving end first reads the header, identifies 0x0564, and then reads the data type field and the data length field. Based on the data length field, it retrieves the corresponding length of valid electrical data, and subsequently reads the CRC checksum field and the trailer (0xAA55).

[0058] For example, a valid electrical data message for phase A electrical parameters must include at least the phase A channel identifier, a current amplitude of 0.5000A, and the corresponding initial phase data. The main control host will only write this set of data into the phase A data area if the message header, data type, data length, CRC, and message tail all meet the current communication protocol, thereby avoiding the incorrect writing of phase B or phase C messages into the phase A record position.

[0059] After receiving a complete message, the master control host checks the received message using a CRC checksum field. If the message structure and checksum meet the current communication processing conditions, the master control host retains the corresponding electrical data and returns a host data response message to the acquisition slave. After receiving the host data response message, the acquisition slave sets the current task to the completed state and does not resend the electrical parameters.

[0060] Of the 300 sets of communication data collected on-site, the single communication time from the host receiving valid electrical parameters to the slave receiving a response was mainly distributed in the range of 28ms to 64ms, with an average of about 41ms. This communication time is much longer than that of a 20ms cycle at 50Hz power frequency, yet it does not affect the waveform results of the locked cycle, demonstrating that this solution does not require LoRa messages to arrive within a fixed power frequency cycle.

[0061] If the acquisition slave device does not receive a data response message from the host after sending electrical parameters, the current task remains incomplete. The acquisition slave device retransmits the same set of electrical parameters already generated by S1. During retransmission, 50kHz sampling, full cycle locking, filtering, and error compensation are not re-executed, nor is the initial phase recalculated, to avoid the same acquisition task generating a different set of sampling results due to communication retransmission.

[0062] In this embodiment, the response waiting time after a single transmission is configured to 200ms, which was obtained from on-site LoRa link communication tests. During the equipment development phase, 1000 round trips were statistically analyzed under metal enclosure conditions. More than 99% of valid messages were responded to within 120ms. Therefore, approximately 1.67 times the communication margin was reserved on top of 120ms, and the retransmission waiting time was set to 200ms. This 200ms is only a communication retransmission control parameter and is not used as a phase measurement parameter. In one on-site test, the first frame of the B-phase message did not receive a response due to temporary wireless interference. After 200ms, the B-phase slave retransmitted the original electrical parameters, in which the current amplitude and initial phase field were completely consistent with the first frame. The second frame received a response after approximately 37ms, and the B-phase acquisition task then ended.

[0063] If the host cannot complete the message reception and processing, the acquisition slave, having not received the host's data response message, will retain the original electrical parameters and enter the retransmission path. The acquisition task will only end after the acquisition slave receives the host's data response message. The data output by S2 for subsequent phase processing is the current amplitude and initial phase already received by the host, where S3 actually calls the initial phase for phase comparison.

[0064] Therefore, in single-person on-site operation, the tester does not need to observe the communication status of the three slave units and manually confirm each one. The A / B / C three-phase slave units automatically complete the sending, response confirmation, and necessary retransmission in the background. After the main control host interface finally displays that all three channels have entered the "data valid" state, subsequent analysis can proceed. In this actual test, the time from the establishment of the power frequency test excitation to the entry of all three-phase valid electrical parameters into the main control host was approximately 0.31 seconds, and approximately 0.52 seconds when one of the channels experienced a wireless retransmission.

[0065] S3. Obtain the reference phase output by the main control host, and read the initial phase of each phase circuit after error compensation. Compare the initial phase of each phase circuit with the reference phase and calculate the phase difference.

[0066] When the main control host outputs the power frequency test excitation, it records the moment when the power frequency test excitation begins to be output. This moment is taken as the phase start point of this power frequency test excitation. The main control host also reads the frequency of this output excitation and determines the power frequency period based on this frequency.

[0067] For example, in this field test, the excitation frequency was set to 50.00Hz, and the actual output frequency measured internally by the main control host was 50.003Hz, corresponding to a single cycle of approximately 19.9988ms. The main control host uses the actual start time of the test excitation output as the phase starting point of the current test sequence and continuously updates the power frequency cycle position based on the measured frequency. This reference comes from the test excitation itself of the main control host and does not require obtaining GPS timestamps or external synchronization pulses from the A / B / C acquisition slave units.

[0068] Starting from the initial moment of the power frequency test excitation, the main control host accumulates the excitation position according to the power frequency cycle. Once the current moment falls within a certain power frequency cycle, the corresponding phase within that cycle is determined based on the current moment's position relative to the start of that cycle, and this phase is used as the reference phase for comparison. A complete power frequency cycle is processed as 360°, and after the cycle ends, the phase position is re-determined according to the 360° cycle relationship for the next cycle.

[0069] Taking 50.003Hz as an example, the next 360° cycle begins approximately every 19.9988ms. The main control unit continuously uses the actual excitation frequency instead of accumulating it infinitely at a fixed 20.000ms, thus avoiding additional phase accumulation errors that would arise over time if the experimental excitation had a frequency deviation of 0.003Hz.

[0070] The initial phase of each phase circuit originates from the electrical parameters generated by S1 and sent to the main control unit by S2. When receiving data, the main control unit maintains the correspondence between the circuit and the initial phase. The initial phase received by the first phase circuit is written to the corresponding record position of the first phase circuit; the second and third phase circuits are saved in the same way. When retrieving data for subsequent phase calculations, the initial phase is obtained according to the circuit correspondence, without swapping the data positions of different circuits.

[0071] In this normal three-phase circuit data recording, the A, B, and C phase slave units were bound to the A, B, and C channels respectively using fixed device numbers. The actual receiving order of the main control host was phase C, phase A, and phase B, but the data still entered the respective data areas of C, A, and B, rather than being arranged according to the arrival order of LoRa messages. Therefore, even if the three slave units use asynchronous wireless transmission, the communication order will not be mistaken for the three-phase electrical phase sequence.

[0072] When the main control unit processes the current phase circuit, it reads the initial phase of the circuit and the reference phase corresponding to the current power frequency test excitation. The two are compared to obtain the original phase difference of the current circuit. The remaining phase circuits are calculated in the same way to form the original phase difference corresponding to each phase circuit.

[0073] In a series of repeated single-loop tests with normal polarity, the phase difference of phase A was measured 20 times, ranging from 0.9° to 2.7°, with an average of 1.8°. After reversing the polarity of the secondary circuit of the current transformer (TA) and connecting it to a simulated verification state, the phase difference obtained after the same treatment ranged from 179.0° to 181.5°, with an average of 180.3°. This demonstrates that correct polarity and reverse polarity exhibit a clear phase distinction of approximately 180°.

[0074] After calculating the original phase difference, period range processing is performed. If the original phase difference is less than 0°, 360° is added to the current result. If the processed result falls within the 0° to 360° range, it is directly used as the phase difference value for that loop. If the original phase difference is greater than or equal to 360°, 360° is subtracted from the current result; if the result is still greater than or equal to 360° after one subtraction, it is subtracted again by 360° until the result falls within the 0° to 360° range.

[0075] For example, if the original phase difference of phase A is -1.4°, it becomes 358.6° after adding 360°; if the equivalent cumulative result of a certain calculation is 721.7°, it becomes 361.7° after subtracting 360°, and then becomes 1.7° after subtracting 360° again. Finally, the equivalent phase position within 0° to 360° is used for subsequent discrimination.

[0076] Phase difference range processing only changes the period representation of the phase, without altering the corresponding loop relationships. The processed phase difference value of the first phase loop is still written to the corresponding position of the first phase loop, and the second and third phase loops are saved in the same way. After S3, the main control host obtains the phase difference values ​​of each of the three phase loops, and S4 directly reads these phase difference values ​​for polarity and phase sequence processing.

[0077] In a set of field data for three-phase phase sequence verification, with the A-phase excitation position as the 0° periodic reference position, the corresponding phase positions of the three circuits after processing over a 360° periodic range are 1.8° for phase A, 241.3° for phase B, and 120.9° for phase C. Observing the periodic position relationship from 0° to 120° to 240°, the circumferential phase position arrangement of A, C, and B can be obtained. Combined with the three-phase excitation phase definition used by the main control host, this can be converted into the A / B / C phase sequence relationship configured by the device for matching. This comparison uses the phase positions represented by the three-phase electrical parameters, not the time sequence of the LoRa slave devices' messages arriving at the host.

[0078] If a phase circuit does not currently have a corresponding initial phase, that phase circuit will not be included in the phase difference calculation. The main control unit retains the data of other phase circuits that have been received, and waits for the electrical parameters corresponding to the missing circuit to be obtained before completing the calculation for that circuit.

[0079] For example, in a field test, phases A and C receive valid parameters first, while phase B arrives approximately 0.21 seconds later due to communication retransmission. The main control host first retains the data from phases A and C, without using the two-phase data to infer the complete three-phase sequence; only after the valid message from phase B arrives and completes the CRC check is performed is the complete A / B / C three-phase comparison data formed.

[0080] S4. Use the phase difference value to determine the polarity of the TA secondary circuit, and output the three-phase phase sequence matching result based on the phase difference value of each phase circuit.

[0081] The polarity determination reads the current phase difference value of the phase loop output by S3 and reads the phase allowable deviation. 0° is used as the comparison benchmark for correct polarity, and 180° is used as the comparison benchmark for reverse polarity. The phase allowable deviation is the allowable angle range used for the current polarity determination, and the same determination configuration is used in one determination process.

[0082] In this field test of the 1A TA secondary circuit, the allowable phase deviation was set to ±10°. This 10° allowable deviation was not arbitrarily set, but determined based on the overall measurement error, the phase error of the TA itself, and the field interference margin. After equipment calibration, the residual phase error of the acquisition system did not exceed 0.5°, and the single-circuit phase fluctuation in 20 repeated field tests was less than 1°. Considering that the TA under test may have a phase deviation of about 1° to 3° under low test current conditions, and taking into account the differences in the position of the open and closed inductors, the interference of the cabinet environment, and the repeatability of field installation, a safety margin of twice the estimated maximum deviation of no more than about 5° was taken, and the allowable range for polarity discrimination was finally adjusted to 10°. This range is much smaller than the 180° interval between the correct polarity and the reverse polarity, so it will not cause the two polarity discrimination intervals to overlap.

[0083] For the current phase loop, first calculate the first phase deviation relative to 0°, then calculate the second phase deviation relative to 180°. The first phase deviation is compared to the allowable phase deviation. If the first phase deviation is not greater than the allowable phase deviation, the loop polarity state is output as correct.

[0084] Considering that the phase is represented in a 360° cycle, the field equipment calculates the deviation near 0° according to the shortest angular distance on the circumference. For example, when the phase difference is 1.8°, the first phase deviation relative to 0° is 1.8°; when the phase difference is 358.6°, its equivalent first phase deviation from 0° is 1.4°. Both are less than the set allowable phase deviation of 10°, so the output polarity is correct. Twenty rounds of continuous verification were performed on the normal three-phase wiring of A / B / C in the field, and all 60 single-phase polarity results fell within the 0° reference allowable range.

[0085] If the first phase deviation does not fall within the allowable range of the 0° comparison reference, continue checking the second phase deviation. If the second phase deviation is not greater than the allowable phase deviation, output the polarity status of the circuit as reversed polarity. If both the first and second phase deviations are greater than the allowable phase deviations, the current phase difference does not meet the two set polarity judgment conditions, and the correct polarity or reversed polarity result is not forcibly written; the current result status is handled by the device's existing result processing method.

[0086] For example, when simulating the reverse polarity of phase B's current transformer (TA) in the field, the measured phase difference of phase B is 181.6°. Its first phase deviation relative to 0° is 178.4°, which is greater than 10°; its second phase deviation relative to 180° is 1.6°, which is not greater than 10°. Therefore, the output for phase B is "reverse polarity". Further, when an abnormal phase state is artificially introduced, the measured phase difference of a certain circuit is 74.3°. Its deviations relative to 0° and 180° are 74.3° and 105.7° respectively, both greater than 10°. The equipment does not misjudge this as correct polarity or reverse polarity, but displays it as an existing abnormal result.

[0087] The three-phase sequence matching reads the phase difference values ​​of the first, second, and third phase circuits. All three phase differences have been processed in S3 to a range of 0° to 360°. The main control unit determines the sequence of the three phase differences according to their phase positions within one power frequency cycle, thus establishing the phase sequence relationship of the circuits.

[0088] For example, in a three-phase normal sequence test, after the main control host obtains the periodic phase positions corresponding to the three circuits, it performs a circular sequence arrangement of the three according to the phase sequence definition used by the main control host for the current test excitation. The resulting circuit phase sequence is consistent with the test excitation phase sequence recorded internally by the main control host. Ten consecutive three-phase normal phase sequence tests were conducted on-site, and all ten outputs showed phase sequence matching. After swapping the acquisition positions of phases B and C to perform an abnormal simulation, ten consecutive tests were conducted, and all ten outputs showed phase sequence mismatch. No change in phase sequence results occurred due to changes in the order of LoRa communication messages.

[0089] The main control unit simultaneously reads the phase sequence of its own three-phase power frequency test excitation. It compares the phase sequence of the circuits with that of the three-phase power frequency test excitation bit by bit. When the sequences match, it establishes a phase correspondence between each circuit and the three-phase power frequency test excitation according to their corresponding positions, and then outputs the phase sequence matching result of the three-phase circuits based on this correspondence.

[0090] In this embodiment, the main control host has already saved the current three-phase excitation phase configuration when starting the test, so there is no secondary error caused by the operator manually entering the three-phase reference sequence. For normal field wiring, the main control host's final interface simultaneously displays the polarity status of the A, B, and C TA secondary circuits and "three-phase sequence matching"; for simulated abnormal states after manually swapping the B and C circuits, the main control host displays the corresponding three-phase sequence mismatch and retains the polarity judgment results already obtained for each individual circuit.

[0091] Three-phase sequence matching requires the phase difference values ​​of all three phase circuits to be used. If only the phase difference value of one or two phase circuits is obtained at present, the single-circuit polarity processing result is retained, and a complete three-phase sequence matching result is not generated. After the phase difference values ​​of all three phase circuits are obtained, the three-phase sequence relationship comparison is performed.

[0092] In actual single-person operation, the tester does not need to observe all three slave units simultaneously. When phases A and C complete data acquisition first, and phase B has not yet generated a valid result, the main unit can display the acquired single-loop status of phases A and C respectively, but the three-phase sequence position remains in the "awaiting complete data" state. The system automatically completes the three-phase sequence calculation after phase B data arrives. Therefore, wireless communication has asynchronous arrival differences of tens to hundreds of milliseconds, and it is not required that the three slave units simultaneously upload data to the main unit in the same wireless time slot.

[0093] In summary, the data flow of a complete task is as follows: The secondary current sampling value of the TA is first written into a 2048-point ring buffer; after four consecutive sampling points exceed the current amplitude start threshold, a complete 50Hz power frequency cycle is locked; the locked waveform is then corrected by reading the amplitude error compensation parameters and phase error compensation parameters of the current channel after being filtered by a multi-level weighted average of eight consecutive points; the corrected waveform generates the current amplitude and initial phase; the electrical parameters are sent to the main control host via LoRa; the main control host returns a host data response message and ends the current acquisition task; the main control host reads the initial phase of each phase and compares it with the reference phase to generate a phase difference value in the range of 0° to 360°; the phase difference value is sent to polarity discrimination and three-phase phase sequence matching processing respectively, and finally outputs the circuit polarity state and three-phase phase sequence matching result.

[0094] Taking the aforementioned 110kV substation site as an example, a single tester can complete the entire process from equipment startup, automatic networking of three slave units, placement of acquisition slave units on the secondary conductors of the A / B / C three-phase TA, initiation of power frequency testing, to obtaining complete three-phase polarity and phase sequence results without disconnecting or reconnecting the TA secondary terminals, laying master-slave communication lines, or using GPS or Beidou timing devices. The three slave units automatically form a network in about 3.2 seconds after power-on. Under the test conditions of 0.50A and 50Hz power frequency, the single effective waveform is sampled at 50kHz, and the complete cycle of about 20ms contains about 1000 sampling points. The 2048-point ring buffer covers about 40.96ms. The 50mA start threshold is obtained by adjusting the maximum no-load noise of 6.9mA at the site with an anti-interference margin of 6 times and upward. 4 consecutive triggers correspond to 80μs. The 8-point filtering window corresponds to 160μs. The ±10° polarity allowable deviation is obtained by adjusting the comprehensive error of the acquisition system calibration error, the possible phase error of the TA, and the interference of the site installation with a safety margin of about 2 times.

[0095] Under these field conditions, 20 rounds of three-phase current transformer (CT) secondary polarity checks were continuously performed on the normal wiring state, resulting in 60 single-phase polarity discrimination results, all of which were correctly identified. Ten tests were conducted on the single-phase polarity reverse connection simulation state, and all of them were able to enter the 180° allowable zone and output polarity reverse connection. Ten tests were conducted on the normal three-phase phase sequence and the B and C phase exchange state, and the phase sequence matching and mismatch states were correctly distinguished.

[0096] In substation field conditions where there is no wired synchronous connection between the host and the three-phase acquisition slave and no GPS time synchronization is configured, a single tester can complete the equipment layout, automatic networking, three-phase acquisition, wireless transmission, and output of TA secondary polarity and three-phase phase sequence results. It can adapt to typical TA secondary circuit field verification scenarios such as protection cabinets, measurement and control cabinets, and secondary terminal areas.

[0097] Example 2 Please see Figure 5 This embodiment provides a asynchronous phase analysis system for a current transformer (TA) circuit, including a waveform acquisition module, a transmission module, a calculation module, and a discrimination and matching module. The waveform acquisition module generates electrical parameters, the transmission module sends the electrical parameters to the main control host and receives the response status, the calculation module reads the initial phase and the reference phase to generate a phase difference value, and the discrimination and matching module reads the phase difference value to generate a polarity result and a three-phase phase sequence matching result.

[0098] The waveform acquisition module receives the sampled current value of the secondary circuit of the current transformer (CT) at its input terminal. After sampling begins, the waveform acquisition module acquires sampled values ​​at a fixed sampling frequency of 50kHz and continuously writes the sampled values ​​into a 2048-point circular buffer. The waveform acquisition module compares the sampled values ​​point by point with the current amplitude start threshold. When four consecutive sampling points exceed the threshold, a complete 50Hz power frequency cycle waveform is locked and the current sampling task is stopped.

[0099] The waveform acquisition module performs continuous 8-point weighted multi-level mean filtering on the locked waveform, and then reads the amplitude error compensation parameters and phase error compensation parameters according to the current acquisition channel. The amplitude error compensation parameters are used to correct the sampling amplitude, and the phase error compensation parameters are used to correct the waveform phase. After correction, the current amplitude is calculated, and the initial phase is determined based on the zero-crossing position. The waveform acquisition module combines the current amplitude and the initial phase to form electrical parameters and outputs them to the transmission module.

[0100] If the condition that the current amplitude threshold must be met for four consecutive sampling points is not met, the waveform acquisition module will not output new electrical parameters and will continue to update the 2048-point ring buffer. Once the complete cycle is locked, subsequent filtering and compensation in this task will use the locked waveform and will not replace it from the real-time sampling end.

[0101] The transmission module receives the electrical parameters output by the waveform acquisition module and transmits them wirelessly to the host via LoRa. After transmission, the transmission module waits for the host to return a host data response message. The host data response message is processed in the following order: 2-byte header 0x0564, 2-byte data type field, 2-byte data length field, N-byte valid electrical data, 2-byte CRC check field, and 2-byte tail 0xAA55.

[0102] If the transmission module does not receive a data response message from the host, it continues to retransmit using the currently cached electrical parameters without notifying the waveform acquisition module to resample. After receiving the data response message from the host, the transmission module changes the current acquisition task status to "complete" and provides the initial phases of each phase circuit already received by the host to subsequent calculations.

[0103] The calculation module receives two types of input. The first type of input is the initial phase of each phase circuit corresponding to the transmission module, and the second type of input is the reference phase generated by the main control host based on the power frequency test excitation. When the main control host outputs the power frequency test excitation, it records the start time, determines the power frequency period based on the excitation frequency, and then determines the reference phase based on the position within the current power frequency period.

[0104] The calculation module reads the initial phase according to the phase loop correspondence. The initial phase of each phase loop is compared with the reference phase under the same power frequency test conditions to generate the corresponding original phase difference. If the original phase difference is less than 0°, it is increased by 360°; if it is greater than or equal to 360°, it is decreased by 360°. This decrease is repeated if necessary until it falls within the 0° to 360° range. The processed result is written to the phase difference value of the corresponding loop and sent to the discrimination and matching module.

[0105] If the initial phase of a certain phase loop has not yet been reached, the calculation module will not use data from other loops to replace the input of that loop. The phase difference values ​​of other loops that have already been calculated will maintain their original correspondence, and the phase difference calculation of that loop will be supplemented after the missing loop data is received.

[0106] The matching module receives the phase difference values ​​of each phase loop. When performing single-loop polarity determination, it reads the current phase difference value and the allowable phase deviation, and obtains the first phase deviation between the current phase difference value and 0° and the second phase deviation between the current phase difference value and 180°. If the first phase deviation is not greater than the allowable phase deviation, the output polarity is correct; if the second phase deviation is not greater than the allowable phase deviation, the output polarity is reversed.

[0107] When the matching module performs three-phase sequence matching, it reads the three phase differences of the three-phase circuits, first determining the sequential relationship of the three phase differences within the range of 0° to 360°, and then reading the phase sequence relationship of the three-phase power frequency test excitation from the main control host. When the two sets of phase sequence relationships are consistent, the correspondence between the phase circuits and the three-phase power frequency test excitations is established according to the sequence position, and the three-phase phase sequence matching result is output accordingly.

[0108] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any other way. Any person skilled in the art may make changes or modifications to the above-disclosed technical content to create equivalent embodiments that can be applied to other fields. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the protection scope of the present invention.

Claims

1. A method for asynchronous phase analysis of a current transformer (TA) circuit, used to perform phase analysis on the power frequency test excitation output by the main control host and the secondary current of the TA acquired by the acquisition slave under the condition of no unified synchronization clock, characterized in that, include: S1. Obtain the secondary current waveform of the TA. After acquiring a valid AC waveform, stop sampling. Read the built-in error compensation parameters of the device to correct the waveform of the secondary current of the TA. Calculate the current amplitude and initial phase to generate electrical parameters. S2. The electrical parameters are transmitted to the main control host via LoRa wireless. If no host data response message is received, the electrical parameters are retransmitted. The current acquisition task ends after the host data response message is received. S3. Obtain the reference phase output by the main control host, and read the initial phase of each phase circuit after error compensation. Compare the initial phase of each phase circuit with the reference phase and calculate the phase difference. S4. Use the phase difference value to determine the polarity of the TA secondary circuit, and output the three-phase phase sequence matching result according to the phase difference value of each phase circuit.

2. The asynchronous phase analysis method for TA circuits according to claim 1, characterized in that, S1 includes the calculation of the electrical parameters: Acquire the secondary current waveform of the TA. Stop sampling after acquiring the complete AC waveform and read the built-in error compensation parameters of the device corresponding to the current acquisition channel. The amplitude and phase errors of the TA secondary current waveform are compensated according to the built-in error compensation parameters of the device to obtain the corrected TA secondary current waveform. The current amplitude is calculated based on the corrected TA secondary current waveform, and the initial phase is determined based on the zero-crossing position of the corrected TA secondary current waveform. The current amplitude and the initial phase are then used as the electrical parameters. The device has built-in error compensation parameters including amplitude error compensation parameters and phase error compensation parameters. It reads the amplitude error compensation parameters and the phase error compensation parameters corresponding to the current acquisition channel, corrects the amplitude of the sampled value of the TA secondary current waveform according to the amplitude error compensation parameters, and corrects the phase of the TA secondary current waveform according to the phase error compensation parameters. The device has built-in error compensation parameters, which are determined and written into the device during factory calibration or pre-calibration, and can be directly read during data acquisition.

3. The asynchronous phase analysis method for TA circuits according to claim 2, characterized in that, S1 also includes acquiring the secondary current waveform of the TA. First, a fixed sampling frequency of 50kHz and a 2048-point ring buffer are used to cyclically store the real-time current waveform. A current amplitude start threshold is set. When the values ​​of four consecutive sampling points exceed the threshold, the complete 50Hz power frequency cycle waveform is automatically locked. Then, a continuous 8-point weighted multi-level mean filtering algorithm is used to filter out high-frequency noise caused by substation switches and coupling.

4. The asynchronous phase analysis method for TA circuits according to claim 1, characterized in that, In S2, the standardized structure of the host data response message is as follows: 2-byte message header 0x0564, 2-byte data type field, 2-byte data length field, N-byte valid electrical data, 2-byte CRC check field, and 2-byte message tail 0xAA55.

5. The asynchronous phase analysis method for TA circuits according to claim 1, characterized in that, S3 includes calculating the phase difference value: First, obtain the reference phase output by the main control host, then read the initial phase of each phase circuit after error compensation, and record them according to the order corresponding to each phase circuit. After receiving the initial phase of each phase circuit, the main control host determines the initial phase corresponding to each phase circuit according to the phase and maintains the correspondence between each phase circuit and the corresponding initial phase. According to the correspondence between each phase circuit and its corresponding initial phase, the initial phase corresponding to each phase circuit is selected and compared with the reference phase to obtain the phase difference value corresponding to each phase circuit; Based on the periodic relationship that one power frequency cycle corresponds to 360° phase, the phase difference corresponding to each phase circuit is converted, and the phase difference converted to the range of 0° to 360° is determined as the phase difference value of each phase circuit.

6. The asynchronous phase analysis method for TA circuits according to claim 5, characterized in that, During the acquisition of the reference phase: The main control host records the start time of the power frequency test excitation while outputting the power frequency test excitation, and uses the start time as the phase start point of the power frequency test excitation; The power frequency period is determined based on the frequency of the power frequency test excitation, and the periodic change of the power frequency test excitation from the phase start point is determined according to the power frequency period. The corresponding phase is determined based on the position of the power frequency test excitation within the power frequency cycle, and the determined phase is used as the reference phase.

7. The asynchronous phase analysis method for TA circuits according to claim 5, characterized in that, During the process of converting the phase difference between each phase circuit: When the calculated phase difference is less than 0°, add 360° to the phase difference to obtain the converted phase difference. When the calculated phase difference is greater than or equal to 360°, reduce the phase difference by 360° until the phase difference is within the range of 0° to 360°. The phase difference within the range of 0° to 360° is determined as the phase difference value of the corresponding phase loop.

8. The asynchronous phase analysis method for TA circuits according to claim 1, characterized in that, S4 includes the determination of the polarity of the secondary circuit of the TA: Set the phase tolerance, and use 0° and 180° as the comparison benchmarks for correct polarity and reverse polarity, respectively; Calculate the first phase deviation between the phase difference value and 0° and the second phase deviation between the phase difference value and 180°, and compare the first phase deviation and the second phase deviation with the allowable phase deviation respectively; When the first phase deviation is not greater than the phase allowable deviation, the polarity of the corresponding TA secondary circuit is determined to be correct; when the second phase deviation is not greater than the phase allowable deviation, the polarity of the corresponding TA secondary circuit is determined to be reversed.

9. The asynchronous phase analysis method for TA circuits according to claim 8, characterized in that, S4 also includes three-phase sequence matching: The phase difference values ​​corresponding to the three-phase circuits are obtained respectively, and the sequential relationship of the three phase difference values ​​within one power frequency cycle is determined. The order of the three phase differences is compared with the order of the three-phase power frequency test excitation output by the main control host. When the order of the two phases is consistent, the phase correspondence between the three-phase circuit and the three-phase power frequency test excitation is determined. The phase sequence of the three-phase circuit is determined according to the phase correspondence, and the three-phase phase sequence matching result is output.

10. A asynchronous phase analysis system for a TA circuit, characterized in that, The system is used to implement the method according to any one of claims 1-9, comprising: The waveform acquisition module is used to acquire the secondary current waveform of the current transformer (TA). After acquiring a valid AC waveform, sampling stops. The built-in error compensation parameters of the device are read to correct the waveform of the secondary current waveform of the TA, calculate the current amplitude and initial phase, and generate electrical parameters. The transmission module is communicatively connected to the waveform acquisition module and is used to transmit the electrical parameters to the main control host via LoRa wireless. If no host data response message is received, the electrical parameters are retransmitted. After receiving the host data response message, the current acquisition task is terminated. The calculation module, which is communicatively connected to the transmission module, is used to obtain the reference phase output by the main control host, read the initial phase of each phase circuit after error compensation, compare the initial phase of each phase circuit with the reference phase, and calculate the phase difference. The discrimination and matching module is communicatively connected to the calculation module. It is used to determine the polarity of the secondary circuit of the TA using the phase difference value, and output the three-phase sequence matching result according to the phase difference value of each phase circuit.

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