Variable frequency short circuit test method and system based on energy storage inverter

Abstract

The application discloses a variable-frequency short-circuit test method and system based on energy storage inversion, and relates to the technical field of high-voltage electrical appliance test, which comprises the following steps: configuring impedance parameters and transient recovery voltage parameters in a test load circuit according to a target test frequency; controlling an energy storage inversion unit to output alternating current of the target test frequency to a test transformer, so as to generate a short-circuit current in the test load circuit; and during the process that the short-circuit current is injected into the test load circuit, the action time sequence of a closing switch, an operating circuit breaker and a tested circuit breaker is cooperatively controlled according to the periodic characteristics of the target test frequency, so as to perform a short-circuit breaking test. The application effectively avoids the problem that a short-circuit current and a TRV waveform that meet the standard requirements cannot be generated under variable frequency conditions due to static setting of circuit parameters and fixed preset of time sequence, realizes accurate simulation of the short-circuit current and the TRV waveform under non-power frequency, and thus meets the test requirements of high-voltage switch equipment.

Description

Technical Field

[0001] This application relates to the field of high-voltage electrical appliance testing technology, specifically to a frequency conversion short-circuit test method and system based on energy storage inverter. Background Technology

[0002] Energy storage inverter test systems utilize capacitor energy storage and power electronic inverter technology to provide large-capacity short-circuit current in a short time. As a short-circuit test power source to replace traditional impulse generators and direct grid testing, they have been applied in the field of medium-voltage switchgear testing. Currently, the parameter settings of the impedance adjustment elements and transient recovery voltage adjustment elements in conventional energy storage test systems are usually statically matched based on the short-circuit current amplitude requirements at a fixed test frequency. The operating sequence of the closing switch, operating circuit breaker, and tested circuit breaker in the system is also preset according to this fixed frequency period. For example, patent CN119165341A discloses an "Energy Storage Medium-Voltage Switchgear Test System and Method," which uses an energy storage capacitor to output power frequency AC current through an inverter unit. By adjusting the reactor and resistive elements to match the short-circuit current, it achieves the breaking test assessment of the circuit breaker. However, in this scheme, the parameters of the reactor and transient recovery voltage (TRV) regulating elements (R, C) are set according to the power frequency conditions, and the closing and opening sequences are also preset according to the power frequency cycle. When the test frequency shifts to low or medium frequency, the circuit inductive reactance changes significantly with the frequency, causing the short-circuit current amplitude to deviate from the expectation and the attenuation characteristics to be distorted. At the same time, the peak value and rise rate of TRV cannot meet the standard waveform requirements under non-power frequency conditions due to the nonlinear coupling effect of the charging and discharging time constant of the RC circuit and the test frequency. In addition, the operating sequence of the closing switch, the operating circuit breaker, and the circuit breaker under test is also preset according to the power frequency cycle, making it difficult to accurately match the short-circuit current injection window and the TRV application window under frequency conversion conditions. This makes it difficult for conventional energy storage inverter systems to provide equivalent test and evaluation capabilities for low-frequency and medium-frequency switching equipment. Summary of the Invention

[0003] This application addresses the problem that conventional energy storage inverter test systems struggle to accurately simulate short-circuit current decay and transient recovery voltage characteristics under non-power frequency conditions under frequency conversion. It proposes a frequency conversion short-circuit test method and system based on energy storage inverters. This method generates AC current at the target frequency through an energy storage inverter unit and coordinates the impedance and TRV parameters in the test load circuit. Combined with precise timing control of multiple switches, it achieves accurate simulation of short-circuit current and TRV waveforms under non-power frequency conditions, thus meeting the testing requirements of high-voltage switchgear while avoiding impact on the power grid.

[0004] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, embodiments of this application provide a frequency conversion short-circuit test method based on energy storage inverter, the method comprising: Based on the target test frequency, configure the impedance parameters and transient recovery voltage parameters in the test load circuit; control the energy storage inverter unit to output AC power of the target test frequency to the test transformer to generate a short-circuit current in the test load circuit; during the injection of the short-circuit current into the test load circuit, coordinate the operation sequence of the closing switch, the operating circuit breaker, and the circuit breaker under test according to the periodic characteristics of the target test frequency to perform a short-circuit breaking test.

[0005] In this scheme, through a synergistic mechanism of parameter frequency-dependent adaptation and timing frequency-dependent adaptation, on the one hand, it ensures that the loop impedance and TRV resistance and capacitance are adjusted synchronously with the target frequency, thereby avoiding the physical contradiction of waveform distortion caused by frequency shift in inductive reactance and RC time constant; on the other hand, the target frequency is used to determine the action time of each switch, ensuring that the phase of the short-circuit current injection and the current execution of the switching action accurately matches the zero-crossing characteristics at the current frequency. The synergy of these two mechanisms enables the test circuit to automatically generate short-circuit current and TRV waveforms that meet the standard requirements at any target frequency, achieving accurate simulation of short-circuit current and TRV waveforms at non-power frequency.

[0006] Optionally, configuring the impedance parameters and transient recovery voltage parameters in the test load circuit according to the target test frequency includes: solving and configuring the inductance value of the regulating reactor in the test load circuit based on the expected short-circuit current amplitude corresponding to the target test frequency using the circuit impedance equation; and solving and configuring the resistance and capacitance values ​​of the transient recovery voltage regulating element based on the expected transient recovery voltage peak value corresponding to the target test frequency using the transient recovery voltage oscillation equation.

[0007] Optionally, the regulating reactor includes a multi-tap reactor or a magnetically controlled reactor; when the regulating reactor is a multi-tap reactor, the number of coil turns in the circuit is changed by controlling a high-voltage vacuum contactor to switch different taps of the multi-tap reactor, thereby adjusting the inductance value; when the regulating reactor is a magnetically controlled reactor, the core magnetic saturation is changed by adjusting the magnitude of the excitation current output by the DC excitation power supply, thereby continuously adjusting the inductance value.

[0008] Optionally, the transient recovery voltage regulating element includes a high-voltage resistor array and a high-voltage capacitor array; the high-voltage resistor array is composed of multiple non-inductive resistor branches with different resistance values ​​connected in parallel, and the high-voltage capacitor array is composed of multiple pulse capacitor branches with different capacitance values ​​connected in parallel; by controlling the on and off of each solid-state switch in the switch matrix, the combination of the non-inductive resistor branch and the pulse capacitor branch connected to the test load circuit is switched to adjust the resistance value and the capacitance value.

[0009] Optionally, during the process of injecting the short-circuit current into the test load circuit, the timing of the operation of the closing switch, the operating circuit breaker, and the circuit breaker under test is coordinated according to the periodic characteristics of the target test frequency to perform a short-circuit breaking test. This includes: using the voltage zero-crossing signal of the AC current as a time reference, calculating the closing trigger time of the closing switch, the protection delay of the operating circuit breaker, and the opening trigger time of the circuit breaker under test according to the half-wave time of the target test frequency; generating hardware interrupt signals corresponding to the closing trigger time, the protection delay, and the opening trigger time based on the synchronous trigger controller; and controlling the short-circuit current to complete the injection and breaking within a set half-wave number according to the hardware interrupt signals.

[0010] Optionally, the step of generating hardware interrupt signals corresponding to the closing trigger time, protection delay, and opening trigger time based on the synchronous trigger controller, and controlling the short-circuit current to complete injection and interruption within a set half-wave number according to the hardware interrupt signals, includes: the synchronous trigger controller including a programmable gate array and a digital signal processor; the digital signal processor is used to receive the voltage zero-crossing signal from the high-voltage voltage transformer and execute an interpolation algorithm to calculate the zero-crossing time; the programmable gate array is internally configured with a high-speed hardware timer, which generates hardware interrupt signals corresponding to the closing trigger time, protection delay, and opening trigger time based on the zero-crossing time, the half-wave time, and a preset mechanical action delay compensation value; the hardware interrupt signals are converted into optical trigger pulses and transmitted to the operating mechanisms of the closing switch, the operating circuit breaker, and the circuit breaker under test to control the short-circuit current to complete injection and interruption within a set half-wave number.

[0011] Optionally, after the coordinated control of the closing switch, the operation of the circuit breaker, and the circuit breaker under test to perform the short-circuit breaking test, a test evaluation and safety interlocking step is also performed, specifically including: synchronously acquiring the transient recovery voltage waveform across the circuit breaker under test and the short-circuit current waveform of the test load circuit; extracting the voltage envelope based on the transient recovery voltage waveform, calculating the actual transient recovery voltage peak value and voltage rise rate; determining the current zero-crossing time based on the short-circuit current waveform, and calculating the actual breaking time in conjunction with the tripping trigger time; if the actual breaking time is greater than the preset maximum allowable breaking time, or the actual transient recovery voltage peak value is greater than the preset insulation withstand voltage threshold, then a breaking failure signal is generated; In response to the generation of the interruption failure signal, an emergency trip command is sent to the operating circuit breaker to disconnect the test load circuit. At the same time, the discharge contactor on the DC side of the energy storage inverter unit is closed, and the remaining electrical energy is converted into heat energy and released through a high-power discharge resistor until the DC bus voltage drops below the safe voltage.

[0012] Optionally, before the control energy storage inverter unit outputs AC power at the target test frequency to the test transformer, the method further includes: calculating the target energy storage required by the DC support capacitor in the energy storage inverter unit based on the target test frequency, the expected short-circuit current amplitude, and the preset test duration; determining the target DC bus voltage based on the target energy storage and the capacitance value of the DC support capacitor; controlling the front-end rectifier unit to perform constant current-constant voltage segmented charging on the DC support capacitor; in the initial charging stage, controlling the front-end rectifier unit to perform constant current charging on the DC support capacitor with a preset constant current value until the terminal voltage of the DC support capacitor reaches a preset voltage threshold; subsequently, controlling the front-end rectifier unit to switch to constant voltage charging mode to maintain the output voltage at the target DC bus voltage; when the charging current is detected to drop to a preset cutoff current threshold, cutting off the charging circuit of the front-end rectifier unit, closing the holding contactor, and causing the DC support capacitor to enter the off-grid energy storage holding state.

[0013] Optionally, after the control energy storage inverter unit outputs AC power at the target test frequency to the test transformer, the method further includes: sampling the output voltage and output current in real time during the output of the AC power; and dynamically adjusting the drive pulse duty cycle of the switching devices in the energy storage inverter unit when a voltage drop or frequency shift caused by a short-circuit load is detected, so as to maintain the stability of the target test frequency and voltage amplitude.

[0014] Secondly, embodiments of this application provide a frequency conversion short-circuit test system based on energy storage inverter, comprising: an energy storage inverter main circuit, including a rectifier unit, an energy storage unit, and an inverter unit connected in sequence; a test transformer, the primary side of which is connected to the inverter unit; a test load circuit, connected to the secondary side of the test transformer, wherein a closing switch, a protective circuit breaker, an operating circuit breaker, and a circuit breaker under test are connected in series in the test load circuit, and an impedance adjustment module and a transient recovery voltage adjustment module are configured; and a coordination controller, communicatively connected to the energy storage inverter main circuit, the closing switch, the protective circuit breaker, the operating circuit breaker, the circuit breaker under test, the impedance adjustment module, and the transient recovery voltage adjustment module, wherein the coordination controller is configured to execute the frequency conversion short-circuit test method based on energy storage inverter described in the first aspect above.

[0015] The beneficial effects of this application are: 1. By solving and configuring the inductance value of the regulating reactor and the resistance and capacitance values ​​of the TRV regulating element based on the target test frequency, the circuit impedance characteristics and transient recovery characteristics are synchronously adapted with the frequency, fundamentally eliminating the parameter mismatch caused by frequency changes, and ensuring the accuracy of the short-circuit current amplitude and the standard compliance of the TRV waveform under frequency conversion conditions. 2. The action time of each switch is uniformly calculated using the voltage zero-crossing point of the target test frequency as the time reference and half-wave time as the basic time unit. The closing phase is controllable to suppress non-periodic components. The opening time maintains a constant arcing time relationship with the current zero-crossing point at each frequency. The protection delay is dynamically adjusted in units of half-wave number and combined with hardware-level interrupts to achieve microsecond-level triggering accuracy. This allows for flexible switching between multiple frequency types of tests by simply updating the frequency parameters, improving the accuracy of frequency conversion test timing control and cross-frequency band versatility. 3. By using the periodic characteristics of the target frequency as a unified input variable and generating all switching action moments through a single calculation logic, the timing of short-circuit current injection, the current phase of interruption execution, and the safety boundary of backup protection intervention are all precisely matched with the current target frequency, ensuring the time synchronization of multiple switching actions and the repeatability of the interruption process at different frequencies. Attached Figure Description

[0016] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings. The drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings.

[0017] Figure 1 This is a flowchart of the frequency conversion short-circuit test method based on energy storage inverter according to an embodiment of this application; Figure 2 This is a schematic diagram of the frequency converter short-circuit test according to an embodiment of this application; Figure 3 This is a schematic diagram of the 12kV / 20kA-100Hz interruption waveform of an embodiment of this application; Figure 4 This is a schematic diagram of the 12kV / 25kA-20Hz interruption waveform in an embodiment of this application; Wherein, AC / DC: rectifier unit, C1: energy storage unit, DC / AC: inverter unit, PT: test transformer, MB: protection circuit breaker, L: regulating reactor, MS: closing switch, CB: operating circuit breaker, TO: circuit breaker under test, R, C2: TRV regulating element. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description of this application is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely one preferred embodiment of this application and are only used to explain this application. They do not limit the scope of protection of this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] First, some nouns or terms that appear in the description of the embodiments of this application shall be interpreted as follows: A Field Programmable Gate Array (FPGA) consists of logic blocks, programmable interconnects, an embedded dedicated core, embedded block RAM, programmable input / output units, and a digital clock management module. FPGAs emerged as a type of semi-custom circuit in the field of application-specific integrated circuits (ASICs). Their logic is implemented by loading programming data into internal static memory, allowing for an unlimited number of programming iterations. Digital Signal Processor (DSP): A microprocessor designed for high-speed, real-time processing of digital signals.

[0020] Example 1: As Figure 1 As shown, a variable frequency short-circuit test method based on energy storage inverter includes steps S1-S3, wherein: S1. Configure the impedance parameters and transient recovery voltage parameters in the test load circuit according to the target test frequency.

[0021] In one implementation, step S1 includes: Based on the expected short-circuit current amplitude corresponding to the target test frequency, the inductance value of the regulating reactor in the test load circuit is determined and configured using the loop impedance equation. Based on the expected peak value of the transient recovery voltage corresponding to the target test frequency, the resistance and capacitance values ​​of the transient recovery voltage adjustment element are determined by solving the transient recovery voltage oscillation equation.

[0022] In one implementation, the regulating reactor includes a multi-tap reactor or a magnetically controlled reactor; When the regulating reactor is a multi-tap reactor, the different taps of the multi-tap reactor are switched by controlling the high-voltage vacuum contactor to change the number of coil turns in the circuit, thereby adjusting the inductance value. When the regulating reactor is a magnetically controlled reactor, the inductance value is continuously adjusted by changing the magnitude of the excitation current output by the DC excitation power supply, thereby changing the magnetic saturation of the iron core.

[0023] In one embodiment, the transient recovery voltage regulating element includes a high-voltage resistor array and a high-voltage capacitor array; The high-voltage resistor array is composed of multiple non-inductive resistor branches with different resistance values ​​connected in parallel, and the high-voltage capacitor array is composed of multiple pulse capacitor branches with different capacitance values ​​connected in parallel. By controlling the on and off of each solid-state switch in the switch matrix, the combination of the non-inductive resistor branch and the pulse capacitor branch connected to the test load circuit is switched to adjust the resistance value and the capacitance value.

[0024] In some embodiments, the loop impedance equation is expressed as: Where f is the target test frequency, L represents the expected short-circuit current amplitude, and L is the inductance value, which is also the inductive reactance matching value required for the circuit to generate the expected short-circuit current amplitude at the target test frequency. The effective voltage value output from the secondary side of the test transformer is determined by the transformer turns ratio and the target test voltage.

[0025] Furthermore, combined Figure 2 As shown, the resistance value R and capacitance value C2 are solved based on the transient recovery voltage (TRV) oscillation equation. The TRV oscillation equation describes the relationship between the TRV peak value and the R-C2 loop parameters. Specifically, based on the standard requirements for the TRV peak value and voltage rise rate dU / dt corresponding to the target test frequency, combined with the inherent capacitance and inductance parameters of the loop, the response equation of the second-order RLC oscillation circuit is solved using a numerical iteration method to obtain the combination of resistance and capacitance values ​​C2 that meet the TRV peak value and rise rate requirements. After the solution is completed, control signals are sent to the impedance adjustment module and the TRV adjustment module to set the current parameters to the obtained L, R, and C2 values.

[0026] In some embodiments, the regulating reactor in the impedance adjustment module can be a multi-tap reactor or a magnetically controlled reactor. When a multi-tap reactor is used, different taps are switched by controlling the high-voltage vacuum contactor to change the number of coil turns in the circuit. The more turns, the larger the inductance value, and the fewer turns, the smaller the inductance value. When a magnetically controlled reactor is used, the magnetic saturation of the iron core is changed by adjusting the magnitude of the excitation current output by the DC excitation power supply. The larger the excitation current, the higher the magnetic saturation and the smaller the inductance value, and vice versa, thereby achieving continuous stepless adjustment of the inductance value.

[0027] In this embodiment, the impedance and TRV parameters are configured based on the target test frequency, thus overcoming the problem of circuit parameter mismatch caused by frequency deviation. Simultaneously, the resistance and capacitance values ​​of the TRV adjustment element are also matched according to the target frequency. Since the peak value and rise rate of the TRV waveform are affected by the nonlinear coupling between the charging and discharging time constant of the R-C2 circuit and the test frequency, the TRV parameter combinations that meet the standard requirements at different frequencies cannot be obtained simply by scaling the power frequency parameters proportionally. Instead, they need to be solved separately for each frequency using the TRV oscillation equation, ensuring that the TRV peak value and rise rate meet the standard requirements at different frequencies. Finally, through the coordinated configuration of the regulating reactor, TRV resistive element, and TRV capacitor element, the overall impedance characteristics and transient recovery characteristics of the test circuit are synchronously adapted when the frequency changes, thereby ensuring the accuracy of the short-circuit current amplitude, the fidelity of the attenuation characteristics, and the standard compliance of the TRV waveform under variable frequency conditions.

[0028] S2. Control the energy storage inverter unit to output AC power at the target test frequency to the test transformer to generate a short-circuit current in the test load circuit.

[0029] As one implementation method, before controlling the energy storage inverter unit to output AC power at the target test frequency to the test transformer, an energy management step for the energy storage unit is also performed, specifically including: Based on the target test frequency, the expected short-circuit current amplitude, and the preset test duration, calculate the target energy storage required by the DC support capacitor in the energy storage inverter unit; The target DC bus voltage is determined based on the target energy storage capacity and the capacitance value of the DC support capacitor. The front-end rectifier unit is controlled to perform constant current-constant voltage segmented charging on the DC support capacitor. In the initial charging stage, the front-end rectifier unit is controlled to perform constant current charging on the DC support capacitor with a preset constant current value until the terminal voltage of the DC support capacitor reaches a preset voltage threshold. Subsequently, the front-end rectifier unit is controlled to switch to constant voltage charging mode to maintain the output voltage at the target DC bus voltage. When the charging current is detected to drop to the preset cutoff current threshold, the charging circuit of the front-end rectifier unit is cut off, the holding contactor is closed, and the DC support capacitor enters the off-grid energy storage holding state.

[0030] Specifically, the calculation steps for the target energy storage include: multiplying the expected short-circuit current amplitude, the expected output voltage on the secondary side of the test transformer, and the power factor of the load circuit to calculate the average active power required by the test load circuit during the short circuit. The power factor of the load circuit is determined by the ratio of the regulating reactor to the equivalent resistance of the circuit. The average active power is then multiplied by the test duration to obtain the total electrical energy consumed during the short circuit. Finally, the total electrical energy is multiplied by a margin factor used to compensate for the conversion losses of the inverter unit, line losses, and the self-discharge effect of the energy storage capacitor to obtain the target energy storage. The margin factor is set based on historical test experience, for example, a value ranging from 1.2 to 1.5. Further, using the capacitor energy storage formula, the target DC bus voltage required by the energy storage inverter unit is deduced based on the target energy storage and the capacitance value of the DC support capacitor, expressed as: ,in, For the purpose of storing energy, This is the capacitance value of the DC support capacitor. The target DC bus voltage is used to ensure that the inverter unit can maintain sufficient energy supply when outputting AC power at the target frequency.

[0031] Further, after determining the target DC bus voltage, the front-end rectifier unit is controlled to perform constant current-constant voltage segmented charging on the DC support capacitor. In the initial charging stage, since the terminal voltage of the DC support capacitor is close to zero, direct constant voltage charging would generate a large inrush current, potentially damaging the rectifier unit and the capacitor itself. Therefore, the front-end rectifier unit is first controlled to charge the DC support capacitor with a preset constant current value. This constant current value is set based on laboratory experience, such as 0.2 to 0.5 times the rated output current of the rectifier unit, to balance charging speed and device safety. During constant current charging, the terminal voltage of the DC support capacitor increases linearly with time until it reaches a preset voltage threshold, which is set as a percentage of the target DC bus voltage, such as 85%. Once the terminal voltage reaches the voltage threshold, the front-end rectifier unit switches to constant voltage charging mode, maintaining the output voltage at the target DC bus voltage. At this time, the charging current gradually decreases as the voltage difference between the capacitor terminal voltage and the target voltage decreases. The charging current is continuously monitored, and the charging circuit is adjusted in real time to ensure that the DC support capacitor enters the off-grid energy storage state.

[0032] In this embodiment, by incorporating the target test frequency, expected short-circuit current amplitude, and test duration into the calculation of the target energy storage capacity, the total energy to be stored is determined based on the power factor differences of the load circuit at different frequencies and the duration requirements. This is then used to further determine the target DC bus voltage, enabling on-demand configuration of the energy storage unit's capacity. Simultaneously, the constant current-constant voltage segmented charging strategy efficiently charges the energy storage unit to the target bus voltage while ensuring charging safety. During the constant current phase, the peak charging current is controlled to avoid surges, while the constant voltage phase automatically performs trickle charging to eliminate undercharging. Throughout the short-circuit test, the energy storage unit is completely electrically isolated from the grid side, thus ensuring true off-grid operation characteristics of the test circuit from the energy source side.

[0033] As one implementation, after the control energy storage inverter unit outputs AC power at the target test frequency to the test transformer, the following is also performed: During the output of the alternating current, the output voltage and output current are sampled in real time. When a voltage drop or frequency shift is detected due to a short-circuit load connection, the duty cycle of the drive pulse of the switching device in the energy storage inverter unit is dynamically adjusted to maintain the stability of the target test frequency and voltage amplitude.

[0034] Specifically, such as Figure 2As shown, the output of the energy storage inverter unit is connected to the primary side of the short-circuit test transformer PT. Voltage Hall sensors and current Hall sensors are installed on the output bus of the inverter unit to collect the three-phase voltage and current signals output by the inverter unit in real time. The analog signals collected by the sensors are filtered, amplified, and level-shifted by the signal conditioning circuit before being digitally sampled by the analog-to-digital converter. When the short-circuit test begins, the closing switch MS closes, connecting the circuit breaker under test TO to the test load circuit. The secondary side of the test transformer PT forms a short-circuit loop via the regulating reactor L, the closing switch MS, the operating circuit breaker CB, the protective circuit breaker MB, and the circuit breaker under test TO. At this time, it is equivalent to connecting a low-impedance load to the output of the inverter unit. If the inverter unit operates in open-loop mode, its output voltage will drop significantly due to the sudden connection of the load. Simultaneously, the nonlinear characteristics of the short-circuit current may cause a momentary shift in the output frequency. To address this, in each control cycle, the real-time sampled output voltage amplitude is compared with a preset target voltage reference value to calculate the voltage deviation. Simultaneously, the real-time sampled output current waveform is compared with a standard sine wave at the target frequency to detect the frequency deviation. When the detected voltage deviation exceeds a preset voltage drop threshold or the frequency deviation exceeds a preset frequency offset threshold, dynamic compensation adjustment is initiated. The voltage drop threshold is set based on the short-circuit impedance percentage of the short-circuit test transformer (PT), and the frequency offset threshold is set based on the target test frequency, such as ±0.5Hz of the target frequency.

[0035] As an optional implementation, the compensation and adjustment process can be as follows: Based on the sign and magnitude of the voltage deviation, the duty cycle correction of the switching device drive pulse is calculated using a proportional-integral regulator. If the voltage drops, the duty cycle is increased to improve the effective value of the output voltage; if the voltage overshoots, the duty cycle is decreased to reduce the output voltage. Simultaneously, based on the direction of the frequency deviation, the frequency control word of the drive pulse is adjusted. If the measured frequency is lower than the target frequency, the frequency control word is increased; if the measured frequency is higher than the target frequency, the frequency control word is decreased, ensuring that the output frequency of the inverter unit is strictly locked to the target test frequency. Based on the obtained duty cycle correction and frequency control word correction, a high-frequency drive pulse signal is generated, amplified by the drive circuit, and used to control the on and off states of each power switching device in the inverter unit. The above closed-loop adjustment process continues with a control cycle of microseconds to milliseconds until the short-circuit current injection and breaking tests are completed, thereby ensuring that the voltage amplitude and frequency output by the inverter unit remain near the target value throughout the entire short-circuit test.

[0036] In this embodiment, a closed-loop inverter output is achieved through real-time sampling and dynamic adjustment, overcoming the disturbance effect of short-circuit load connection on the output stability of the inverter unit under frequency conversion conditions. Thus, during the entire process of short-circuit current injection, the output voltage amplitude and frequency of the inverter unit are locked to the target value in real time, avoiding voltage drop and frequency shift caused by short-circuit load connection. This ensures that the AC power supply applied to the primary side of the test transformer has sufficient stability in both amplitude and frequency dimensions, providing a reliable power supply side guarantee for the test load circuit to generate a short-circuit current with the expected amplitude, expected frequency, and waveform fidelity.

[0037] S3. During the process of injecting the short-circuit current into the test load circuit, the timing of the closing switch, the operating circuit breaker, and the circuit breaker under test are coordinated and controlled according to the periodic characteristics of the target test frequency to perform the short-circuit breaking test.

[0038] In one implementation, step S3 includes: S31. Using the zero-crossing signal of the AC voltage as a time reference, calculate the closing trigger time of the closing switch, the protection delay of the operating circuit breaker, and the opening trigger time of the circuit breaker under test according to the half-wave time of the target test frequency. S32. Based on the synchronous trigger controller, hardware interrupt signals corresponding to the closing trigger time, protection delay and opening trigger time are generated respectively, and the short-circuit current is controlled to complete the injection and opening within the set half-wave number according to the hardware interrupt signals.

[0039] Specifically, in combination Figure 2 As shown, the energy storage inverter unit is connected to the test load circuit after being stepped down by the short-circuit test transformer PT. The synchronous trigger controller is communicatively connected to the energy storage inverter unit, using the AC voltage zero-crossing signal output by the energy storage inverter unit as the time reference. This zero-crossing signal is acquired by the high-voltage voltage transformer from the secondary side of the test transformer PT. After acquiring the zero-crossing signal, the synchronous trigger controller calculates the half-wave time according to the target test frequency f. , .

[0040] Furthermore, before the short-circuit test is started, in the load circuit, the protection circuit breaker MB, the operating circuit breaker CB, and the circuit breaker under test TO are all in the closed position, and the closing switch MS is in the open position. When the test is started, the synchronous trigger controller outputs a closing trigger signal to the closing switch MS at a preset phase angle after the voltage crosses zero. The closing trigger time of the closing switch is the reference time plus the closing delay compensation value of the closing switch. This compensation value is determined by the inherent action delay time of the closing switch operating mechanism. After the closing switch MS closes, the short-circuit current begins to be injected into the test short-circuit circuit.

[0041] Tripping trigger time of the tested circuit breaker TO The calculation method is as follows: ; in, The voltage zero-crossing point is the reference time; n is the target breaking half-wave number, the value of which is determined by the test standard, indicating that the circuit breaker under test TO should complete the breaking within the nth half-wave of the short-circuit current. This indicates the moment when the current crosses zero in the nth half-wave; The arcing time required for the circuit breaker under test (TO) is usually between 2ms and 10ms, and is determined in advance based on the arc extinguishing medium and rated parameters of the circuit breaker under test. The mechanical delay inherent in the operating mechanism of the circuit breaker under test (TO) is the time interval from the issuance of the trigger signal to the actual separation of the contacts. The synchronous trigger controller sends a trip trigger signal to the circuit breaker under test (TO) at the trip trigger moment, and the contacts of the circuit breaker under test (TO) undergo this mechanical delay. Separation then begins at the actual target time, after which the arcing time... Then, the short-circuit current naturally extinguishes at the zero-crossing moment of the nth half-wave; the actual target time is... .

[0042] Protection delay of operating circuit breaker CB The calculation method is as follows: ; Where m is the safety margin half-wave number, which is typically taken as 1 to 2 in the laboratory; To provide a safety margin to compensate for timing errors and circuit breaker operating variability, a standard laboratory value, such as 2ms to 5ms, is used. If the tested circuit breaker TO successfully interrupts within the preset nth half-wave, the operating circuit breaker CB will not operate before the protection delay arrives, and the coordination controller will prematurely release the protection delay after confirming successful interruption. If the tested circuit breaker TO fails to interrupt, the protection delay will continue until the protection delay is reached. Upon arrival, the synchronous trigger controller sends a trip trigger signal to the operating circuit breaker CB, which then acts as a backup protection switch to disconnect the main circuit.

[0043] In one implementation, step S32 includes: The synchronous trigger controller includes a programmable gate array and a digital signal processor; The digital signal processor is used to receive the voltage zero-crossing signal from the high-voltage voltage transformer and execute an interpolation algorithm to calculate the zero-crossing time; The programmable gate array is equipped with a high-speed hardware timer, which generates hardware interrupt signals corresponding to the closing trigger time, the protection delay, and the opening trigger time based on the zero crossing time, the half-wave time, and the preset mechanical action delay compensation value. The hardware interrupt signal is converted into an optical trigger pulse and transmitted to the operating mechanisms of the closing switch, the operating circuit breaker, and the circuit breaker under test, so as to control the injection and interruption of the short-circuit current within a set half-wave number.

[0044] Specifically, the interpolation algorithm effectively eliminates the impact of sampling quantization errors on the detection accuracy at the zero-crossing point by taking multiple sampling points before and after the zero-crossing point and performing linear or quadratic interpolation. After the programmable gate array (FPGA) obtains the precise zero-crossing time calculated by the digital signal processor (DSP), it uses the half-wave time of the target frequency, the preset mechanical action delay compensation value, and the user-set expected number of breaking half-waves as timing parameters to calculate the count values ​​corresponding to the closing trigger time of the closing switch, the protection delay of the operating circuit breaker, and the opening trigger time of the circuit breaker under test. When each count value overflows, the hardware timer directly generates the corresponding hardware interrupt signal. The hardware interrupt signal is converted into an optical trigger pulse by a multi-channel fiber optic isolation driver board and transmitted through optical fiber to the operating mechanisms of the closing switch, the operating circuit breaker, and the circuit breaker under test. The fiber optic transmission method can effectively isolate the electrical connection between the high-voltage side and the low-voltage side and avoid the influence of electromagnetic interference on the trigger signal.

[0045] It should be noted that the switching timing is controlled based on the periodic characteristics of the target test frequency, achieving precise matching between the short-circuit current injection window and the breaking window under frequency conversion conditions. Since the half-wave time of the short-circuit current changes with the test frequency, using a preset timing sequence at a fixed frequency may lead to a delay in the tripping action before the current crosses zero at low frequencies, resulting in breaking failure. At medium frequencies, the shortened half-wave time may prevent breaking within the expected half-wave window. In this embodiment, the synchronous trigger controller dynamically calculates the timing of each switch action based on the half-wave time of the target frequency and pre-compensates the trigger signal using a mechanical action delay compensation value. This ensures that the actual contact separation time of the circuit breaker under test accurately falls before the expected short-circuit current crosses zero, thus achieving effective breaking under both low-frequency and medium-frequency conditions.

[0046] In this embodiment, the accuracy of cross-frequency band multi-switch timing control is achieved through a collaborative mechanism of frequency-adaptive timing calculation and real-time triggering. The triggering time of each switch is adaptively adjusted according to frequency changes, the closing phase is precisely controllable to suppress aperiodic components, the opening time maintains a constant arcing time relationship with the current zero-crossing point at each frequency, and the protection delay is dynamically adjusted in units of half-wavelengths. No redesign of the timing scheme is required during frequency switching. Interpolation algorithms eliminate the impact of sampling quantization errors on the accuracy of zero-crossing detection, and interrupt signals eliminate the uncertainty of software response delays. This allows for flexible switching between multi-frequency switchgear test rooms simply by updating frequency parameters.

[0047] For example, such as Figure 3 and Figure 4 As shown, Figure 3 The figure shows typical waveforms obtained by performing a short-circuit breaking test using the above-mentioned synchronous trigger controller under 100Hz intermediate frequency conditions. The rated voltage is 12kV and the rated short-circuit breaking current is 20kA. In the figure, Ia, Ib, and Ic are the three-phase short-circuit current waveforms, and Ua, Ub, and Uc are the transient recovery voltage waveforms across the circuit breaker under test. Figure 4 This is a typical waveform obtained from a short-circuit breaking test performed under low-frequency conditions of a rated voltage of 12kV, a rated short-circuit breaking current of 25kA, and a target test frequency of 20Hz. (Comparison) Figure 3 and Figure 4 As can be seen, although the test frequencies in the two figures range from a low frequency of 20Hz to a medium frequency of 100Hz, and the test current amplitude and voltage level are different, the synchronous trigger controller does not need to replace any core hardware. It only needs to load the half-wave time parameters and mechanical action delay compensation values ​​corresponding to the target frequency into the FPGA's timer configuration register to generate precise trigger pulses with timing jitter of less than 1 microsecond under two completely different frequency conditions, so as to reliably interrupt the short-circuit current within the set number of half waves. This cross-frequency band universal timing control capability, relying on the above-mentioned collaborative control mechanism that dynamically calculates the timing of multiple switches based on the target frequency characteristics, effectively solves the problem that existing energy storage inverter test systems must redesign and verify the entire timing logic when the test frequency is switched because the timing is based on a fixed frequency period preset.

[0048] As one implementation method, after the coordinated control of the closing switch, the operation of the circuit breaker, and the circuit breaker under test to perform the short-circuit breaking test, a test evaluation and safety interlocking step is also performed, specifically including: The transient recovery voltage waveform across the circuit breaker under test and the short-circuit current waveform of the test load circuit are acquired simultaneously. Based on the transient recovery voltage waveform, the voltage envelope is extracted, and the actual transient recovery voltage peak value and voltage rise rate are calculated. The zero-crossing time of the current is determined based on the short-circuit current waveform, and the actual breaking time is calculated in combination with the tripping trigger time. If the actual interruption time is greater than the preset maximum allowable interruption time, or the actual transient recovery voltage peak value is greater than the preset insulation withstand voltage threshold, an interruption failure signal is generated. In response to the generation of the interruption failure signal, an emergency trip command is sent to the operating circuit breaker to disconnect the test load circuit. At the same time, the discharge contactor on the DC side of the energy storage inverter unit is closed, and the remaining electrical energy is converted into heat energy and released through a high-power discharge resistor until the DC bus voltage drops below the safe voltage.

[0049] Specifically, after synchronous acquisition, the collaborative controller extracts the voltage envelope from the acquired transient recovery voltage waveform. This envelope can be obtained through Hilbert transform or peak detection algorithm. The actual peak value of the transient recovery voltage is then determined based on the maximum value of the envelope, and the voltage rise rate is calculated based on the rising slope of the envelope. Simultaneously, zero-crossing detection is performed on the acquired short-circuit current waveform to determine the actual zero-crossing moment. This zero-crossing moment is compared with the tripping trigger moment, and the actual breaking time is calculated by combining it with the mechanical action delay compensation value of the circuit breaker under test (TO). This is the time interval from the tripping trigger moment to the first zero-crossing moment of the current. The actual breaking time is compared with the preset maximum allowable breaking time, and the actual peak value of the transient recovery voltage is compared with the preset insulation withstand voltage threshold. The maximum allowable breaking time is determined based on the target test frequency. For example, for a 100Hz medium-frequency test, the half-wave time is 5ms, and the maximum allowable breaking time is usually set to 1.5 cycles, or 15ms. The insulation withstand voltage threshold is determined based on the rated voltage level of the circuit breaker under test and the test standard. If the actual interruption time is greater than the maximum allowable interruption time, it indicates that the circuit breaker under test failed to interrupt the short-circuit current in time, which may be due to contact welding or operating mechanism failure. If the actual transient recovery voltage peak value is greater than the insulation withstand voltage threshold, it indicates that the recovery voltage applied to both ends of the circuit breaker under test after interruption exceeds its insulation withstand capability, which may cause re-breakdown. If any of the above conditions are met, the interruption is determined to be a failure and an interruption failure signal is generated immediately.

[0050] In some embodiments, combined with Figure 2As shown, in response to the interruption failure signal, an emergency tripping command is first sent to the operating circuit breaker CB. The operating circuit breaker CB, acting as a backup protection switch, mechanically and quickly disconnects the main circuit of the test load circuit. To ensure the reliability of redundant tripping, an emergency tripping command is simultaneously sent to the protection circuit breaker MB. The protection circuit breaker MB then performs a second mechanical tripping independently of the operating circuit breaker CB at the same time, thus forming a dual physical isolation protection path where the operating circuit breaker CB and the protection circuit breaker MB are redundant. The operating circuit breaker CB experiences frequent operation during normal sequence operation, resulting in a higher risk of contact wear, while the protection circuit breaker MB, as a cold standby switch, remains in good working order. Therefore, the two circuit breakers complement each other in terms of fault modes, rather than overlapping. Compared to schemes that only use a single operating circuit breaker, the parallel execution of the dual protection mechanism in this embodiment can effectively prevent cascading faults such as continuous short circuits in the test circuit, DC bus overvoltage, and equipment damage caused by the failure of the tested circuit breaker to open. The structure of the operating circuit breaker CB and the protective circuit breaker MB connected in series and controlled independently can significantly reduce the failure probability of the main circuit to disconnect. This allows the test system to still have a controllable and safe exit capability even under extreme fault conditions at medium frequency, effectively solving the defect of the existing single switch protection scheme in frequency conversion tests where the probability of failure to open increases due to frequency changes and the lack of redundant safety protection.

[0051] Example 2: A frequency conversion short-circuit test system based on energy storage inverter, comprising: The main circuit for energy storage inverter includes a rectifier unit, an energy storage unit, and an inverter unit connected in sequence; A test transformer, the primary side of which is connected to the inverter unit; The test load circuit is connected to the secondary side of the test transformer. The test load circuit is connected in series with a closing switch, a protective circuit breaker, an operating circuit breaker and the circuit breaker under test, and is equipped with an impedance adjustment module and a transient recovery voltage adjustment module. The collaborative controller is communicatively connected to the main circuit of the energy storage inverter, the closing switch, the protection circuit breaker, the operating circuit breaker, the circuit breaker under test, the impedance adjustment module, and the transient recovery voltage adjustment module. The collaborative controller is configured to execute the frequency conversion short-circuit test method based on energy storage inverter described in Example 1.

[0052] Specifically, such as Figure 2As shown, the main circuit of the energy storage inverter consists of a rectifier unit AC / DC, an energy storage unit C1, and an inverter unit DC / AC connected in series. The AC input terminal of the rectifier unit AC / DC is connected to the three-phase AC power grid AN, BN, and CN, and the DC output terminal is connected to the energy storage unit C1. The energy storage unit C1 adopts a DC-supported capacitor bank. The DC input terminal of the inverter unit DC / AC is connected to the energy storage unit C1, and the AC output terminal is connected to the primary side of the test transformer PT. The secondary side of the test transformer PT is connected to the test load circuit. In the test load circuit, one end of the regulating reactor L is connected to one end of the secondary side of the test transformer PT. The other end of the regulating reactor L is connected in series with the closing switch MS, the operating circuit breaker CB, the protection circuit breaker MB, and the circuit breaker under test TO, and then returns to the other end of the secondary side of the test transformer PT, forming a series current path. The transient recovery voltage regulating element includes a high-voltage resistor R and a high-voltage capacitor C2. The resistor R and the capacitor C2 are connected in parallel to the two ends of the circuit breaker under test TO. The R branch and the C2 branch are independently connected in parallel with the circuit breaker under test TO.

[0053] It should be noted that, although Figure 2 A specific device topology layout is shown, but in other embodiments, the physical arrangement of each loop, the specific selection of the controller, and the type of communication medium can be adjusted according to actual engineering requirements, and the connection order or topology of each component can be flexibly adjusted according to the spectral characteristics of the target TRV waveform.

[0054] In this embodiment, after charging, the main circuit of the energy storage inverter is isolated from the grid by maintaining the contactor, forming an independent energy release channel only between the energy storage unit, the inverter unit, and the test load circuit, thus achieving zero impact on the grid throughout the test process. The regulating reactor L is used for overall inductive reactance regulation, and the TRV regulating element is used for TRV waveform shaping. The two have separate responsibilities in the circuit, so that the regulation of short-circuit current amplitude and TRV waveform regulation are decoupled from each other. Thus, the impedance parameters and TRV parameters are independently and collaboratively configured under frequency conversion conditions. Combined with the topology of the test transformer with the primary side connected to the inverter unit and the secondary side connected to the test load circuit, the frequency conversion power output by the inverter unit is supplied to the load circuit after being isolated and voltage transformed by the transformer. On the one hand, electrical isolation between the high-voltage side and the low-voltage side is achieved to ensure test safety. On the other hand, the selection of the transformer ratio allows the system to adapt to circuit breakers under test with different voltage levels.

[0055] The above-described embodiments are preferred embodiments of this application and are not intended to limit the specific scope of this application. The scope of this application includes but is not limited to the specific embodiments described above. All equivalent changes made in accordance with the shape, structure, and method of this application are within the protection scope of this application.

Claims

1. A frequency conversion short-circuit test method based on energy storage inverter, characterized in that: Includes the following steps: Configure the impedance parameters and transient recovery voltage parameters in the test load circuit according to the target test frequency; The energy storage inverter unit is controlled to output AC power at the target test frequency to the test transformer in order to generate a short-circuit current in the test load circuit; During the process of injecting the short-circuit current into the test load circuit, the timing of the closing switch, the operating circuit breaker, and the circuit breaker under test are coordinated and controlled according to the periodic characteristics of the target test frequency to perform the short-circuit breaking test.

2. The frequency conversion short-circuit test method based on energy storage inverter according to claim 1, characterized in that: The step of configuring the impedance parameters and transient recovery voltage parameters in the test load circuit according to the target test frequency includes: Based on the expected short-circuit current amplitude corresponding to the target test frequency, the inductance value of the regulating reactor in the test load circuit is determined and configured using the loop impedance equation. Based on the expected peak value of the transient recovery voltage corresponding to the target test frequency, the resistance and capacitance values ​​of the transient recovery voltage adjustment element are determined by solving the transient recovery voltage oscillation equation.

3. The frequency conversion short-circuit test method based on energy storage inverter according to claim 2, characterized in that: The regulating reactor includes a multi-tap reactor or a magnetically controlled reactor; When the regulating reactor is a multi-tap reactor, the different taps of the multi-tap reactor are switched by controlling the high-voltage vacuum contactor to change the number of coil turns in the circuit, thereby adjusting the inductance value. When the regulating reactor is a magnetically controlled reactor, the inductance value is continuously adjusted by changing the magnitude of the excitation current output by the DC excitation power supply, thereby changing the magnetic saturation of the iron core.

4. The frequency conversion short-circuit test method based on energy storage inverter according to claim 2, characterized in that: The transient recovery voltage regulation element includes a high-voltage resistor array and a high-voltage capacitor array; The high-voltage resistor array is composed of multiple non-inductive resistor branches with different resistance values ​​connected in parallel, and the high-voltage capacitor array is composed of multiple pulse capacitor branches with different capacitance values ​​connected in parallel. By controlling the on and off of each solid-state switch in the switch matrix, the combination of the non-inductive resistor branch and the pulse capacitor branch connected to the test load circuit is switched to adjust the resistance value and the capacitance value.

5. The frequency conversion short-circuit test method based on energy storage inverter according to claim 1, characterized in that: During the process of injecting the short-circuit current into the test load circuit, the timing of the closing switch, the operating circuit breaker, and the circuit breaker under test are coordinated and controlled according to the periodic characteristics of the target test frequency to perform a short-circuit breaking test, including: Using the zero-crossing signal of the AC voltage as a time reference, and based on the half-wave time of the target test frequency, calculate the closing trigger time of the closing switch, the protection delay of the operating circuit breaker, and the opening trigger time of the circuit breaker under test. Based on the synchronous trigger controller, hardware interrupt signals corresponding to the closing trigger time, protection delay, and opening trigger time are generated respectively. The short-circuit current is controlled to complete the injection and interruption within a set half-wave number according to the hardware interrupt signals.

6. The frequency conversion short-circuit test method based on energy storage inverter according to claim 5, characterized in that: The synchronous trigger controller generates hardware interrupt signals corresponding to the closing trigger time, protection delay, and tripping trigger time, respectively. Based on these hardware interrupt signals, it controls the injection and interruption of the short-circuit current within a set half-wave number, including: The synchronous trigger controller includes a programmable gate array and a digital signal processor; The digital signal processor is used to receive the voltage zero-crossing signal from the high-voltage voltage transformer and execute an interpolation algorithm to calculate the zero-crossing time; The programmable gate array is equipped with a high-speed hardware timer, which generates hardware interrupt signals corresponding to the closing trigger time, the protection delay, and the opening trigger time based on the zero crossing time, the half-wave time, and the preset mechanical action delay compensation value. The hardware interrupt signal is converted into an optical trigger pulse and transmitted to the operating mechanisms of the closing switch, the operating circuit breaker, and the circuit breaker under test, so as to control the injection and interruption of the short-circuit current within a set half-wave number.

7. The frequency conversion short-circuit test method based on energy storage inverter according to claim 5, characterized in that: After the coordinated control of the closing switch, the operation of the circuit breaker, and the circuit breaker under test to perform the short-circuit breaking test, a test evaluation and safety interlocking step is also performed, specifically including: The transient recovery voltage waveform across the circuit breaker under test and the short-circuit current waveform of the test load circuit are acquired simultaneously. Based on the transient recovery voltage waveform, the voltage envelope is extracted, and the actual transient recovery voltage peak value and voltage rise rate are calculated. The zero-crossing time of the current is determined based on the short-circuit current waveform, and the actual breaking time is calculated in combination with the tripping trigger time. If the actual interruption time is greater than the preset maximum allowable interruption time, or the actual transient recovery voltage peak value is greater than the preset insulation withstand voltage threshold, an interruption failure signal is generated. In response to the generation of the interruption failure signal, an emergency trip command is sent to the operating circuit breaker to disconnect the test load circuit. At the same time, the discharge contactor on the DC side of the energy storage inverter unit is closed, and the remaining electrical energy is converted into heat energy and released through a high-power discharge resistor until the DC bus voltage drops below the safe voltage.

8. The frequency conversion short-circuit test method based on energy storage inverter according to claim 2, characterized in that: Before the control energy storage inverter unit outputs AC power at the target test frequency to the test transformer, the following is also included: Based on the target test frequency, the expected short-circuit current amplitude, and the preset test duration, calculate the target energy storage required by the DC support capacitor in the energy storage inverter unit; The target DC bus voltage is determined based on the target energy storage capacity and the capacitance value of the DC support capacitor. The front-end rectifier unit is controlled to perform constant current-constant voltage segmented charging on the DC support capacitor. In the initial charging stage, the front-end rectifier unit is controlled to perform constant current charging on the DC support capacitor with a preset constant current value until the terminal voltage of the DC support capacitor reaches a preset voltage threshold. Subsequently, the front-end rectifier unit is controlled to switch to constant voltage charging mode to maintain the output voltage at the target DC bus voltage. When the charging current is detected to drop to the preset cutoff current threshold, the charging circuit of the front-end rectifier unit is cut off, the holding contactor is closed, and the DC support capacitor enters the off-grid energy storage holding state.

9. The frequency conversion short-circuit test method based on energy storage inverter according to claim 1, characterized in that: After the control energy storage inverter unit outputs AC power at the target test frequency to the test transformer, the following is also included: During the output of the alternating current, the output voltage and output current are sampled in real time. When a voltage drop or frequency shift is detected due to a short-circuit load connection, the duty cycle of the drive pulse of the switching device in the energy storage inverter unit is dynamically adjusted to maintain the stability of the target test frequency and voltage amplitude.

10. A frequency conversion short-circuit test system based on energy storage inverter, characterized in that, include: The main circuit for energy storage inverter includes a rectifier unit, an energy storage unit, and an inverter unit connected in sequence; A test transformer, the primary side of which is connected to the inverter unit; The test load circuit is connected to the secondary side of the test transformer. The test load circuit is connected in series with a closing switch, a protective circuit breaker, an operating circuit breaker and the circuit breaker under test, and is equipped with an impedance adjustment module and a transient recovery voltage adjustment module. The collaborative controller is communicatively connected to the main circuit of the energy storage inverter, the closing switch, the protection circuit breaker, the operating circuit breaker, the circuit breaker under test, the impedance adjustment module, and the transient recovery voltage adjustment module. The collaborative controller is configured to perform the frequency conversion short-circuit test method based on the energy storage inverter as described in any one of claims 1-9.

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