Interface board structure for HBM cube die testing and testing method thereof

CN122983631APending Publication Date: 2026-10-27JIANGSU JINCHENG SEMICONDUCTOR CO LTD
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Patent Information

Application Number
CN202611063160.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2026-07-07
Filing Date
2026-07-17
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

[0006]针对上述的缺陷,本发明的目的在于提供一种用于HBM Cube Die测试的接口板结构体,解决在高带宽存储器晶圆测试工艺中,由于晶圆翘曲、局部发热及自发热导致的测试可靠性下降问题

Benefits of technology

[0016]本发明提供一种用于HBM Cube Die测试的接口板结构体,提高了高带宽存储器测试工艺的生产良率,提高了测试可靠性及维护效率。具体的:

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Abstract

The present application relates to the technical field of semiconductor chip manufacturing, in particular to an interface board structure for HBM Cube Die testing, which is used for testing Cube dies obtained by cutting and separating a high bandwidth memory wafer; the interface board structure is arranged between an automatic test equipment and the Cube dies, and comprises an interface PCB, a converter and a temperature control assembly; the converter is a pitch converter or a space converter. The present application also provides a testing method for HBM Cube Die testing. The present application can eliminate the flatness problem caused by wafer warping during the whole wafer testing by separating the high bandwidth memory wafer into independent Cube dies. The present application can improve the heat dissipation capacity of single die, relieve local heat aggregation and chip self-heating problems during the testing process, and ensure the testing reliability of multiple high-speed signal channels, and the equipment versatility is strong.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor chip manufacturing technology, and in particular to an interface board structure for HBM Cube Die testing and its testing method. Background Technology

[0002] Semiconductor manufacturing process testing is broadly divided into wafer testing and package testing. Each type of testing can be further subdivided into burn-in testing and speed testing, depending on its purpose.

[0003] In recent years, with the development of the artificial intelligence (AI) industry, the requirements for data throughput and operating speed of memory products have increased significantly, and the high integration of memory semiconductors has also been rapidly advancing. In addition to existing planar (2D) integrated structures, the application of 3D stacked structures based on TSV (Through Silicon Via) and bonding technology is also increasing, with high-bandwidth memory (HBM) products being the most representative example. With the increase in 3D stacked structures, the power consumption and heat generation of a single memory chip (Memory IC) are also showing a continuous upward trend.

[0004] Traditional memory wafer testing utilizes probe cards, simultaneously contacting the entire test area of ​​the wafer. However, high-bandwidth memory wafers (HBMWas), due to their multi-layered stacked structure and high heat generation, experience increased wafer warpage, making it difficult to maintain stable wafer flatness. Particularly, probe contact defects may occur in certain areas of the wafer, leading to overkill of even normally functioning devices.

[0005] Furthermore, the localized heat generated during the testing of high-bandwidth memory wafers can cause changes in probe contact resistance and signal measurement errors, leading to a decrease in test reliability. This heat concentration can be further exacerbated when using traditional testing methods that simultaneously inspect the entire wafer structure. For example, in high-temperature testing environments above 125°C, high-bandwidth memory can generate additional self-heating, with some circuits producing excessive heat exceeding permissible temperatures. This can damage the circuitry itself or cause over-detection of normal devices as defective. This results in a decrease in production yield. Summary of the Invention

[0006] To address the aforementioned shortcomings, the present invention aims to provide an interface board structure for HBM Cube Die testing, thereby resolving the issue of decreased test reliability caused by wafer warpage, localized heating, and self-heating in high-bandwidth memory wafer testing processes.

[0007] To achieve the above objectives, the present invention provides an interface board structure for testing HBM Cube Die, which is used to test Cube dies obtained by cutting and separating high-bandwidth memory wafers; The interface board structure is positioned between the automated testing equipment and the Cube die, and includes an interface PCB, a converter, and a temperature control component; the converter is a pitch converter or a space converter.

[0008] Furthermore, the interface PCB is used to establish an electrical signal transmission path between the automatic test equipment and the bare die, and to transmit the test signals of the automatic test equipment to the pitch converter or space converter. The converter enables the electrical connection between the automated testing equipment and the Cube die by converting signals; The temperature control component includes a temperature detection module, a temperature adjustment module, and a temperature control control unit; the temperature control control unit has a built-in adaptive fuzzy PID temperature control algorithm, which is used to receive temperature data transmitted from the temperature detection module and send temperature adjustment commands to the temperature adjustment module.

[0009] Furthermore, the converter includes multiple contact probes and a converter signal acquisition unit, using vertical spring pin contactors, spring pin contactors, or MEMS contactors as contact probes; the converter signal acquisition unit has a built-in impedance diagnostic algorithm.

[0010] This invention also provides a testing method for HBM Cube Die testing, employing the aforementioned interface board structure, and comprising the following steps: S1, Wafer dicing: High-bandwidth memory wafers are diced into multiple cube dies as required; S2, Loading and Positioning: Place a single Cube bare die into the test area or test socket; S3, System Self-Test: Initiate impedance diagnostic algorithm and complete contact probe reference calibration; S4, Temperature Control Pre-stabilization: Activate the adaptive fuzzy PID temperature control algorithm to stabilize the temperature of the Cube die to the target test range; S5, Aging Test: Continuous power-on burn-in aging is performed, with synchronous temperature measurement and impedance monitoring throughout the process; S6, Speed ​​Test: Switch to high-speed test signal and automatically compensate for signal loss caused by contact probe impedance; S7, Data Judgment: Integrates temperature data, impedance data, and storage performance data, and outputs the Cube bare die judgment result, indicating whether it is a good or bad product; S8, material unloading and sorting: classify according to test results, and synchronously export temperature data and contact pin status logs.

[0011] Furthermore, in S4, the adaptive fuzzy PID temperature control algorithm includes the following steps: S41, Initialization, setting the temperature threshold range; Aging test standard temperature: 125℃, allowable fluctuation threshold ±0.5℃; temperature warning threshold ±0.8℃, fault shutdown threshold ±1.2℃; Speed ​​test standard temperature: 85℃, allowable fluctuation threshold ±0.5℃, warning threshold ±0.8℃, shutdown threshold ±1.2℃; S42, Construction of multi-point temperature matrix and calculation of deviation; Collect temperature data at multiple points on the back of the Cube die and calculate the average real-time temperature. Compare it with the target temperature Perform difference calculation Simultaneously calculate the rate of change of deviation. ; S43, adaptive correction of fuzzy PID parameters by integral separation; S44: Layered adjustment of cooling / heating output power; S45: Time-series data storage and aging temperature curve fitting.

[0012] Furthermore, in S43, an error dead zone threshold is set. =0.3℃; when ≤0.3℃ is within the steady-state range; maintain the current power and conduct normal testing. When 0.3℃ < ≤0.8℃, within the warning range, fuzzy PID correction power, record temperature warning; When 0.8℃ < ≤1.2℃, within the critical range, heat load feedforward compensation; when If the temperature exceeds 1.2℃, the test is within the fault range; the alarm will be archived.

[0013] Furthermore, in S41, the temperature sampling period is 100ms / time, and the real-time power consumption of the Cube die is collected synchronously as a thermal load feedforward parameter.

[0014] Furthermore, in S3, the impedance diagnostic algorithm includes the following steps: S31: Reference impedance calibration; Before testing, a standard gold cube was used to collect the standard contact resistance of all contact probes. Set impedance floating thresholds: 50mΩ~200mΩ for normal range; 300mΩ for degradation warning threshold; and 500mΩ for open circuit fault threshold. S32: Multi-channel synchronous impedance real-time sampling; Every 500ms, the impedance of all Contact Pin channels is synchronously acquired to generate an impedance matrix, and the corresponding IO channels on the Cube die are synchronously matched. S33: Level 3 fault determination logic; Single-channel impedance 50~300mΩ: normal contact, directly acquire test signal; Single-channel impedance 300~500mΩ: Probe deterioration warning, record channel number, and push contact probe maintenance reminder after test completion; Single-channel impedance > 500mΩ: Determine a contact open circuit, immediately mark the Cube test data as invalid, and skip subsequent speed tests.

[0015] Furthermore, S3 also includes S34: High-frequency signal impedance compensation calculation; For high-frequency signals in speed testing, a signal attenuation compensation coefficient is generated based on the real-time impedance value to correct the ATE output test waveform and eliminate timing offset caused by contact resistance of the contact pins.

[0016] This invention provides an interface board structure for HBM Cube Die testing, which improves the production yield of high-bandwidth memory testing processes and enhances testing reliability and maintenance efficiency. Specifically: 1. By separating high-bandwidth memory wafers into independent cube dies for testing, the problem of insufficient flatness caused by wafer warpage during whole-wafer testing can be eliminated. This solves the problem of poor probe contact and improves test reliability.

[0017] 2. By independently arranging and testing each Cube die after cutting, the spacing between the Cube dies can be utilized to improve the heat dissipation capacity of each individual die, alleviating localized heat accumulation and chip self-heating issues during testing. Especially in high-temperature aging test environments above 125℃, thermal coupling can be reduced, thus minimizing circuit damage and overkill.

[0018] 3. By using a pitch converter or space transformer, it is possible to stably connect the fine-pitch pads and bumps of the cube die in high-bandwidth memory to the printed circuit board wiring, thereby ensuring the testing reliability of multiple high-speed signal channels.

[0019] 4. Independent temperature control for each individual Cube die, with an adaptive feedforward algorithm to eliminate oscillations during hot and cold switching, maintains a stable constant temperature under different dynamic power consumption conditions, avoiding over-testing / false positives caused by temperature drift, and improving HBM yield accuracy by more than 12%; real-time interception of contact probe failures, compared to traditional methods that only detect contact probe failures after the fact, this invention provides full-process online impedance diagnosis, providing early warning of contact probe degradation, and directly terminating testing for open-circuit Cube dies, reducing unnecessary test energy consumption. The converter is compatible with multiple types of elastic probes, and a single interface board can be compatible with multiple generations of Cube dies including HBM2, HBM3, and HBM4, making the equipment highly versatile. Attached Figure Description

[0020] Figure 1 This is an assembly diagram of the interface board structure used in the HBM Cube Die test of this invention during testing. Figure 2 A schematic diagram of setting pads on a Cube die; Figure 3 A schematic diagram of a structure for setting bumps on a Cube die; Figure 4 This is a structural diagram of the interface PCB in the interface board structure; Figure 5 The present invention employs a vertical spring-loaded pin contactor as the contact probe assembly structure. Figure 6 The present invention employs a Pogo Pin contactor as the assembly structure for the contact probe; Figure 7 The present invention employs a MEMS-type contactor as the assembly structure for the contact probe. Detailed Implementation

[0021] The technical solution of the present invention will be further described in a non-limiting manner below with reference to the accompanying drawings and specific embodiments.

[0022] like Figures 1-5 As shown, this invention provides an interface board structure for testing HBM Cube Die, used to test (age testing, speed testing, etc.) the Cube die 2 obtained by dicing and separating a high-bandwidth memory wafer. The specifications of the Cube die 2 can be set according to the required requirements.

[0023] The interface board structure is positioned between the automated testing equipment 1 and the Cube die 2. This interface board structure includes an interface PCB 3, a converter 4, and a temperature control component. The converter 4 is either a pitch converter or a space transformer. Specifically, the Cube die 2 is placed in the testing area or testing socket, and each Cube die 2 is electrically connected via contact probes to perform aging tests or speed tests.

[0024] The interface PCB 3 is used to establish an electrical signal transmission path between the automatic test equipment 1 and the Cube die 2, and to transmit the test signals of the automatic test equipment 1 to the pitch converter / space converter.

[0025] The converter 4 achieves the electrical connection between the automatic test equipment 1 and the Cube die 2 by converting signals. Specifically, since the Cube die 2 contains very fine pads 21 or bumps 22, as well as numerous input and output channels, it may be difficult to achieve the interface connection directly using only general PCB (printed circuit board) wiring. Therefore, the converter 4 is used to achieve the electrical connection.

[0026] The converter 4 includes multiple contact probes 41 and a converter signal acquisition unit, with each contact probe 41 contacting the Cube die 2 under test. Further, the Cube die 2 includes pads 21 or bumps 22, and each contact probe 41 contacts the pads 21 or bumps 22 of the Cube die 2 under test to achieve electrical signal transmission.

[0027] This invention uses a vertical spring-loaded pin contactor (see...). Figure 5 Pogo Pin contactor (see) Figure 6 ) or MEMS contactor (see Figure 7 As a contact probe, other elastic contact structures that rely on the elastic deformation of materials to achieve reliable electrical connection can also be used, including cantilever probes, vertical micro probes, integrated metal spring probes, conductive elastic adhesives, MEMS micro elastic beams and other non-standard customized elastic conductive contact components.

[0028] The converter signal acquisition unit has a built-in impedance diagnosis algorithm.

[0029] The temperature control component includes a temperature detection module, a temperature regulation module, and a temperature control control unit. The temperature detection module is a miniature platinum resistance / thermocouple sensor array, attached to the back of the pads 21 or bumps 22 of the Cube die 2, acquiring temperature data of the Cube die 2 in milliseconds in real time. The temperature regulation module includes a semiconductor cooling chip (cooling) and a miniature heating film (heating), dynamically outputting cooling / heating power based on the real-time temperature acquired by the temperature detection module to stabilize the temperature of the Cube die 2 within the target test range. The temperature control control unit has a built-in adaptive fuzzy PID temperature control algorithm, used to receive temperature data transmitted from the temperature detection module and send temperature regulation commands to the temperature regulation module.

[0030] In use, the high-bandwidth memory wafer is cut and separated into individual die specifications. Each Cube die 2 is placed independently in the test area or test socket. The electrical signal communication between the automatic test equipment 1 and the Cube die 2 is realized through the interface board structure, and the aging test and speed test of each Cube die 2 are completed independently.

[0031] This invention also provides a test method for HBM Cube Die testing, comprising the following steps: S1, Wafer dicing: High-bandwidth memory wafers are diced into multiple cube dies as required; S2, Loading and Positioning: Place a single Cube bare die into the test area or test socket; S3, System Self-Test: Initiate impedance diagnostic algorithm and complete contact probe reference calibration; S4, Temperature Control Pre-stabilization: Activate the adaptive fuzzy PID temperature control algorithm to stabilize the temperature of the Cube die to the target test range; S5, Aging Test: Continuous power-on burn-in aging is performed, with synchronous temperature measurement and impedance monitoring throughout the process; S6, Speed ​​Test: Switch to high-speed test signal and automatically compensate for signal loss caused by contact probe impedance; S7, Data Judgment: Integrates temperature data, impedance data, and storage performance data, and outputs the Cube bare die judgment result, indicating whether it is a good or bad product; S8, material unloading and sorting: classify according to test results, and synchronously export temperature data and contact pin status logs.

[0032] In S3, the impedance diagnosis algorithm includes the following steps: S31: Reference Impedance Calibration Before testing, a standard gold cube was used to collect the standard contact resistance of all contact probes. Set impedance floating thresholds: 50mΩ~200mΩ for normal range; 300mΩ for degradation warning threshold; and 500mΩ for open circuit fault threshold.

[0033] S32: Multi-channel synchronous impedance real-time sampling Every 500ms, the impedance of all Contact Pin channels is synchronously acquired to generate an impedance matrix, which is then synchronously matched to the IO channels of the corresponding bumps on the Cube die.

[0034] S33: Level 3 Fault Judgment Logic Single-channel impedance 50~300mΩ: normal contact, directly acquire test signal; Single-channel impedance 300~500mΩ: Probe deterioration warning, record channel number, and push contact probe maintenance reminder after test completion; Single-channel impedance > 500mΩ: Determine a contact open circuit, immediately mark the Cube test data as invalid, skip subsequent speed tests, and avoid unnecessary time loss.

[0035] S34: High-frequency signal impedance compensation calculation For high-frequency signals in speed testing, a signal attenuation compensation coefficient is generated based on the real-time impedance value to correct the ATE output test waveform, eliminate timing offset caused by contact resistance of the contact pins, and improve speed testing accuracy.

[0036] In S4, the adaptive fuzzy PID temperature control algorithm includes the following steps: S41, Initialization, setting the temperature threshold range.

[0037] Based on the configuration parameters of the high-bandwidth memory testing standard: Aging test standard temperature: 125℃, allowable fluctuation threshold ±0.5℃; temperature warning threshold ±0.8℃, fault shutdown threshold ±1.2℃; Speed ​​test standard temperature: 85℃, allowable fluctuation threshold ±0.5℃, warning threshold ±0.8℃, shutdown threshold ±1.2℃; Temperature sampling period: 100ms / time, synchronously collecting the real-time power consumption of the Cube die as a thermal load feedforward parameter.

[0038] S42, Construction of multi-point temperature matrix and calculation of deviation.

[0039] Collect temperature data at multiple points on the back of the Cube die and calculate the average real-time temperature. Compare it with the target temperature Perform difference calculation Simultaneously calculate the rate of change of deviation. .

[0040] S43, Integral separation fuzzy PID parameter adaptive correction.

[0041] Set the error dead zone threshold =0.3℃; when ≤0.3℃ is within the steady-state range. Maintain the current power and conduct normal testing. At this time, turn off the integral term and only retain the proportional and derivative adjustments to eliminate small temperature fluctuations.

[0042] When 0.3℃ < ≤0.8℃ is within the warning range. Fuzzy PID power is adjusted, and temperature warnings are recorded. A fuzzy rule base is enabled to dynamically adjust the PID proportional coefficient, integral coefficient, and derivative coefficient based on deviation and the rate of change of deviation, resulting in minor adjustments to cooling / heating power.

[0043] When 0.8℃ < ≤1.2℃ is within the critical range. Thermal load feedforward compensation enables rapid correction. Feedforward compensation intervenes, reads the real-time read / write power consumption of the Cube die, predicts short-term temperature rise / fall trends, and adds power compensation to quickly pull it back to the standard range.

[0044] when If the temperature exceeds 1.2℃, the test is within the fault range. Terminate the test and archive the alarm. Immediately stop the test, record the temperature anomaly log, and trigger an audible and visual alarm.

[0045] Step S44: Adjust the cooling / heating output power in stages.

[0046] Low temperature: Output graded heating power, low deviation with low power for slow heating, and high deviation with full power for rapid heating; High temperature: Output graded cooling power to suppress hot spots during high-speed testing of the Cube die; Temperature falls within the standard range of ±0.5℃: maintain minimum sustaining power and stabilize the temperature.

[0047] Step S45: Time-series data storage and aging temperature curve fitting The temperature time series data of each Cube die was recorded throughout the process, and the temperature rise curve was fitted for subsequent batch Cube die thermal performance classification and screening.

[0048] experiment: An aging test was conducted on the HBM3 Cube at a target temperature of 125°C. Hardware assembly: An integrated metal spring probe is used as the contact probe, and the temperature control component sensor is attached to the four corners of the back of the Cube; Algorithm parameter configuration: standard temperature 125℃, allowable fluctuation ±0.5℃, warning thresholds 125.8℃ and 124.2℃, shutdown thresholds 126.2℃ and 123.8℃; Operation process: The Cube consumes 18W under full load during aging. The feedforward algorithm predicts the temperature rise based on the real-time power consumption and increases the semiconductor cooling output in advance. The probe impedance is stably maintained at 80~150mΩ without any warning faults. The aging temperature fluctuation is ≤±0.4℃ for 48 hours, and all test data are valid.

[0049] Speed ​​tests were conducted on the HBM4 Cube at a target temperature of 85°C. Hardware assembly: Employs MEMS micro-elastic beam probes, adapted to 5μm ultra-fine pitch bumps; Algorithm parameter configuration: standard temperature 85℃, impedance reference value 100mΩ, warning threshold 300mΩ; Operation process: High-speed read and write instantaneous power consumption fluctuates greatly, and fuzzy PID dynamic correction adjusts the power, eliminating temperature oscillation; real-time impedance compensation for high-frequency signals reduces timing test errors by 70%.

[0050] In this invention, HBM Cube Die is a high-bandwidth memory wafer die, referred to herein as a Cube die.

[0051] This invention provides an interface board structure and testing method for HBM Cube Die testing. It features independent temperature control for each individual Cube die, and an adaptive feedforward algorithm eliminates oscillations during hot and cold switching, maintaining a stable constant temperature under different dynamic power consumption conditions. This avoids over-testing / false positives caused by temperature drift, improving HBM yield accuracy by over 12%. It achieves real-time interception of contact probe failures. Compared to traditional methods that only detect contact probe failures after the fact, this invention provides online impedance diagnosis throughout the entire process, providing early warning of contact probe degradation. Open-circuited Cube dies directly terminate the test, reducing unnecessary test energy consumption. The converter is compatible with multiple types of elastic probes; one interface board can be compatible with multiple generations of Cube dies (HBM2, HBM3, HBM4), offering strong equipment versatility.

[0052] The preferred embodiments of the present invention have been described in detail above. These embodiments are not intended to limit the scope of the present invention. All equivalent variations and modifications made within the scope of the present invention should still fall within the scope of the present invention.

Claims

1. An interface board structure for HBM Cube Die testing, characterized in that, Used for testing Cube bare dies obtained by dicing and separating high-bandwidth memory wafers; The interface board structure is positioned between the automated testing equipment and the Cube die, and includes an interface PCB, a converter, and a temperature control component; the converter is a pitch converter or a space converter.

2. The interface board structure for HBM Cube Die testing according to claim 1, characterized in that, The interface PCB is used to establish an electrical signal transmission path between the automatic test equipment and the bare die, and to transmit the test signals of the automatic test equipment to the pitch converter or space converter. The converter enables the electrical connection between the automated testing equipment and the Cube die by converting signals; The temperature control component includes a temperature detection module, a temperature adjustment module, and a temperature control control unit; The temperature control unit has a built-in adaptive fuzzy PID temperature control algorithm, which is used to receive temperature data transmitted from the temperature detection module and send temperature adjustment commands to the temperature adjustment module.

3. The interface board structure for HBM Cube Die testing according to claim 1, characterized in that, The converter includes multiple contact probes and a converter signal acquisition unit, using vertical spring pin contactors, spring pin contactors, or MEMS contactors as contact probes; the converter signal acquisition unit has a built-in impedance diagnosis algorithm.

4. A test method for HBM Cube Die testing, employing the interface board structure described in any one of claims 1 to 3, characterized in that, Includes the following steps: S1, Wafer dicing: High-bandwidth memory wafers are diced into multiple cube dies as required; S2, Loading and Positioning: Place a single Cube bare die into the test area or test socket; S3, System Self-Test: Initiate impedance diagnostic algorithm and complete contact probe reference calibration; S4, Temperature Control Pre-stabilization: Activate the adaptive fuzzy PID temperature control algorithm to stabilize the temperature of the Cube die to the target test range; S5, Aging Test: Continuous power-on burn-in aging is performed, with synchronous temperature measurement and impedance monitoring throughout the process; S6, Speed ​​Test: Switch to high-speed test signal and automatically compensate for signal loss caused by contact probe impedance; S7, Data Judgment: Integrates temperature data, impedance data, and storage performance data, and outputs the Cube bare die judgment result, indicating whether it is a good or bad product; S8, material unloading and sorting: classify according to test results, and synchronously export temperature data and contact pin status logs.

5. The test method for HBM Cube Die testing according to claim 4, characterized in that, In S4, the adaptive fuzzy PID temperature control algorithm includes the following steps: S41, Initialization, setting the temperature threshold range; Aging test standard temperature: 125℃, allowable fluctuation threshold ±0.5℃; temperature warning threshold ±0.8℃, fault shutdown threshold ±1.2℃; Speed ​​test standard temperature: 85℃, allowable fluctuation threshold ±0.5℃, warning threshold ±0.8℃, shutdown threshold ±1.2℃; S42, Construction of multi-point temperature matrix and calculation of deviation; Collect temperature data at multiple points on the back of the Cube die and calculate the average real-time temperature. Compare it with the target temperature Perform difference calculation Simultaneously calculate the rate of change of deviation. ; S43, adaptive correction of fuzzy PID parameters by integral separation; S44: Layered adjustment of cooling / heating output power; S45: Time-series data storage and aging temperature curve fitting.

6. The test method for HBM Cube Die testing according to claim 5, characterized in that, In S43, the error dead zone threshold is set. =0.3℃; when ≤0.3℃ is within the steady-state range; maintain the current power and conduct normal testing. When 0.3℃ < ≤0.8℃, within the warning range, fuzzy PID correction power, record temperature warning; When 0.8℃ < ≤1.2℃, within the critical range, heat load feedforward compensation; when If the temperature exceeds 1.2℃, the test is within the fault range; the alarm will be archived.

7. The test method for HBM Cube Die testing according to claim 5, characterized in that, In S41, the temperature sampling period is 100ms / time, and the real-time power consumption of the Cube die is collected synchronously as a thermal load feedforward parameter.

8. The test method for HBM Cube Die testing according to claim 4, characterized in that, In S3, the impedance diagnosis algorithm includes the following steps: S31: Reference impedance calibration; Before testing, a standard gold cube was used to collect the standard contact resistance of all contact probes. Set impedance floating thresholds: 50mΩ~200mΩ for normal range; 300mΩ for degradation warning threshold; and 500mΩ for open circuit fault threshold. S32: Multi-channel synchronous impedance real-time sampling; Every 500ms, the impedance of all Contact Pin channels is synchronously acquired to generate an impedance matrix, and the corresponding IO channels on the Cube die are synchronously matched. S33: Level 3 fault determination logic; Single-channel impedance 50~300mΩ: normal contact, directly acquire test signal; Single-channel impedance 300~500mΩ: Probe deterioration warning, record channel number, and push contact probe maintenance reminder after test completion; Single-channel impedance > 500mΩ: Determine a contact open circuit, immediately mark the Cube test data as invalid, and skip subsequent speed tests.

9. The test method for HBM Cube Die testing according to claim 8, characterized in that, S3 also includes S34: High-frequency signal impedance compensation calculation; For high-frequency signals in speed testing, a signal attenuation compensation coefficient is generated based on the real-time impedance value to correct the ATE output test waveform and eliminate timing offset caused by contact resistance of the contact pins.