Static current detection circuit and chip for chip
Patent Information
- Application Number
- CN202610900924.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-22
- Publication Date
- 2026-10-27
Smart Images
Figure CN122983644A_ABST
Abstract
Description
Technical Field
[0001] This disclosure generally relates to the fields of integrated circuit design for testability and built-in self-test technology. More specifically, this disclosure relates to a quiescent current detection circuit and chip for use in a chip. Background Technology
[0002] Static power supply current (IDDQ) is a key indicator characterizing the presence of manufacturing defects, metal migration, micro-short circuits, gate oxide leakage, latch-up risks, etc., in the digital circuitry of a chip. Traditionally, IDDQ testing is performed once by automated test equipment (ATE) before the chip leaves the factory to screen for qualified chips.
[0003] During the chip usage phase, existing IDDQ-related testing technologies include on-chip current sensors (BICS) and ATE-assisted IDDQ testing solutions. However, these technologies still have defects and shortcomings and cannot meet the comprehensive requirements of chips that need to comply with functional safety standards. Summary of the Invention
[0004] To at least partially solve the technical problems mentioned in the background art, the present disclosure provides a static current detection circuit and chip for a chip.
[0005] This disclosure provides a static current judgment circuit for a chip, wherein the static current judgment circuit includes a detection control unit, a detection voltage generation unit, a reference voltage generation unit, and a comparison unit. The detection control unit is configured to receive a detection trigger signal from the chip, and according to the detection trigger signal, cause the digital circuit of the chip to enter a static state, and enable the detection voltage generation unit and the comparison unit to switch the chip from an operating mode to a static current judgment mode. The detection voltage generation unit includes a detection resistor, the resistance of which is greater than or equal to a preset resistance threshold. In the static current judgment mode, a static current flows through the detection resistor, and a voltage drop signal is obtained across the detection resistor by the static current flowing through the detection resistor and the detection resistor itself. The reference voltage generation unit includes a reference resistor matched to the detection resistor and a controllable current source, and a reference voltage is obtained across the reference resistor by the reference current provided by the reference resistor and the controllable current source. The comparison unit is configured to, in the static current judgment mode, output a comparison result indicating whether the static current exceeds the limit based on the voltage drop signal and the reference voltage.
[0006] According to embodiments of this disclosure, the detection control unit includes a control component, and the comparison unit includes a comparator; the static current judgment circuit includes a first switch, one end of which is connected to the power supply of the chip, and the other end of which is connected to the power network of the digital circuit of the chip; the detection voltage generation unit includes a second switch, one end of which is connected to the power supply of the chip, and the other end of which is connected to one end of a detection resistor, the other end of which is connected to the power network of the digital circuit of the chip and the negative input terminal of the comparator; one end of a reference resistor is connected to the power supply of the chip, and the other end of which is connected to a controllable current source and the positive input terminal of the comparator; the control component is connected to the first switch, the second switch, the comparator, and the digital circuit, and the control component receives the detection trigger signal and sends an enable signal, the enable signal causing the digital circuit of the chip to enter a static state, and enables the detection voltage generation unit and the comparator by controlling the first switch and the second switch.
[0007] According to an embodiment of this disclosure, the detection control unit is further configured to enable the reference voltage generation unit according to the detection trigger signal, wherein in the static current judgment mode, the controllable current source supplies reference current to the reference resistor.
[0008] According to an embodiment of this disclosure, the reference voltage generating unit further includes a third switch, one end of the reference resistor is connected to the power network of the digital circuit of the chip, the other end of the reference resistor is connected to one end of the third switch and the non-inverting input of the comparator, the other end of the third switch is connected to the controllable power supply, the control unit is connected to the third switch, and the enable signal sent by the control unit enables the reference voltage generating unit by controlling the third switch.
[0009] According to an embodiment of this disclosure, the first switch includes a first transistor, the second switch includes a second transistor, the detection control unit further includes an inverter, one end of the control component is connected to the gate of the first transistor and the input terminal of the inverter, and the output terminal of the inverter is connected to the gate of the second transistor. When the control component controls the first transistor to be turned on and the second transistor to be turned off, the chip is in a working mode. When the control component controls the second transistor to be turned on and the first transistor to be turned off, the chip is in a static current judgment mode.
[0010] According to an embodiment of this disclosure, the difference between the power supply voltage of the chip and the voltage drop signal is used as a detection voltage input to the negative input terminal of the comparator, and the difference between the power supply voltage of the chip and the reference voltage is used as a threshold voltage input to the positive input terminal of the comparator. When the detection voltage is greater than the threshold voltage, the comparison result output by the comparator indicates that the quiescent current is not exceeded. When the detection voltage is less than or equal to the threshold voltage, the comparison result output by the comparator indicates that the quiescent current exceeds the limit.
[0011] According to an embodiment of this disclosure, the output of the comparator is connected to the digital circuit, and the comparison result output by the comparator is transmitted to the digital circuit so that the digital circuit can save or process the comparison result.
[0012] According to an embodiment of this disclosure, the preset resistance threshold is 100kΩ, and the resistance value of the detection resistor is in the range of 100kΩ to 100MΩ.
[0013] According to an embodiment of this disclosure, the detection resistor and the reference resistor are set according to a preset resistance ratio, and the reference current of the controllable current source is determined according to the preset resistance ratio and a preset static current threshold.
[0014] According to embodiments of this disclosure, the static state includes the digital system clock being paused, the digital signal being forcibly stopped from flipping, and the output port remaining unchanged.
[0015] This disclosure also provides a chip, which includes the above-described static current determination circuit for the chip.
[0016] This disclosure also provides an electronic device. The electronic device includes the chip described above.
[0017] According to the technical solution of this disclosure, the detection control unit of the static current judgment circuit receives a detection trigger signal from the chip and, based on the detection trigger signal, causes the digital circuit of the chip to enter a static state, and switches the chip from the working mode to the static current judgment mode. In the static current judgment mode, the static current flows through the large-value detection resistor of the detection voltage generation unit, thereby obtaining the voltage drop signal across the detection resistor. In addition, through the reference resistor matched with the detection resistor in the reference voltage generation unit and the controllable current source, a reference voltage across the reference resistor can be obtained. Using the voltage drop signal and the reference voltage, a comparator can output a comparison result indicating whether the static current exceeds the limit. Therefore, when judging whether there is a problem with the chip's static current, it is not necessary to directly measure the weak static current, but to indirectly judge the static current exceeding the limit by using the voltage drop across the detection resistor through which the static current flows. This eliminates the need for high-precision components to measure the weak static current, thereby simplifying the circuit and reducing costs. Attached Figure Description
[0018] The above and other objects, features, and advantages of exemplary embodiments of the present disclosure will become readily apparent upon reading the following detailed description with reference to the accompanying drawings. In the drawings, several embodiments of the present disclosure are illustrated by way of example and not limitation, and like or corresponding reference numerals denote like or corresponding parts, wherein: Figure 1 This is a structural block diagram illustrating a static circuit judgment circuit for a chip according to an embodiment of the present disclosure; Figure 2 This is a schematic diagram illustrating the structure of a static circuit judgment circuit for a chip according to an embodiment of the present disclosure. Detailed Implementation
[0019] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0020] Static current (IDDQ) is a key indicator characterizing the presence of manufacturing defects, metal migration, micro-short circuits, gate oxide leakage, latch-up risks, etc., in the digital circuitry of a chip. Traditionally, IDDQ testing is performed once by automated test equipment (ATE) before the chip leaves the factory.
[0021] Existing IDDQ-related detection technologies determine whether the chip's quiescent current exceeds the limit by directly measuring the quiescent current, but this has many problems, such as: nA-level quiescent current is extremely difficult to detect, and it has extremely high requirements for amplifier noise, offset, and gain accuracy; the detection circuit is complex and has a large area overhead, usually requiring multiple op-amps, current mirrors, and calibration circuits; it is greatly affected by process, voltage, and temperature (PVT), and requires precise ATE calibration on a chip-by-chip basis, resulting in high mass production costs.
[0022] To better determine the quiescent current of a chip, this disclosure provides a quiescent current determination circuit for a chip. The specific embodiments of this disclosure are described in detail below with reference to the accompanying drawings.
[0023] Reference Figure 1 , Figure 1 This is a structural block diagram illustrating a static current determination circuit 100 for a chip according to an embodiment of this disclosure. Figure 1As described above, the static current judgment circuit 100 includes a detection control unit 101, a detection voltage generation unit 102, a reference voltage generation unit 103, and a comparison unit 104. The detection control unit 101 is configured to receive a detection trigger signal from the chip, and according to the detection trigger signal, cause the digital circuit of the chip to enter a static state, and enable the detection voltage generation unit 102 and the comparison unit 104 to switch the chip from the working mode to the static current judgment mode. The detection voltage generation unit 102 includes a detection resistor, the resistance of which is greater than or equal to a preset resistance threshold. In the static current judgment mode, a static current flows through the detection resistor, and a voltage drop signal across the detection resistor is obtained by the static current flowing through the detection resistor and the detection resistor itself. The reference voltage generation unit 103 includes a reference resistor matched with the detection resistor and a controllable current source. A reference voltage across the reference resistor is obtained by the reference current provided by the reference resistor and the controllable current source. The comparison unit 104 is configured to, in the static current judgment mode, output a comparison result indicating whether the static current exceeds the limit based on the voltage drop signal and the reference voltage.
[0024] According to the technical solution of this disclosure, the detection control unit of the static current judgment circuit receives a detection trigger signal from the chip and, based on the detection trigger signal, causes the digital circuit of the chip to enter a static state, and switches the chip from the working mode to the static current judgment mode. In the static current judgment mode, a small static current flows through the detection resistor of the detection voltage generation unit, which is greater than a preset resistance threshold. This results in a significant voltage drop signal across the detection resistor. Furthermore, through a reference resistor matched to the detection resistor in the reference voltage generation unit and a controllable current source, a reference voltage across the reference resistor can be obtained. Using the voltage drop signal and the reference voltage, a comparator can output a comparison result indicating whether the static current exceeds the limit. Therefore, when judging whether there is a problem with the chip's static current, it is not necessary to directly measure the small static current. Instead, the static current is indirectly judged by the voltage drop across the large detection resistor through which the small static current flows. This eliminates the need for high-precision components to measure the small static current, thereby simplifying the circuit and reducing costs.
[0025] Furthermore, the detection control unit is also configured to activate the reference voltage generation unit according to the detection trigger signal, and in the static current judgment mode, the controllable current source supplies reference current to the reference resistor. This allows the reference voltage generation unit to operate only in the static current judgment mode, thereby achieving power saving and increasing circuit safety.
[0026] More specifically, combined Figure 1 Reference Figure 2 , Figure 2 This is a schematic diagram illustrating the structure of a static current determination circuit 100 for a chip according to an embodiment of this disclosure. To more clearly understand the technical solutions of this disclosure, Figure 2 The digital circuit 200 and analog circuit 300 inside the chip associated with the static current determination circuit 100 are shown.
[0027] Combination Figure 1 ,like Figure 2 As shown, the comparison unit 104 includes a comparator COMP, which is a voltage comparator. The static current judgment circuit 100 includes a first switch, one end of which is connected to the power supply VDD of the chip, and the other end of which is connected to the power network of the digital circuit 200 of the chip. The detection voltage generation unit 102 includes a second switch and a detection resistor R. SEN_IDDQ One end of the second switch is connected to the power supply VDD of the chip, and the other end of the second switch is connected to the detection resistor R. SEN_IDDQ One end is connected to the detection resistor R. SEN_IDDQ The other end is connected to the power network of the digital circuit 200 of the chip and the negative inverting input of the comparator COMP. The reference voltage generation unit 103 includes a reference resistor R. REF and controllable current source I REF The reference resistor R REF One end is connected to the power supply VDD of the chip, and the reference resistor R REF The other end is connected to the controllable current source I REF The non-inverting input of the comparator COMP is connected to the control unit 101. The control unit 101 includes a control component CON, which is connected to the first switch, the second switch, the comparator COMP, and the digital circuit 200. The control component CON receives the detection trigger signal and sends an enable signal. The enable signal causes the digital circuit 200 of the chip to enter a static state. The enable signal enables the detection voltage generation unit 102 by controlling the first and second switches, and also enables the comparator COMP. It is worth noting that the control component CON can be any suitable component or circuit capable of performing the above functions, and the comparison unit 104 can also include any other suitable components or circuits for voltage comparison.
[0028] According to embodiments of this disclosure, such as Figure 2As shown, the enable signal can be, for example, a high-level signal. The first switch includes, for example, a first transistor SW1, a PMOS transistor, and the second switch includes, for example, a second transistor SW2, a PMOS transistor. The detection control unit 101 also includes an inverter IN. One end of the control component CON is connected to the gate of the first transistor SW1 and the input of the inverter IN. The output of the inverter IN is connected to the gate of the second transistor SW2. When the control component CON controls the first transistor SW1 to be turned on and the second transistor SW2 to be turned off, the chip is in the operating mode. When the control component CON controls the second transistor SW2 to be turned on and the first transistor SW1 to be turned off, the chip is in the static current judgment mode. In addition, the power supply VDD of the chip is connected to the source of the first transistor SW1, the drain of the first transistor SW1 is connected to the power network of the digital circuit 200, the power supply VDD of the chip is connected to the source of the second transistor SW2, and the drain of the second transistor SW2 is connected to the detection resistor R. SEN_IDDQ One end is connected. The first switch and the second switch may also include any other components or circuits suitable for the above functions.
[0029] According to embodiments of this disclosure, the reference voltage generating unit 103 may further include a third switch, and the reference resistor R REF One end can be connected to the power network of the digital circuit 200 of the chip, and the reference resistor R REF The other end is connected to one end of the third switch and the non-inverting input of the comparator. The other end of the third switch is connected to the controllable power supply. The control unit CON is connected to the third switch. The enable signal sent by the control unit CON enables the reference voltage generation unit 103 by controlling the third switch. Specifically, the third switch may include, for example, a third transistor such as a PMOS transistor. The output of the inverter IN is connected to the gate of the third transistor. The reference resistor R... REF The other end is connected to the source of the third transistor, and the drain of the third transistor is connected to the controllable current source I. REF Connection. The third switch may also include any other components or circuits suitable for the above functions.
[0030] Regarding the structure of the aforementioned static current judgment circuit, the control component CON of the detection control unit 101 receives a detection trigger signal from the chip. This detection trigger signal can be a power-on reset signal when the chip is powered on, or a signal generated periodically by the chip during operation according to a preset command to determine whether the static current exceeds the limit. This detection trigger signal can originate from the chip's digital circuit 200. Thus, this static current judgment circuit can be used in automated testing equipment before the chip leaves the factory, or for periodic or on-demand self-testing after the chip is put into use.
[0031] When the control unit CON receives the detection trigger signal, it sends an enable signal, which causes the digital circuit 200 to enter a static state. This static state includes pausing the digital system clock, forcibly stopping the digital signal from toggling, and maintaining the output port state. This ensures that only static current flows through the digital circuit, allowing for the determination of the static current. It is worth noting that, as... Figure 2 As shown, the chip's voltage VDD is connected to the power supply network of the analog circuit 300. This means that the power supply and status of the analog circuit 300 remain unchanged regardless of whether the chip is in normal operating mode or in static current judgment mode. This ensures that the chip's necessary functions are maintained, allowing static current judgment to be performed under any circumstances, thus increasing the flexibility of static current judgment.
[0032] Furthermore, the enable signal turns off the first transistor SW1, which acts as the first switch, and turns on the second transistor SW2, which acts as the second switch. This cuts off the power supply path to the digital circuit where the first switch is located and enables the static current judgment path where the second switch is located, thus enabling the detection voltage generation unit 102. Due to the presence of the inverter IN, the enable signal can only turn on one of the first transistor SW1 and the second transistor SW2 at a time, while the other is turned off, thereby increasing the safety of circuit switching. When the reference voltage generation unit 103 includes a third transistor acting as a third switch, as described above, the enable signal enables the reference voltage generation unit 103 simultaneously with the detection voltage generation unit 102.
[0033] Furthermore, this enable signal activates comparator COMP. When no static current determination is performed, since comparator COMP is not activated, the controllable current source I can operate even if the reference voltage generation unit 103 does not include a third switch. REF Reference resistor R REF Supplying a reference current does not affect the chip's operation. Using the enable signal to synchronously activate the comparator COMP increases circuit safety.
[0034] After the enable signal causes the digital circuit 200 to enter a static state, turns off the first transistor SW1 and turns on the second transistor SW2, and enables the comparator COMP, the static current flows through the detection resistor R of the voltage detection unit 102. SEN_IDDQ Thus, through the static current and the sensing resistor R SEN_IDDQ The product of these two values yields the voltage drop signal across the reference resistor. In the reference voltage generation unit 103, since the controllable current source is the reference resistor R... REF Supply reference current I REF Therefore, the reference voltage across the reference resistor can be obtained by multiplying the reference resistor and the reference current. The difference between the chip's power supply VDD voltage and the voltage drop signal is used as the detection voltage input to the negative input terminal of the comparator COMP. The difference between the chip's power supply VDD voltage and the reference voltage is used as the threshold voltage input to the positive input terminal of the comparator COMP. When the detection voltage is greater than the threshold voltage, the comparison result output by the comparator COMP indicates that the quiescent current is not exceeded. When the detection voltage is less than or equal to the threshold voltage, the comparison result output by the comparator COMP indicates that the quiescent current exceeds the limit. Through the quiescent current judgment circuit of this disclosure, the quiescent current is judged to be exceeded by comparing voltages. Since the voltages input to the two input terminals of the comparator are related to the chip's power supply VDD voltage, the influence of the chip's power supply VDD voltage fluctuation on the quiescent current judgment can be eliminated, resulting in a high power supply rejection ratio and improved robustness of the quiescent current judgment circuit.
[0035] According to embodiments of this disclosure, as described above, the detection resistor R of the detection voltage generating unit 102... SEN_IDDQ The resistance value is greater than or equal to a preset resistance threshold, which can be, for example, 100kΩ, and the detection resistor R SEN_IDDQ The resistance value can range, for example, from 100kΩ to 100MΩ. Using this large resistor to achieve a large detection voltage makes the determination of quiescent current more accurate and less susceptible to interference. Additionally, the reference resistor R... REF With the detection resistor R SEN_IDDQ Matching, specifically, the detection resistor R SEN_IDDQ With the reference resistor R REF According to the preset resistance ratio, the controllable current source I is thus set. REF The reference current value can be determined based on the preset resistance ratio and the preset static current threshold.
[0036] Specifically, the detection resistor R SEN_IDDQ The resistance value can be 1MΩ, the preset static current threshold can be 5nA, and the detection resistor R SEN_IDDQ With the reference resistor R REFThe preset resistance ratio can be, for example, 1000:1; therefore, the reference resistor R REF The resistance is 10Ω. To match the detection voltage with the reference voltage, the ratio between the reference current and the preset static current threshold is the same as the ratio of the preset resistance. Therefore, the ratio between the reference current and the preset static current threshold is 1000:1, allowing the controllable current source to provide a reference current of 5uA. Thus, due to the presence of this controllable current source, the static current judgment circuit 100 can be adapted to various chips with different static currents, exhibiting high adaptability. It is worth noting that the preset static current threshold can be an estimate given during the design phase of the chip using this static current detection circuit or a value provided by the chip parameters. By connecting a large resistor, especially a megaohm-level resistor, in series in the circuit to obtain a reference voltage, and using this reference voltage to determine the static current, the disadvantage of connecting a large resistor in series in traditional technical solutions can be transformed into an advantageous detection method.
[0037] According to an embodiment of this disclosure, the output of the comparator COMP can be connected to the digital circuit 200. The comparison result output by the comparator COMP is transmitted to the digital circuit 200 so that the digital circuit 200 can save or process the comparison result. In this embodiment, after the digital circuit receives the comparison result, if the comparison result is a signal indicating that the quiescent current exceeds the limit, the digital circuit can send a signal to the control component CON, so that the control component CON continues to send an enable signal to keep the chip in the quiescent current judgment mode. If the comparison result is a signal indicating that the quiescent current does not exceed the limit, the digital circuit can send a signal to the control component CON, so that the control component CON sends a recovery signal. The recovery signal can restore the chip to the working mode, that is, the recovery signal turns on the first transistor and turns off the second transistor, and the recovery signal can restore the digital circuit from the static state to its original state, and the recovery signal can disable the comparator COMP.
[0038] According to embodiments of this disclosure, such as Figure 2As shown, the detection control unit may further include a timer T. The control component CON is connected to the timer, and the timer T is connected to the digital circuit 200. An enable signal sent by the control component CON causes the timer T to start working. After the timer T finishes working, the digital circuit samples the comparison result sent to the digital circuit 200. As described above, if the comparison result is a signal indicating that the quiescent current exceeds the limit, the digital circuit can send a signal to the control component CON, causing the control component CON to continue sending the enable signal to keep the chip in the quiescent current judgment mode. If the comparison result is a signal indicating that the quiescent current does not exceed the limit, the digital circuit can send a signal to the control component CON, causing the control component CON to send a recovery signal. This recovery signal can restore the chip to the working mode, that is, the recovery signal turns on the first transistor and turns off the second transistor. Furthermore, the recovery signal can restore the digital circuit from its static state to its original state, and the recovery signal can disable the comparator COMP.
[0039] It is worth noting that, Figure 2 The detection control unit 101 shown is a circuit structure independent of the digital circuit 200. The detection control unit 101 can also be integrated into the digital circuit 200 of the chip.
[0040] This disclosure also provides a chip. The chip includes the aforementioned static current determination circuit for the chip. This chip can be various functional safety chips applicable to different fields such as automobiles and aircraft.
[0041] This disclosure also provides an electronic device. The electronic device includes the chip described above.
[0042] The embodiments of this disclosure have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this disclosure. The description of the above embodiments is only for the purpose of helping to understand the methods and core ideas of this disclosure. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this disclosure. Therefore, the content of this specification should not be construed as a limitation of this disclosure.
[0043] It should be understood that the terms "first" and "second," etc., in the claims, specification, and drawings of this disclosure are used to distinguish different objects, not to describe a specific order. The terms "comprising" and "including" as used in the specification and claims of this disclosure indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof.
[0044] It should also be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this disclosure. As used in this disclosure and claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this disclosure and claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations.
[0045] The embodiments of this disclosure have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this disclosure. The descriptions of the embodiments above are only for the purpose of helping to understand the methods and core ideas of this disclosure. Furthermore, any changes or modifications made by those skilled in the art based on the ideas of this disclosure, and on the specific implementation methods and application scope of this disclosure, are all within the scope of protection of this disclosure. Therefore, the content of this specification should not be construed as a limitation of this disclosure.
Claims
1. A static current determination circuit for a chip, wherein, The static current determination circuit includes a detection control unit, a detection voltage generation unit, a reference voltage generation unit, and a comparison unit. The detection control unit is configured to receive a detection trigger signal from the chip, and according to the detection trigger signal, cause the digital circuit of the chip to enter a static state, and enable the detection voltage generation unit and the comparison unit to switch the chip from the working mode to the static current judgment mode. The detection voltage generation unit includes a detection resistor, the resistance of which is greater than or equal to a preset resistance threshold. In the static current judgment mode, a static current flows through the detection resistor, and the voltage drop signal across the detection resistor is obtained by the static current flowing through the detection resistor and the detection resistor itself. The reference voltage generating unit includes a reference resistor matched with the detection resistor and a controllable current source, and obtains the reference voltage across the reference resistor through the reference current provided by the reference resistor and the controllable current source; The comparison unit is configured to, in the quiescent current determination mode, output a comparison result indicating whether the quiescent current exceeds the limit, based on the voltage drop signal and the reference voltage.
2. The static current determination circuit for a chip according to claim 1, wherein, The detection and control unit includes a control component, and the comparison unit includes a comparator; The static current determination circuit includes a first switch, one end of which is connected to the power supply of the chip, and the other end of which is connected to the power network of the digital circuit of the chip. The detection voltage generating unit includes a second switch, one end of which is connected to the power supply of the chip, and the other end of which is connected to one end of the detection resistor. The other end of the detection resistor is connected to the power supply network of the digital circuit of the chip and the negative input terminal of the comparator. One end of the reference resistor is connected to the power supply of the chip, and the other end of the reference resistor is connected to the controllable current source and the non-inverting input of the comparator. The control unit is connected to the first switch, the second switch, the comparator, and the digital circuit. The control unit receives the detection trigger signal and sends an enable signal. The enable signal causes the digital circuit of the chip to enter a static state. The first switch and the second switch are controlled to enable the detection voltage generation unit and the comparator.
3. The static current determination circuit for a chip according to claim 2, wherein, The detection control unit is further configured to enable the reference voltage generation unit according to the detection trigger signal, and in the static current judgment mode, the controllable current source supplies reference current to the reference resistor.
4. The static current determination circuit for a chip according to claim 3, wherein, The reference voltage generating unit further includes a third switch. One end of the reference resistor is connected to the power network of the digital circuit of the chip, and the other end of the reference resistor is connected to one end of the third switch and the non-inverting input of the comparator. The other end of the third switch is connected to the controllable power supply. The control unit is connected to the third switch, and the enable signal sent by the control unit enables the reference voltage generating unit by controlling the third switch.
5. The static current determination circuit for a chip according to claim 2, wherein, The first switch includes a first transistor, the second switch includes a second transistor, and the detection control unit further includes an inverter. One end of the control component is connected to the gate of the first transistor and the input terminal of the inverter, and the output terminal of the inverter is connected to the gate of the second transistor. When the control component controls the first transistor to be turned on and the second transistor to be turned off, the chip is in a working mode. When the control component controls the second transistor to be turned on and the first transistor to be turned off, the chip is in a static current judgment mode.
6. The static current determination circuit for a chip according to claim 2, wherein, The difference between the chip's power supply voltage and the voltage drop signal is used as the detection voltage input to the negative input terminal of the comparator. The difference between the chip's power supply voltage and the reference voltage is used as the threshold voltage input to the positive input terminal of the comparator. When the detection voltage is greater than the threshold voltage, the comparison result output by the comparator indicates that the quiescent current is not exceeded. When the detection voltage is less than or equal to the threshold voltage, the comparison result output by the comparator indicates that the quiescent current exceeds the limit.
7. The static current determination circuit for a chip according to claim 2, wherein, The output of the comparator is connected to the digital circuit, and the comparison result output by the comparator is transmitted to the digital circuit so that the digital circuit can save or process the comparison result.
8. The static current determination circuit for a chip according to claim 1, wherein, The preset resistance threshold is 100kΩ, and the resistance value of the detection resistor is in the range of 100kΩ to 100MΩ.
9. The static current determination circuit for a chip according to claim 1, wherein, The detection resistor and the reference resistor are set according to a preset resistance ratio, and the reference current of the controllable current source is determined according to the preset resistance ratio and the preset static current threshold.
10. A chip, the chip comprising a static current determination circuit for the chip according to any one of claims 1 to 9.