A power quality recording and electric meter integrated detection system and method

Abstract

The application relates to the field of intelligent power distribution systems and power distribution switch control equipment manufacturing, and discloses a power quality recording and electric meter integrated detection system and method, which comprises a wideband sampling conversion module, a data decoupling distribution module and a cooperative calculation module; the wideband sampling conversion module collects electric signals to output original full-band data streams, which are distributed into recording data streams and metering data streams by the data decoupling distribution module; a steady-state metering calculation sub-module generates a steady-state phasor reference according to an extracted filter group delay time superimposed phase advance compensation amount; a transient recording judgment sub-module calculates a transient disturbance amount by calling the steady-state phasor reference, generates a transient compensation weight when the limit is exceeded, and drives the steady-state metering calculation sub-module to open an isolated integration window to add and accumulate distorted electric energy with a weight, the application eliminates phase dislocation caused by filter time sequence lag, avoids recording mis-triggering, blocks transient integration dispersion, and takes into account high-frequency recording and precise metering.

Description

Technical Field

[0001] This invention relates to an integrated power quality recording and metering detection system and method, belonging to the technical field of intelligent power distribution systems and power distribution switch control equipment manufacturing. Background Technology

[0002] Intelligent power distribution switch control equipment undertakes the functions of power distribution and fault isolation in the power distribution network. It also typically integrates power metering and power quality transient recording functions. Power frequency power metering requires sampling with a high signal-to-noise ratio to obtain the cumulative power value, requiring the measurement link to stably extract the fundamental frequency and suppress zero-point drift as much as possible. Power quality transient recording requires a high sampling rate to record transient overvoltages and distorted waveforms that occur during switch opening, reclosing, and short-circuit faults, which places high demands on the time resolution and wideband acquisition capability of the measurement link.

[0003] When a distribution switch trips, recloses, or experiences a sudden load change, transient high-frequency distortion signals and the power frequency steady-state fundamental frequency simultaneously enter the sensing and sampling link. Due to the limited installation space and power consumption of the switch control equipment, integrated detection equipment typically shares an analog-to-digital converter front-end. Increasing the sampling frequency to meet wideband recording requirements makes it easy for noise and high-order harmonics generated by switch actions to mix into the power frequency band, reducing the signal-to-noise ratio (SNR) of steady-state measurement. If a multi-order digital low-pass decimation filter is used in the metering path to improve the fundamental frequency SNR, the decimation filter itself will generate group delay, causing the extracted fundamental phasor reference to lag in time, resulting in a time misalignment between the steady-state reference and the instantaneous full-frequency sampling point. Besides the physical limitations of the hardware acquisition topology, existing systems also have shortcomings in data processing and integral timing control methods, for example... Chinese invention patent application CN103185835A discloses an energy metering device with power quality monitoring. The collected signal is directly sent to the energy metering chip after filtering and analog-to-digital conversion. The microprocessor calculates the energy and harmonic components. However, this type of solution is based on the premise of steady-state or quasi-steady-state operation. Its processing link adopts a fixed static calculation timing and does not consider the phase lag effect of the group delay introduced by digital decimation filtering on the phasor reference. Moreover, when facing strong transient disturbances such as switch tripping or short-circuit impact, it lacks an adaptive dynamic isolation and weighted integration mechanism for the transient process, which leads to a serious disconnect between the steady-state reference and the instantaneous high-frequency sampling point. This not only easily causes false triggering of fault recording, but also causes the transient impact energy to generate step oscillation and accumulation distortion in the conventional integration path.

[0004] Therefore, how to reduce the phase lag effect of multi-rate decimation filter group delay on transient criteria, avoid distortion of steady-state energy integration caused by transient disturbances of switch action, and eliminate the false increase in energy accumulation caused by aperiodic DC attenuation components when the power distribution switch control equipment adopts a single acquisition topology are problems that existing detection technologies need to solve. Summary of the Invention

[0005] To address the problems in the background art, the technical solution of the present invention is as follows: An integrated power quality recording and meter detection system, comprising: The wideband sampling conversion module is connected to the power distribution bus and switch transformers to collect electrical signals and output the raw full-band data stream; The data decoupling and distribution module connects the broadband sampling conversion module and the collaborative computing module, and is used to distribute the original full-band data stream into waveform recording data stream and measurement data stream; The collaborative computing module includes a steady-state measurement calculation submodule and a transient waveform recording and determination submodule. The steady-state metering calculation submodule has a built-in phase forward prediction unit, which is used to receive the metering data stream and downsample it. Based on the decremented filter group delay time and the phase advance compensation amount, it generates a steady-state phasor reference that is aligned with the phase of the sampling point of the recorded data stream. The transient waveform determination submodule is used to call the steady-state phasor reference to calculate the transient disturbance, and to trigger transient waveform recording and generate transient compensation weights when the transient disturbance exceeds the limit. The steady-state metering calculation submodule is used to respond to the integral timing of transient compensation weight adjustment: it accumulates the normal fundamental frequency energy under steady-state conditions; when a transient change occurs, it opens the isolation integral window, accumulates the distorted energy according to the transient compensation weight, and merges it into the main energy accumulation register after the transient ends.

[0006] Preferably, the phase forward prediction unit includes a decimation filter group delay clock cycle register; the steady-state metering calculation submodule downsamples the metering data stream through a cascaded integral comb decimation filter to extract the current grid fundamental angular frequency and the initial phase of the fundamental wave; the phase forward prediction unit reads the inherent group delay cycle number in the decimation filter group delay clock cycle register, determines the group delay time by multiplying the inherent group delay cycle number by the high-frequency sampling clock cycle, and multiplies the group delay time by the current grid fundamental angular frequency to obtain the phase advance compensation amount.

[0007] Preferably, during the isolation integration window, the steady-state metering calculation submodule switches the power sampling data rate to the same hardware sampling frequency as the wideband sampling conversion module. In each high-frequency sampling cycle within the isolation integration window, the steady-state metering calculation submodule multiplies the instantaneous voltage sampling value and the instantaneous current sampling value to calculate the instantaneous full-frequency power, and multiplies the instantaneous full-frequency power with the transient compensation weight to generate the corrected instantaneous transient power. The corrected instantaneous transient power is accumulated with the high-frequency sampling cycle as the discrete time integration step to generate the isolation compensation energy.

[0008] Preferably, the transient recording determination submodule includes a cycle moving average filtering unit; during the calculation of transient compensation weights, the cycle moving average filtering unit simultaneously calculates the full power frequency cycle mean of the instantaneous current sample values ​​in the recorded data stream, and separates the non-periodic DC attenuation component bias associated with the operation of the power distribution switch; before calculating the instantaneous full-frequency power within the isolation integration window, the steady-state metering calculation submodule subtracts the non-periodic DC attenuation component bias from the instantaneous current sample values, and uses the subtracted instantaneous AC current value to participate in the calculation of instantaneous full-frequency power.

[0009] Preferably, when the transient disturbance falls below the disturbance over-limit threshold, the transient recording determination submodule cancels the transient trigger state and resets the transient compensation weight to a value of 1; after the steady-state metering calculation submodule detects the cancellation of the transient trigger state, it closes the isolation integration window, extracts the non-integer power frequency cycle sampling residuals at the beginning and end of the isolation integration window, uses a trapezoidal area approximation algorithm to smooth and normalize the edge sampling points, writes the corrected isolation compensation energy into the main energy accumulation register to update the total energy value, and restores the normal fundamental energy integration timing.

[0010] Preferably, the data decoupling and distribution module includes a dual-port shared register unit and a bidirectional circular buffer unit; the wideband sampling conversion module continuously writes the original full-band data stream into the bidirectional circular buffer unit; when the transient disturbance exceeds the limit, the transient waveform determination submodule locks the bidirectional circular buffer unit and transfers the full-band voltage and current waveform data within the time span of 100ms before the trigger moment to 100ms after the trigger termination to a non-volatile waveform storage medium; the dual-port shared register unit is used to transmit the steady-state phasor reference and transient compensation weight in real time between the steady-state measurement calculation submodule and the transient waveform determination submodule.

[0011] Preferably, the wideband sampling conversion module includes a passive electromagnetic shielding filter interface and a multi-channel analog-to-digital converter chip, with a hardware sampling frequency of 12.8kHz and a quantization bit depth of 24 bits; the steady-state metering calculation submodule has a conventional fundamental energy integration data rate of 3.2kHz; the transient recording judgment submodule maintains a recording data stream sampling data rate of 12.8kHz; and the disturbance exceeding the limit threshold for judging transient disturbance exceeding the limit is set to 0.15.

[0012] Preferably, the system is installed in a 10kV intelligent distribution switch control cabinet; the wideband sampling conversion module is electrically connected to the secondary lead of the bus voltage transformer in the intelligent distribution switch control cabinet through a shielded twisted pair cable, and is electrically connected to the Rogowski coil and the secondary side of the protection-grade current transformer installed on the inlet and outlet sides of the circuit breaker contacts through a coaxial shielded cable.

[0013] Preferably, the collaborative computing module is located in a heterogeneous computing chip composed of a field-programmable gate array and a digital signal processor; the steady-state metering calculation submodule and the transient waveform recording determination submodule run in independent hardware logic pipeline cores, and achieve bidirectional handshaking through an on-chip high-speed cross switch matrix. During the isolation integration window, the main power accumulation register is controlled by a hardware atomic lock mechanism to maintain the single write right of power accumulation data under multi-rate clock domain.

[0014] A method for integrating power quality recording and meter testing, applied to an integrated power quality recording and meter testing system, includes the following steps: Step S1: Acquire electrical signals from the distribution bus and switch transformers through the wideband sampling conversion module, and output the raw full-band data stream; Step S2: The original full-band data stream is distributed into waveform recording data stream and measurement data stream through the data decoupling and distribution module; Step S3: Receive the metering data stream and downsample it through the steady-state metering calculation submodule. Based on the decremented filter group delay time and the phase advance compensation amount, generate a steady-state phasor reference that is phase-aligned with the sampling points of the recorded data stream. Step S4: The transient disturbance is calculated by calling the steady-state phasor reference through the transient recording determination submodule, and transient recording is triggered and transient compensation weight is generated when the transient disturbance exceeds the limit. Step S5: Adjust the integral timing through the transient compensation weight in response to the steady-state metering calculation submodule: accumulate the conventional fundamental frequency energy under steady-state conditions; open the isolation integral window during transient changes, accumulate the distorted energy according to the transient compensation weight, and merge it into the main energy accumulation register after the transient ends.

[0015] Compared with the prior art, the beneficial effects of the present invention are: 1. In an integrated power quality recording and meter detection system and method, a phase forward prediction unit performs phase advance compensation for the group delay generated by decimation filtering, so that the steady-state phasor reference and the instantaneous sampling point of the recording data stream are kept in phase alignment. This reduces the impact of decimation filtering time lag on the calculation of transient disturbances, avoids false disturbances caused by the superposition of grid frequency fluctuations and filtering delay, thereby reducing false triggering of recording and making the triggering judgment of fault recording more accurate.

[0016] 2. When transient disturbances occur, the electrical energy during the transient period is independently accumulated through transient compensation weights and isolation integration windows, so that the metering process is no longer limited to the integration of the conventional power frequency fundamental wave. This can avoid step oscillations and integration divergence caused by strong distorted waveforms such as switch tripping and short circuit impacts during the conventional filtering and integration process. It can also continuously include the full-band electrical energy during power quality transient disturbances, reducing the power metering distortion caused by transient processes.

[0017] 3. By separating the non-periodic DC attenuation component in the instantaneous current and subtracting the corresponding bias before calculating the instantaneous full-frequency power within the isolation integration window, the DC component during the operation of the distribution switch or the clearing of the short-circuit fault can be avoided from participating in the power calculation. This can reduce the unidirectional false increase in electrical energy caused by the combined effect of DC bias and transient high-frequency voltage, reduce the error in the accumulation of electrical energy under complex fault conditions, and make the meter readings more consistent with the actual energy changes. Attached Figure Description

[0018] Figure 1 This is a flowchart of the full-band data decoupling and transient weighted integration method of the present invention; Figure 2 This is a diagram of the broadband sampling conversion and multi-unit collaborative computing architecture of the present invention.

[0019] The objectives, features, and advantages of this invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0021] A power quality recording and meter integrated detection system, comprising: The wideband sampling conversion module is connected to the power distribution bus and switch transformers to collect electrical signals and output the raw full-band data stream; The data decoupling and distribution module connects the broadband sampling conversion module and the collaborative computing module, and is used to distribute the original full-band data stream into waveform recording data stream and measurement data stream; The collaborative computing module includes a steady-state measurement calculation submodule and a transient waveform recording and determination submodule. The steady-state metering calculation submodule has a built-in phase forward prediction unit, which is used to receive the metering data stream and downsample it. Based on the decremented filter group delay time and the phase advance compensation amount, it generates a steady-state phasor reference that is aligned with the phase of the sampling point of the recorded data stream. The transient waveform determination submodule is used to call the steady-state phasor reference to calculate the transient disturbance, and to trigger transient waveform recording and generate transient compensation weights when the transient disturbance exceeds the limit. The steady-state metering calculation submodule is used to respond to the integral timing of transient compensation weight adjustment: it accumulates the normal fundamental frequency energy under steady-state conditions; when a transient change occurs, it opens the isolation integral window, accumulates the distorted energy according to the transient compensation weight, and merges it into the main energy accumulation register after the transient ends.

[0022] Preferably, the phase forward prediction unit includes a decimation filter group delay clock cycle register; the steady-state metering calculation submodule downsamples the metering data stream through a cascaded integral comb decimation filter to extract the current grid fundamental angular frequency and the initial phase of the fundamental wave; the phase forward prediction unit reads the inherent group delay cycle number in the decimation filter group delay clock cycle register, determines the group delay time by multiplying the inherent group delay cycle number by the high-frequency sampling clock cycle, and multiplies the group delay time by the current grid fundamental angular frequency to obtain the phase advance compensation amount.

[0023] Preferably, during the isolation integration window, the steady-state metering calculation submodule switches the power sampling data rate to the same hardware sampling frequency as the wideband sampling conversion module. In each high-frequency sampling cycle within the isolation integration window, the steady-state metering calculation submodule multiplies the instantaneous voltage sampling value and the instantaneous current sampling value to calculate the instantaneous full-frequency power, and multiplies the instantaneous full-frequency power with the transient compensation weight to generate the corrected instantaneous transient power. The corrected instantaneous transient power is accumulated with the high-frequency sampling cycle as the discrete time integration step to generate the isolation compensation energy.

[0024] Preferably, the transient recording determination submodule includes a cycle moving average filtering unit; during the calculation of transient compensation weights, the cycle moving average filtering unit simultaneously calculates the full power frequency cycle mean of the instantaneous current sample values ​​in the recorded data stream, and separates the non-periodic DC attenuation component bias associated with the operation of the power distribution switch; before calculating the instantaneous full-frequency power within the isolation integration window, the steady-state metering calculation submodule subtracts the non-periodic DC attenuation component bias from the instantaneous current sample values, and uses the subtracted instantaneous AC current value to participate in the calculation of instantaneous full-frequency power.

[0025] Preferably, when the transient disturbance falls below the disturbance over-limit threshold, the transient recording determination submodule cancels the transient trigger state and resets the transient compensation weight to a value of 1; after the steady-state metering calculation submodule detects the cancellation of the transient trigger state, it closes the isolation integration window, extracts the non-integer power frequency cycle sampling residuals at the beginning and end of the isolation integration window, uses a trapezoidal area approximation algorithm to smooth and normalize the edge sampling points, writes the corrected isolation compensation energy into the main energy accumulation register to update the total energy value, and restores the normal fundamental energy integration timing.

[0026] Preferably, the data decoupling and distribution module includes a dual-port shared register unit and a bidirectional circular buffer unit; the wideband sampling conversion module continuously writes the original full-band data stream into the bidirectional circular buffer unit; when the transient disturbance exceeds the limit, the transient waveform determination submodule locks the bidirectional circular buffer unit and transfers the full-band voltage and current waveform data within the time span of 100ms before the trigger moment to 100ms after the trigger termination to a non-volatile waveform storage medium; the dual-port shared register unit is used to transmit the steady-state phasor reference and transient compensation weight in real time between the steady-state measurement calculation submodule and the transient waveform determination submodule.

[0027] Preferably, the wideband sampling conversion module includes a passive electromagnetic shielding filter interface and a multi-channel analog-to-digital converter chip, with a hardware sampling frequency of 12.8kHz and a quantization bit depth of 24 bits; the steady-state metering calculation submodule has a conventional fundamental energy integration data rate of 3.2kHz; the transient recording judgment submodule maintains a recording data stream sampling data rate of 12.8kHz; and the disturbance exceeding the limit threshold for judging transient disturbance exceeding the limit is set to 0.15.

[0028] Preferably, the system is installed in a 10kV intelligent distribution switch control cabinet; the wideband sampling conversion module is electrically connected to the secondary lead of the bus voltage transformer in the intelligent distribution switch control cabinet through a shielded twisted pair cable, and is electrically connected to the Rogowski coil and the secondary side of the protection-grade current transformer installed on the inlet and outlet sides of the circuit breaker contacts through a coaxial shielded cable.

[0029] Preferably, the collaborative computing module is located in a heterogeneous computing chip composed of a field-programmable gate array and a digital signal processor; the steady-state metering calculation submodule and the transient waveform recording determination submodule run in independent hardware logic pipeline cores, and achieve bidirectional handshaking through an on-chip high-speed cross switch matrix. During the isolation integration window, the main power accumulation register is controlled by a hardware atomic lock mechanism to maintain the single write right of power accumulation data under multi-rate clock domain.

[0030] A method for integrating power quality recording and meter testing, applied to an integrated power quality recording and meter testing system, includes the following steps: Step S1: Acquire electrical signals from the distribution bus and switch transformers through the wideband sampling conversion module, and output the raw full-band data stream; Step S2: The original full-band data stream is distributed into waveform recording data stream and measurement data stream through the data decoupling and distribution module; Step S3: Receive the metering data stream and downsample it through the steady-state metering calculation submodule. Based on the decremented filter group delay time and the phase advance compensation amount, generate a steady-state phasor reference that is phase-aligned with the sampling points of the recorded data stream. Step S4: The transient disturbance is calculated by calling the steady-state phasor reference through the transient recording determination submodule, and transient recording is triggered and transient compensation weight is generated when the transient disturbance exceeds the limit. Step S5: Adjust the integral timing through the transient compensation weight in response to the steady-state metering calculation submodule: accumulate the conventional fundamental frequency energy under steady-state conditions; open the isolation integral window during transient changes, accumulate the distorted energy according to the transient compensation weight, and merge it into the main energy accumulation register after the transient ends.

[0031] Example 1: This example describes an integrated power quality recording and metering system deployed within a 10kV intelligent distribution switch control cabinet. It directly addresses the physical monitoring environment of the distribution network feeder switches during short-circuit fault clearing, reclosing operations, and impulsive nonlinear load switching. The wideband sampling conversion module is electrically connected to the secondary side of the bus voltage transformer within the intelligent distribution switch control cabinet via shielded twisted-pair cable. Simultaneously, it is electrically connected to the Rogowski coil installed on the inlet and outlet sides of the circuit breaker contacts and the secondary side of the protective current transformer via a coaxial shielded cable. The wideband sampling conversion module internally features a 24-bit multi-channel analog-to-digital converter chip and a passive electromagnetic shielding filter interface. The passive electromagnetic shielding filter interface is located at the signal input terminal of the transformer secondary side and the multi-channel analog-to-digital converter. Between the input terminals of the conversion chip, electromagnetic interference entering the sampling channel via interface coupling is suppressed through shielded connections and filter branches composed of passive components; the hardware sampling frequency is set to 12.8kHz, corresponding to a discrete sampling period of 78.125μs, and the bus voltage and branch current are continuously digitally converted, outputting the raw full-band data stream without hardware simulation low-pass truncation; the data decoupling and distribution module receives the raw full-band data stream, continuously writes the raw full-band data stream into the internal bidirectional circular buffer unit, and simultaneously decouples and distributes the data stream to the independently operating steady-state metering calculation submodule and transient waveform recording and determination submodule in the heterogeneous computing chip through the dual-port shared register unit, thus constructing a single-source data base that supports the coordinated operation of high-frequency transient capture and power frequency fundamental wave metering.

[0032] When the power distribution switch control equipment is in a normal steady-state power supply state, the steady-state metering calculation submodule receives a 12.8kHz data stream from the data decoupling and distribution module. It then performs a 4x decimation downsampling through an internal four-stage cascaded integrator comb-decimation filter, generating a metering data stream with a data rate of 3.2kHz and a discrete period of 312.5μs. This stream is used to filter out high-frequency switching electromagnetic noise associated with the switchgear operating environment and improve the effective measurement signal-to-noise ratio. The steady-state metering calculation submodule uses the 3.2kHz metering data stream to perform sliding zero-crossing detection and discrete Fourier transform, extracting the current power frequency fundamental angular frequency of the distribution network in real time. Initial phase with fundamental wave The inherent group delay characteristic of the four-stage cascaded comb decimation filter generates a fixed time delay on the time axis. The built-in phase forward prediction unit reads the inherent group delay period number 8 from the decimation filter group delay clock period register, and multiplies this inherent group delay period number 8 by the high-frequency sampling clock period 78.125μs to determine the inherent group delay time. The group delay time is 0.625ms. Compared with the current power grid fundamental frequency The phase advance compensation amount is obtained by multiplication. The structural basis for taking the intrinsic group delay period number of 8 here is as follows: According to the theoretical formula of the cascaded integrator comb filter, the theoretical mathematical group delay of the decimation filter with order 4 and decimation factor of 4 is equal to the difference between order multiplied by decimation factor minus 1 and then divided by 2, and the result is 6 high-frequency sampling clock cycles.

[0033] Based on this, since this scheme deploys the decimation filter in the hardware pipeline of a field-programmable gate array (FPGA), two additional pipeline timing registers are inserted between the integral section and the comb section, as well as at the data downsampling interface, to converge the timing violations and logic path delays of the high-speed data path. Therefore, the two-clock-cycle fixed delay added to the hardware pipeline is linearly superimposed on the six-clock-cycle group delay in the algorithm theory, ultimately forming a physical hardware structure with a total inherent group delay of eight high-frequency sampling clock cycles. This ensures a precise match between the phase advance compensation and the actual total delay of the hardware pipeline, under conditions where the nominal secondary voltage RMS value is 220V and the fundamental frequency is 50Hz. Under the condition of rad / s, the phase advance compensation amount is calculated. rad = 11.25°, thus at any current high-frequency sampling time At the steady-state phasor reference: ,in, The current high-frequency sampling time The steady-state phasor reference instantaneous reference voltage at that point. The fundamental angular frequency of the power grid. For discrete sampling time variables, The initial phase of the fundamental wave. The steady-state metering calculation submodule will calculate the phase advance compensation amount. The data is written to a dual-port shared register unit and output to the transient waveform determination submodule as a dynamic criterion reference. This ensures that the steady-state phasor reference generated by the metering channel maintains phase alignment with the instantaneous sampling points of the input waveform data stream on the time axis. Furthermore, to ensure that the steady-state phasor reference does not erroneously trigger under normal grid fluctuations and can accurately capture the amplitude drop depth during transient changes, the amplitude and angular frequency of the steady-state phasor reference adopt a long-time sliding window slow tracking mechanism. When the system is in a steady-state power supply condition, the steady-state metering calculation submodule uses 10 power frequency integer cycles (200ms) as the update cycle, extracts the effective value and angular frequency of the fundamental voltage, and smoothly updates them to the steady-state phasor reference. This allows the steady-state phasor reference to adapt to the slow, normal drift of the grid nominal voltage within ±7%, avoiding damage caused by normal voltage fluctuations. This causes transient disturbances to exceed thresholds. When a voltage sag or short-circuit fault occurs in the power grid, the transient waveform recording and judgment submodule detects that the rate of change of the deviation between the instantaneous sampling point and the current steady-state phasor reference exceeds the preset mutation rate threshold. It immediately sends a reference locking command to the steady-state metering and calculation submodule, forcibly freezing the amplitude and angular frequency of the steady-state phasor reference to the calculated value of the last steady-state cycle before the fault. Since the steady-state phasor reference maintains a constant amplitude and phase continuity output before the fault throughout the entire transient process, the drop in the instantaneous voltage sampling value after the fault can form a real amplitude difference with the frozen steady-state phasor reference. This allows for the accurate calculation of transient disturbances that reflect the actual sag depth, eliminating the causal contradiction of the reference falling synchronously with the fault and causing judgment failure. This achieves a logical closed loop of slow reference tracking and fast transient locking.

[0034] When a metallic ground fault occurs in the downstream load line of the distribution switch control cabinet, inducing a severe voltage dip and accompanied by the tripping of the protection circuit breaker, the transient waveform recording and judgment submodule maintains a full sampling rate of 12.8kHz to read the waveform recording data stream from the bidirectional circular buffer unit at the current high-frequency sampling time. Extracting instantaneous voltage sample values V, simultaneously reads the steady-state phasor reference instantaneous reference voltage after phase alignment at the corresponding sampling point from the dual-port shared register unit. V; The transient recording determination submodule calculates the dimensionless transient disturbance quantity according to the following formula. : ,in, This refers to transient disturbances; The current high-frequency sampling time Instantaneous voltage sampling value of the waveform data stream at the location, To determine the instantaneous reference voltage of the steady-state phasor reference at the corresponding moment, and to avoid the denominator of the aforementioned ratio being zero or close to zero when the steady-state phasor reference instantaneous reference voltage is at a zero-crossing position, the transient recording determination submodule uses the aforementioned sliding zero-crossing point detection result to mark the zero-crossing sampling interval, and maintains the previous valid sampling point within this interval. After the steady-state phasor reference leaves the zero-crossing sampling interval, continue the calculation point by point according to the above formula, and substitute the values ​​to obtain the result. Since the transient disturbance of 0.28 exceeds the preset disturbance over-limit threshold of 0.15, the transient waveform determination submodule determines that a power quality transient event has occurred, triggering the transient waveform locking logic. This transfers the complete 12.8kHz full-band voltage and current waveform data, covering the time span from 100ms before the trigger moment to 100ms after the fault recovery termination, from the bidirectional circular buffer unit to a non-volatile waveform storage medium. Simultaneously, according to the formula... A transient compensation weight with a value of 0.72 is generated. ,in, For transient compensation weights, This is the transient disturbance amount; the transient recording determination submodule writes the transient compensation weight of 0.72 and the transient trigger status flag into the dual-port shared register unit.

[0035] The steady-state metering calculation submodule detects the transient trigger status flag and transient compensation weight from the dual-port shared register unit. Upon determining that a physical distortion has occurred in the conventional power frequency sinusoidal metering environment, the conventional fundamental frequency energy integration timing at a rate of 3.2kHz is immediately suspended, and an isolation integration window is initiated. During the isolation integration window, the steady-state metering calculation submodule switches the power sampling data rate to a hardware sampling frequency of 12.8kHz, consistent with the wideband sampling conversion module. For each high-frequency sampling cycle within the isolation integration window, the cycle moving average filtering unit in the transient recording determination submodule simultaneously calculates the full power frequency cycle mean of the instantaneous current sampling value in the recorded data stream, separating the non-periodic DC attenuation component bias associated with circuit breaker interruption. A; In the actual extraction process, since the non-periodic DC component in the short-circuit current exhibits an exponential decay characteristic over time, the simple 20ms full-cycle moving average operator will produce a fixed time base lag of 10ms and a dynamic mean deviation in the mean output. To address this, the cycle moving average filter unit, based on minimizing the instantaneous mean using a full-cycle moving window composed of 256 sampling points, further introduces an exponential decay rate forward prediction compensation logic: First, the logarithmic difference between the first and last sampling points within the current 20ms moving window is calculated, and the decay time constant of the current non-periodic component is extracted in real time, with a typical value of 45ms to 65ms.

[0036] The extracted decay time constant is used to multiply the current moving average result by a forward exponential compensation factor determined by dividing half a power frequency cycle by the decay time constant. This performs real-time forward amplitude correction on the exponential decay difference between a point in the 10ms window and the current moment. This correction eliminates the DC bias residue caused by the inherent half-cycle time delay of the moving average filter, enabling the separated aperiodic DC decay component bias to accurately track the real instantaneous DC envelope throughout the dynamic decay process. This achieves time-delay-free pure AC instantaneous component stripping. The steady-state metering calculation submodule reads the instantaneous current sampling value. Subtracting the bias from A yields a pure AC instantaneous component of 10.0A. Multiplying this pure AC instantaneous component by the instantaneous voltage sample value of 158.4V gives the instantaneous full-frequency power. Multiplying this instantaneous full-frequency power by the transient compensation weight of 0.72 generates the corrected instantaneous transient power. W, of which To correct for instantaneous transient power, the steady-state metering calculation submodule uses a discrete-time integration step of 78.125 μs. Discrete-time accumulation is implemented, whereby the electrical energy generated by the transient distortion waveform and weighted by transient compensation within the isolation integration window is accumulated as the distorted electrical energy to generate the isolation compensation electrical energy. To eliminate the step oscillations induced by short-circuit impacts in conventional low-pass decimation filters and to block the unidirectional artificial divergence error caused by the product of DC attenuation bias and high-frequency voltage fluctuations, specifically, in this weighted calculation process, the total energy of the power grid across the entire frequency band is physically composed of fundamental effective energy and transient distortion energy. During transient abrupt changes, the steady-state metering calculation submodule suspends the conventional fundamental energy integration time sequence and uses 12.8kHz full-band instantaneous power for calculation. The instantaneous full-band power of each high-frequency sampling period is weighted with transient compensation weights and continuously accumulated within the isolation integration window. The distorted energy obtained by the weighted accumulation forms the isolation compensation energy. Meanwhile, the transient waveform determination submodule, at a sampling data rate of 12.8kHz, completely transfers the original voltage and current waveform data of the entire frequency band during the same transient process to a non-volatile waveform storage medium to preserve the transient distortion waveform. Thus, the weighted accumulation of transient waveform and distorted electrical energy is performed synchronously based on the same original full-frequency band data stream, and the isolated compensation electrical energy is merged into the main electrical energy accumulation register after the transient ends.

[0037] After the 80ms transient short-circuit process ends and the distribution switch control cabinet completes fault isolation and bus voltage reconstruction, the high-frequency sampling time... The instantaneous voltage sample value at the location was recovered to V, the instantaneous reference voltage of the steady-state phasor reference at the corresponding moment is V, the transient waveform determination submodule calculates the transient disturbance at this time. Since the calculated value of 0.05 is lower than the preset disturbance threshold of 0.15, the transient recording judgment submodule cancels the transient trigger status flag and resets the transient compensation weight to the value of 1. In response to the cancellation of the transient trigger status flag, the steady-state metering calculation submodule closes the isolation integration window, extracts the non-integer power frequency cycle sampling residuals at both ends of the isolation integration window, and applies a trapezoidal area approximation algorithm to the edge sampling points to implement phase smoothing normalization convergence constraints. Under the protection of the hardware atomic lock mechanism, the converged isolation compensation energy is... The total energy reading is updated by writing to the main energy accumulation register, restoring the conventional fundamental energy integration timing of the 3.2kHz metering channel. Under a single physical sampling topology, the unified state of broadband waveform capture fidelity and energy metering conservation throughout the switching transient process is maintained. Specifically, the trapezoidal area approximation algorithm performs smooth normalization on edge sampling points as follows: When the isolation integration window is closed, the steady-state metering calculation submodule first locates two non-integer cycle cutoff points at the beginning and end of the window opening, extracting two adjacent high-frequency power sampling values ​​before and after the beginning cutoff point, and two adjacent high-frequency power sampling values ​​before and after the end cutoff point; subsequently, it calculates the non-integer proportionality coefficient within a single high-frequency sampling discrete period of 78.125μs at the cutoff time. This coefficient is calculated by dividing the time difference between the cutoff time and the previous sampling point by... The sampling period is obtained; for the first cutoff point of the window, the power values ​​of the two samples before and after the first end are linearly interpolated according to the proportional coefficient to obtain the first end boundary power point, and the first end boundary power point and the power value after the first end form the upper and lower bases of a trapezoid. The height of the trapezoid is taken as the remaining non-integer time, and the residual area of ​​the first end edge is calculated; for the last cutoff point of the window, the upper and lower bases of the trapezoid are also formed by the power value before the last end and the power point of the last end, and the residual area of ​​the last end edge is calculated; finally, the residual areas of the first end edge and the last end edge are normalized according to the sampling period and converted into compensation energy, and respectively added to the total energy accumulated within the whole sampling period inside the isolation integration window. Thus, the energy gaps caused by the non-integer cycle cutoff at both ends of the window are accurately filled by trapezoidal geometric approximation, eliminating spectral leakage and edge step jumps.

[0038] Example 2: A power quality recording and metering integrated testing system was deployed on a 10kV intelligent distribution switch control equipment test bench. The test bench included a vacuum circuit breaker, bus voltage transformers and protective current transformer secondary side signal interfaces, a programmable wideband power source, and a heterogeneous computing chip measurement and control unit composed of a field-programmable gate array and a digital signal processor. The test data was taken from the deterministic electrical signal output by the programmable wideband power source and the transient physical disturbances generated by the circuit breaker operation. The programmable wideband power source outputs a power frequency fundamental voltage with a nominal effective value of 220V and a fundamental frequency dynamically adjusted within the range of 49.5Hz to 50.5Hz. Electromagnetic transient impulses and harmonic noise were superimposed on the fundamental voltage, with the 5th harmonic at 4.2% and the 7th harmonic at 2.8%. Gaussian white noise with a signal-to-noise ratio of 35dB was also injected. To simulate voltage and current disturbances during the opening and reclosing of power distribution switches, the wideband sampling conversion module is equipped with a multi-channel analog-to-digital converter chip with a quantization bit of 24 bits and a passive electromagnetic shielding filter interface. The hardware sampling frequency is fixed at 12.8kHz, and the discrete sampling period is 78.125μs. The collected bus voltage and branch current are converted into raw full-band data streams and output to the data decoupling and distribution module. The data decoupling and distribution module uses a bidirectional circular buffer unit and a dual-port shared register unit to distribute the raw full-band data stream into a waveform recording data stream that maintains a rate of 12.8kHz, and a metering data stream with a data rate of 3.2kHz after being downsampled by a four-stage cascaded integrator comb decimation filter. The two data streams are respectively input into the transient waveform recording judgment submodule and the steady-state metering calculation submodule, which operate independently within the heterogeneous computing chip.

[0039] The experimental group retained the complete processing link of the system. The phase forward prediction unit determined the intrinsic group delay time based on the intrinsic group delay period number of 8 and the sampling period of 78.125μs. It is 0.625ms; at the power frequency angular frequency for At rad / s, the phase advance compensation amount is obtained. for rad, or 11.25°, is used to generate a steady-state phasor reference. transient disturbance quantity The disturbance threshold is set to 0.15; when the transient disturbance exceeds this threshold, a transient compensation weight is generated. The steady-state metering calculation submodule opens a 12.8kHz isolated integration window, and within the window, the non-periodic DC attenuation component bias is extracted and reduced by the cycle-sliding mean filter unit. Then, the distorted power is weighted and accumulated according to the transient compensation weight, and the corrected instantaneous transient power is adjusted accordingly. Perform discrete integration, remove the phase forward prediction unit from control group 1, and adjust the phase advance compensation amount. Set to 0°; Control group 2 removes the isolation integration window and transient compensation weight feedback mechanism, and continues to use conventional 3.2kHz low-pass decimation filtering and fundamental power integration during transient changes; Control group 3 retains the isolation integration window, but does not reduce the non-periodic DC attenuation component bias; Control group 4 lowers the disturbance over-limit threshold to 0.05; Control group 5 raises the disturbance over-limit threshold to 0.35.

[0040] In operating condition 1, where a steady-state fundamental frequency is superimposed with 35 dB noise and harmonics, the phase alignment deviation of the test group after phase forward prediction processing is 0.02°, and the transient disturbance is... The peak value was 0.048, no transient recording was triggered, the number of steady-state false triggers and missed triggers was 0, and the relative error of energy metering throughout the transient process was +0.038%. After drifting the fundamental frequency to 50.3Hz and removing the phase forward prediction unit, the phase alignment deviation of control group 1 increased to 11.32°. This deviation caused a time-domain misalignment between the steady-state phasor reference and the high-speed instantaneous voltage sampling point, the peak value of the transient disturbance reached 0.194, the recording trigger response time was 78.1μs, and 4 false triggers occurred, with a relative error of energy metering of +0.041%. Control group 4 still used the input condition of steady-state fundamental frequency superimposed with 35dB noise and harmonics, the phase alignment deviation was 0.02°, the recorded peak value of the transient disturbance was 0.048, and the recording trigger response time was 78.1μs. After the disturbance over-limit threshold was reduced, the transient disturbance during continuous sampling... The instantaneous jump in the range of 0.048 to 0.062 resulted in 11 noise false triggers. After frequent switching of the integral timing, the relative error of the power metering was +0.185%.

[0041] In operating condition two, with a 28% voltage sag and short-circuit current impact, the phase alignment deviation of the test group after phase forward prediction was 0.03°, and the transient disturbance was... The peak value was 0.282. After this value exceeded the disturbance threshold, the transient recording judgment submodule triggered recording and drove the steady-state metering calculation submodule to switch to the isolation integration window. The recording trigger response time was 78.1μs, and the number of false triggers and missed triggers was 0. Within the isolation integration window, the non-periodic DC attenuation component bias was reduced synchronously, and the distorted energy was accumulated according to the transient compensation weight. The resulting relative error of transient energy metering throughout the entire process was +0.072%. Under the same 28% voltage sag and short-circuit current impact, control group 1 did not perform phase advance compensation. The phase alignment deviation was 11.25°, the peak value of the transient disturbance was 0.163, and the recording trigger response time was extended to 390.6μs, which was a delayed trigger. The relative error of energy metering was +0.284%.

[0042] Control group 2 also received a 28% voltage sag superimposed with a short-circuit current surge. Its phase alignment deviation was 0.03°, the peak transient disturbance was 0.282, the recording trigger response time was 78.1 μs, and the number of false triggers and missed triggers was 0. Because conventional low-pass decimation filtering and fundamental energy integration were continued during the transient period, the isolation integration window was not enabled, and transient compensation weighting was not applied. After the strong distortion signal entered the conventional integration link, the relative error of energy metering throughout the transient process was -4.215%. Control group 3 set the input to a 28% short-circuit sag with a DC component accounting for 35%. Its phase alignment deviation was 0.03°, and the peak transient disturbance was... The value is 0.282, the waveform recording trigger response time is 78.1μs, and the number of false triggers and missed triggers is 0. Since the non-periodic DC attenuation component bias is not reduced in the isolation integration window, the DC component continues to enter the integration channel after being multiplied by the high-frequency voltage. The relative error of power metering is +5.340%. Under the condition of 28% voltage sag and short-circuit current impact, the phase alignment deviation of control group 5 is 0.03°, and the peak value of transient disturbance is 0.282. This value is lower than its set disturbance over-limit threshold. The system did not trigger waveform recording, and one missed trigger occurred. The isolation integration window was not opened, and the relative error of power metering throughout the transient process was -3.890%.

[0043] In condition three, where a 60% voltage sag is accompanied by a large current interruption, the phase alignment deviation of the test group was 0.03°, and the transient disturbance was... The peak value was 0.604, the waveform recording trigger response time was 78.1 μs, and the number of false triggers and missed triggers was 0. After transient triggering, the steady-state metering calculation submodule performs aperiodic DC attenuation component bias deduction and transient compensation weighted accumulation within the isolated integration window. The relative error of energy metering throughout the transient process is -0.065%. Control group 2 uses the same 60% depth voltage sag accompanied by large current interruption input, with a phase alignment deviation of 0.03°, a peak transient disturbance value of 0.604, and a waveform recording trigger response time of 78.1 μs. μs, the number of false triggers and missed triggers was 0; due to the lack of isolation integral window and transient compensation weight adjustment, the relative error of power metering throughout the transient process was -7.862%. Control group 3 set the input to 60% short-circuit sag and DC component to 50%, phase alignment deviation was 0.03°, peak transient disturbance was 0.604, recording trigger response time was 78.1μs, and the number of false triggers and missed triggers was 0; without reducing the non-periodic DC attenuation component bias, the relative error of power metering was +8.916%.

[0044] As can be seen from the processing results of the above different operating conditions, the phase forward prediction unit is used to compensate for the time lag caused by the decimation filter; the isolation integration window and transient compensation weight are used to accumulate distorted power during the transient period; the cycle moving average filter unit is used to separate and reduce the non-periodic DC attenuation component bias from the instantaneous current sampling value. Under the 28% and 60% sag conditions, the relative error of power metering obtained by the test group is within the error range corresponding to the 0.2S-level high-precision metering requirement. The two sets of disturbance over-limit threshold boundary tests also show that if the threshold is too low, the steady-state background noise and harmonic fluctuations will enter the transient triggering condition, and if the threshold is too high, the actual voltage sag event will be missed. The disturbance over-limit threshold used in this embodiment is located in the working interval between suppressing the false triggering of steady-state background noise and capturing transient changes. The phase forward prediction, non-periodic DC attenuation component bias deduction and the weighted accumulation of transient compensation weight in the isolation integration window are all performed based on the same original full-band data stream, so that the system can complete microsecond-level fault recording and transient full-process power metering under a single physical sampling hardware link.

[0045] Example 3: This example describes an integrated power quality recording and metering system deployed within the busbar outgoing section of a 10kV intelligent distribution switch control cabinet. It is used to handle situations where contacts repeatedly bounce and reignite during the switching of large-capacity inductive loads, and when the short-circuit current contains a non-periodic DC attenuation component with a large time constant. The wideband sampling conversion module is connected to the secondary side of the busbar voltage transformer via shielded twisted-pair cable and to the secondary side of the protective current transformer built into the circuit breaker bushing via a coaxial shielded cable. Internally, it is equipped with a 24-bit quantization analog-to-digital converter chip and a passive... The electromagnetic shielding filter interface acquires bus voltage and branch current at a hardware sampling frequency of 12.8kHz, and outputs the raw full-band data stream without hardware simulation low-pass filtering. The data decoupling and distribution module receives the raw full-band data stream and continuously writes it into the bidirectional circular buffer unit. It then distributes the waveform recording data stream, which maintains a rate of 12.8kHz, to the heterogeneous computing chip through the on-chip high-speed bus, as well as the metering data stream with a data rate of 3.2kHz after being downsampled by a four-stage cascaded integrator comb decimation filter. This ensures that the two data streams maintain the corresponding sampling timing under multiple overlapping conditions.

[0046] During the parameter calibration process during system initialization, the steady-state metering calculation submodule performs a discrete Fourier transform on the 3.2kHz metering data stream to track the fundamental angular frequency of the power grid. The phase forward prediction unit reads the intrinsic group delay period number 8, which is four times the decimation filter structure's intrinsic group delay period, from the decimation filter group delay clock period register, and multiplies it by the high-frequency sampling clock period of 78.125μs to obtain the intrinsic group delay time. Then Compared with the current power grid fundamental frequency Multiply to obtain the phase advance compensation amount. For the reference fluctuations caused by the combined inrush current of the circuit breaker closing and background harmonics, the disturbance exceeding the limit threshold is calibrated to 0.15. This value is taken from the combination of the allowable deviation limit of the steady-state voltage of the distribution network (±7%), the upper limit of the total distortion rate of the background harmonic voltage (5%), and the sampling noise margin. The transient waveform determination submodule determines the frequency of the transient waveform at discrete sampling times. Extracting instantaneous voltage sample values ​​from the waveform data stream And call the steady-state phasor reference instantaneous reference voltage. ,according to Calculate the transient disturbance.

[0047] The calibration process for the disturbance over-limit threshold of 0.15 is as follows: the allowable deviation limit of steady-state voltage in a 10kV distribution network is ±7% of the nominal value, corresponding to an upper limit of 0.07 for the relative deviation of the fundamental voltage; the allowable upper limit of the total distortion rate of the background harmonic voltage in the power grid is 5%, corresponding to an upper limit of 0.05 for the instantaneous voltage vector magnitude fluctuation caused by harmonics; the algebraic sum of the magnitudes of the fundamental deviation and the harmonic vector under the condition of in-phase superposition is 0.12; the hardware sampling channel has Gaussian white noise with a signal-to-noise ratio of 35dB and jitter in the analog-to-digital conversion tail. Based on this, a measurement signal-to-noise ratio of 0.03 and a noise defense redundancy margin are introduced. The sum of 0.07, 0.05 and 0.03 is 0.15, which is used as the judgment boundary between normal steady-state voltage fluctuations and transient fault events.

[0048] During the process of the vacuum circuit breaker switching the inductive reactor, the contacts continuously generate three phase-to-phase reignition arcs, causing continuous voltage dips on the bus and short-circuit inrush currents. When the transient waveform determination submodule detects that the transient disturbance at the instantaneous sampling point reaches... At that time, the bidirectional circular buffer unit is locked, and the continuous waveform data from 100ms before the trigger time to 100ms after the fault recovery termination is transferred to the non-volatile waveform recording storage medium. At the same time, the transient compensation weight is obtained according to the linear complementary relationship. It is fed back to the steady-state metering calculation submodule through the dual-port shared register unit.

[0049] For the non-periodic DC attenuation component with an initial short-circuit angle of zero degrees and an attenuation time constant of 65ms, the cycle-sliding average filtering unit in the transient recording determination submodule uses 256 12.8kHz sampling points to form a full-cycle power frequency sliding window, based on the instantaneous current sampling value. Real-time extraction of aperiodic DC attenuation component bias The steady-state metering calculation submodule suspends the 3.2kHz conventional fundamental frequency energy integration timing and starts a 12.8kHz full-rate isolated integration window. Within the window, the instantaneous AC component after subtracting the DC bias is multiplied by the instantaneous voltage sample value to obtain the instantaneous full-frequency power. Then, the instantaneous full-frequency power is multiplied by the transient compensation weight of 0.58 to obtain the corrected instantaneous transient power. The distortion energy is weighted and accumulated using an offset step length of 78.125 μs to generate isolation compensation energy. This processing ensures that the transient power during multiple arc reignitions no longer follows the integral timing after conventional low-pass decimation filtering, and at the same time, it deducts the non-periodic DC attenuation component bias before power accumulation.

[0050] After the vacuum circuit breaker reignites and shuts off, the transient disturbance in the power grid returns to its original value. The transient recording and determination submodule continuously maintains a 5-cycle power frequency. It then removes the transient trigger status flag and resets the transient compensation weight to 1. In response to the removal of the status flag, the steady-state metering calculation submodule initiates the isolation integration window closing process. It extracts non-integer cycle discrete sampling points at the beginning and end truncation points of the isolation integration window, employs a trapezoidal area approximation algorithm to apply phase convergence constraints to the edge sampling points to handle spectral leakage caused by window truncation. Subsequently, under the protection of the on-chip hardware atomic lock mechanism, it acquires a single write right to the main power accumulation register, and transfers the converged isolation compensation power... Write to the main energy accumulation register to complete the update of the total energy value; after releasing the hardware atomic lock, reactivate the normal fundamental energy integration timing of the 3.2kHz metering channel, and continue to perform transient recording and full-time energy metering under multiple switching transients and large DC bias conditions.

[0051] Example 4: This example combines Figures 1 to 2 This paper describes an integrated power quality recording and meter testing system and method, such as... Figure 1 As shown, in step S1, the electrical signals of the distribution bus and the switch transformer are acquired by the wideband sampling conversion module, and the original full-band data stream is output. In step S2, the original full-band data stream is distributed into a waveform recording data stream and a metering data stream by the data decoupling and distribution module. In step S3, the metering data stream is received and downsampled by the steady-state metering calculation submodule. Based on the decremented filter group delay time and the phase advance compensation amount, a steady-state phasor reference aligned with the phase of the waveform recording data stream sampling point is generated. In step S4, the transient waveform recording judgment submodule calls the steady-state phasor reference to calculate the transient disturbance amount, and triggers transient waveform recording and generates transient compensation weight when the transient disturbance amount exceeds the limit. In step S5, the steady-state metering calculation submodule responds to the transient compensation weight to adjust the integration timing, accumulates the conventional fundamental frequency energy under steady-state conditions, opens the isolation integration window during transient changes, accumulates the distorted energy according to the transient compensation weight, and merges it into the main energy accumulation register after the transient ends.

[0052] like Figure 2As shown, an integrated power quality recording and metering detection system includes a wideband sampling conversion module, a data decoupling and distribution module, a steady-state metering calculation submodule, and a transient recording and judgment submodule. The wideband sampling conversion module connects to the distribution bus and the switch transformer, and transmits the data to a multi-channel analog-to-digital converter chip for digital conversion after suppressing electromagnetic interference through a passive electromagnetic shielding filter interface, outputting the original full-band data stream. The data decoupling and distribution module receives the original full-band data stream, uses a bidirectional circular buffer unit to perform transient buffering and storage of the full-band data, and realizes bidirectional real-time interaction between the steady-state phasor reference and the transient compensation weight through a dual-port shared register unit. The steady-state metering calculation submodule performs downsampling filtering on the input data through a cascaded integral comb decimation filter. The built-in phase forward prediction unit calculates the decimation filter group delay time and superimposes the phase advance compensation to generate a steady-state phasor reference. During transient changes, the isolation integration window is opened in a controlled manner to accumulate distorted energy. The transient waveform determination submodule separates the non-periodic DC attenuation component bias from the sampled data through a cycle moving average filter unit for the steady-state metering calculation submodule to deduct during power calculation. At the same time, when the transient disturbance exceeds the limit, a transient compensation weight is generated and transmitted to the steady-state metering calculation submodule to adjust the energy accumulation weight within the isolation integration window.

[0053] Example 5: In this example, an integrated power quality recording and metering detection system is deployed in the on-site startup and commissioning process of a 10kV intelligent distribution switch control cabinet. The steady-state metering calculation submodule receives the 3.2kHz metering data stream via the data decoupling and distribution module and then initiates zero-crossing detection. When the power grid fundamental frequency fluctuates dynamically between 49.5Hz and 50.5Hz, the system updates the power grid fundamental frequency angular frequency in real time. The phase forward prediction unit reads the intrinsic group delay period number 8 from the decimation filter group delay clock period register, and multiplies this period number by the high-frequency sampling clock period 78.125μs to determine the intrinsic group delay time. Then, based on the real-time updated power grid fundamental frequency angular frequency... With inherent group delay time Determine the phase advance compensation amount The steady-state metrology calculation submodule will synthesize a steady-state phasor reference. The transient waveform determination submodule continuously writes to the dual-port shared register unit, reads the steady-state phasor reference, and keeps it in phase alignment with the instantaneous sampling point of the waveform data stream on the time axis.

[0054] After the distribution switch clears the short-circuit fault and the bus voltage recovers, the transient waveform determination submodule monitors the transient disturbance at the instantaneous sampling point. Once the transient change stabilizes below the preset disturbance threshold of 0.15, the transient change is determined to have terminated, a reset instruction is written to the status register, and the transient compensation weight is adjusted. Set to value 1; the steady-state metering calculation submodule responds to the reset command to close the isolation integration window, extracts the non-integer power frequency cycle sampling residuals at both ends of the window, and performs smoothing and normalization processing using a trapezoidal area approximation method to eliminate boundary truncation errors. Subsequently, under the protection of the hardware atomic lock mechanism, the processed isolation compensation power is... Write to the main energy accumulation register to update the total energy reading, and restore the normal fundamental energy integration timing of the 3.2kHz metering channel after releasing the hardware atomic lock.

[0055] Example 6: This example describes an integrated power quality recording and meter detection system deployed within a heterogeneous computing chip in a 10kV intelligent distribution switch control cabinet. This heterogeneous computing chip, composed of a field-programmable gate array (FPGA) and a digital signal processor (DSP), is used for the automatic reclosing sequence of the distribution switch and the continuous transient electromagnetic shocks caused by multi-stage inductive load switching. A wideband sampling conversion module is electrically connected to the secondary side of a voltage transformer installed on the busbar side via shielded twisted-pair cable, and simultaneously to the secondary side of a protective current transformer installed on the circuit breaker contact side via a coaxial shielded cable. Internally, it is equipped with a 24-bit quantization analog-to-digital converter chip and a passive electromagnetic shielding filter interface, using a hardware sampling frequency of 12.8kHz and a sampling rate of 78.125μs. The discrete sampling period continuously acquires bus voltage and branch current, outputting a raw full-band data stream without analog hardware filtering. The data decoupling and distribution module receives the raw full-band data stream and writes it into a bidirectional circular buffer unit. Through an on-chip high-speed cross-switch matrix, the data stream is decoupled and distributed into a waveform recording data stream maintaining a full rate of 12.8kHz, and a metering data stream with a data rate of 3.2kHz after being downsampled by a four-stage cascaded integrator comb decimation filter. The two data streams are respectively sent to the transient waveform recording determination submodule and the steady-state metering calculation submodule running in independent hardware logic pipeline cores. During the heterogeneous computing chip startup initialization process, the steady-state metering calculation submodule tracks the power grid fundamental frequency angular frequency based on the 3.2kHz metering data stream. Initial phase with fundamental wave The phase forward prediction unit reads the intrinsic group delay period number 8 from the decimation filter group delay clock period register, multiplies this period number by the high-frequency sampling clock period 78.125μs, and obtains the intrinsic group delay time. ms, and then calculate the phase advance compensation amount based on the inherent group delay time and the real-time fundamental angular frequency. The steady-state metrology calculation submodule will synthesize a steady-state phasor reference. The system continuously writes to the dual-port shared register unit, ensuring that the steady-state phasor reference output to the transient waveform determination submodule maintains hardware timing phase alignment with the instantaneous sampling points of the high-speed waveform data stream during cross-clock domain transmission.

[0056] When the vacuum circuit breaker responds to a transient line fault and continuously performs opening and reclosing operations, a sudden and continuous phase-to-phase voltage drop occurs on the power grid bus, accompanied by a short-circuit current containing a non-periodic DC attenuation component. The transient waveform recording and determination submodule maintains a 12.8kHz rate to read the waveform data stream and obtain the instantaneous voltage sample value. V, simultaneously calls the phase-aligned steady-state phasor reference in the dual-port shared register unit. V, according to the formula By substituting the numerical values, the transient disturbance quantity is obtained. When the calculated value of 0.36 at the instantaneous sampling point exceeds the preset disturbance threshold of 0.15, the transient recording determination submodule locks the bidirectional circular buffer unit and transfers the full-band voltage and current waveform data from 100ms before the trigger moment to 100ms after the fault recovery termination to the non-volatile recording storage medium. At the same time, the transient compensation weight is calculated according to the relational formula. The data is then written to the status register. The steady-state metering calculation submodule detects the status register flag and finds that the transient compensation weight of 0.64 is less than 1. It then suspends the 3.2kHz conventional fundamental frequency energy integration timing and starts a 12.8kHz full-rate isolation integration window. The cycle-sliding average filtering unit uses 256 high-frequency sampling points to form a full-frequency sliding window, which is used to sample the instantaneous current value. A real-time separation of the non-periodic DC attenuation component bias. A; The steady-state metering calculation submodule multiplies the instantaneous current component (after subtracting the bias) with the instantaneous voltage sample value within the isolated integration window to obtain the instantaneous full-frequency power. Then, it weights this instantaneous full-frequency power according to a transient compensation weight of 0.64 to calculate the corrected instantaneous transient power. W, and weighted summation of the distortion energy with an offline step length of 78.125μs to generate isolation compensation energy. After the continuous action process ends and the transient disturbance amount When the value continues to fall below 0.15, the transient recording determination submodule cancels the transient trigger flag. Reset to value 1; the steady-state metering calculation submodule closes the isolation integration window, extracts the non-integer power frequency cycle sampling residuals at both ends of the window, implements phase convergence constraints using a trapezoidal area approximation algorithm, and obtains the single write right to the main power accumulation register under the protection of a hardware atomic lock mechanism, and transfers the converged isolation compensation power... Write to the main energy accumulation register to update the total energy reading. After releasing the hardware atomic lock, restore the normal fundamental energy integration timing of the 3.2kHz metering channel to keep the energy flow metering in the transient dynamic process of the circuit breaker conserved and maintain the accuracy of the waveform recording trigger criterion.

[0057] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. An integrated power quality recording and meter detection system, characterized in that, Include: The wideband sampling conversion module is connected to the power distribution bus and switch transformers to collect electrical signals and output the raw full-band data stream; The data decoupling and distribution module connects the broadband sampling conversion module and the collaborative computing module, and is used to distribute the original full-band data stream into waveform recording data stream and measurement data stream; The collaborative computing module includes a steady-state measurement calculation submodule and a transient waveform recording and determination submodule. The steady-state metering calculation submodule has a built-in phase forward prediction unit, which is used to receive the metering data stream and downsample it. Based on the decremented filter group delay time and the phase advance compensation amount, it generates a steady-state phasor reference that is aligned with the phase of the sampling point of the recorded data stream. The transient waveform determination submodule is used to call the steady-state phasor reference to calculate the transient disturbance, and to trigger transient waveform recording and generate transient compensation weights when the transient disturbance exceeds the limit. The steady-state metering calculation submodule is used to respond to the integral timing of transient compensation weight adjustment: it accumulates the conventional fundamental frequency energy under steady-state operating conditions; During transient changes, an isolation integration window is opened, and the distorted energy is accumulated in a weighted manner according to the transient compensation weight. After the transient ends, the distorted energy is merged into the main energy accumulation register.

2. The integrated power quality recording and meter detection system according to claim 1, characterized in that, The phase forward prediction unit has a built-in decimation filter group delay clock period register; the steady-state metering calculation submodule downsamples the metering data stream through a cascaded integral comb decimation filter to extract the current grid fundamental angular frequency and the initial phase of the fundamental wave; the phase forward prediction unit reads the inherent group delay period number in the decimation filter group delay clock period register, determines the group delay time by multiplying the inherent group delay period number by the high-frequency sampling clock period, and multiplies the group delay time by the current grid fundamental angular frequency to obtain the phase advance compensation amount.

3. The integrated power quality recording and meter detection system according to claim 1, characterized in that, During the isolation integration window, the steady-state metering calculation submodule switches the power sampling data rate to the same hardware sampling frequency as the wideband sampling conversion module. In each high-frequency sampling cycle within the isolation integration window, the steady-state metering calculation submodule multiplies the instantaneous voltage sampling value and the instantaneous current sampling value to calculate the instantaneous full-frequency power, and multiplies the instantaneous full-frequency power with the transient compensation weight to generate the corrected instantaneous transient power. The corrected instantaneous transient power is accumulated with the high-frequency sampling cycle as the discrete time integration step to generate the isolation compensation energy.

4. The integrated power quality recording and meter detection system according to claim 3, characterized in that, The transient waveform recording determination submodule includes a cycle-sliding average filtering unit. During the calculation of transient compensation weights, the cycle-sliding average filtering unit simultaneously calculates the full-frequency average of the instantaneous current sample values ​​in the waveform recording data stream, separating the non-periodic DC attenuation component bias associated with the operation of the distribution switch. Before calculating the instantaneous full-frequency power within the isolation integration window, the steady-state metering calculation submodule subtracts the non-periodic DC attenuation component bias from the instantaneous current sample values, and uses the subtracted instantaneous AC current value to participate in the calculation of the instantaneous full-frequency power.

5. The integrated power quality recording and meter detection system according to claim 3, characterized in that, When the transient disturbance amount falls below the disturbance over-limit threshold, the transient recording determination submodule cancels the transient trigger state and resets the transient compensation weight to the value 1. After the steady-state metering calculation submodule detects the cancellation of the transient trigger state, it closes the isolation integration window, extracts the non-integer power frequency cycle sampling residuals at the beginning and end of the isolation integration window, uses a trapezoidal area approximation algorithm to smooth and normalize the edge sampling points, writes the corrected isolation compensation power into the main power accumulation register to update the total power value, and restores the normal fundamental power integration timing.

6. The integrated power quality recording and meter detection system according to claim 1, characterized in that, The data decoupling and distribution module includes a dual-port shared register unit and a bidirectional circular buffer unit; the wideband sampling and conversion module continuously writes the original full-band data stream into the bidirectional circular buffer unit; when the transient disturbance exceeds the limit, the transient waveform determination submodule locks the bidirectional circular buffer unit and transfers the full-band voltage and current waveform data within the time span of 100ms before the trigger moment to 100ms after the trigger termination to a non-volatile waveform storage medium; the dual-port shared register unit is used to transmit the steady-state phasor reference and transient compensation weight in real time between the steady-state metering calculation submodule and the transient waveform determination submodule.

7. The integrated power quality recording and meter detection system according to claim 1, characterized in that, The wideband sampling conversion module includes a passive electromagnetic shielding filter interface and a multi-channel analog-to-digital converter chip, with a hardware sampling frequency of 12.8kHz and a quantization bit depth of 24 bits; the steady-state metering calculation submodule has a conventional fundamental energy integration data rate of 3.2kHz; the transient recording judgment submodule maintains a recording data stream sampling data rate of 12.8kHz; and the disturbance exceeding the limit threshold for judging transient disturbance exceeding the limit is set to 0.

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8. The integrated power quality recording and meter detection system according to claim 1, characterized in that, The system is installed in a 10kV intelligent distribution switch control cabinet; the wideband sampling conversion module is electrically connected to the secondary side lead-out terminal of the bus voltage transformer in the intelligent distribution switch control cabinet through a shielded twisted pair cable, and is electrically connected to the secondary side of the Rogowski coil and the protection-grade current transformer installed on the inlet and outlet sides of the circuit breaker contacts through a coaxial shielded cable.

9. The integrated power quality recording and meter detection system according to claim 1, characterized in that, The collaborative computing module is located in a heterogeneous computing chip composed of a field-programmable gate array and a digital signal processor; the steady-state metering calculation submodule and the transient waveform recording determination submodule run in independent hardware logic pipeline cores, and achieve bidirectional handshaking through an on-chip high-speed cross switch matrix. During the isolation integration window, the main power accumulation register is controlled by a hardware atomic lock mechanism to maintain the single write right of power accumulation data under multi-rate clock domain.

10. A method for integrating power quality recording and meter detection, applied to the integrated power quality recording and meter detection system described in claim 1, characterized in that, Includes the following steps: Step S1: Acquire electrical signals from the distribution bus and switch transformers through the wideband sampling conversion module, and output the raw full-band data stream; Step S2: The original full-band data stream is distributed into waveform recording data stream and measurement data stream through the data decoupling and distribution module; Step S3: Receive the metering data stream and downsample it through the steady-state metering calculation submodule. Based on the decremented filter group delay time and the phase advance compensation amount, generate a steady-state phasor reference that is phase-aligned with the sampling points of the recorded data stream. Step S4: The transient disturbance is calculated by calling the steady-state phasor reference through the transient recording determination submodule, and transient recording is triggered and transient compensation weight is generated when the transient disturbance exceeds the limit. Step S5: Adjust the integral timing by responding to the transient compensation weight of the steady-state metering calculation submodule: accumulate the conventional fundamental frequency energy under steady-state conditions; During transient changes, an isolation integration window is opened, and the distorted energy is accumulated in a weighted manner according to the transient compensation weight. After the transient ends, the distorted energy is merged into the main energy accumulation register.

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