Spatial coding based double-layer superstructured wire-on-chip optical half adder and design method

CN122984261APending Publication Date: 2026-10-27SHENZHEN ZHONGKE TIANYING TECH CO LTD
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Patent Information

Application Number
CN202610968996.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-01
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

[0003]然而,现有相位编码方案通常需要额外引入恒定参考偏置光束,并配置高精度相位调制器,导致硬件复杂度较高,对光源相干性和相位稳定性要求较强;同时,硅基波导中的相位易受热扰动和工艺误差影响,逻辑稳定性不足

Benefits of technology

1、本发明通过预设空间编码关系,将输入端口组和检测区域组分别对应逻辑变量及其逻辑状态,使输入光数据能够转换为明确的空间输入光场,并使预测空间强度分布数据能够对应到目标检测区域,避免依赖单一绝对光强阈值,提高逻辑读出稳定性。

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Abstract

The application discloses a double-layer super-structured line optical half-adder based on spatial coding and a design method, relates to the technical field of optical devices, and discloses the following technical scheme: a preset spatial coding relationship is used to correspond logical variables and logical states of an input port group and a detection area group, a diffraction propagation operator is constructed according to the propagation direction of input light, a forward propagation model is formed, input light data and phase variable data of two layers of super-structured line modulation layers are input into the forward propagation model, predicted output light field data is obtained, predicted spatial intensity distribution data is generated according to the predicted output light field data, loss operation is performed on the predicted spatial intensity distribution data to obtain optimized loss data, the gradient of the phase variable data is calculated according to the optimized loss data, the phase variable data is updated through an Adam optimization algorithm, the updated phase variable data is mapped into actual geometric parameters of a subwavelength modulation unit by using a preset mapping library, and the design precision of the on-chip optical half-adder and the parameter determination efficiency are improved.
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Description

Technical Field

[0001] This invention relates to the field of optical device technology, specifically to a spatially encoded double-layer metamorphic on-chip optical half-adder and its design method. Background Technology

[0002] With the development of photonic integrated circuits, diffractive optical computing, and optical logic devices, on-chip optical field manipulation using metasurfaces, diffractive networks, and silicon-based waveguides has become an important direction in optical computing. Existing optical half-adders can achieve two-input, two-output logic operations through two layers of diffractive networks and complete logic decisions using the energy distribution of the output region; some on-chip optical logic devices also use phase encoding to map different logic states to different phases and combine diffractive or interference structures to achieve logic calculations.

[0003] However, existing phase encoding schemes typically require the introduction of a constant reference bias beam and the configuration of a high-precision phase modulator, resulting in high hardware complexity and stringent requirements for light source coherence and phase stability. Furthermore, the phase in silicon-based waveguides is susceptible to thermal disturbances and process errors, leading to insufficient logic stability. Some devices still rely on the absolute light intensity threshold of a single port for output decision-making; when light source power fluctuates or device insertion loss increases, weak light signals can easily fall below the detector threshold, causing misjudgments. In addition, directly searching multiple physical parameters using methods such as particle swarm optimization is time-consuming and limited in its optimization dimensions, making it difficult to meet the high integration and high-precision design requirements of on-chip optical logic devices. Summary of the Invention

[0004] The purpose of this invention is to provide a spatially encoded, two-layer meta-line on-chip optical half-adder and its design method to solve the problems raised in the prior art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A spatial coding-based dual-layer metaline on-chip optical half-adder, the on-chip optical half-adder includes a cladding layer and a silicon light guide layer, the cladding layer includes an upper cladding layer and a lower cladding layer, and the silicon light guide layer is located between the upper cladding layer and the lower cladding layer; An encoding module, a first metaline modulation layer, a second metaline modulation layer, and a detection module are sequentially arranged in the silicon light guide layer according to the propagation direction of the input light. The encoding module is used to convert the input light into a spatial input light field according to a preset spatial encoding relationship; The first metaline modulation layer is used to apply a phase delay to the spatial input light field to form a first phase modulation light field; the first phase modulation light field propagates between the first metaline modulation layer and the second metaline modulation layer to form an interlayer diffraction light field. The second meta-line modulation layer is used to apply a secondary phase delay to the interlayer diffraction field to form a second phase-modulated field; The detection module is used to acquire the spatial intensity distribution of the second phase modulated light field within the detection area, and output the half-adder result based on the spatial intensity distribution.

[0006] Furthermore, the upper cladding layer, the silicon light guide layer, and the lower cladding layer are arranged sequentially along a direction perpendicular to the propagation direction of the input light; The refractive index of the cladding layer is lower than that of the silicon light guide layer, which is used to restrict the transmission of input light in the silicon light guide layer along the direction of propagation of the input light.

[0007] In this process, because the refractive index of the silicon light guide layer is higher than that of the cladding, the input light will form a total internal reflection condition and guided mode constraint at the interface between the silicon light guide layer and the cladding. This causes the light field to be mainly distributed in the form of guided modes within the high-refractive-index silicon light guide layer, while the light field leaking from the upper and lower cladding layers only exhibits a rapidly decaying evanescent field. Therefore, the low-refractive-index cladding is equivalent to providing optical isolation and energy confinement for the silicon light guide layer in the vertical direction, reducing light diffusion in the thickness direction of the device. Meanwhile, the input end, the hyperlinear modulation layer, and the detection end are arranged along the propagation direction of the input light, and the silicon light guide layer provides a continuous transmission path, so that the input light, which is confined within the silicon light guide layer, can be transmitted sequentially to each functional area along the preset propagation direction. That is, the cladding restricts the light field to remain within the silicon light guide layer by the refractive index difference, and the propagation direction is determined by the optical path layout and input coupling direction in the silicon light guide layer.

[0008] Furthermore, the encoding module includes two input port groups, each input port group includes two input ports, each input port group corresponds to a logical variable according to a preset spatial encoding relationship, and the two input ports correspond to different logical states of the logical variable according to the preset spatial encoding relationship; The encoding module selects the corresponding input port according to the input logic state and the preset spatial encoding relationship. The input light forms a spatial input light field representing different incident positions through the corresponding input port and enters the silicon light guide layer.

[0009] The on-chip optical half-adder has two input logic variables, each of which has two logic states. Once the input logic state is determined, the encoding module only needs to select the input port in each input port group that corresponds to the logic state, and the input light will enter the silicon light guide layer from the corresponding spatial position. The different positions of the different input ports result in different lateral spatial distributions of the light field entering the silicon light guide layer, which is the spatial input light field. The logic information of the on-chip optical half-adder does not need to be expressed through phase values ​​or intensity thresholds, but rather through the combination of the incident positions of the input light. This makes it easier for the subsequent metaline modulation layer to form different diffraction propagation and phase modulation results according to different incident positions. Furthermore, the first metaline modulation layer and the second metaline modulation layer are each composed of a plurality of subwavelength modulation units arranged perpendicular to the propagation direction of the input light. The subwavelength modulation units include a first subwavelength modulation unit and a second subwavelength modulation unit. Different subwavelength modulation units have different geometric parameters, and each geometric parameter corresponds to a different refractive index and propagation constant, which are used to apply a first phase delay and a second phase delay to the spatial input light field and the interlayer diffraction light field, respectively.

[0010] Among them, the metaline modulation layer is essentially a phase modulation surface distributed in the lateral direction; after the spatial input light field enters the first metaline modulation layer, the light field components at different lateral positions pass through the corresponding local modulation regions, and each region causes the light field to produce different optical path accumulations. Therefore, the wavefront of the spatial input light field is re-assigned a lateral phase distribution, forming the first phase modulation light field. As the first phase-modulated light field continues to propagate, the transverse phase difference causes different light field components to diffract and spread, and they coherently superimpose during propagation, thus forming an interlayer diffraction light field that simultaneously has intensity redistribution and phase redistribution. The second metaline modulation layer no longer receives the original input light field, but the interlayer diffraction light field after phase modulation and interlayer propagation. Therefore, the second metaline modulation layer applies a second phase delay to the interlayer diffraction light field, so that it continues to evolve and distribute towards the predetermined output space, forming the second phase-modulated light field. The lateral dimensions of the subwavelength modulation unit are on the subwavelength scale or close to the input light wavelength scale. It can be used as a local equivalent medium unit to locally modulate the light field passing through this position. When different subwavelength modulation units have different slot lengths, slot widths, and spacing distributions, they will change the effective refractive index and propagation constant in this local region. The propagation constant determines the phase accumulated by the light field per unit propagation distance in this local region. Therefore, different geometric parameters will cause the light field components at different lateral positions to obtain different phase delays. The first subwavelength modulation unit in the first metaline modulation layer is used to apply a phase delay to the spatial input light field, and the second subwavelength modulation unit in the second metaline modulation layer is used to apply a secondary phase delay to the interlayer diffraction light field. The two modulation layers together complete the spatial transformation from the input light field to the output light field. Furthermore, the detection module includes two detection area groups, each detection area group includes two detection areas, each detection area group corresponds to a logical variable according to a preset spatial coding relationship, and the two detection areas correspond to different logical states of the logical variable according to the preset spatial coding relationship. The spatial intensity distribution of the second phase modulated light field in different detection areas is obtained, and the energy integral of the detection area is calculated based on the spatial intensity distribution. The logic state corresponding to the detection area with the larger energy integral in the same detection area group is taken as the logic state of the logic variable corresponding to the detection area group, and the logic state of the logic variable corresponding to the detection area group is taken as the output of the half-adder result.

[0011] The on-chip optical half-adder has two output logic variables, each of which has two logic states. Therefore, the detection module uses two detection area groups to receive the two output logic variables respectively, and sets two detection areas in each detection area group to correspond to the different logic states of the logic variable. After the second phase-modulated light field arrives at the detection end, the decision of different output logic variables is assigned to different detection area groups. Different states of the same logic variable are distinguished by two detection areas in the same group, so that the output logic state can be expressed by the energy distribution of the light field in different spatial areas. After the second phase-modulated light field reaches the detection module, it will form a continuous spatial intensity distribution within the detection area. The detection module needs to convert this spatial intensity distribution into comparable scalar data. Therefore, the light intensity in each detection area is integrated to obtain the energy integral value of the corresponding detection area. For the same detection area group, the two detection areas represent two states of the same logical variable. The detection area with a larger energy integral indicates that the second phase modulated light field gathers more energy in the region corresponding to that state. Therefore, the logical state corresponding to the detection area is taken as the output state of the logical variable corresponding to the detection area group.

[0012] A spatial coding-based design method for a two-layer meta-line on-chip optical half-adder, the design method comprising: Step S1: Preset spatial coding relationship. The spatial coding relationship includes assigning two input port groups and two detection area groups to four logical variables respectively, assigning two input ports in each input port group to logical state 0 and logical state 1 of the logical variables respectively, and assigning two detection areas in each detection area group to logical state 0 and logical state 1 of the logical variables respectively. Step S2: Construct diffraction propagation operators according to the propagation direction of the input light and the propagation process between the encoding module, the first hyperline modulation layer, the second hyperline modulation layer, and the detection module, and construct a forward propagation model based on the diffraction propagation operators; input the input light data and the phase variable data of the first hyperline modulation layer and the second hyperline modulation layer into the forward propagation model to obtain the predicted output light field data; Step S3: Obtain the predicted spatial intensity distribution data based on the predicted output light field data; perform loss calculation on the predicted spatial intensity distribution data to obtain optimized loss data; calculate the gradient of the phase variable data based on the optimized loss data; and update the phase variable data using the Adam optimization algorithm to obtain the updated phase variable data. Step S4: Map the updated phase variable data to the geometric parameters of the subwavelength modulation unit according to the preset mapping library to obtain the actual geometric parameters. The actual geometric parameters are used to complete the design of the on-chip optical half-adder.

[0013] Furthermore, the phase variable data is used to represent the first and second phase delays applied to the spatial input light field and the interlayer diffraction light field; In the preset mapping library, the mapping relationship between phase variable data and geometric parameters includes: ; Where p represents the target geometric parameter, t(p) represents the transmission complex amplitude corresponding to the target geometric parameter p of the subwavelength modulation unit, |t(p)| represents the transmission amplitude corresponding to the target geometric parameter p of the subwavelength modulation unit, Φ(p) represents the phase variable data corresponding to the target geometric parameter p, and j is the imaginary unit; The geometric parameters include the wavelength of the input light, the thickness of the silicon light guide layer, the slot length and slot width of the subwavelength modulation unit, and the spacing between different subwavelength modulation units; when the values ​​of other geometric parameters besides the target geometric parameters are fixed, the target geometric parameters and the phase variable data satisfy the mapping relationship.

[0014] Compared with the prior art, the beneficial effects of the present invention are: 1. This invention uses a preset spatial coding relationship to correspond the input port group and the detection area group to logical variables and their logical states, so that the input light data can be converted into a clear spatial input light field and the predicted spatial intensity distribution data can be mapped to the target detection area, avoiding reliance on a single absolute light intensity threshold and improving the stability of logic readout.

[0015] 2. This invention constructs a diffraction propagation operator according to the propagation direction of the input light, and constructs a forward propagation model from the diffraction propagation operator, so that the input light data and phase variable data can be calculated in the same propagation model to obtain the predicted output light field data and the predicted spatial intensity distribution data, thereby improving the computability of the phase design of the double-layer hyperline.

[0016] 3. This invention obtains optimized loss data by performing loss calculations on the predicted spatial intensity distribution data, calculates the gradient of the phase variable data based on the optimized loss data, updates the phase variable data through the Adam optimization algorithm, and then obtains the actual geometric parameters using a preset mapping library, thereby improving the efficiency of geometric parameter determination and the consistency of design results. Attached Figure Description

[0017] Figure 1 This is a schematic diagram showing the positional relationship between the cladding layer and the silicon light guide layer of the present invention; Figure 2 This is a schematic diagram of the structure of a two-layer metastructured on-chip optical half-adder based on spatial coding according to the present invention; Figure 3 This is a flowchart illustrating a spatial coding-based design method for a two-layer meta-line on-chip optical half-adder according to the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] Example 1: As Figure 1 As shown, the present invention provides a spatially encoded dual-layer metaline on-chip optical half-adder, the on-chip optical half-adder including a cladding layer and a silicon light guide layer, the cladding layer including an upper cladding layer and a lower cladding layer, the silicon light guide layer being located between the upper cladding layer and the lower cladding layer; like Figure 2 As shown, an encoding module, a first metaline modulation layer, a second metaline modulation layer, and a detection module are sequentially arranged in the silicon light guide layer according to the propagation direction of the input light. The upper cladding layer, the silicon light guide layer, and the lower cladding layer are arranged sequentially along the direction perpendicular to the propagation of the input light; In this embodiment, the silicon light guide layer is preferably a silicon-on-insulator platform with a thickness of 220 nm; the first metaline modulation layer and the second metaline modulation layer are both disposed in the silicon light guide layer; in the device, light propagates from the input side along the x-direction, and the lateral expansion direction perpendicular to the propagation direction is the y-direction; The first metaline modulation layer is located between the input port and the second metaline modulation layer, and the second metaline modulation layer is located between the first metaline modulation layer and the output port; In this embodiment, preferably, the operating wavelength of the input light is 1550nm, the thickness of the silicon light guide layer is 220nm, both the upper and lower cladding layers are made of silicon dioxide with a refractive index of 1.44, and the equivalent refractive index of the silicon light guide layer is 2.85; the length of the device along the direction of input light propagation is 300μm, the lateral unfolding width is 50μm, the propagation distance d1 from the encoding module to the first metaline modulation layer is 100μm, the propagation distance d2 from the first metaline modulation layer to the second metaline modulation layer is 100μm, and the propagation distance d3 from the second metaline modulation layer to the detection module is 100μm; The refractive index of the cladding layer is lower than that of the silicon light guide layer, which is used to restrict the transmission of input light in the silicon light guide layer along the direction of propagation of the input light.

[0020] The encoding module is used to convert the input light into a spatial input light field according to a preset spatial encoding relationship; The encoding module includes two input port groups, each input port group includes two input ports, each input port group corresponds to a logical variable according to a preset spatial encoding relationship, and the two input ports correspond to different logical states of the logical variable according to the preset spatial encoding relationship. The encoding module selects the corresponding input port according to the input logic state and the preset spatial encoding relationship. The input light forms a spatial input light field representing different incident positions through the corresponding input port and enters the silicon light guide layer.

[0021] In this embodiment, the two input port groups correspond to logical variables A and B respectively, and 0 and 1 are used to represent different logical states; The two detection region groups correspond to logic variables Co and S respectively, and use 0 and 1 to represent different logic states; the detection region group corresponding to Co is used to represent different logic states of carry output, and the detection region group corresponding to S is used to represent different logic states of sum output, and satisfies: ; ; Where ⊕ represents the logical XOR operation and · represents the logical AND operation; the spatial encoding relationship includes: when A=0 and B=0, S=0 and Co=0; When A=0 and B=1, S=1 and Co=0; When A=1 and B=0, S=1 and Co=0; When A=1 and B=1, S=0 and Co=1; In this embodiment, for example, when the input logic state is A=0 and B=1, the encoding module selects the two corresponding input ports, the input light amplitude is 1 and the initial phase is 0, forming a spatial input light field with two incident positions. The first metaline modulation layer is used to apply a phase delay to the spatial input light field to form a first phase modulation light field; the first phase modulation light field propagates between the first metaline modulation layer and the second metaline modulation layer to form an interlayer diffraction light field. The second meta-line modulation layer is used to apply a secondary phase delay to the interlayer diffraction field to form a second phase-modulated field; The first and second metaline modulation layers are each composed of a number of subwavelength modulation units arranged perpendicular to the propagation direction of the input light. The subwavelength modulation units include a first subwavelength modulation unit and a second subwavelength modulation unit. Different subwavelength modulation units have different geometric parameters, and each geometric parameter corresponds to a different refractive index and propagation constant, which are used to apply a first phase delay and a second phase delay to the spatial input light field and the interlayer diffraction light field, respectively.

[0022] In this embodiment, each metaline modulation layer is provided with 100 subwavelength modulation units along the lateral unfolding direction, and the structural period is 0.5μm; Each subwavelength modulation unit is equipped with a low-refractive-index groove region, with a groove width of 0.2 μm and a groove length selected in the range of 0.05 μm to 0.45 μm; For example, the target phases of the three subwavelength modulation units in the first metaline modulation layer are 0.35π, 1.20π, and 1.72π, respectively, and the corresponding slot lengths are 0.12μm, 0.28μm, and 0.39μm, respectively. The target phases of the three subwavelength modulation units in the second metaline modulation layer are 0.60π, 1.05π, and 1.85π, respectively, and the corresponding slot lengths are 0.16μm, 0.25μm, and 0.42μm, respectively. The detection module is used to acquire the spatial intensity distribution of the second phase modulated light field within the detection area, and output the half-adder result based on the spatial intensity distribution.

[0023] The detection module includes two detection area groups, each detection area group includes two detection areas, each detection area group corresponds to a logical variable according to a preset spatial coding relationship, and the two detection areas correspond to different logical states of the logical variable according to the preset spatial coding relationship. The spatial intensity distribution of the second phase modulated light field in different detection areas is obtained, and the energy integral of the detection area is calculated based on the spatial intensity distribution. The logic state corresponding to the detection area with the larger energy integral in the same detection area group is taken as the logic state of the logic variable corresponding to the detection area group, and the logic state of the logic variable corresponding to the detection area group is taken as the output of the half adder. In this embodiment, if the energy integral of the detection region corresponding to S=1 in the detection region group is higher than that of the detection region corresponding to S=0, then the determination bit output is 1; otherwise, the determination bit output is 0. Similarly, if the energy integral of the detection region corresponding to Co=1 is higher than that of the detection region corresponding to Co=0, then the determination carry output is 1; otherwise, the determination carry output is 0.

[0024] Example 2: Figure 3 As shown, this invention provides a technical solution: a design method for a two-layer meta-line on-chip optical half-adder based on spatial coding, the design method comprising: Step S1: Preset spatial coding relationship. The spatial coding relationship includes assigning two input port groups and two detection area groups to four logical variables respectively, assigning two input ports in each input port group to logical state 0 and logical state 1 of the logical variables respectively, and assigning two detection areas in each detection area group to logical state 0 and logical state 1 of the logical variables respectively. Step S2: Construct diffraction propagation operators according to the propagation direction of the input light and the propagation process between the encoding module, the first hyperline modulation layer, the second hyperline modulation layer, and the detection module, and construct a forward propagation model based on the diffraction propagation operators; input the input light data and the phase variable data of the first hyperline modulation layer and the second hyperline modulation layer into the forward propagation model to obtain the predicted output light field data; In this embodiment, the forward propagation model is preferably expressed as: ; in This represents the predicted output light field data corresponding to the k-th input logic state; k represents the k-th input logic state; y represents the lateral position perpendicular to the direction of input light propagation. d1 represents the diffraction propagation operator between the coding module and the first superline modulation layer; d1 represents the propagation distance between the coding module and the first superline modulation layer. M1(y) represents the spatial input optical field corresponding to the k-th input logic state; M1(y) represents the phase modulation operator of the first hyperwire modulation layer. d1 represents the diffraction propagation operator between the first and second superline modulation layers; d2 represents the propagation distance between the first and second superline modulation layers; M2(y) represents the phase modulation operator of the second superline modulation layer. d represents the diffraction propagation operator between the second hyperline modulation layer and the detection module; d3 represents the propagation distance between the second hyperline modulation layer and the detection module; Preferably, the phase modulation operator is expressed as: ; Where i represents the i-th superlinear modulation layer; y represents the lateral position perpendicular to the direction of input light propagation; Φ i (y) represents the phase variable data of the i-th hyperwire modulation layer at the lateral position y; Preferably, the diffraction propagation operator with a propagation distance of d is: ; Among them, P d Let represent the diffraction propagation operator with a propagation distance of d; V(y) represent the optical field input to this diffraction propagation operator; y represents the transverse position perpendicular to the direction of propagation of the input light; f represents the Fourier transform of the transverse position y; f -1 Represents the inverse Fourier transform; j represents the imaginary unit; d represents the propagation distance; k0 = 2π / λ represents the vacuum wavenumber, and λ represents the wavelength of the input light; n eff k represents the equivalent refractive index in the silicon light guide layer. y k represents the transverse spatial frequency. y The smaller the value, the slower the change in the light field along the y-direction. y The larger the value, the more drastic the change in the light field along the y-direction, such as finer stripes, faster transverse oscillations, or more complex wavefront changes. In this embodiment, for example, the input light wavelength λ is 1550 nm and the vacuum wavenumber k0 is 4.05 μm. -1 The equivalent refractive index n in the silicon light guide layer eff The value is set to 2.85, the horizontal calculation area is set to 0μm to 50μm, and the horizontal sampling interval is set to 0.1μm; For example, the propagation distance d1 from the encoding module to the first metaline modulation layer is 100 μm, the propagation distance d2 from the first metaline modulation layer to the second metaline modulation layer is 100 μm, and the propagation distance d3 from the second metaline modulation layer to the detection module is 100 μm.

[0025] In this embodiment, preferably, the process of converting the input optical data corresponding to the k-th group of input logic states into a spatial input optical field includes: ; Where y represents the lateral position perpendicular to the direction of input light propagation; Q (k) The strobe input port represents the selected input port determined by the spatial coding relationship of the k-th group of input logic states; q represents the strobe input port; a q h represents the input optical amplitude of the q-th gating input port; q (y) represents the spatial distribution function formed by the q-th gating input port at horizontal position y; e represents the base of the natural exponential function; j represents the imaginary unit; θ q This represents the initial phase of the input light at the q-th gating input port; Step S3: Obtain the predicted spatial intensity distribution data based on the predicted output light field data; perform loss calculation on the predicted spatial intensity distribution data to obtain optimized loss data; calculate the gradient of the phase variable data based on the optimized loss data; and update the phase variable data using the Adam optimization algorithm to obtain the updated phase variable data. In this embodiment, preferably, the process of obtaining the predicted spatial intensity distribution data includes: ; in, This represents the predicted spatial intensity distribution data corresponding to the k-th group of input logic states. The complex optical field distribution in the output detection region represents the predicted output optical field data corresponding to the k-th input logic state. The process of integrating the light intensity in each detection region to obtain the energy integral value of the corresponding detection region includes: ; in The energy integral of the detection region Ω represents the k-th input logic state. The energy integral value is normalized, and the normalization process includes: ; in The normalized energy of the detection region Ω represents the input logic state of the k-th group; This represents the total energy of the output plane corresponding to the k-th group of input logic states; The process of performing loss calculations to obtain optimized loss data includes: Establish a loss function, which is expressed as: ; Among them, L total Represents the optimization loss data; L MSE L represents the mean squared error loss term; diff L represents the differential energy constraint term; eff Represents the energy efficiency constraint; α, β, and γ represent the weighting coefficients, respectively. Specifically, the mean squared error loss term is: ; Where N represents the number of input logic states; k represents the k-th input logic state; The predicted spatial intensity distribution data represents the k-th group of input logic states; This represents the target strength template corresponding to the k-th group of input logic states; Specifically, the differential energy constraint term is: ; Where N represents the number of input logic states; m represents the preset energy margin. Normalized energy representing the region where the first output logic variable is correctly detected under the k-th input logic state; Normalized energy representing the error detection region of the first output logic variable under the k-th input logic state; Normalized energy representing the region where the second output logic variable is correctly detected under the k-th input logic state; represents the normalized energy of the error detection region of the second output logic variable under the k-th input logic state; max represents taking the maximum value. Specifically, the energy efficiency constraint is as follows: ; in, The energy integral represents the region where the first output logic variable is correctly detected under the k-th group of input logic states; The energy integral represents the region where the second output logic variable is correctly detected under the k-th input logic state. This represents the total energy of the output plane corresponding to the k-th group of input logic states; In this embodiment, taking the training samples corresponding to A=0 and B=1 as an example, the energy integral of the detection region S=1 is 0.34, the energy integral of the detection region S=0 is 0.08, the energy integral of the detection region Co=0 is 0.30, the energy integral of the detection region Co=1 is 0.06, and the total energy of the output plane is 0.78. The normalized energy of the first output logical variable's correct detection region is 0.436, the normalized energy of the first output logical variable's incorrect detection region is 0.103, the normalized energy of the second output logical variable's correct detection region is 0.385, and the normalized energy of the second output logical variable's incorrect detection region is 0.077. When the preset energy margin is 0.10, the mean square error loss term is 0.021, and the weighting coefficients α, β, and γ are 1, 0.5, and 0.2 respectively, the optimized loss data is 0.0568. In this embodiment, preferably, calculating the gradient of the phase variable data and updating the phase variable data using the Adam optimization algorithm includes: ; in This represents the gradient of the i-th phase variable data at the n-th iteration; n represents the iteration number; and i represents the index of the phase variable data. This represents the data of the i-th phase variable during the n-th iteration; ; in This represents the i-th updated phase variable data after the (n+1)-th iteration; μ represents the learning rate. This represents the first moment deviation correction value of the gradient of the i-th phase variable data at the n-th iteration; ε represents the second moment deviation correction value of the gradient of the i-th phase variable data in the nth iteration; ε represents the stabilizing term to prevent the denominator from being zero. In this embodiment, the 50th subwavelength modulation unit is taken as an example. The phase variable data at the nth iteration is 3.770 rad, the learning rate μ is 0.01, the first moment deviation correction value is 0.06, the second moment deviation correction value is 0.09, and the stability term is 10. -8 The update amount of the phase variable data in this iteration is 0.0020 rad, and the phase variable data after the (n+1)th iteration is 3.7680 rad. When the optimization loss data meets the convergence condition, the updated phase variable data is used as the target phase data.

[0026] Step S4: Map the updated phase variable data to the geometric parameters of the subwavelength modulation unit according to the preset mapping library to obtain the actual geometric parameters. The actual geometric parameters are used to complete the design of the on-chip optical half-adder.

[0027] The phase variable data is used to represent the first and second phase delays applied to the spatial input light field and the interlayer diffraction light field; In the preset mapping library, the mapping relationship between phase variable data and geometric parameters includes: ; Where p represents the target geometric parameter, t(p) represents the transmission complex amplitude corresponding to the target geometric parameter p of the subwavelength modulation unit, |t(p)| represents the transmission amplitude corresponding to the target geometric parameter p of the subwavelength modulation unit, Φ(p) represents the phase variable data corresponding to the target geometric parameter p, and j is the imaginary unit; The geometric parameters include the wavelength of the input light, the thickness of the silicon light guide layer, the slot length and slot width of the subwavelength modulation unit, and the spacing between different subwavelength modulation units; when the values ​​of other geometric parameters besides the target geometric parameters are fixed, the target geometric parameters and the phase variable data satisfy the mapping relationship.

[0028] In this embodiment, the preset mapping library has a fixed input light wavelength of 1550nm, a silicon light guide layer thickness of 220nm, a structural period of 0.5μm, a groove width of 0.2μm, and uses the groove length as the target geometric parameter; When the target phase data of a certain subwavelength modulation unit is 1.20π, the slot length of 0.27μm in the mapping library corresponds to a transmission phase of 1.18π and a transmission efficiency of 0.81, the slot length of 0.28μm corresponds to a transmission phase of 1.20π and a transmission efficiency of 0.84, and the slot length of 0.29μm corresponds to a transmission phase of 1.21π and a transmission efficiency of 0.80. Therefore, the slot length of 0.28μm is selected as the actual geometric parameter of this subwavelength modulation unit.

[0029] The determined geometric parameters are written into the layout to form a two-layer cascaded on-chip hyperwire half-adder structure. Then, three-dimensional or two-dimensional full-wave electromagnetic simulation methods are used to verify the four input states. For each input state, the corresponding input port is activated, the integrated light intensity of the four detection areas in the output plane is recorded, and the corresponding output results are compared item by item with the pre-established half-adder truth table. If all are consistent, it indicates that the device has realized the half-adder logic function.

[0030] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A two-layer metastructured on-chip optical half-adder based on spatial coding, characterized in that: The on-chip optical half-adder includes a cladding layer and a silicon light guide layer. The cladding layer includes an upper cladding layer and a lower cladding layer, and the silicon light guide layer is located between the upper cladding layer and the lower cladding layer. An encoding module, a first metaline modulation layer, a second metaline modulation layer, and a detection module are sequentially arranged in the silicon light guide layer according to the propagation direction of the input light. The encoding module is used to convert the input light into a spatial input light field according to a preset spatial encoding relationship; The first metaline modulation layer is used to apply a phase delay to the spatial input light field to form a first phase modulation light field; the first phase modulation light field propagates between the first metaline modulation layer and the second metaline modulation layer to form an interlayer diffraction light field. The second meta-line modulation layer is used to apply a secondary phase delay to the interlayer diffraction field to form a second phase-modulated field; The detection module is used to acquire the spatial intensity distribution of the second phase modulated light field within the detection area, and output the half-adder result based on the spatial intensity distribution.

2. The spatially encoded dual-layer meta-line on-chip optical half-adder according to claim 1, characterized in that: The upper cladding layer, the silicon light guide layer, and the lower cladding layer are arranged sequentially along the direction perpendicular to the propagation of the input light; The refractive index of the cladding layer is lower than that of the silicon light guide layer, which is used to restrict the transmission of input light in the silicon light guide layer along the direction of propagation of the input light.

3. The spatially encoded dual-layer meta-line on-chip optical half-adder according to claim 1, characterized in that: The encoding module includes two input port groups, each input port group includes two input ports, each input port group corresponds to a logical variable according to a preset spatial encoding relationship, and the two input ports correspond to different logical states of the logical variable according to the preset spatial encoding relationship. The encoding module selects the corresponding input port according to the input logic state and the preset spatial encoding relationship. The input light forms a spatial input light field representing different incident positions through the corresponding input port and enters the silicon light guide layer.

4. The spatially encoded dual-layer meta-line on-chip optical half-adder according to claim 1, characterized in that: The first and second metaline modulation layers are each composed of a number of subwavelength modulation units arranged perpendicular to the propagation direction of the input light. The subwavelength modulation units include a first subwavelength modulation unit and a second subwavelength modulation unit. Different subwavelength modulation units have different geometric parameters, and each geometric parameter corresponds to a different refractive index and propagation constant, which are used to apply a first phase delay and a second phase delay to the spatial input light field and the interlayer diffraction light field, respectively.

5. The spatially encoded dual-layer meta-line on-chip optical half-adder according to claim 1, characterized in that: The detection module includes two detection area groups, each detection area group includes two detection areas, each detection area group corresponds to a logical variable according to a preset spatial coding relationship, and the two detection areas correspond to different logical states of the logical variable according to the preset spatial coding relationship. The spatial intensity distribution of the second phase modulated light field in different detection areas is obtained, and the energy integral of the detection area is calculated based on the spatial intensity distribution. The logic state corresponding to the detection area with the larger energy integral in the same detection area group is taken as the logic state of the logic variable corresponding to the detection area group, and the logic state of the logic variable corresponding to the detection area group is taken as the output of the half-adder result.

6. A spatially encoded on-chip optical half-adder design method for a two-layer metaline based optical half-adder, applicable to the spatially encoded two-layer metaline on-chip optical half-adder as described in any one of claims 1-5, characterized in that: The design method includes: Step S1: Preset spatial coding relationship. The spatial coding relationship includes assigning two input port groups and two detection area groups to four logical variables respectively, assigning two input ports in each input port group to logical state 0 and logical state 1 of the logical variables respectively, and assigning two detection areas in each detection area group to logical state 0 and logical state 1 of the logical variables respectively. Step S2: Construct diffraction propagation operators according to the propagation direction of the input light and the propagation process between the encoding module, the first hyperline modulation layer, the second hyperline modulation layer, and the detection module, and construct a forward propagation model based on the diffraction propagation operators; input the input light data and the phase variable data of the first hyperline modulation layer and the second hyperline modulation layer into the forward propagation model to obtain the predicted output light field data; Step S3: Obtain the predicted spatial intensity distribution data based on the predicted output light field data; perform loss calculation on the predicted spatial intensity distribution data to obtain optimized loss data; calculate the gradient of the phase variable data based on the optimized loss data; and update the phase variable data using the Adam optimization algorithm to obtain the updated phase variable data. Step S4: Map the updated phase variable data to the geometric parameters of the subwavelength modulation unit according to the preset mapping library to obtain the actual geometric parameters. The actual geometric parameters are used to complete the design of the on-chip optical half-adder.

7. The design method for a two-layer meta-wire on-chip optical half-adder based on spatial coding according to claim 6, characterized in that: The phase variable data is used to represent the first and second phase delays applied to the spatial input light field and the interlayer diffraction light field; In the preset mapping library, the mapping relationship between phase variable data and geometric parameters includes: ; Where p represents the target geometric parameter, t(p) represents the transmission complex amplitude corresponding to the target geometric parameter p of the subwavelength modulation unit, |t(p)| represents the transmission amplitude corresponding to the target geometric parameter p of the subwavelength modulation unit, Φ(p) represents the phase variable data corresponding to the target geometric parameter p, and j is the imaginary unit; The geometric parameters include the wavelength of the input light, the thickness of the silicon light guide layer, the slot length and slot width of the subwavelength modulation unit, and the spacing between different subwavelength modulation units; when the values ​​of other geometric parameters besides the target geometric parameters are fixed, the target geometric parameters and the phase variable data satisfy the mapping relationship.