A multi-target adaptive scheduling system for high-concurrency tasks of a smart management platform

Abstract

The application discloses a kind of multi-target adaptive scheduling systems of high concurrent task of wisdom management platform, it is related to edge computing and industrial internet of things technical field, including: data access module concurrent message is shunted into core and non-core queue, and the operating parameter of gateway host chip is collected;Temperature rise prediction module is based on the parameter, and the temperature and temperature rise rate are calculated and predicted by discrete heat conduction time sequence equation;Modulation decision module dynamically solves the power supply modulation coefficient according to the predicted temperature and temperature rise rate through three working area segmentation function;Execution control module compresses the non-core queue scheduling frequency according to the coefficient, forces the clock cycle released to sleep state to physically cool down, and guarantees the independent operation of core queue.This application deeply couples the computing power scheduling and physical heat management, solves the technical problem of hardware protection lag under high concurrency, and guarantees the deterministic response of core key instruction.

Description

Technical Field

[0001] This invention relates to the fields of edge computing and industrial Internet of Things (IoT) technology, specifically to a multi-objective adaptive scheduling system for high-concurrency tasks in a smart management platform. Background Technology

[0002] With the deep integration of Industrial Internet of Things (IIoT) and edge computing technologies, intelligent management platforms need to process massive amounts of concurrent heterogeneous sensor data and control commands in real time. In industrial edge computing scenarios, systems often face a sharp contradiction between extremely high concurrent requests and limited underlying physical resources. Conventional scheduling systems are prone to overheating of equipment or severe response delays due to sudden surges in computing load when faced with sudden high-concurrency task flows, leading to a significant decrease in the overall stability and reliability of the system. This results in a severe disconnect between the simple software computing power scheduling logic and the capacity limits of the underlying physical hardware.

[0003] To address the contradiction between high-concurrency scheduling and resource constraints, existing industrial gateways typically rely on a combination of passive cooling and static priority queues to handle concurrent tasks. At the software level, systems often manage sudden traffic surges by reserving fixed computing power buffers or using strict static queuing rules. However, at the hardware and management level, since there is no feedback between the scheduling strategy and the chip's thermal state, the system usually relies solely on temperature sensors for threshold monitoring. This means that it can only passively trigger frequency reduction or reset actions to prevent hardware burnout after the measured chip temperature reaches the hardware protection threshold.

[0004] However, the solutions of the above-mentioned existing technologies still have the following problems in actual high-concurrency scenarios: First, the static resource scheduling of pure software cannot perceive the heat accumulation trend at the hardware level. When faced with high-frequency concurrent interruptions, it is easy to cause an imbalance between the continuous output of computing power and the ability to dissipate heat. Second, the hardware-level protection trigger has a serious lag. When the system is passively reduced in frequency, its response has already lagged behind the accumulation process of physical thermal inertia. Finally, this fragmented and lagging intervention mechanism can not achieve active heat dissipation for non-critical tasks, and will also cause a sudden drop in underlying computing power and task congestion, thus failing to guarantee the real-time performance of safety-critical tasks such as emergency stop instructions.

[0005] Therefore, the present invention provides a multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform. Summary of the Invention

[0006] The purpose of this invention is to provide a multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform, so as to solve the existing problems mentioned in the background art.

[0007] To achieve the above objectives, the present invention provides the following technical solution: a multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform, comprising: The data access module is used to receive heterogeneous messages from multiple concurrent interfaces in the industrial field. Based on the task type reflected by the hardware interrupt number or key flag bits in the protocol header carried by the message, the concurrent tasks are diverted to the core task queue and non-core task queue, and the current operating parameters of the gateway main control chip are collected. The temperature rise prediction module is used to calculate a set time window based on the current operating parameters using the heat dissipation conduction time series equation. Predicted temperature With the current rate of temperature rise ; Modulation decision module, used to base on the predicted temperature With the current rate of temperature rise The modulation coefficient of computing power supply is solved by a piecewise function in three working domains. ; The execution control module is used to supply modulation coefficients based on the computing power. The scheduling frequency of non-core task queues is compressed, the freed-up clock cycles are forced into a sleep state, and the actual measured temperature of the chip is continuously fed back to the temperature rise prediction module.

[0008] A further improvement of this invention is that the data access module receives multiple concurrent messages from the industrial site via a hardware interrupt triggering method. Based on the hardware interrupt number or key flag bits in the protocol header carried by the message, it assigns equipment emergency stop command messages and high-frequency status synchronization messages to the core task queue, and assigns historical data local persistence messages and periodic heartbeat packet messages to the non-core task queue. Messages that do not match known flag bits are assigned to the non-core task queue by default. The data access module simultaneously collects current CPU utilization, dynamic current changes, and ambient temperature. A one-dimensional set of operating parameters is generated and sent to the temperature rise prediction module.

[0009] A further improvement of this invention is that the temperature rise prediction module is configured to collect the current chip temperature of the gateway main control chip in real time. A moving average filter is applied to suppress sensor noise; the current CPU load rate is converted into instantaneous heat output. Then , and The predicted temperature is obtained by inputting it into the heat dissipation and conduction time equation, and is expressed as follows: Where β is the chip thermal resistance conversion coefficient, and γ is the thermal diffusion efficiency of the casing. To predict the time window; simultaneously, the temperature rise rate is calculated using the finite difference method, expressed as... Finally, the temperature will be predicted. With the current rate of temperature rise The output is sent to the modulation decision module.

[0010] A further improvement of this invention is that the calibrated values ​​of the chip thermal resistance conversion coefficient β and the casing thermal diffusion efficiency γ satisfy... Less than 1; The The value range is from 0.1s to 1s; when When the temperature rise prediction module monotonically increases for at least three consecutive sampling periods and the increase in each sampling period is not less than 5% of the chip's rated power consumption coefficient, the temperature rise prediction module will shorten Δt to 0.1s to capture thermal inertia accumulation in advance. When the ambient temperature When data acquisition fails, the temperature rise prediction module uses the conservative operating temperature preset in the firmware for calculation. The instantaneous heating power The rated power consumption coefficient is calculated by multiplying the current CPU load rate by the chip's rated power consumption coefficient, which is calibrated by full-load testing and fixed in the firmware before the device leaves the factory; the window length of the sliding mean filter is 3 to 10 sampling points.

[0011] A further improvement of the present invention is that the modulation decision module first reads a preset upper limit of safe temperature. With upper temperature protection limit The temperature rise rate configured from the temperature rise prediction module Apply lower bound truncation, while when Set to zero when less than zero; finally, and , Inter-domain comparison, solution based on the three-work-domain segmentation rule. And limited to The interval is then output to the execution control module.

[0012] A further improvement of this invention is that the three-working-domain segmentation rule is expressed as follows: When predicting temperature Less than the upper limit of safe temperature At that time, the computing power is supplied to the modulation coefficient. It equals 1.0; When predicting temperature Greater than or equal to the upper limit of safe temperature And less than the upper limit of temperature protection At that time, the computing power supply modulation coefficient is expressed as: ; When predicting temperature Greater than or equal to the upper limit of temperature protection At that time, the computing power is supplied to the modulation coefficient. Equal to 0; Where k1 and k2 are adjustment weights, and computing power is supplied to the modulation coefficients in the adaptive modulation domain. Regarding predicted temperature Monotonically decreasing and about Monotonically decreasing.

[0013] A further improvement of this invention is that the execution control module adjusts the actual scheduling frequency of the non-core task queue. Set as the reference scheduling frequency Modulation coefficient of computing power supply The product of these factors is used to supply modulation coefficients based on computing power within each baseline scheduling cycle. The proportion determines whether to execute or skip the current non-core task; During each skipped non-core task time slot, a sleep command is issued to the processor core, forcing the main control chip into a low-power sleep state for a duration equal to the nominal execution time of the skipped task. The core task queue is bound to the highest scheduling priority, and its scheduling path is modulated by the computing power supply coefficient. The action paths are independent of each other; finally, the actual measured temperature of the chip is continuously collected. and with The data is periodically fed back to the temperature rise prediction module.

[0014] A further improvement of this invention is that, when the non-core task is skipped, the execution control module sends a wait-for-interrupt instruction to the processor core, causing the main control chip to enter a sleep state for a duration consistent with the nominal execution time of the skipped task; and the computing power supply modulation coefficient... The condition for the adaptive modulation domain to recover to the safe execution domain is: the actual measured temperature of the chip. The temperature is below the upper limit of safety for at least 5 consecutive sampling periods. with hysteresis The difference, of which Not less than 3°C; When computing power supplies modulation coefficients When the value equals 0, the limit protection domain is released and the system re-enters the adaptive modulation domain, provided that the chip's measured temperature is zero. Drop below the upper limit of safe temperature The temperature gradient is greater than or equal to 5°C and remains stable. A further improvement of this invention is that the state transitions between the three working domains satisfy the following condition: the upgrade from the low-temperature domain to the high-temperature domain is determined by the predicted temperature. Real-time triggering requires that the degradation from the high-temperature domain to the low-temperature domain must pass the above-mentioned hysteresis verification conditions; it is not possible to directly jump back to the safe execution domain.

[0015] Compared with the prior art, the beneficial effects of the present invention are: 1. This invention first introduces a heat dissipation conduction timing equation, and combines it with chip operating parameters to calculate the predicted temperature and temperature rise rate after setting a time window in real time. Based on this, the computing power supply modulation coefficient is dynamically solved. This solves the technical problem that the passive frequency reduction hardware protection mechanism of existing industrial gateways is seriously lagging behind the accumulation of physical thermal inertia when dealing with high-concurrency tasks. It realizes the forward intervention of thermal management and computing power scheduling, and actively and adaptively converges the operating state of the gateway system within a safe physical thermal boundary without reserving static hardware resources.

[0016] 2. By dynamically compressing the scheduling frequency of non-core task queues based on the computing power supply modulation coefficient, the main control chip is forced into a sleep state during the skipped task time slots to physically block heat accumulation. At the same time, independent highest priority scheduling paths are configured for the core task queues. This solves the problem of dual-track imbalance of computing power and heat energy caused by non-critical task congestion under heterogeneous high-concurrency interruption. It achieves the ability to curb instantaneous heat generation while ensuring the deterministic response capability of core instructions such as emergency stop of equipment under extreme load conditions. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating the operation of a multi-objective adaptive scheduling system for high-concurrency tasks on an intelligent management platform according to the present invention. Detailed Implementation

[0018] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present invention, rather than limitations thereof. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0019] The term "and / or" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three cases: A exists alone, A and B exist simultaneously, and B exists alone.

[0020] Example 1 This embodiment addresses an industrial edge computing scenario in an automotive parts production line. In this scenario, an industrial IoT gateway is deployed in an automotive stamping workshop, responsible for connecting 12 field devices. Eight of these devices report status information such as stamping pressure, die temperature, and servo axis position via RS485 bus using the Modbus RTU protocol. The other four devices transmit emergency stop control commands and high-frequency position synchronization messages via CAN bus using the CANopen protocol. The gateway is installed in the electrical control cabinet. However, in high-concurrency scenarios where multiple devices simultaneously report data, the measured temperature of the gateway's main control chip can jump within tens of seconds. Without intervention, sustained high temperatures will lead to firmware malfunctions or even permanent chip damage.

[0021] Existing industrial gateways typically rely on a combination of passive cooling and static priority queues to handle concurrent tasks. However, this approach lacks feedback between the task scheduling strategy and the chip's thermal state. The scheduler cannot perceive the current heat accumulation trend and can only passively reduce the frequency or reset after the temperature triggers the hardware protection threshold. At this point, the response lags behind the accumulation process of thermal inertia, failing to guarantee the real-time performance of safety-critical tasks such as emergency stop commands, and also failing to achieve proactive heat dissipation for non-critical tasks. To address this, this invention introduces a collaborative modeling mechanism for computing power and thermal energy. By predicting temperature rather than detecting it, scheduling decisions are driven, shifting the intervention time for thermal management to before temperature anomalies occur.

[0022] The system described in this embodiment comprises four functional modules: a data access module, a temperature rise prediction module, a modulation decision module, and an execution control module. The specific workflow is as follows: Figure 1 As shown.

[0023] The data access module, as the system's information entry point, undertakes two types of parallel tasks: first, it receives multiple concurrent messages from the RS485 and CAN buses and distributes them to two independent queues according to the safety-critical attributes of the tasks; second, it synchronously collects the chip's operating status parameters to provide real-time input for subsequent temperature rise prediction. In industrial settings, delays in processing emergency stop commands can directly endanger personnel and equipment safety, while delays in tasks such as historical data archiving are acceptable within a small range. Therefore, in this embodiment, the distribution standard is based on the hardware interrupt number or protocol header flag carried by the message. When the gateway receives a CAN message that triggers a high-priority interrupt, the message is immediately assigned to the core task queue. Real-time status messages from the RS485 side carrying Modbus function codes 0x01 to 0x06 are also assigned to the core task queue. The remaining historical data writing messages and periodic heartbeat packets are assigned to the non-core task queue.

[0024] For packets whose header flags fail to match any known classification rules, the system conservatively categorizes them into non-core task queues to prevent abnormal packets from consuming core processing resources. Simultaneously with packet routing, the data access module collects CPU utilization data. Dynamic current change With ambient temperature Together, they form a one-dimensional set of operating parameters, which are transmitted to the temperature rise prediction module at fixed intervals.

[0025] After receiving the set of operating parameters, the temperature rise prediction module cannot determine the future thermal state based solely on the current instantaneous temperature sampling value. Waiting until the temperature exceeds the limit before triggering the protection mechanism will cause the response to lag behind the thermal inertia process. Therefore, a thermal shock window exists, meaning that at the instant the temperature crosses the threshold, a large amount of heat has already accumulated inside the chip package. Even if all calculation tasks are immediately stopped, the chip temperature will continue to rise by several degrees Celsius due to thermal inertia. Therefore, this embodiment introduces a heat dissipation conduction timing equation based on the current moment... Predicting future times using known parameters The chip temperature is monitored, thus prompting the protection action to be performed earlier.

[0026] The temperature rise prediction module first measures the current chip temperature. A moving average filter is applied to suppress sensor sampling noise, and then the filtered signal is... Instantaneous heat generation power calculated from CPU load rate and ambient temperature Substituting into the prediction equation, the first-order Euler discretization of the lumped heat capacity model during temperature prediction provides sufficient prediction accuracy under short prediction time windows (0.1s to 1s) and extremely low computational complexity, making it suitable for cycle-by-cycle execution in the real-time scheduling loop of embedded firmware. Therefore, the formula for predicting chip temperature is expressed as: in, For prediction time window The subsequent chip temperature prediction is in °C. The current measured temperature of the chip after filtering, in °C; The instantaneous heat generation power at the current moment is expressed in watts (W) and is calculated by multiplying the current CPU load rate by the chip's rated power consumption coefficient. The thermal resistance conversion factor of the chip is expressed in °C / (W·s), which reflects the contribution of unit heat generation power to the chip junction temperature per unit time. The thermal diffusion efficiency of the outer shell is expressed in seconds (s). -1 This reflects the rate attenuation of heat dissipation from the chip package to the environment. The prediction time window is in seconds.

[0027] The second term in the above formula Indicates time window The third item is the contribution of heat generated by CPU operations to the temperature rise. This represents the contribution of the chip to the temperature drop caused by heat dissipation from the package to the environment within the same time window; the difference between the two is... The net temperature change over time.

[0028] The temperature rise prediction module also calculates the current temperature rise rate using the finite difference method. The unit is °C / s. Finally, and It is then output to the modulation decision module.

[0029] Because only based on The method of determining scheduling intensity has limitations. When the chip temperature is close to the safe upper limit but the rate of temperature rise is low, the current computing power supply can be maintained appropriately. However, when the temperature is still within the safe range but the rate of temperature rise is already high, computing power should be reduced in advance to stop the accumulation of heat. Therefore, the modulation decision module also introduces... and Two dimensions, solving the computing power supply modulation coefficient through a piecewise function of three working domains. This enables scheduling decisions to possess both temperature-sensing and trend-sensing capabilities. The solution results are limited to... The interval is then output to the execution control module.

[0030] Execution control module based on The scheduling frequency of non-core task queues is linearly compressed, reducing the actual scheduling frequency of non-core task queues. Set as the reference scheduling frequency and The product of these factors dynamically determines the proportion of non-core tasks to skip in each scheduling cycle. Skipped task time slots are not consumed by idle time, but are forced into a low-power sleep state by issuing a wait interrupt instruction to the processor core. The duration of this sleep state is equal to the nominal execution time of the skipped task, thus directly converting the freed-up clock cycles into heat dissipation time and preventing the continuous accumulation of heat from the source.

[0031] The core task queue is bound to the highest scheduling priority, and its scheduling path is... The action paths are independent of each other, ensuring that safety-critical messages such as emergency stop commands can be processed in a short time under any thermal protection state. The execution control module continuously collects the measured temperature of the chip. and with The data is periodically fed back to the temperature rise prediction module.

[0032] Example 2 Based on the edge computing scenario of the automotive parts production line described in Embodiment 1, this embodiment discloses the method for obtaining the internal parameters of each module of the system, so that those skilled in the art can reproduce this solution on the same or similar hardware platform.

[0033] At the configuration level of the data access module, the interrupt service routine only performs integrity verification of the message frame and extracts the header flags. It pushes the parsing result along with the original data frame pointer into the circular buffer of the corresponding queue, without executing any business logic within the interrupt context. This ensures that the message reception latency is controlled within the hardware interrupt response time, thereby enabling the immediate retrieval of emergency stop commands with the highest real-time requirements. Both the core task queue and the non-core task queue use independent statically allocated memory areas, and they do not share any buffers or semaphores to avoid resource contention between queues. CPU utilization. It is obtained by reading the task run counter of the operating system kernel, with a sampling period of... Alignment; Dynamic current change Data was acquired via an onboard Hall current sensor with a sampling rate of 10Hz; ambient temperature... Provided by an NTC thermistor sensor installed on the inner wall of the electrical control cabinet, the measurement error does not exceed ±0.5°C.

[0034] Chip thermal resistance conversion coefficient in temperature rise prediction module Indicates the time window for prediction At the scale of [specific unit], the increase in chip junction temperature per unit time caused by each watt of heat dissipation is determined by referring to the junction-to-casing thermal resistance from the target chip's datasheet. The unit is °C / W. Divide by the prediction time window That is, get The calibration value, i.e. In this embodiment The magnitude of the value determines the sensitivity of the equation to temperature changes in CPU load; too small a value will result in a loss of sensitivity. This can make the prediction equation insensitive to sudden load increases, leading to delayed thermal warnings; excessively large... This will amplify the effect of sensor noise, causing frequent false triggering of modulation. Divide the thermal resistance from the datasheet by... The calibration method will Anchoring to the actual thermal characteristics of the chip is a simple method to obtain reliable initial values ​​directly on embedded platforms without the need for additional testing equipment.

[0035] Casing thermal diffusion efficiency The unit is s -1This represents the amount of temperature that can be dissipated per unit time for each degree Celsius temperature difference between the chip package and the environment. It is used to measure the system's heat dissipation capacity and is obtained through no-load thermal steady-state testing of the device. Specifically, this includes powering on the gateway but not performing any tasks (e.g., CPU load rate of approximately 3%). The chip was kept in a stable environment at 25°C until it reached thermal stability. In this embodiment, thermal stability is defined as a temperature fluctuation of no more than 0.2°C within 5 minutes, and the stable temperature was recorded. According to steady-state conditions Inverse solution obtained ,in This is an estimated value of the heating power under no-load conditions.

[0036] This determines the weight of the heat dissipation term in the prediction equation. When the temperature is too low, the equation will overestimate the actual temperature rise, resulting in overly conservative modulation and unnecessary compression of computing power; If the value is too high, the risk of temperature rise is underestimated. Calibration can be achieved directly using thermal balance data of the target device under real heat dissipation boundary conditions through an inverse kinematics method under no-load steady-state conditions. This does not require reliance on the geometric parameters of the heat dissipation structure. Furthermore, if the chip used by those skilled in the art... If the calculated result is not less than 1, then it should be appropriately reduced. Or re-verify The calibration value is set to ensure that the equation does not diverge during iterative operation.

[0037] Prediction Time Window This indicates that the temperature rise prediction module occurs every [time period]. Perform a prediction calculation and output a new result to the execution control module. ; When the time is too long, the system responds slowly to rapidly changing load scenarios, and the heat warning window widens; If the timeframe is too short, computational overhead increases and sensor noise exacerbates the interference with prediction accuracy. The early warning trigger condition is: when... It monotonically increases over at least three consecutive sampling periods, and within each sampling period When the increase is not less than 5% of the chip's rated power consumption coefficient, the system determines that it is currently in a high-concurrency load rapid ramp-up phase, and at this time, the power consumption is shortened. Thus, in the transition state where the load increases sharply, thermal inertia is not yet fully reflected in the instantaneous reading of the chip temperature, but the continuous increase in heat generation power constitutes a clear precursor to heat accumulation. Shortening the prediction window can increase the refresh frequency of temperature rise prediction by several times, so that the modulation decision can begin to gradually compress the frequency of non-core tasks before the temperature actually exceeds the limit.

[0038] When the ambient temperature sensor experiences a communication timeout or data anomaly, such as an NTC sensor disconnection causing the ADC readout to be at full scale, the temperature rise prediction module will use a conservative operating temperature preset in the firmware. Substitute into the equation. In this embodiment... The optimal value is a statistical upper limit higher than the actual ambient temperature of the workshop, because substituting an excessively high ambient temperature into the equation would increase the heat dissipation term. Reduce, thus The values ​​are higher than the actual values, so the equation's predictions tend to be conservative and will not underestimate the risk of temperature rise due to sensor failure.

[0039] Instantaneous heating power The conversion method is as follows: ,in The current CPU load rate, with a value range of [value range missing]. ; The rated power consumption coefficient of the chip is calibrated before the device leaves the factory through the following process: The gateway is placed in a constant temperature environment and a full-load synthetic test program is run continuously for 60 seconds. The product of the average supply current and supply voltage during this period is recorded, and the steady-state average value is taken as the rated power consumption coefficient. The calibration results are stored in the firmware parameter area and will not be modified throughout the device's entire lifecycle.

[0040] The optimal window length for moving average filtering is 5 sampling points. A window length that is too short cannot effectively suppress the inherent quantization noise of the NTC thermistor, while a window length that is too long, although providing better filtering, introduces group delay over multiple sampling periods. The readings systematically lag behind the actual temperature, and will underestimate the rate of temperature rise during the rapid temperature rise phase.

[0041] In the modulation decision module, simple linear proportional control cannot distinguish between two states: high temperature with a gradual trend and moderately rising temperature with a steep trend. For the former, the computing power should be moderately reduced based on temperature deviation; for the latter, the trend should be truncated early based on the temperature rise rate. Two independent adjustment weights are introduced. and The contributions corresponding to the two states mentioned above are respectively made The changes take into account both temperature deviation and trend. The boundary temperatures of the three working domains are the upper limits of the safe temperature range. With upper temperature protection limit In this embodiment Preferably, it is located in the middle region between the upper limit of the long-term reliable operating temperature of the chip and the upper limit of the normal operating temperature range. Below this temperature, the cumulative damage rate of the chip thermal stress to the solder joints and package bonding lines is extremely low, and no interference with the calculation force is required. Preferably below the chip's over-temperature protection hardware trigger point but above This preserves a sufficiently wide linear adjustment space for the adaptive modulation domain, while also... Order It can completely prevent the execution of non-core tasks. The system is writing... and Automatic verification during configuration If the conditions are not met, the write operation will be rejected and the original configuration will remain unchanged. and The temperature difference should not be less than 10°C to ensure that the modulation domain has a sufficient linear adjustment span and avoid... The narrow modulation interval can cause step jumps, leading to frequent oscillations in task scheduling.

[0042] The mathematical expression of the three-working-domain segmentation rule is as follows: in The dimensionless adjustment weight reflects the predicted temperature exceeding... The extent to which this contributes to the compression of computing power supply. Decided to be in from Rise to Throughout the entire process, only the temperature deviation term contributes. Decrease The choice of value means that even (The rate of temperature rise is zero, and the temperature remains constant at a certain high value), when achieve The temperature deviation term alone can As the value increases, the remaining value is determined by... The addition of terms or the cutoff from the amplitude limit to zero ensures a continuous transition at the upper boundary of the modulation domain. The unit is s / °C, reflecting the effect of the temperature rise rate on the lead suppression of the modulation coefficient. In this embodiment, it is preferably 0.05 s / °C. The reason for this selection is that, in actual measurements on this chip platform, the typical peak temperature rise rate under high concurrency scenarios is approximately 8°C / s. The selected value needs to be made The largest contribution is the residual value, and Item in The sum of the contributions at each time point is exactly equal to 1.0, ensuring that under the worst temperature acceleration conditions... It can smoothly reduce to zero without relying on amplitude limiting, achieving a stepless smooth transition between the adaptive modulation domain and the limit protection domain. The modulation decision module processes the input... Apply lower bound truncation: when The time is set to zero. The reason is that a negative temperature rise rate means the chip is dissipating heat and cooling down; if this is not stopped, The term will be negative, which will instead make A value exceeding 1.0 is physically meaningless and contradicts the direction of computing power compression.

[0043] The above formula is the frequency compression expression for the execution control module, where, The baseline scheduling frequency for the non-core task queue is 2Hz in this embodiment (i.e., scheduling a non-core task once every 0.5s), which means the rated processing rate when there is no risk of temperature rise. For the The actual modulation frequency, when Non-core tasks are executed only once every two baseline cycles, with the other cycle skipped. During the time slot of the skipped task, the execution control module issues a WFI (WaitForInterrupt) instruction to the processor core, causing the chip to enter a low-power sleep state. The sleep duration is equal to the nominal execution time of the skipped task. The core task queue is bound to the highest scheduling priority, which in this embodiment is the operating system's interrupt priority. Its scheduling path is completely independent of the scheduler kernel. The execution control module operates along the same path, and there is no resource contention between them. At the end of the cycle, the latest measured chip temperature will be collected. The data is sent back to the temperature rise prediction module as the initial input for the next round of prediction.

[0044] Hysteresis recovery mechanism The condition for recovering from the adaptive modulation domain to the safe execution domain is: the actual measured temperature of the chip. Below for at least 5 consecutive sampling periods Among them, the hysteresis value In this embodiment, 3°C is preferred. The reason for introducing hysteresis is that if the recovery threshold and the trigger threshold are the same, i.e., both are... When the chip temperature is When there are slight fluctuations nearby, The system repeatedly switches between version 1.0 and versions below 1.0, causing high-frequency oscillations in non-core task scheduling and creating uncertainty in data archiving progress. A 3°C hysteresis, combined with continuous verification over 5 cycles, effectively filters out false recovery caused by temperature fluctuations. The temperature has dropped to 0, meaning that when the limit protection domain is triggered, the conditions for releasing the protection and re-entering the adaptive modulation domain are more stringent: the actual measured temperature of the chip. It must be reduced to below Keep at at least 5°C and maintain stability. This means that all non-core tasks have been frozen. If they are restored under normal conditions, the backlog of non-core tasks will be released and executed all at once, triggering a new round of heat shock.

[0045] State transitions between the three working domains follow the principle of non-skipping downgrade, including: From the secure execution domain To the adaptive modulation domain The upgrade was made by The real-time value is triggered, once cross Instant entry into the modulation domain; transition from the adaptive modulation domain to the limit protection domain The same reason for the upgrade Real-time triggering. Reverse degradation must pass the aforementioned hysteresis verification conditions; it cannot jump directly from the limit protection domain back to the safe execution domain and skip the adaptive modulation domain. This asymmetric transfer rule ensures that the system undergoes a buffer modulation period during the cooling process, during which non-core tasks gradually resume execution at a controlled frequency, avoiding a secondary temperature rise caused by the concentrated release of accumulated tasks.

[0046] The threshold, weight, coefficient and other settings involved in the above embodiments can be set by default according to the present invention, or can be set by those skilled in the art according to actual needs.

[0047] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0048] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0049] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0050] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0051] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform, characterized in that: The system includes: The data access module is used to receive heterogeneous messages from multiple concurrent interfaces in the industrial field. Based on the task type reflected by the hardware interrupt number or key flag bits in the protocol header carried by the message, the concurrent tasks are diverted to the core task queue and non-core task queue, and the current operating parameters of the gateway main control chip are collected. The temperature rise prediction module is used to calculate a set time window based on the current operating parameters using the heat dissipation conduction time series equation. Predicted temperature With the current rate of temperature rise ; Modulation decision module, used to base on the predicted temperature With the current rate of temperature rise The modulation coefficient of computing power supply is solved by a piecewise function in three working domains. ; The execution control module is used to supply modulation coefficients based on the computing power. The scheduling frequency of non-core task queues is compressed, the freed-up clock cycles are forced into a sleep state, and the actual measured temperature of the chip is continuously fed back to the temperature rise prediction module.

2. The multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 1, characterized in that: The data access module receives multiple concurrent messages from the industrial site via hardware interrupt triggering. Based on the hardware interrupt number or key flag bits in the protocol header carried by the message, it assigns emergency stop command messages and high-frequency status synchronization messages to the core task queue, and historical data local persistence messages and periodic heartbeat packets to the non-core task queue. Messages that do not match known flag bits are assigned to the non-core task queue by default. The data access module also collects current CPU utilization, dynamic current changes, and ambient temperature. A one-dimensional set of operating parameters is generated and sent to the temperature rise prediction module.

3. The multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 2, characterized in that: The temperature rise prediction module is configured to collect the current chip temperature of the gateway's main control chip in real time. A moving average filter is applied to suppress sensor noise; the current CPU load rate is converted into instantaneous heat output. Then , and The predicted temperature is obtained by inputting it into the heat dissipation and conduction time equation, and is expressed as follows: Where β is the chip thermal resistance conversion coefficient, and γ is the thermal diffusion efficiency of the casing. To predict the time window; simultaneously, the temperature rise rate is calculated using the finite difference method, expressed as... Finally, the temperature will be predicted. With the current rate of temperature rise The output is sent to the modulation decision module.

4. The multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 3, characterized in that: The calibrated values ​​of the chip thermal resistance conversion coefficient β and the casing thermal diffusion efficiency γ satisfy... Less than 1; The The value range is from 0.1s to 1s; when When the temperature rise prediction module monotonically increases for at least three consecutive sampling periods and the increase in each sampling period is not less than 5% of the chip's rated power consumption coefficient, the temperature rise prediction module will shorten Δt to 0.1s to capture thermal inertia accumulation in advance. When the ambient temperature When data acquisition fails, the temperature rise prediction module uses the conservative operating temperature preset in the firmware for calculation. The instantaneous heating power The rated power consumption coefficient is calculated by multiplying the current CPU load rate by the chip's rated power consumption coefficient, which is calibrated by full-load testing and fixed in the firmware before the device leaves the factory; the window length of the sliding mean filter is 3 to 10 sampling points.

5. The multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 4, characterized in that: The modulation decision module first reads the preset safe temperature upper limit. With upper temperature protection limit The temperature rise rate configured from the temperature rise prediction module Apply lower bound truncation, while when Set to zero when less than zero; finally, and , Inter-domain comparison, solution based on the three-work-domain segmentation rule. And limited to The interval is then output to the execution control module.

6. The multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 5, characterized in that: The three-work-domain segmentation rule is expressed as follows: When predicting temperature Less than the upper limit of safe temperature At that time, the computing power is supplied to the modulation coefficient. It equals 1.0; When predicting temperature Greater than or equal to the upper limit of safe temperature And less than the upper limit of temperature protection At that time, the computing power supply modulation coefficient is expressed as: ; When predicting temperature Greater than or equal to the upper limit of temperature protection At that time, the computing power is supplied to the modulation coefficient. Equal to 0; Where k1 and k2 are adjustment weights, and computing power is supplied to the modulation coefficients in the adaptive modulation domain. Regarding predicted temperature Monotonically decreasing and about Monotonically decreasing.

7. The multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 5, characterized in that: The execution control module will schedule the actual frequency of non-core task queues. Set as the reference scheduling frequency Modulation coefficient of computing power supply The product of these factors is used to supply modulation coefficients based on computing power within each baseline scheduling cycle. The proportion determines whether to execute or skip the current non-core task; During each skipped non-core task time slot, a sleep command is issued to the processor core, forcing the main control chip into a low-power sleep state for a duration equal to the nominal execution time of the skipped task. The core task queue is bound to the highest scheduling priority, and its scheduling path is modulated by the computing power supply coefficient. The action paths are independent of each other; finally, the actual measured temperature of the chip is continuously collected. and with The data is periodically fed back to the temperature rise prediction module.

8. The multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 7, characterized in that: When a non-core task is skipped, the execution control module sends an interrupt waiting instruction to the processor core, causing the main control chip to enter a sleep state for a duration consistent with the nominal execution time of the skipped task; and the computing power supply modulation coefficient The condition for the adaptive modulation domain to recover to the safe execution domain is: the actual measured temperature of the chip. The temperature is below the upper limit of safety for at least 5 consecutive sampling periods. with hysteresis The difference, of which Not less than 3°C; When computing power supplies modulation coefficients When the value equals 0, the limit protection domain is released and the system re-enters the adaptive modulation domain, provided that the chip's measured temperature is zero. Drop below the upper limit of safe temperature The temperature gradient is greater than or equal to 5°C and remains stable.

9. A multi-objective adaptive scheduling system for high-concurrency tasks in an intelligent management platform according to claim 8, characterized in that: The state transitions between the three working domains satisfy the following condition: the upgrade from the low-temperature domain to the high-temperature domain is determined by the predicted temperature. Real-time triggering requires that the degradation from the high-temperature domain to the low-temperature domain must pass the above-mentioned hysteresis verification conditions; it is not possible to directly jump back to the safe execution domain.

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