An edge inference task space-time joint optimization scheduling method and system
Patent Information
- Application Number
- CN202611485505.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-09-23
- Publication Date
- 2026-10-27
AI Technical Summary
[0003]然而,现有端云协同推理调度方法大多仅针对深度神经网络计算任务进行静态划分,主要关注各计算节点的边缘执行位置或云端执行位置,未充分考虑边缘设备神经处理单元工作频率可动态调节的特点,难以结合时变任务负载和网络状态对计算频率及任务执行位置进行联合优化
本发明通过引入量纲对齐的李雅普诺夫优化框架,首次从数学上弥合了物理能耗与虚拟队列之间的量纲鸿沟,为能耗与延迟的长期权衡提供了理论上界,并保证了在无需任何未来先验知识下的渐近最优性。
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Figure CN122985361A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of edge computing and task scheduling, specifically to a spatiotemporal joint optimization scheduling method and system for edge inference tasks. Background Technology
[0002] With the development of artificial intelligence and edge computing technologies, deep neural networks are increasingly being deployed on resource-constrained edge devices such as drones and smart cameras for real-time inference of computational tasks. Since edge devices have limited computing resources and energy capacity, while deep neural network inference tasks typically have high computational demands and real-time requirements, an edge-cloud collaborative approach can be adopted. This involves deploying some deep neural network computing nodes on edge devices and offloading others to the cloud, thus coordinating computational latency and edge device energy consumption.
[0003] However, most existing edge-cloud collaborative inference scheduling methods only perform static partitioning for deep neural network computing tasks, focusing primarily on the edge or cloud execution locations of each computing node. They fail to fully consider the dynamically adjustable operating frequency of neural processing units on edge devices, making it difficult to jointly optimize computing frequency and task execution location by combining time-varying task load and network state. Furthermore, some dynamic scheduling methods based on deep reinforcement learning rely on online training or continuous interaction, exhibiting adaptation lag and additional computational overhead when network bandwidth, round-trip latency, and other conditions change abruptly, making it difficult to meet the low-latency, low-power inference requirements of edge devices such as drones and smart cameras. In addition, existing scheduling methods based on long-term optimization may suffer from significant numerical scale differences between different optimization terms when jointly considering device energy consumption and computational latency, leading to unstable trade-offs between objectives during optimization and affecting actual scheduling performance. Summary of the Invention
[0004] To address the shortcomings of existing technologies, the present invention aims to provide a spatiotemporal joint optimization scheduling method and system for edge inference tasks.
[0005] To achieve the above objectives, the present invention adopts the following technical solution: Firstly, a spatiotemporal joint optimization scheduling method for edge inference tasks is provided, including: Obtain the computing tasks to be processed from the edge device; determine the deep neural network to perform the computing tasks to be processed; The deep neural network is converted into a directed acyclic graph, and the task attribute information of each node in the directed acyclic graph is obtained based on the specific information of the deep neural network. Obtain network status information, and calculate the overall computing latency and total power consumption of edge devices in the current time slot based on the task attribute information and the network status information; A virtual delay queue is established based on the overall computational delay. A drift plus penalty optimization objective is constructed based on the virtual delay queue, the total energy consumption of the edge device, and a pre-determined dimensional alignment operator. The dimensional alignment operator is used to adjust the numerical scale of the total energy consumption of the edge device so that the total energy consumption of the edge device and the virtual delay queue participate in the optimization together. The drift-penalty optimization objective is decoupled in both the temporal and spatial domains to obtain a spatiotemporal joint scheduling scheme. Based on the spatiotemporal joint scheduling scheme, the execution position of each node in the deep neural network and the target operating frequency of the edge device are determined to execute the computational task to be processed.
[0006] Secondly, a spatiotemporal joint optimization scheduling system for edge inference tasks is provided, including: The task acquisition module is configured to: acquire the computing tasks to be processed by the edge device; and determine the deep neural network to execute the computing tasks to be processed. The graph conversion module is configured to: convert the deep neural network into a directed acyclic graph, and obtain the task attribute information of each node in the directed acyclic graph based on the specific information of the deep neural network; The state calculation module is configured to: acquire network state information, and calculate the overall computing latency and total power consumption of the edge device in the current time slot based on the task attribute information and the network state information; The optimization module is configured to: establish a virtual delay queue based on the overall computational delay; construct a drift plus penalty optimization target based on the virtual delay queue, the total energy consumption of the edge device, and a pre-determined dimensional alignment operator; the dimensional alignment operator is used to adjust the numerical scale of the total energy consumption of the edge device so that the total energy consumption of the edge device and the virtual delay queue participate in the optimization together. The scheduling decision module is configured to: perform spatiotemporal dual-domain decoupling on the drift plus penalty optimization objective to obtain a spatiotemporal joint scheduling scheme, and determine the execution position of each node in the deep neural network and the target operating frequency of the edge device according to the spatiotemporal joint scheduling scheme, so as to execute the computation task to be processed.
[0007] Thirdly, an electronic device is also provided, comprising: Memory is used to store computer-readable instructions in a non-transitory manner. Processor, for executing the computer-readable instructions, When the computer-readable instructions are executed by the processor, they perform the method described in the first aspect above.
[0008] Fourthly, a computer-readable storage medium is provided having a program stored thereon that, when executed by a processor, implements the method described in the first aspect above.
[0009] Fifthly, a computer program product is provided, employing the following technical solution: A computer program product includes software code, wherein a program in the software code performs the steps of the method described in the first aspect of the present invention.
[0010] The above technical solution has the following advantages or beneficial effects: This invention, by introducing a dimensionally aligned Lyapunov optimization framework, mathematically bridges the dimensional gap between physical energy consumption and virtual queues for the first time, providing a theoretical bound for the long-term trade-off between energy consumption and latency, and guaranteeing asymptotic optimality without requiring any future prior knowledge.
[0011] Compared to integer linear programming solvers with exponential complexity, this invention reduces decision complexity to sublinear through spatiotemporal decoupling, significantly reducing decision overhead and achieving microsecond-level deterministic scheduling, thus freeing up edge computing resources.
[0012] This invention introduces a virtual delay queue closed-loop feedback and a Lyapunov optimization framework with dimensional alignment. Within each time slot, it jointly optimizes frequency adjustment and spatial offloading decisions, enabling the computing frequency of edge devices to dynamically adapt to queue backlog and network bandwidth. Simultaneously, the offloading strategy responds synchronously, achieving joint frequency-location spatiotemporal optimization in time-varying environments. This mechanism avoids resource waste caused by static partitioning and eliminates reliance on online training or prior statistical information, significantly improving overall scheduling performance in dynamic scenarios.
[0013] This invention takes into account the slew rate limitation of the neural processing unit frequency of edge devices, so that the theoretically optimal solution can be smoothly deployed on the physical hardware of real edge devices, avoiding voltage overshoot and power consumption shock caused by drastic frequency jumps, and has great engineering application value. Attached Figure Description
[0014] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.
[0015] Figure 1 This is a flowchart of the spatiotemporal joint optimization scheduling method for edge inference tasks in a specific embodiment of the present invention; Figure 2 This is an example diagram of edge-cloud dual-track topology reconstruction in the method of the present invention, wherein (a) is the directed acyclic graph of the original deep neural network. (b) is the directed acyclic graph after the dual-track topology reconstruction of the edge-cloud. ; Figure 3This is a comparison of the transient latency and energy consumption performance of the method of this invention and the deep reinforcement learning method under sudden network fluctuations. Figure 4 This is a comparison chart of the latency, energy consumption, and decision-making time overhead of the method of this invention and the exhaustive method under network fluctuations. Detailed Implementation
[0016] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.
[0017] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments of the invention. The terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0018] In this embodiment of the invention, "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of this invention, "multiple" refers to two or more.
[0019] Furthermore, to facilitate a clear description of the technical solutions of the embodiments of the present invention, the terms "first" and "second" are used in the embodiments of the present invention to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.
[0020] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.
[0021] All data acquisition in this embodiment is carried out in accordance with laws and regulations and with user consent, and the data is used legally.
[0022] Terminology Explanation: Edge-cloud collaborative inference: a distributed computing paradigm that divides the computation graph of a deep neural network (DNN) into two parts, which are executed on resource-constrained edge devices and on the computing-powerful cloud, respectively. Directed Acyclic Graph (DAG): A mathematical model used to abstractly represent the structure of deep neural networks. Nodes in the graph represent computational layers (such as convolutional layers and fully connected layers), and directed edges represent the flow dependencies of data (feature maps). Dynamic Voltage and Frequency Scaling (DVFS): A technique that dynamically adjusts the chip's operating voltage and frequency based on real-time load to balance computing performance and power consumption. Dimensional gap: refers to the huge difference in numerical scale between physical energy consumption (joule level) and virtual queue penalty term (millisecond squared level) in the joint optimization objective function, which causes traditional algorithms to fail; Virtual delay queue: A mathematical tool used to guarantee long-term delay constraints. It does not store actual data packets, but instead "accounts" the deviation between the current delay and the target delay; its stability is equivalent to satisfying long-term delay constraints.
[0023] Example 1 like Figure 1 As shown, this embodiment provides a spatiotemporal joint optimization scheduling method for edge inference tasks, including: S101: Obtain the computing task to be processed by the edge device; determine the deep neural network to perform the computing task to be processed; S102: Convert the deep neural network into a directed acyclic graph, and obtain the task attribute information of each node in the directed acyclic graph based on the specific information of the deep neural network; S103: Obtain network status information, and calculate the overall computing latency and total power consumption of edge devices in the current time slot based on the task attribute information and the network status information; S104: Establish a virtual delay queue based on the overall computational delay, and construct a drift plus penalty optimization objective based on the virtual delay queue, the total energy consumption of the edge device, and a pre-determined dimensional alignment operator. The dimensional alignment operator is used to adjust the numerical scale of the total energy consumption of the edge device so that the total energy consumption of the edge device and the virtual delay queue participate in the optimization together. S105: Decouple the drift-penalty optimization objective in both the temporal and spatial domains to obtain a spatiotemporal joint scheduling scheme, and determine the execution position of each node in the deep neural network and the target operating frequency of the edge device according to the spatiotemporal joint scheduling scheme, so as to execute the computation task to be processed.
[0024] Step S101 is as follows: The system acquires the computational tasks to be processed from the edge device and determines the deep neural network to perform these tasks. Deep neural networks include, but are not limited to, ResNet-50 and MobileNet models. Those skilled in the art select the appropriate deep neural network model based on the specific computational tasks required for the application scenario.
[0025] Edge devices refer to terminal devices deployed at the data source end that have limited computing and communication capabilities, and they include at least the following components: Computing units: include general-purpose processors (CPUs) and dedicated artificial intelligence accelerators; Communication unit: includes a wireless communication module for data interaction with a remote cloud via cellular network (4G / 5G) or Wi-Fi; Storage unit: includes volatile memory and non-volatile memory, used to store deep neural network model parameters, data to be processed, intermediate computation feature maps, and queue state information and control parameters required for the scheduling algorithm to run; Power supply unit: Includes a battery or external power interface to provide operating power to edge devices.
[0026] Edge devices have upper limits on their computing resources (including CPU computing power, NPU / GPU computing power, and memory capacity), communication resources (including uplink / downlink bandwidth and transmission power), and energy resources (including battery capacity and power supply). These resource-constrained characteristics constitute the prerequisite for the technical problem to be solved by this invention.
[0027] Edge devices connect to the cloud via wireless networks, forming an edge-cloud collaborative inference architecture. Some computational layers in deep neural network inference tasks are executed locally on the edge devices, while the remaining computational layers are offloaded to the cloud for execution.
[0028] This embodiment can be applied to road monitoring scenarios, including a smart road monitoring camera as an edge device and the cloud. In this application scenario, the deep neural network inference task has strict end-to-end latency constraints, and the computing resources in the road monitoring camera as an edge device are limited.
[0029] The task performed by smart road monitoring cameras is to classify and identify real-time road images, such as cars, pedestrians, and license plates. Deep neural networks, such as Tiny-YOLOv3, LPRNet, or ResNet-50, can be pre-loaded into the smart road monitoring camera.
[0030] Step S102 is as follows: like Figure 2 As shown, the deep neural network structure to be executed is abstracted as a directed acyclic graph: ; in, Let E be the set of nodes and E be the set of edges; nodes Represents a computational layer in a deep neural network (such as a convolutional layer, fully connected layer, pooling layer, activation layer, etc.); edge Represents data dependencies, nodes We must wait for all predecessor nodes Execution can only begin after the calculation is completed and its output data is received.
[0031] The task attribute information for each node includes the computational workload required to process that node. The amount of output data generated after this node completes execution. Space unloading decision Frequency regulation decision .
[0032] In this embodiment, each node It has two inherent properties: the amount of computational work required to process this node. and the amount of output data generated after the node is executed. (That is, the size of the feature map to be passed to downstream nodes), can be obtained through offline performance analysis of deep neural networks. It is usually expressed in terms of CPU cycles.
[0033] In this embodiment, the deep neural network allows for parallel branching.
[0034] The system composed of edge devices and the cloud in discrete time slots Running on top of this, each time slot corresponds to processing one deep neural network inference task. In each time slot For each node in a directed acyclic graph Make a joint decision: Space unloading decision Where 0 indicates execution on the edge device locally, and 1 indicates execution offloaded to the cloud.
[0035] Frequency adjustment decision This decision is made only at the node. When executed locally on the edge device ( The activation of this function indicates that the Neural Processing Unit (NPU) on the edge device is the processing node. The allocated core frequency is a continuous variable, constrained by the physical specifications of the edge device hardware. ,in and These represent the minimum and maximum acceptable operating frequencies for edge devices, respectively.
[0036] Step S103 is as follows: S103.1: Obtain current network status information. Network status information includes available wireless bandwidth, network round-trip time, and cloud processing nodes. The random computation delay can be obtained in real time using network measurement tools.
[0037] In each time slot The system state is determined by a random vector. Description, in which It is available wireless bandwidth. It is network round-trip latency. It is a cloud processing node The random computation delay is considered in this embodiment as a bounded random process (upper bound). (This can be obtained through offline stress testing). Furthermore, this embodiment does not require any network environment prediction model; the algorithm directly utilizes the current system state. Make decisions.
[0038] S103.2: Calculate the overall computational latency and total power consumption of edge devices for the current time slot based on task attribute information and network status information.
[0039] Calculate data transmission rate, node In the time slot Data transmission rate for: ; in, , Indicates the transmit power of the edge device. This represents the channel power gain (determined by path loss, shadowing, and multipath). Indicates noise power.
[0040] The overall computing latency of edge devices and the cloud consists of two parts: computing latency and communication latency. Due to the parallelism of directed acyclic graphs, the overall latency depends on the latency of the critical path, which is the path with the longest total execution latency from input to output.
[0041] Node computation latency: Node In the time slot The computation delay is: ; in, This is due to cloud computing latency.
[0042] Side communication delay: In the time slot The communication delay is: ; in, and For the same space, the decision to unload at the node and The value on, and Just node indexes. Absolute value. Used to determine nodes and Whether it is located at the edge and in the cloud respectively, thus determining the edge ( i , j Does it generate cross-device communication overhead?
[0043] Overall computational latency: Due to the existence of parallel branches in a directed acyclic graph, the overall computational latency is not a simple sum of the latencies of each node. Instead, it is calculated by taking the maximum sum of the node computational latency and edge communication latency of all possible paths from the source node to the sink node, and using this maximum value as the overall computational latency. .
[0044] Regarding energy consumption, this embodiment only considers the energy consumption of edge devices. The total energy consumption of edge devices includes computing energy consumption and communication energy consumption. Computing energy consumption includes local computing energy consumption and idle standby energy consumption.
[0045] Edge device local execution node The local computing power consumed is: ; in, This is a chip constant.
[0046] If node When offloading to the cloud, edge devices cannot be completely shut down during this period (they need to wait for the data to be transmitted back). Their idle standby power consumption is: ; in, This refers to standby power.
[0047] Assume the data transmission power of the edge device is constant. (Unit: Watt), then the side The resulting communication energy consumption is: ; In this embodiment, receiving energy consumption (which is usually much smaller than sending energy consumption) and retransmission overhead are ignored. The latter can be absorbed by the link layer retransmission mechanism and does not affect the scheduling layer decision.
[0048] The total energy consumption of a single-timeslot edge device is expressed as the sum of the edge device's local computing energy consumption, idle standby energy consumption, and communication energy consumption within a single timeslot:
[0049] The goal of dynamic scheduling is to ensure long-term time-averaged inference latency constraints while minimizing the long-term time-averaged energy consumption of edge devices without requiring any knowledge of future network or task load. In other words, it aims to minimize the energy consumption of edge devices under long-term time-averaged constraints. ):
[0050] in, This indicates the expected value after randomly selecting T times; This represents a pre-set average latency constraint, which can be set by those skilled in the art based on the actual edge inference task. In this embodiment, it is specifically set to 400ms.
[0051] Step S104 transforms the long-run stochastic optimization problem into a deterministic decision problem for each time slot, specifically as follows: S104.1: Establish a virtual delay queue based on the overall computational delay.
[0052] To ensure long-term average delay constraints Define a virtual delay queue Its dynamic evolution equation is: ; The queue records historical delay deviations. According to Lyapunov stability theory, it guarantees... The stability is equivalent to satisfying the original time-averaged delay constraint.
[0053] S104.2: Construct a drift plus penalty optimization objective based on the virtual delay queue, the total power consumption of edge devices, and a pre-determined dimensional alignment operator.
[0054] Define the Lyapunov function: ; Single-step conditional drift of Lyapunov functions: ; in, Represents a known random variable Given that it has already happened, random variables The statistical expectation.
[0055] Standard Lyapunov optimization minimizes "drift plus penalty" However, a "dimensional gap" exists. To address this issue, this embodiment introduces a dimensional alignment operator. This scales the physical energy consumption term to a metric space that matches the queue penalty term.
[0056] Through mathematical derivation, the original infinite-period stochastic optimization problem... Transformed into each time slot The problem of determinism : ; Represents each time slot The deterministic subproblem, i.e., minimizing Make decisions under the premise of For time slots The cost of all nodes, This is the set of unloading decisions made by each node at this time. This is for determining the operating frequency of edge devices at this time. For Lyapunov control parameters, For dimensional alignment operators, This represents the total power consumption of edge devices. For virtual delay queues, This is for the overall computational delay.
[0057] This transformation completely frees decision-making from dependence on future channel conditions and mission arrival statistics.
[0058] In this embodiment, the dimension alignment operator It is a positive scalar coefficient acting on the energy consumption term, functioning as a numerical scale converter rather than a physical unit converter. This is because computer numerical optimization only concerns itself with the relative magnitude of quantities. Its function is to scale the physical energy consumption value at the joule level to the same magnitude as the queue penalty term at the millisecond square level, thereby ensuring that the gradient information of the two terms in mathematical optimization can be effectively captured.
[0059] In real-world edge computing scenarios (such as a smart road monitoring camera running at 30fps): Total power consumption of a single frame from an edge device Usually in Between (full load) Joules; In the resulting queue delay penalty, queue backlog is typically... The delay is approximately Its product is on the order of magnitude of 100. The numerical scale difference between the two is as high as [missing information]. Times. If no dimension alignment operator is added. ,but The item will be in the total cost In this case, the control parameters hold absolute dominance. How to adjust the power consumption of edge devices? All contributions will be completely "submerged", causing the algorithm to degenerate into a pure queue stability controller, completely losing its energy-saving ability of dynamic voltage and frequency regulation.
[0060] Dimensional alignment operator Specifically, the parameters are determined offline using a strategy of "refined parameter scanning under physical boundary constraints": First, fix for , It is a constant value; it should be noted that here... There is no need to specify a particular numerical value; it serves as a dimensional alignment operator for computation. The transition parameters are only used to assist in delineation. The valid solution interval. Once the value is fixed, find the legal existence range determined based on the hardware physical specifications:
[0061] in, For Lyapunov theory stability boundaries, they typically satisfy... (This can be provided by drift analysis); This is the average latency threshold required by the application.
[0062] Secondly, within the aforementioned legal range, a theoretical reference value is first calculated based on the worst-case operating condition (i.e., the lowest energy efficiency). : ; in, For all nodes at the highest frequency The maximum theoretical energy consumption per frame during runtime.
[0063] Finally, based on the theoretical reference value calculated under the worst-case scenario... Usually conservative, so further in A refined search is performed within the neighborhood. Specifically, using Centered on the data, extend two powers of 10 to the left and right (×10² and ÷10²) to form candidate sub-intervals. Then, perform parameter sweeping within these candidate sub-intervals to verify the results, selecting the optimal engineering value that balances stability and energy efficiency for the current hardware platform. .
[0064] In the aforementioned application scenario where the road monitoring smart camera operates at 30fps, this embodiment uses parameter scanning... In-interval verification, and finally selection This represents the optimal engineering constant that balances stability and energy efficiency under the current hardware platform.
[0065] Step S105 is as follows: Drift plus penalty optimization target This is a mixed-integer nonlinear programming problem. This embodiment proposes a spatiotemporal dual-domain decoupling strategy, which decomposes it into an analytical solution in the continuous domain and a graph search problem in the discrete domain, achieving a low-complexity global optimal decision.
[0066] S105.1: Optimize target by adding penalty to drift Perform time-domain decoupling.
[0067] For any node determined to execute locally Its cost function It is strictly convex. By taking the derivative and setting it to zero, the closed-form solution for the global optimal frequency can be directly derived: ; The solution is hierarchical independent: the optimal frequency is only related to the virtual delay queue. backlog and control parameters It is related to the workload of specific deep neural network nodes. Irrelevant.
[0068] To accommodate the physical limitations (frequency slew rate) of neural processing unit hardware in real-world edge devices, a frequency smoothing constraint is added: ; in, This represents the maximum frequency variation step size for a single time slot.
[0069] S105.2: Optimize target by adding penalty to drift Perform spatial domain decoupling.
[0070] The obtained Substituting as a known constant The mixed-integer programming problem with drift penalty optimization objective degenerates into a constrained shortest path problem, which is solved in this embodiment through the following steps: Edge-Cloud Dual-Track Topology Reconstruction: Reconstructing the Directed Acyclic Graph of the Original Deep Neural Network Reconstruct into a new directed acyclic graph The specific operations for edge-cloud dual-track topology reconstruction are as follows: Figure 2 As shown.
[0071] node Includes virtual starting point Virtual endpoint and the execution state nodes at the edge of each layer. and execution status nodes in the cloud .
[0072] side Weights: Define weighted directed edges for each execution path.
[0073] Edge device local computing edge Weight .
[0074] Cloud computing edge Weight (Cloud energy consumption is recorded as zero).
[0075] Communication offloading edge Weight .
[0076] S105.3: Solve to obtain the spatiotemporal joint scheduling scheme.
[0077] After the reconstruction in S105.1-S105.2 above, the optimal solution partitioning for the drift-penalty optimization objective is equivalent to partitioning the non-negative weighted directed graph. Searching for from arrive The shortest path. This embodiment uses Dijkstra's algorithm to solve the problem, and uses a priority queue for relaxation operations to obtain the execution position of each node in the deep neural network and the target operating frequency of the edge device. The time complexity of Dijkstra's algorithm is O(n log n). ,in The number of layers in the deep neural network represents sublinear complexity.
[0078] Within a single time slot, the overall execution process is as follows: Get the virtual delay queue for the current time slot Available wireless bandwidth Frequency adjustment decision of the previous time slot ; Calculate the optimal frequency adjustment decision based on the closed-form solution formula. The optimal frequency adjustment decision for the current time slot is obtained by applying a slew rate constraint for smoothing. ;based on , , And node task attributes, traverse the reconstructed edge-cloud dual-track graph Calculate the weight of each edge. Starting from a virtual point of view Using the source point, for the graph Run Dijkstra's algorithm to find the starting point from the virtual origin. To the virtual endpoint Find the shortest path; backtrack the shortest path to obtain the optimal unloading decision for each layer. ,in It is a set containing all node space unloading decisions; according to and Perform the inference task in the current time slot; observe the actual overall computational delay. And update the virtual delay queue for use in the next time slot.
[0079] The transient latency performance of the proposed method compared with that of Deep Reinforcement Learning (DRL) methods under sudden network fluctuations is as follows: Figure 3 As shown, the hysteresis-free characteristics of the present invention are demonstrated.
[0080] The method proposed in this invention compares the single-step decision cost of Integer Linear Programming (ILP) with that of different DNN models, for example... Figure 4 As shown, this invention is specifically compared with the exhaustive algorithm in integer linear programming to demonstrate its ultra-low complexity while achieving near-optimal solutions.
[0081] Example 2 This embodiment provides a spatiotemporal joint optimization scheduling system for edge inference tasks, including: The task acquisition module is configured to: acquire the computing tasks to be processed by the edge device; and determine the deep neural network to execute the computing tasks to be processed. The graph conversion module is configured to: convert the deep neural network into a directed acyclic graph, and obtain the task attribute information of each node in the directed acyclic graph based on the specific information of the deep neural network; The state calculation module is configured to: acquire network state information, and calculate the overall computing latency and total power consumption of the edge device in the current time slot based on the task attribute information and the network state information; The optimization module is configured to: establish a virtual delay queue based on the overall computational delay; construct a drift plus penalty optimization target based on the virtual delay queue, the total energy consumption of the edge device, and a pre-determined dimensional alignment operator; the dimensional alignment operator is used to adjust the numerical scale of the total energy consumption of the edge device so that the total energy consumption of the edge device and the virtual delay queue participate in the optimization together. The scheduling decision module is configured to: perform spatiotemporal dual-domain decoupling on the drift plus penalty optimization objective to obtain a spatiotemporal joint scheduling scheme, and determine the execution position of each node in the deep neural network and the target operating frequency of the edge device according to the spatiotemporal joint scheduling scheme, so as to execute the computation task to be processed.
[0082] It should be noted that the task acquisition module, graph transformation module, state calculation module, optimization construction module, and scheduling decision module mentioned above correspond to steps S101 to S105 in Embodiment 1. The examples and application scenarios implemented by these modules and their corresponding steps are the same, but they are not limited to the content disclosed in Embodiment 1. It should also be noted that these modules, as part of the system, can be executed in a computer system such as a set of computer-executable instructions.
[0083] The descriptions of each embodiment in the above embodiments have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0084] The proposed system can be implemented in other ways. For example, the system embodiments described above are merely illustrative, and the division of modules described above is only a logical functional division. In actual implementation, there may be other division methods. For example, multiple modules may be combined or integrated into another system, or some features may be ignored or not executed.
[0085] Example 3 This embodiment also provides an electronic device, including: one or more processors, one or more memories, and one or more computer programs; wherein, the processor is connected to the memory, and the one or more computer programs are stored in the memory. When the electronic device is running, the processor executes the one or more computer programs stored in the memory to cause the electronic device to perform the method described in Embodiment 1.
[0086] It should be understood that in this embodiment, the processor can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc.
[0087] Memory may include read-only memory and random access memory, and provides instructions and data to the processor. A portion of the memory may also include non-volatile random access memory. For example, memory may also store information about the device type.
[0088] In the implementation process, each step of the above method can be completed by the integrated logic circuits in the processor hardware or by software instructions.
[0089] The method in Embodiment 1 can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor. The software modules can reside in readily available storage media in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method. To avoid repetition, a detailed description is not provided here.
[0090] Those skilled in the art will recognize that the units and algorithm steps described in connection with the various examples of this embodiment can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this invention.
[0091] Example 4 Embodiment 4 of the present invention provides a computer-readable storage medium.
[0092] A computer-readable storage medium having a program stored thereon that, when executed by a processor, implements the steps of the method as described in Embodiment 1 of the present invention.
[0093] The detailed steps are the same as those provided in Example 1, and will not be repeated here.
[0094] Example 5 Embodiment 5 of the present invention provides a computer program product.
[0095] A computer program product includes software code, wherein the program in the software code performs the steps described in Embodiment 1 of the present invention.
[0096] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A spatiotemporal joint optimization scheduling method for edge reasoning tasks, characterized in that, include: Acquire pending computing tasks from edge devices; Determine a deep neural network for performing the computational task to be processed; The deep neural network is converted into a directed acyclic graph, and the task attribute information of each node in the directed acyclic graph is obtained based on the specific information of the deep neural network. Obtain network status information, and calculate the overall computing latency and total power consumption of edge devices in the current time slot based on the task attribute information and the network status information; A virtual delay queue is established based on the overall computational delay. A drift plus penalty optimization objective is constructed based on the virtual delay queue, the total energy consumption of the edge device, and a pre-determined dimensional alignment operator. The dimensional alignment operator is used to adjust the numerical scale of the total energy consumption of the edge device so that the total energy consumption of the edge device and the virtual delay queue participate in the optimization together. The drift-penalty optimization objective is decoupled in both the temporal and spatial domains to obtain a spatiotemporal joint scheduling scheme. Based on the spatiotemporal joint scheduling scheme, the execution position of each node in the deep neural network and the target operating frequency of the edge device are determined to execute the computational task to be processed.
2. The spatiotemporal joint optimization scheduling method for edge inference tasks as described in claim 1, characterized in that, The deep neural network is converted into a directed acyclic graph, specifically by mapping each computational layer in the deep neural network to a node in the directed acyclic graph, and mapping the data dependencies between the computational layers to directed edges.
3. The spatiotemporal joint optimization scheduling method for edge inference tasks as described in claim 1, characterized in that, The task attribute information of each node in the directed acyclic graph includes: the computational workload required by the node, the amount of output data generated after the node is completed, space unloading decision, and frequency adjustment decision.
4. The spatiotemporal joint optimization scheduling method for edge inference tasks as described in claim 3, characterized in that, Based on the task attribute information and the network status information, the overall computational latency and total power consumption of the edge device in the current time slot are calculated. Specifically, the computational latency of each node is determined based on the spatial offloading decision and frequency adjustment decision of each node; the communication latency between each node is determined based on the spatial offloading decision of adjacent nodes; the latency of each path in the directed acyclic graph is determined based on the computational latency and communication latency of each node, and the maximum path latency is determined as the overall computational latency. The total energy consumption of the edge device is determined based on the local computing energy consumption generated by each node executing locally on the edge device, the idle standby energy consumption generated when the node is offloaded to the cloud for execution, and the communication energy consumption generated when data is transmitted between nodes.
5. The spatiotemporal joint optimization scheduling method for edge inference tasks as described in claim 1, characterized in that, Based on the virtual latency queue, the total power consumption of the edge device, and a pre-determined dimensional alignment operator, a drift-plus-penalty optimization objective is constructed, specifically as follows: ; in, Represents each time slot The problem of certainty To minimize Make decisions under the premise of , This is the set of unloading decisions made by each node at this time. This is for determining the operating frequency of edge devices at this time. For time slots The cost of all nodes, For Lyapunov control parameters, For dimensional alignment operators, This represents the total power consumption of edge devices. For virtual delay queues, This is for the overall computational delay.
6. The spatiotemporal joint optimization scheduling method for edge inference tasks as described in claim 1, characterized in that, The drift-plus-penalty optimization objective is decoupled in both the time and space domains to obtain a joint time and space scheduling scheme. Specifically, the drift-plus-penalty optimization objective is decoupled in the time domain, the optimal frequency adjustment decision of the edge device is determined based on the virtual delay queue and control parameters, and the target operating frequency is determined based on the frequency slew rate limit. The target operating frequency is substituted into the drift plus penalty optimization target, the drift plus penalty optimization target is decoupled in the spatial domain, the original directed acyclic graph of the deep neural network is reconstructed into an edge-cloud dual-track topology graph, and the weight of each directed edge is determined according to the local computing of the edge device, the cloud computing and the communication offloading. By performing a shortest path search on the dual-track topology map of the cloud and the edge, the spatial offloading decision for each node is determined, and the spatiotemporal joint scheduling scheme is obtained based on the spatial offloading decision and the target operating frequency.
7. A spatiotemporal joint optimization scheduling system for edge reasoning tasks, characterized in that, include: The task acquisition module is configured to acquire pending computing tasks from edge devices. Determine a deep neural network for performing the computational task to be processed; The graph conversion module is configured to: convert the deep neural network into a directed acyclic graph, and obtain the task attribute information of each node in the directed acyclic graph based on the specific information of the deep neural network; The state calculation module is configured to: acquire network state information, and calculate the overall computing latency and total power consumption of the edge device in the current time slot based on the task attribute information and the network state information; The optimization module is configured to: establish a virtual delay queue based on the overall computational delay; construct a drift plus penalty optimization target based on the virtual delay queue, the total energy consumption of the edge device, and a pre-determined dimensional alignment operator; the dimensional alignment operator is used to adjust the numerical scale of the total energy consumption of the edge device so that the total energy consumption of the edge device and the virtual delay queue participate in the optimization together. The scheduling decision module is configured to: perform spatiotemporal dual-domain decoupling on the drift plus penalty optimization objective to obtain a spatiotemporal joint scheduling scheme, and determine the execution position of each node in the deep neural network and the target operating frequency of the edge device according to the spatiotemporal joint scheduling scheme, so as to execute the computation task to be processed.
8. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the spatiotemporal joint optimization scheduling method for edge inference tasks as described in any one of claims 1-6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps in the spatiotemporal joint optimization scheduling method for edge inference tasks as described in any one of claims 1-6.
10. A computer program product, comprising software code, characterized in that, The program in the software code executes the steps in the spatiotemporal joint optimization scheduling method for edge inference tasks as described in any one of claims 1-6.
