Single-chip microcomputer data carrying method, device, equipment, medium and program product

Abstract

The application discloses a single-chip data carrying method, device, equipment, medium and program product. The method comprises the following steps: in response to receiving a first interrupt signal, writing data stored in a first memory into a buffer area of a processor of a single-chip as first buffer data; and in response to the number of the first buffer data in the buffer area being greater than a first set number, carrying the first buffer data in the buffer area to a second memory. The data is written into the buffer area triggered by the interrupt, and batch carrying is performed when the data amount reaches a set threshold, so that the direct participation time of the CPU in data transmission is reduced, and the CPU occupancy is reduced. Meanwhile, the continuous delay of the main task caused by frequent data carrying is avoided, and the system operation efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of microcontroller data transmission technology, and in particular to a method, apparatus, device, medium and program product for handling data in a single-chip microcontroller. Background Technology

[0002] In microcontroller (MCU) systems, data transfer is a crucial operation. DMA (Direct Memory Access) is a key module in modern MCU systems, capable of handling data in place of the CPU, thus reducing CPU usage. However, some MCUs lack a DMA module, necessitating alternative methods to achieve data transfer.

[0003] In microcontrollers without a DMA module, data transfer is typically accomplished by the CPU directly moving data from one memory to another. This method consumes a significant amount of CPU time, causing system tasks to be constantly delayed, ultimately resulting in low system efficiency.

[0004] Therefore, how to reduce the CPU's occupancy rate during data transmission, reduce system task latency, and improve the overall system operating efficiency in a microcontroller system without a DMA module, without increasing hardware costs, is a technical problem that urgently needs to be solved in this field.

[0005] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention

[0006] The main purpose of this application is to provide a microcontroller data transfer method, apparatus, device, medium, and program product, which aims to solve the technical problems of high CPU utilization, system task delay, and low system operating efficiency caused by direct data transfer by the CPU in existing microcontroller systems without DMA modules.

[0007] To achieve the above objectives, this application proposes a microcontroller data transfer method, which includes: in response to receiving a first interrupt signal, writing data stored in a first memory into a buffer of the processor in the microcontroller as first buffer data; and in response to the number of first buffer data in the buffer being greater than a first set number, transferring the first buffer data in the buffer to a second memory.

[0008] In addition, to achieve the above objectives, this application also proposes a microcontroller data transfer device, which includes: an interrupt module, used to write data stored in a first memory into a buffer of the processor in the microcontroller as first buffer data upon receiving a first interrupt signal; and a processing module, used to transfer the first buffer data in the buffer to a second memory when the amount of the first buffer data in the buffer is greater than a first set amount.

[0009] In addition, to achieve the above objectives, this application also proposes a microcontroller device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor. The computer program is configured to implement the steps of the microcontroller data transfer method described above.

[0010] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the microcontroller data transfer method described above.

[0011] In addition, to achieve the above objectives, this application also provides a computer program product, which includes a computer program that, when executed by a processor, implements the steps of the microcontroller data transfer method described above.

[0012] The microcontroller data transfer method provided in this application triggers data writing to the buffer via interrupts and performs batch transfer when the data volume reaches a set threshold, reducing the CPU's direct participation time in data transfer and lowering CPU utilization; at the same time, it avoids continuous delay of the main task caused by frequent data transfer, thus improving system operating efficiency. Attached Figure Description

[0013] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0014] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram of the structure of the first embodiment of the microcontroller data transfer method provided in this application.

[0016] Figure 2 This is a schematic diagram of the structure of the second embodiment of the microcontroller data transfer method provided in this application.

[0017] Figure 3 This is a schematic diagram of the write buffer in one embodiment of the microcontroller data transfer method provided in this application.

[0018] Figure 4 This is a schematic diagram of buffer reading and writing data in one embodiment of the microcontroller data handling method provided in this application.

[0019] Figure 5 This is a schematic diagram of the processor processing buffer data in one embodiment of the microcontroller data transfer method provided in this application.

[0020] Figure 6 yes Figure 1 A flowchart illustrating a sub-step of step S1 in one embodiment.

[0021] Figure 7 yes Figure 1 A schematic diagram of the sub-step process of one embodiment of step S2.

[0022] Figure 8 This is a schematic diagram of an embodiment of the microcontroller data transfer device provided in this application.

[0023] Figure 9 This is a schematic diagram of the structure of an embodiment of the microcontroller device provided in this application.

[0024] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0025] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0026] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0027] In current microcontroller (MCU) systems, data transfer is a crucial operation. DMA (Direct Memory Access) is a key module in modern MCU systems, capable of replacing the CPU in data transfer and reducing CPU usage. However, some MCUs lack a DMA module, necessitating alternative methods for data transfer. Typically, the CPU directly moves data from memory to peripherals, which consumes significant CPU time, delaying system tasks and ultimately leading to low system efficiency. To address this, we have developed a method that replaces DMA while reducing CPU usage. This method uses interrupts to transfer data from peripherals, immediately returning to the main task upon completion.

[0028] Therefore, refer to Figure 1 As shown, Figure 1 This is a schematic diagram of the structure of the first embodiment of the microcontroller data transfer method provided in this application. The microcontroller data transfer method includes steps S1-S2, where data is written to a buffer via an interrupt, and batch transfer is performed when the data volume reaches a set threshold. This reduces the direct CPU involvement time in data transfer, lowering CPU utilization. Simultaneously, it avoids continuous delays in the main task caused by frequent data transfer, improving system operating efficiency. The specific steps are as follows: Step S1: In response to receiving the first interrupt signal, write the data stored in the first memory into the buffer of the microcontroller's processor as the first buffer data.

[0029] It is understandable that a microcontroller (MCU) contains a processor (CPU) and a buffer. The buffer is a pre-defined storage area in the processor's memory used to temporarily store data to be transferred.

[0030] The first memory is a data source device, including but not limited to: analog-to-digital converters (ADCs), universal asynchronous receivers (UARTs, i.e., serial ports), serial peripheral interface (SPI) devices, integrated circuit bus (I2C) devices, and other external devices. When the first memory receives new data, it generates an interrupt signal (i.e., the first interrupt signal).

[0031] Upon receiving the first interrupt signal, the processor suspends the currently executing main task and enters the interrupt service routine (ISR). In the interrupt service routine, the processor reads the data from the first memory and writes it into a buffer as the first buffered data.

[0032] Step S2: In response to the fact that the amount of the first buffered data in the buffer is greater than the first set amount, the first buffered data in the buffer is transferred to the second memory.

[0033] In its main task, the processor continuously monitors the amount of data in the first buffer within the buffer. This first set amount is a pre-defined threshold used to control the triggering conditions for batch data transfer.

[0034] When the amount of buffered data in the buffer exceeds a predetermined limit, the processor reads this buffered data from the buffer and moves it to the second memory. The second memory is the target storage device, including but not limited to: a designated storage area in memory and external storage devices. After the data movement is complete, the processor clears or releases the storage space occupied by the moved data in the buffer to allow for subsequent data writing.

[0035] Based on the above solution, it can be understood that the solution in this application can also realize a microcontroller data transfer method that supports bidirectional data transmission.

[0036] In one embodiment, such as Figure 2 As shown, Figure 2 This is a schematic diagram of the structure of the second embodiment of the microcontroller data transfer method provided in this application; specifically, as shown in the following steps, the method further includes: Step S3: In response to receiving the second interrupt signal, write the data stored in the second memory into the buffer of the microcontroller's processor as the second buffer data.

[0037] Understandably, in this embodiment, the second memory acts as a data source, sending a second interrupt signal to the processor. Upon receiving the second interrupt signal, the processor suspends its current main task, enters the interrupt service routine, reads the data from the second memory, and writes it into a buffer as second buffered data.

[0038] Step S4: In response to the fact that the amount of second buffered data in the buffer is greater than the second set amount, the second buffered data in the buffer is transferred to the first memory.

[0039] When the amount of second buffered data in the buffer exceeds the second set amount, the processor reads this second buffered data from the buffer and moves it to the first memory.

[0040] This embodiment achieves bidirectional data transfer between the first and second memories by distinguishing between the first and second interrupt signals. Specifically: First direction: data is transferred from the first memory to the buffer and then to the second memory (triggered by the first interrupt signal); Second direction: data is transferred from the second memory to the buffer and then to the first memory (triggered by the second interrupt signal). The data transfers in both directions are independent and do not interfere with each other. This method supports bidirectional data transfer between the first and second memories, has a wider range of applications, and can meet the needs of more application scenarios.

[0041] In one embodiment, the first preset quantity is preset based on the data generation rate of the first memory and the processing capability of the processor; the second preset quantity is preset based on the data generation rate of the second memory and the processing capability of the processor.

[0042] It is understandable that the first set quantity is preset based on the data generation rate of the first memory and the processing capability of the processor.

[0043] Specifically, if the data generation rate of the first memory is high (e.g., the ADC continuously acquires data at a high sampling rate), the first set quantity needs to be set larger to reduce the frequency of interrupt triggering and avoid frequent CPU interrupts. Conversely, if the data generation rate of the first memory is low, the first set quantity can be set smaller to reduce the waiting time of data in the buffer.

[0044] The second preset quantity is pre-set based on the data generation rate of the second memory and the processing capability of the processor.

[0045] In some embodiments, the principle for setting the second set quantity is the same as that for the first set quantity: a larger threshold is set when the data generation rate is high, and a smaller threshold is set when the data generation rate is low. The first set quantity and the second set quantity can be the same or different, depending on the actual application scenario.

[0046] By using the above methods, thresholds can be dynamically or pre-set based on the data generation rate and processor processing capability, making buffer management more flexible and efficient, and enabling optimal data transfer performance in different application scenarios.

[0047] Based on the above embodiments, combined with Figures 3-5 As shown, to more intuitively understand the processing procedure of this application, wherein, Figure 3 This is a schematic diagram of the write buffer in one embodiment of the microcontroller data transfer method provided in this application; Figure 4 This is a schematic diagram of buffer reading and writing data in one embodiment of the microcontroller data handling method provided in this application; Figure 5 This is a schematic diagram of the processor processing buffer data in one embodiment of the microcontroller data transfer method provided in this application.

[0048] In one embodiment, such as Figure 6 As shown, Figure 6 yes Figure 1 A flowchart illustrating the sub-steps of step S1 in one embodiment; wherein, in response to receiving a first interrupt signal, the data stored in the first memory is written into the buffer of the processor in the microcontroller as the first buffer data, including the following sub-steps: Step A11: Determine the write address based on the write pointer.

[0049] Understandably, the buffer is configured with a write pointer. The write pointer points to the memory address in the buffer where data can currently be written. In the interrupt service routine, the processor first reads the current value of the write pointer to determine the target address for this data write.

[0050] Step A12: After writing the first buffered data to the write address, move the write pointer to the next storage address in the address increment direction.

[0051] After the processor writes the data from the first memory to the address pointed to by the write pointer, it moves the write pointer one data unit in the address increment direction so that it points to the next available memory address.

[0052] For example, suppose the buffer starts at address 0x2000, each data unit occupies 1 byte, and the write pointer currently points to 0x2000. After the processor writes the first data to 0x2000, it updates the write pointer to 0x2001; after writing the second data to 0x2001, it updates the write pointer to 0x2002; and so on.

[0053] By incrementing the write pointer sequentially, data is stored in the buffer according to its address order. This method, using the guidance and incrementing of the write pointer, ensures ordered data storage in the buffer, guaranteeing data continuity and correct order, and providing a reliable data foundation for subsequent batch data transfer.

[0054] In one embodiment, such as Figure 7 As shown, Figure 7 yes Figure 1 A flowchart illustrating a sub-step of step S2 in one embodiment; transferring the first buffered data in the buffer to the second memory includes the following sub-steps: Step A21: Determine the read address based on the read pointer.

[0055] Understandably, the buffer is configured with a read pointer. The read pointer points to the storage address of the data currently to be read in the buffer. In its main task, the processor first reads the current value of the read pointer to determine the starting address for this data read.

[0056] Step A22: Based on the order in which the stored data was written to the buffer, move the first buffered data in the buffer to the second memory in the same order according to the read address.

[0057] Starting from the address pointed to by the read pointer, the processor reads the data in the first buffer and moves it to the second memory in the order in which the data was written to the buffer.

[0058] Specifically, suppose data A, data B, and data C are written to the buffer sequentially, with write addresses of 0x2000, 0x2001, and 0x2002 respectively. Then the processor starts reading from 0x2000 and moves data A, data B, and data C sequentially to the second memory, maintaining the same writing order.

[0059] After each piece of data is read, the read pointer moves one data unit in the address increment direction, pointing to the next piece of data to be read. When all the data in the buffer has been read, the read pointer and write pointer point to the same position, indicating that the buffer is empty.

[0060] By using the above method, guided by the read pointer and the first-in-first-out (FIFO) transfer order, the data transfer from the buffer to the second memory is consistent with the write order, ensuring the timing correctness and data integrity of data transmission.

[0061] In one embodiment, the amount of stored data is determined by the difference between the write address and the read address, with the difference being used as the amount of first buffered data.

[0062] Wherein, the write address is the address currently pointed to by the write pointer, and the read address is the address currently pointed to by the read pointer.

[0063] For example, suppose the buffer starts at address 0x2000, and each data unit occupies 1 byte. The write pointer currently points to 0x2005, indicating that 5 data items have been written; the read pointer currently points to 0x2002, indicating that 2 data items have been read. Therefore, the number of data items to be processed in the buffer is: 0x2005 - 0x2002 = 3. When this number exceeds a pre-set limit, the processor is triggered to move the data in the buffer to a secondary memory.

[0064] It should be noted that the above calculation method applies to scenarios with fixed data length. In scenarios with variable data length, the amount of data to be processed can also be determined by maintaining separate write counts and read counts.

[0065] By using the above method, the amount of data to be processed in the buffer can be quickly and accurately determined by the difference between the write address and the read address, providing a reliable data basis for threshold judgment. The implementation method is simple and efficient.

[0066] This application also provides a microcontroller data transfer device 100, such as... Figure 8 As shown, Figure 8 This is a schematic diagram of an embodiment of the microcontroller data transfer device provided in this application; wherein, the microcontroller data transfer device 100 includes: an interrupt module 10, used to write data stored in the first memory into the buffer of the processor in the microcontroller as first buffer data when a first interrupt signal is received; and a processing module 20, used to transfer the first buffer data in the buffer to a second memory when the amount of the first buffer data in the buffer is greater than a first set amount.

[0067] The microcontroller data transfer device 100 provided in this application, employing the microcontroller data transfer method in the above embodiments, can solve the technical problems of high CPU utilization, system task delay, and low system operating efficiency in microcontroller systems without DMA modules. Compared with the prior art, the beneficial effects of the microcontroller data transfer device 100 provided in this application are the same as those of the microcontroller data transfer method provided in the above embodiments, and other technical features in the microcontroller data transfer device 100 are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.

[0068] This application provides a microcontroller device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the microcontroller data transfer method of any one of the above embodiments one to six.

[0069] The following is for reference. Figure 9 As shown, Figure 9 This is a schematic diagram of the structure of an embodiment of the microcontroller device provided in this application; it shows a schematic diagram of the structure of the microcontroller device 200 suitable for implementing the embodiments of this application. The microcontroller device 200 in the embodiments of this application may include, but is not limited to, electronic devices such as microcontroller units (MCUs), embedded development boards, industrial control terminals, Internet of Things node devices, data acquisition terminals, etc. Figure 9 The single-chip microcomputer device 200 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0070] like Figure 9 As shown, the microcontroller device 200 may include a processing unit 1001 (e.g., a central processing unit, a microcontroller core, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in read-only memory (ROM) 1002 or a program loaded from storage device 1003 into random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the microcontroller device 200. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus.

[0071] Typically, the following systems can be connected to I / O interface 1006: input devices 1007 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tape, hard disks, flash memory, etc.; and communication devices 1009. Communication device 1009 allows the microcontroller device 200 to communicate wirelessly or wiredly with other devices to exchange data. Although a microcontroller device 200 with various systems is shown in the figure, it should be understood that it is not required to implement or possess all the systems shown. More or fewer systems may be implemented alternatively.

[0072] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0073] The microcontroller device 200 provided in this application, employing the microcontroller data transfer method in the above embodiments, can solve the technical problems of high CPU utilization, system task delay, and low system operating efficiency in microcontroller systems without a DMA module. Compared with the prior art, the beneficial effects of the microcontroller device 200 provided in this application are the same as those of the microcontroller data transfer method provided in the above embodiments, and other technical features of the microcontroller device 200 are the same as those disclosed in the method of the previous embodiment, and will not be repeated here.

[0074] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0075] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0076] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, the computer-readable program instructions being used to execute the microcontroller data transfer method of any one of the above embodiments one to six.

[0077] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination thereof.

[0078] The aforementioned computer-readable storage medium may be included in the microcontroller device 200; or it may exist independently and not be assembled into the microcontroller device 200.

[0079] The aforementioned computer-readable storage medium carries one or more programs. When the aforementioned one or more programs are executed by the microcontroller device 200, the microcontroller device 200 performs any one of the microcontroller data transfer methods in Embodiments 1 to 6.

[0080] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0081] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0082] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0083] The computer-readable storage medium provided in this application can solve the technical problems of high CPU utilization, system task delay, and low system operating efficiency in microcontroller systems without a DMA module. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the microcontroller data transfer method provided in the above embodiments, and will not be repeated here.

[0084] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the microcontroller data transfer method as described in any one of Embodiments 1 to 6 above.

[0085] The computer program product provided in this application can solve the technical problems of high CPU utilization, system task delay, and low system operating efficiency in microcontroller systems without DMA modules. Compared with the prior art, the beneficial effects of the computer program product provided in this application are the same as those of the microcontroller data transfer method provided in the above embodiments, and will not be repeated here.

[0086] The microcontroller data transfer method, apparatus, equipment, storage medium, and program products provided in this application can be widely used in various microcontroller systems without DMA modules, and are especially suitable for embedded application scenarios requiring efficient data transmission, such as industrial control, data acquisition, and IoT terminal devices. This application does not require additional hardware costs; it significantly improves system operating efficiency solely through software, demonstrating good industrial practicality and widespread application value.

[0087] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A method for data transfer using a microcontroller, characterized in that, The microcontroller data transfer method includes: In response to receiving a first interrupt signal, the data stored in the first memory is written into the buffer of the processor in the microcontroller as the first buffer data; In response to the fact that the amount of the first buffered data in the buffer is greater than a first set amount, the first buffered data in the buffer is transferred to the second memory.

2. The data transfer method as described in claim 1, characterized in that, The microcontroller data transfer method further includes: In response to receiving a second interrupt signal, the data stored in the second memory is written into the buffer of the processor in the microcontroller as the second buffer data; In response to the fact that the amount of second buffered data in the buffer is greater than a second set amount, the second buffered data in the buffer is transferred to the first memory.

3. The data transfer method as described in claim 2, characterized in that, The first preset quantity is preset based on the data generation rate of the first memory and the processing capability of the processor; the second preset quantity is preset based on the data generation rate of the second memory and the processing capability of the processor.

4. The microcontroller data transfer method as described in claim 1, characterized in that, The step of responding to receiving a first interrupt signal by writing data stored in the first memory into the buffer of the processor in the microcontroller as first buffer data includes: Determine the write address based on the write pointer; After writing the first buffered data to the write address, the write pointer is moved to the next storage address in the address increment direction.

5. The microcontroller data transfer method as described in claim 2, characterized in that, The step of transferring the first buffered data in the buffer to the second memory includes: Determine the read address based on the read pointer; Based on the order in which the stored data is written to the buffer, the first buffered data in the buffer is moved to the second memory in the same order according to the read address.

6. The microcontroller data transfer method as described in claim 1, characterized in that, The amount of stored data is determined by the difference between the write address and the read address, and the difference is used as the amount of the first buffer data.

7. A microcontroller-based data transfer device, characterized in that, The microcontroller data transfer device includes: An interrupt module is used to write data stored in the first memory into the buffer of the processor in the microcontroller as the first buffer data upon receiving a first interrupt signal. The processing module is configured to transfer the first buffered data in the buffer to a second memory when the amount of the first buffered data in the buffer is greater than a first preset amount.

8. A single-chip microcomputer device, characterized in that, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the microcontroller data transfer method as described in any one of claims 1 to 6.

9. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the microcontroller data transfer method as described in any one of claims 1 to 6.

10. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the steps of the microcontroller data transfer method as described in any one of claims 1 to 6.

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