Multi-domain heterogeneous operator field processor, heterogeneous operator core system, and execution method

Abstract

The application provides a multi-domain heterogeneous operator field processor, a heterogeneous operator core system and an execution method, and belongs to the technical field of data processing, and specifically comprises an operator graph interface, a unified operator descriptor analysis unit, a field-state storage system, a multi-domain selection and scheduling unit, a heterogeneous operator execution array, a boundary condition hardware engine, a conservation law and error control unit and an interconnection network. The unified operator descriptor carries operator category, grid topology, boundary condition, precision, conservation law and candidate execution domain information. The multi-domain selection and scheduling unit generates a candidate execution path defined by a mathematical representation domain, a numerical algorithm, precision and a hardware execution domain and determines a target path. The boundary condition hardware engine generates or exchanges boundary data in a hardware data channel, the conservation law and error control unit checks execution results and drives state submission or path reconstruction, forming a closed-loop execution channel. The application improves numerical calculation reliability and execution efficiency.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of data processing technology, and in particular to a multi-domain heterogeneous operator field processor, a heterogeneous operator core system and an execution method. Background Technology

[0002] Currently, general-purpose central processing units (CPUs) typically use scalar instructions, vector instructions, and memory access instructions as their basic architectural objects; graphics processing units (GPUs) typically use threads, thread bundles, vector operations, and massively parallel multiply-accumulate operations as their main execution methods; and tensor processors or neural network processors typically use matrix multiplication, convolution, and tensor multiply-accumulate as their main computational primitives. These processors can implement mathematical operations such as differentiation, integration, Laplace operations, gradients, divergences, curls, Fourier transforms, graphical Laplace operations, numerical integration, and Hamiltonian state evolution through software integration. However, during the execution phase, processors can generally only observe low-level operations such as loading, storing, multiplication, addition, comparison, branching, and synchronization, and cannot directly recognize the complete semantics of mathematical operators.

[0003] It is evident that a new processor architecture is urgently needed that preserves mathematical operators and physical constraint semantics at the hardware layer, uniformly manages field-state objects, selects paths between multiple mathematical representation domains and hardware execution domains, incorporates boundary conditions and conservation laws into the execution closed loop, and achieves scalable deployment through single-chip or heterogeneous chip forms. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a multi-domain heterogeneous operator field processor, a heterogeneous operator core system, and an execution method, which at least partially solve the problems existing in the prior art.

[0005] In a first aspect, embodiments of the present invention provide a multi-domain heterogeneous operator field processor, comprising: The operator graph interface is used to receive an operator graph consisting of at least one mathematical operator node and the data dependencies between the mathematical operator nodes. The unified operator descriptor parsing unit is used to parse the unified operator descriptor corresponding to the mathematical operator node. The unified operator descriptor includes operator category, applied data object, grid or topology, boundary conditions, numerical discretization method, numerical precision, error threshold, conservation law or structural constraint, and candidate execution domain information. The field-state object management unit and field-state storage system are used to manage and store field data, state variables, grid data, topology data, boundary data, historical states, and intermediate calculation results affected by mathematical operators. The multi-domain selection and scheduling unit is used to generate at least two candidate execution paths based on a unified operator descriptor, input data characteristics, hardware resource status and preset performance-precision constraints, and to determine the target execution path from them. A heterogeneous operator execution array includes at least two types of operator execution units with different data access modes, computational structures, or numerical execution methods, used to execute corresponding mathematical operators according to the target execution path; The boundary condition hardware engine is used to generate, update, or exchange boundary data before or during the execution of mathematical operators based on the boundary conditions in the unified operator descriptor. The conservation law and error control unit is used to calculate the numerical residual, error estimate, or conservation quantity deviation corresponding to the execution result of the mathematical operator, and to generate status submission instructions or instructions for adjusting execution parameters, switching numerical algorithms, switching execution paths, and re-executing based on the calculation results; and, Interconnection network is used to transmit field data, state data, unified operator descriptors and control information between operator graph interface, unified operator descriptor parsing unit, field-state storage system, multi-domain selection and scheduling unit, heterogeneous operator execution array, boundary condition hardware engine and conservation law and error control unit. The candidate execution path is jointly defined by the mathematical representation domain, numerical algorithm, numerical precision and hardware execution domain. The multi-domain selection and scheduling unit, the boundary condition hardware engine and the conservation law and error control unit constitute a closed-loop execution path of path selection-boundary configuration-operator execution-result verification-state submission or path reconstruction.

[0006] According to a specific implementation of an embodiment of the present invention, the unified operator descriptor is encoded using fixed-length encoding, variable-length encoding, hierarchical encoding, or a combination of basic descriptor and extended descriptor, and is represented as follows: ; In the formula, For the first A unified operator descriptor for a mathematical operator node; Operator category; For the operator order and operator parameters; For input field objects and output field objects; For grids, graphs, or topologies; These are boundary conditions; It is a numerical discretization method; For numerical precision and data format; This is the error threshold; For conservation laws or structural constraints; Candidate execution domain; This refers to failure rollback and recovery strategies.

[0007] According to a specific implementation of an embodiment of the present invention, the field-state object management unit establishes an object descriptor for a field object or a state object, wherein the object descriptor is represented as follows: ; In the formula, It can be a base address or a distributed address; For data shape; For data layout and stride; The width of the halo or overlapping area; For coordinates, grids, or topology indexes; A unit or dimension identifier for physical quantities; For time-based or state-based versions; For validity, ownership, and consistency states; the field-state storage system performs block division, address generation, neighborhood prefetching, halo caching, version management, and intermediate result residency based on the object descriptor.

[0008] According to a specific implementation of an embodiment of the present invention, the candidate execution path is represented as follows: ; in, This is the m-th candidate execution path; For mathematical representation domain; For hardware execution domain; It is a numerical algorithm; For numerical precision; the mathematical representation domain includes at least two of the following: local physical space domain, spectrum domain, sparse matrix domain, graph domain, state space domain, phase space domain, low-rank domain, and multi-resolution domain; the hardware execution domain includes at least two of the following: digital fixed-point execution domain, digital floating-point execution domain, mixed-precision execution domain, digital in-memory execution domain, analog in-memory execution domain, optical execution domain, reconfigurable logic execution domain, and external processor rollback execution domain.

[0009] According to a specific implementation of an embodiment of the present invention, the multi-domain selection and scheduling unit calculates a comprehensive cost for each candidate execution path: ; ; In the formula, , , , and These include predicted execution latency, predicted energy consumption, predicted numerical error, predicted data transfer volume, and penalties for resource conflicts or execution risks. , , , and For the corresponding weights, This refers to the set of feasible paths that satisfy boundary conditions, numerical accuracy, storage capacity, hardware availability, and conservation laws or structural constraints. For the target execution path, This represents the comprehensive cost function value of the m-th candidate execution path, which is used to comprehensively measure the overall cost of the path in terms of execution latency, energy consumption, numerical error, data transfer volume, and resource conflicts or execution risks; m is the index of the candidate execution path.

[0010] According to a specific implementation of an embodiment of the present invention, the multi-domain selection and scheduling unit is further configured to identify multiple mathematical operator nodes in the operator graph that have common input data, common neighborhood data, the same grid or topology, or continuous data dependencies, synthesize multiple mathematical operator nodes that meet the fusion conditions into a composite operator, and allocate on-chip storage space or cross-execution unit bypass channels for the intermediate objects of the composite operator; when the on-chip storage capacity is insufficient, there are multiple consumer dependencies, the conservation law checkpoint cannot be crossed, or the target execution unit is unavailable, the composite operator is split and rolled back to independent execution.

[0011] According to a specific implementation of an embodiment of the present invention, the heterogeneous operator execution array includes a local differential operator execution unit. The local differential operator execution unit includes a reconfigurable neighborhood data reading circuit, a row buffer or surface buffer, a halo buffer, a programmable template coefficient storage circuit, a weighted operation array, a local reduction circuit, and a mesh scale correction circuit, and is configured to execute partial derivatives, gradients, divergences, curls, Hessian operators, Laplacian operators, finite difference operators, finite volume flux operators, or local convolution operators; wherein, for a five-point Laplacian discretization of a two-dimensional uniform mesh, the local differential operator execution unit generates the output according to the following formula: ; in, This represents the value of the field variable at the grid node with index (i, j) in a two-dimensional uniform grid; , , and These represent the values ​​of the field variables at the four adjacent grid nodes of the node in the two coordinate directions; i and j are the discrete grid indices in the two spatial coordinate directions; h represents the spatial step size of the uniform grid, i.e., the distance between adjacent grid nodes; This represents the Laplace operator value of the field variable u at node (i, j), used to characterize the local spatial curvature or diffusion intensity of the field variable at that location.

[0012] According to a specific implementation of an embodiment of the present invention, the heterogeneous operator execution array includes an integral and state evolution operator execution unit. The integral and state evolution operator execution unit includes a current state register, a historical state buffer, a derivative or increment buffer, a feedback data path, a time step control circuit, a local error estimator, and a state commit and rollback circuit, and is configured to process the state equation. Perform explicit integration, implicit integration, prediction-correction integration, adaptive time-step integration, or structure-preserving integration; in explicit Euler execution mode, candidate states are generated according to the following formula: ; in, Indicates the system status. Represents physical time. This represents the system state at the nth time level; This represents the candidate state for the next time step calculated by the explicit Euler method; n represents the discrete time step number. This represents the physical time corresponding to the nth time layer; This indicates the time step between two adjacent time layers; The state equation represents the state equation in state and time The rate of change of state or time derivative at a given point is, in physical terms, the instantaneous rate of evolution of the system state over time.

[0013] According to a specific implementation of an embodiment of the present invention, the heterogeneous operator execution array includes a spectral domain operator execution unit. The spectral domain operator execution unit includes a forward transform circuit, a transpose or rearrangement network, a spectral coefficient storage circuit, a spectral coefficient operation circuit, and an inverse transform circuit, and is configured to select between a local spatial domain implementation and a spectral domain implementation for the same mathematical operator; wherein, for a Laplace operator under periodic boundary conditions, the spectral domain operator execution unit performs spectral coefficient mapping according to the following formula: ; Where u represents a scalar field variable in physical space; The Laplace operator for u is used to describe the spatial second-order transformation, diffusion, or curvature characteristics of field variables; Represents the Fourier transform operator; This represents the wavenumber vector in the spectral domain, corresponding to spatial frequency; Denotes the Euclidean modulus of the wavenumber vector k. Represents the square of the total spatial wavenumber; Represents the Fourier spectrum coefficients of the field variable u; This represents the result of the Laplace operator in the spectral domain. This relationship shows that, under periodic boundary conditions, the Laplace operation in physical space can be equivalently transformed into a Laplace operation in the spectral domain. Frequency-wise point multiplication.

[0014] According to a specific implementation of an embodiment of the present invention, the heterogeneous operator execution array includes a sparse graph operator execution unit. The sparse graph operator execution unit includes a topology index parsing circuit, an adjacency data cache, an aggregated data path, a distributed data path, a sparse multiply-accumulate array, a write conflict handling circuit, and a dynamic load balancing circuit, and is configured to perform sparse matrix-vector operations, graph message passing, unstructured mesh neighborhood operations, finite element assembly operations, or graph diffusion operations; wherein, the graph Laplacian matrix and its effect are respectively expressed as: ; Where L is the graph Laplacian matrix, used to characterize the discrete diffusion and coupling relationships between nodes on a graph or unstructured mesh; D is the degree matrix, whose diagonal elements represent the degree of the corresponding node or the sum of the weights of adjacent edges; A is the adjacency matrix, whose elements represent the connection relationships or coupling weights between nodes; x is the input node field value or state vector; and y is the output vector after the graph Laplacian operator is applied.

[0015] According to a specific implementation of an embodiment of the present invention, the heterogeneous operator execution array includes Hamiltonian and structure-preserving operator execution units. Each Hamiltonian and structure-preserving operator execution unit includes a Hamiltonian function evaluation circuit, a state gradient calculation circuit, an antisymmetric structure mapping circuit, a state splitting circuit, a symmetric integral state update circuit, and an energy or symmetric structure detection interface, and is configured to execute Hamiltonian state evolution satisfying the following equation: ; Where z is the phase space state vector of the system, usually composed of generalized position q and generalized momentum p; t is physical time; The Hamiltonian function is used to physically characterize the total energy of a system or the corresponding conserved quantity. Let H be the gradient of the state vector z, representing the rate of change of energy with respect to each state component; J is the antisymmetric structure matrix or symplectic structure matrix, used to map the energy gradient to the state evolution direction; For the transpose of J, This indicates that the structure matrix has antisymmetry; The Hamiltonian and structure-preserving operator execution unit is configured to perform at least one of Symplectic Euler, Leapfrog, Verlet, Störmer-Verlet, operator splitting, or Poisson bracketing operations.

[0016] According to a specific implementation of an embodiment of the present invention, the boundary condition hardware engine includes a boundary descriptor register, a boundary node identification circuit, a boundary parameter storage area, a virtual mesh cell generation circuit, a boundary value or boundary flux calculation circuit, a periodic address mapping circuit, a cross-region boundary exchange circuit, and a multi-physics coupling interface processing circuit, and supports at least one of the preset boundary conditions, wherein the preset boundary conditions include Dirichlet boundary conditions, Neumann boundary conditions, and Robin boundary conditions, and the expression of the Dirichlet boundary condition is: or ; in, Let the field variable be the one to be determined; For the computational domain; For the boundary of the computational domain; Indicates the location at the boundary. The given Dirichlet boundary values, i.e., the field value functions pre-defined at the boundary, represent the direct specification at the boundary. The value of ; The expression for the Neumann boundary condition is: ; Where n is the boundary The outward normal unit vector on; for The directional derivative along the outer boundary can physically correspond to the normal gradient, heat flux density, or flux. This represents the Neumann normal derivative or boundary flux given at the boundary location X; The expression for the Robin boundary condition is: ; Where a and b are the boundary coefficients acting on the field value term and the normal derivative term, respectively; Indicates the location at the boundary. Given a Robin hybrid boundary function or boundary excitation; The boundary condition hardware engine also supports periodic boundary conditions, absorbing boundary conditions, symmetric or reflective boundary conditions, discontinuous interface conditions, and multiphysics coupling boundary conditions.

[0017] According to a specific implementation of the present invention, the conservation law and error control unit includes a local error estimator, a residual calculator, a conservation quantity reducer, a threshold comparator, and a state submission and rollback unit, and is configured to handle the conservation quantity... Calculate the normalized bias: ; In the formula, This is a conserved quantity from the previously committed state. The conserved quantity for the current candidate state. This refers to the theoretical change caused by boundary inputs, source terms, or external actions. The value is positive. A candidate state is submitted when the normalization deviation is not greater than the corresponding threshold. When the normalization deviation is greater than the corresponding threshold, at least one of the following is triggered: local recalculation, global recalculation, numerical precision adjustment, time step adjustment, iteration count adjustment, numerical algorithm switching, mathematical representation domain switching, hardware execution domain switching, or state rollback. The normalization deviation of the conserved quantity Q represents the degree of relative mismatch between the conserved quantity and the theoretical change after numerical evolution; n is the discrete-time layer or state version index of the submitted state. A regularization constant used to prevent the denominator from being zero and to improve the stability of small-scale calculations.

[0018] According to a specific implementation of an embodiment of the present invention, the field-state storage system includes a field data storage area, a state history storage area, a neighborhood data buffer, a boundary data storage area, a topology index storage area, an operator coefficient storage area, a spectral coefficient storage area, and an intermediate result storage area; the neighborhood data buffer is used to cache and exchange overlapping region data or boundary halo data between adjacent grid regions, adjacent computation blocks, adjacent processing kernels, or adjacent cores; the state history storage area is used to save submitted states and candidate states, and restores the system to the most recently submitted state when the conservation law or error check fails.

[0019] According to a specific implementation of an embodiment of the present invention, the heterogeneous operator execution array includes at least two of the following: digital logic computing units, digital in-memory computing units, analog in-memory computing units, and optical computing units; The multi-domain selection and scheduling unit selects the execution unit based on numerical accuracy requirements, input dynamic range, calibration status, data conversion overhead, computational energy consumption, and hardware health status. Candidate solutions are obtained using simulated in-memory computing units. At that time, the digital logic unit calculates the residual according to the following formula: ; in, It is the residual norm of a linear system, used to measure the degree to which candidate solutions satisfy the discrete equations; For system matrices or discrete mathematical operators; This is a candidate solution vector obtained by simulating the in-memory computing unit; This represents the right-hand side term or external excitation vector of a linear system. Represents the predefined vector norm; A candidate solution is accepted when the residual meets a preset threshold. When the residual does not meet the preset threshold, the candidate solution is used as the initial value for digital iterative refinement, or the process is switched to the digital logic calculation unit for re-execution.

[0020] According to a specific implementation of the present invention, a runtime path update unit is further included, which is used to collect the actual latency, actual energy consumption, data transfer volume, numerical error, conservation quantity deviation, execution failure rate, temperature or calibration status of each candidate execution path, and update the path cost model based on at least one of statistical average, exponential weighted moving average, recursive least squares, lookup table correction or fixed-point online learning; the updated model is first written into the shadow parameter table, and after passing the quality gating, it is atomically submitted, and in the event of update failure, performance degradation or abnormal drift, it is restored to the most recent valid model checkpoint.

[0021] In a second aspect, embodiments of the present invention provide a heterogeneous operator core system, comprising: The control core includes a unified operator descriptor parsing unit and a multi-domain selection and scheduling unit, which are used to receive the operator graph, parse or generate unified operator descriptors corresponding to mathematical operator nodes, and generate at least two candidate execution paths based on the unified operator descriptors, input data characteristics and resource status of each heterogeneous operator core, and determine the target execution path from them. At least two heterogeneous operator cores, which have different data access modes, operational structures or numerical execution methods, and constitute a heterogeneous operator execution array, are used to perform different operations in local differentiation, integration and state evolution, spectral domain operations, sparse graph operations, Hamiltonian and structure preservation operations, and linear or nonlinear equation solving operations, and each heterogeneous operator core executes the corresponding mathematical operator according to the target execution path determined by the control core; Storage cores are used to store field data, state data, grid data, topology data, boundary data, operator coefficients, and intermediate results. Chip interconnection networks are used to transmit unified operator descriptors, field data, state data, boundary halo data, execution results, and control information between control chips, heterogeneous operator chips, and storage chips. A cross-core boundary condition processing module is used to generate, update, or exchange cross-core boundary data based on the boundary conditions in the unified operator descriptor; and, The global conservation law and error control module is used to calculate the numerical residual, error estimate or global conservation quantity deviation corresponding to the execution result of the mathematical operator, and generate status submission instructions or execution parameter adjustment, numerical algorithm switching, execution path switching, local recalculation and global recalculation instructions based on the calculation results. The control core selects a target heterogeneous operator core based on the capability description, operating status, and unified operator descriptor of each heterogeneous operator core. When the target heterogeneous operator core fails or the verification of the global conservation law and error control module fails, the corresponding mathematical operator is migrated to a backup heterogeneous operator core. The control core, heterogeneous operator core, cross-core boundary condition processing module, and global conservation law and error control module constitute a closed-loop execution path for cross-core path selection, boundary configuration, operator execution, result verification, status submission, or path reconstruction.

[0022] According to a specific implementation of an embodiment of the present invention, each of the heterogeneous operator cores is provided with a standardized operator interface and a core capability description register; The standardized operator interface includes at least a unified operator descriptor input channel, a field data input channel, a state data input channel, a boundary data input channel, an execution result output channel, and an error state output channel; The chip capability description register records at least six of the following: supported operator type, data type, numerical precision, maximum problem size, local storage capacity, boundary condition type, mathematical representation domain, conservation law detection type, current load, current temperature, current power consumption, current calibration status, and current error status.

[0023] According to a specific implementation of an embodiment of the present invention, the chip interconnect network includes a control network, a data network, and a conservation reduction network; The control network is used to transmit unified operator descriptors, scheduling instructions, exception information, and completion information; The data network is used to transmit field data, state data, topology data, spectral coefficients, and boundary halo data; The conservation reduction network is used to transmit local conservation quantities, local residuals, and global reduction results; The control kernel is configured to allow multiple mathematical operator nodes that execute sequentially and share intermediate data to preferentially execute on the same heterogeneous operator kernel or multiple heterogeneous operator kernels that share local memory.

[0024] According to a specific implementation of an embodiment of the present invention, the control core is a mathematical operator generator operator descriptor executed across multiple heterogeneous operator cores, which divides the global field object into multiple local field objects and establishes a boundary halo exchange table based on the adjacency relationship between the local field objects. The global conservation law and error control module performs global reduction after each local result is returned. When there is a local anomaly but the global error does not exceed the threshold, only the abnormal local field object is recalculated. When the global error or the deviation of the conservation quantity exceeds the threshold, all relevant local field objects are rolled back.

[0025] Thirdly, embodiments of the present invention also provide a method for executing multi-domain heterogeneous operator graphs, including: Receive an operator graph containing multiple mathematical operator nodes and their data dependencies; A unified operator descriptor is obtained or generated for each mathematical operator node, wherein the unified operator descriptor includes at least the operator category, the data object to be applied, the grid or topology, the boundary conditions, the numerical discretization method, the numerical precision, the error threshold, the conservation law or structural constraints, and the candidate execution domain information. At least two candidate execution paths are generated based on the unified operator descriptor, input data characteristics and hardware resource status. Each candidate execution path is jointly defined by the mathematical representation domain, numerical algorithm, numerical precision and hardware execution domain. Filter out candidate execution paths that do not meet boundary conditions, numerical precision, storage capacity, hardware availability, or conservation law constraints, and determine the target execution path from the remaining candidate execution paths; Configure the field-state storage system and boundary condition hardware engine to generate, update, or exchange the boundary data required for the execution of mathematical operators; Schedule mathematical operator nodes to heterogeneous operator execution units or heterogeneous operator cores corresponding to the target execution path; Obtain the execution results and calculate the numerical residuals, error estimates, or deviations of conserved quantities; When the numerical residual, error estimate, and conserved quantity deviation meet the corresponding thresholds, the execution result is submitted or transmitted; when at least one of them does not meet the corresponding threshold, at least one of the following is adjusted: numerical precision, time step, number of iterations, numerical algorithm, mathematical representation domain, hardware execution domain, operator execution unit, or operator core, and the corresponding mathematical operator node is re-executed.

[0026] According to a specific implementation of an embodiment of the present invention, the step of generating at least two candidate execution paths based on a unified operator descriptor, input data features, and hardware resource status includes: For the same mathematical operator, establish at least two of the following execution paths: local physical space domain execution path, spectrum domain execution path, sparse matrix domain execution path, graph domain execution path, state space domain execution path, simulated in-memory execution path, optical execution path, or external processor rollback execution path; estimate the execution latency, energy consumption, numerical error, data transfer volume, storage consumption, and execution risk of each candidate execution path; and determine the target execution path based on at least one of the following methods: weighted cost, Pareto optimization, lookup table, rule tree, online performance model, or lightweight machine learning model.

[0027] According to a specific implementation of an embodiment of the present invention, the step of configuring the boundary condition hardware engine includes: Identify internal nodes, physical boundary nodes, computational block boundary nodes, core boundary nodes, or multiphysics coupling interface nodes based on the global coordinates, local coordinates, and boundary labels of the field object. Generate boundary values, virtual mesh cell values, or boundary flux for physical boundary nodes; request and exchange boundary halo data of adjacent regions for computation block boundary nodes or core boundary nodes. Perform at least one of the following on the multiphysics coupling interface nodes: interpolation, coordinate transformation, unit conversion, and flux matching.

[0028] According to a specific implementation of an embodiment of the present invention, the step of re-executing the corresponding mathematical operator node includes: Mark the current execution result as a candidate state without overwriting the submitted state; The scope of local or global recalculation is determined based on local and global errors. When the error exceeds the limit, the time step can be reduced, the numerical accuracy improved, the number of iterations increased, the preconditioner switched, the explicit integral switched to the implicit integral or the structure-preserving integral switched, the analog execution domain switched to the digital execution domain, or the local physical space domain switched to the spectral domain; and the candidate state is submitted as a valid state after the re-execution result meets the corresponding threshold.

[0029] According to a specific implementation of an embodiment of the present invention, it further includes: Identify multiple mathematical operator nodes that share common input data, common neighborhood data, the same grid or topology, and continuous data dependencies; When there are no external consumers for intermediate results, the fusion does not cross forced error or conservation law checkpoints, and the on-chip storage resources meet the requirements, multiple mathematical operator nodes are fused into a composite operator. This allows intermediate results of composite operators to reside in a neighborhood buffer, state buffer, spectral coefficient cache, or local shared memory. When fusion execution fails, on-chip storage is insufficient, or the target execution unit is unavailable, the composite operator is split and replayed according to the original data dependencies.

[0030] According to a specific implementation of an embodiment of the present invention, it further includes: Collect the actual execution latency, actual energy consumption, data transfer volume, numerical error, conservation deviation and execution failure information of each candidate execution path under different data scales, boundary conditions, numerical precision and hardware conditions, and update the path cost model and path confidence based on the collected information; When hardware temperature changes, device drift, calibration failure, or prediction errors are detected, the priority of the safe execution path is increased or the proportion of exploratory execution is increased; the updated model is written to the shadow parameter area, submitted after passing quality gating, and restored to the most recent valid model checkpoint when model updates cause performance degradation or an increase in error rate.

[0031] The beneficial effects of the embodiments of the present invention are as follows: (1): Preserve the semantics of mathematical operators, boundary conditions and conservation laws, so that hardware scheduling can utilize high-level numerical information; (2): Enables the same operator to adaptively select between the spatial domain, spectral domain, sparse domain, graph domain, digital domain, analog memory domain, or other execution domains; (3): Reduce off-chip data movement and intermediate result write-back by using field-state objects, halo buffers and operator fusion; (4): Reduce the overhead of boundary branching, boundary preprocessing and cross-block communication through the boundary condition hardware engine; (5): Improve the numerical reliability of long-term evolution, mixed accuracy and approximate calculation by using error and conservation law closed loop; (6): Improve system scalability, fault migration capability and process combination flexibility through heterogeneous operator cores and capability discovery interfaces; (7): It can uniformly support regular grids, unstructured grids, sparse graphs, state evolution, spectrum calculation and digital-analog hybrid calculation. Attached Figure Description

[0032] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A block diagram of the overall architecture of the operator field processor provided in an embodiment of the present invention; Figure 2 A schematic diagram of the data structure of the unified operator descriptor provided in an embodiment of the present invention; Figure 3 A schematic diagram of the field-state object and its storage organization provided in an embodiment of the present invention; Figure 4 This is a flowchart of multi-domain selection and scheduling provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the heterogeneous operator execution array structure provided in an embodiment of the present invention; Figure 6This is a schematic diagram of the structure of the local differential operator execution unit provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the execution unit structure of the integral and state evolution operator provided in an embodiment of the present invention; Figure 8 A schematic diagram of the boundary condition hardware engine structure provided in an embodiment of the present invention; Figure 9 A flowchart of conservation laws and error feedback control provided for embodiments of the present invention; Figure 10 This is a flowchart of operator fusion and field data residency provided in an embodiment of the present invention; Figure 11 This is a schematic diagram of the heterogeneous operator core system structure provided in an embodiment of the present invention; Figure 12 A flowchart illustrating a multi-domain execution embodiment of the Poisson equation provided in this invention. Figure 13 The Hamiltonian system architecture is maintained and the execution implementation flowchart is provided for the embodiments of the present invention; Figure 14 A flowchart of a digital-analog in-memory hybrid execution embodiment provided by an embodiment of the present invention; Figure 15 A schematic diagram of the collaborative structure of the compiler, runtime, and operator field processor provided in an embodiment of the present invention; Figure 16 The overall situation of prototype verification of the fourteen OFPU embodiments provided in the embodiments of the present invention, wherein (a) represents the test scale of the reference model of each embodiment, and (b) represents the verification level coverage; Figure 17 The operator reference verification results for the single-chip digital OFPU provided in the embodiments of the present invention; Figure 18 The unified operator descriptor parsing and anomaly detection verification results provided in the embodiments of the present invention; Figure 19 The spatial domain-spectral domain cost crossover and multi-domain selection results provided in this embodiment of the invention are shown in (a) as the multi-domain selection distribution, representing the relationship between template iteration and estimated cycle number under different paths, and (b) as 256. The 256-grid cost cross represents the convergence region distribution of template iteration under different grid sizes; Figure 20 The following are the boundary virtual unit calculation and functional-level timing results provided in the embodiments of the present invention, wherein (a) is the typical boundary virtual unit result and (b) is the boundary engine functional-level timing result; Figure 21The conserved deviation detection and adaptive strategy mapping results provided in the embodiments of the present invention are shown in (a) as an example of conserved quantities and errors, and (b) as a matrix of fault types and execution strategies. Figure 22 The numerical solution and residual convergence results of the Poisson equation provided in the embodiments of the present invention are shown in (a) and (b) respectively. Figure 23 The heat conduction adaptive time step and temperature field results provided in the embodiments of the present invention are shown in (a) as the adaptive time step history and (b) as the final temperature field. Figure 24 The results of incompressible fluid divergence, pressure residual and velocity field provided for embodiments of the present invention, wherein (a) is the evolution of divergence and pressure residual, and (b) is the final velocity amplitude field; Figure 25 The energy drift and phase space trajectory results of the Hamiltonian system provided in the embodiments of the present invention are shown in (a) for different integration methods and (b) for phase space trajectory. Figure 26 The unstructured mesh diagram partitioning and finite element sparse structure results provided in the embodiments of the present invention are shown in (a) and (b) respectively. Figure 27 The heterogeneous operator chip task assignment and system topology results provided in the embodiments of the present invention are as follows: (a) is the statistics of the number of tasks selected in different chipsets, and (b) is the interconnection topology of the system (the connection between different chipsets and interconnection nodes). Figure 28 The digital-analog in-memory hybrid path and error tolerance results provided in the embodiments of the present invention are shown in (a) for the path distribution of 500 groups of tasks and (b) for the relationship between approximate error and tolerance. Figure 29 The data traffic reduction and fusion type distribution results of operator fusion provided in the embodiments of the present invention are shown in (a) for comparison of off-chip data traffic and (b) for fusion types in 1000 sets of constraints. Figure 30 The following are the prediction convergence and drift adaptation results of runtime self-learning provided in the embodiments of the present invention, wherein (a) is the prediction error convergence and (b) is the path adaptation result after drift. Detailed Implementation

[0034] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0035] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0036] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this invention, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using structures and / or functionalities other than one or more of the aspects set forth herein.

[0037] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. The illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0038] Furthermore, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0039] This invention provides a multi-domain heterogeneous operator field processor, which can be applied to mathematical operator semantic recognition scenarios.

[0040] See Figure 1 This is a block diagram of the overall architecture of a multi-domain heterogeneous operator field processor provided in an embodiment of the present invention. Figure 1 As shown, the multi-domain heterogeneous operator field processor mainly includes: The operator graph interface is used to receive an operator graph consisting of at least one mathematical operator node and the data dependencies between the mathematical operator nodes. The unified operator descriptor parsing unit is used to parse the unified operator descriptor corresponding to the mathematical operator node. The unified operator descriptor includes operator category, applied data object, grid or topology, boundary conditions, numerical discretization method, numerical precision, error threshold, conservation law or structural constraint, and candidate execution domain information. The field-state object management unit and field-state storage system are used to manage and store field data, state variables, grid data, topology data, boundary data, historical states, and intermediate calculation results affected by mathematical operators. The multi-domain selection and scheduling unit is used to generate at least two candidate execution paths based on a unified operator descriptor, input data characteristics, hardware resource status and preset performance-precision constraints, and to determine the target execution path from them. A heterogeneous operator execution array includes at least two types of operator execution units with different data access modes, computational structures, or numerical execution methods, used to execute corresponding mathematical operators according to the target execution path; The boundary condition hardware engine is used to generate, update, or exchange boundary data before or during the execution of mathematical operators based on the boundary conditions in the unified operator descriptor. The conservation law and error control unit is used to calculate the numerical residual, error estimate, or conservation quantity deviation corresponding to the execution result of the mathematical operator, and to generate status submission instructions or instructions for adjusting execution parameters, switching numerical algorithms, switching execution paths, and re-executing based on the calculation results; and, Interconnection network is used to transmit field data, state data, unified operator descriptors and control information between operator graph interface, unified operator descriptor parsing unit, field-state storage system, multi-domain selection and scheduling unit, heterogeneous operator execution array, boundary condition hardware engine and conservation law and error control unit. The candidate execution path is jointly defined by the mathematical representation domain, numerical algorithm, numerical precision and hardware execution domain. The multi-domain selection and scheduling unit, the boundary condition hardware engine and the conservation law and error control unit constitute a closed-loop execution path of path selection-boundary configuration-operator execution-result verification-state submission or path reconstruction.

[0041] This invention provides an operator field processor that enables mathematical operators such as differentiation, integration, spectral transformation, graph propagation, Hamiltonian evolution, and equation solving to become primary architecture objects that the processor can directly identify, schedule, and verify.

[0042] A unified operator descriptor is provided to express operators, field objects, grids or topologies, boundary conditions, numerical discretization, precision, error, conservation laws, candidate execution domains, and backoff strategies in the same data structure.

[0043] A multi-domain selection mechanism is provided, enabling the same mathematical operator to be selected among local spatial domains, spectral domains, sparse matrix domains, graph domains, state domains, and digital, analog in-memory, optical, or chip execution domains based on problem size, boundaries, topology, accuracy, energy consumption, data handling, and hardware status.

[0044] It provides a boundary condition hardware engine that incorporates boundary node identification, virtual mesh cell generation, boundary flux, periodic mapping, halo exchange, and coupling interface processing into the hardware data path.

[0045] It provides conservation laws and error control units, enabling numerical residuals and invariant deviations to participate in state submission, precision adjustment, time step adjustment, algorithm switching, execution domain switching, and recalculation.

[0046] It provides a heterogeneous operator-granule system that enables different computing modes to be executed in granules with matching data paths and local storage structures, and supports cross-granule boundary exchange, global reduction and fault migration.

[0047] In specific implementation, the operator field processor provided by the present invention includes: a host interface, an operator graph interface, an operator graph storage and dependency management module, a unified operator descriptor parsing unit, a field-state object management unit, a multi-domain selection and scheduling unit, a heterogeneous operator execution array, a boundary condition hardware engine, a conservation law and error control unit, a field-state storage system, an on-chip interconnect network, an external storage interface, and an optional chip interconnect interface.

[0048] The operator graph consists of mathematical operator nodes and data dependency edges. Each mathematical operator node is associated with a uniform operator descriptor.

[0049] The multi-domain selection and scheduling unit generates candidate execution paths based on descriptors and resource status, filters paths that do not meet boundary, precision, storage capacity, or conservation law constraints, and selects the target mathematical representation domain, numerical algorithm, numerical precision, and hardware execution domain.

[0050] The boundary condition hardware engine generates boundary values, virtual mesh cells, boundary flux, periodic mapping relationships, or cross-region halo messages before or during operator execution.

[0051] The heterogeneous operator execution array generates candidate results, and the conservation law and error control unit performs residual and invariant detection on the candidate results. When the threshold is met, the result is submitted; when the threshold is not met, the accuracy, time step, algorithm, execution path or block range is adjusted and re-executed, thus forming a closed loop.

[0052] For the k-th mathematical operator node, the unified operator descriptor can be represented as: (1) In the formula, To unify operator descriptors; Operator category; For operator order, template, or parameters; For input / output field objects; For grids, graphs, or topologies; These are boundary conditions; It is a numerical discretization method; For numerical precision and data format; This is the error threshold; For conservation laws or structural constraints; Candidate execution domain; This refers to failure rollback and recovery strategies.

[0053] In one non-limiting implementation, the descriptor includes a 256-bit base field and a 128-bit extended field.

[0054] The basic fields store the opcode, version, dimension, boundary type, precision format, input / output object identifiers, candidate execution domain mask, and pointers to extended fields. The extended fields store the grid scale, time step, error tolerance, conservation law mask, algorithm parameters, checkpoints, and backoff strategies. The descriptor parsing unit performs decoding in a pipelined manner, including receive assembly, version verification, field validity checking, default value normalization, basic field parsing, extended field parsing, and microcode control word generation.

[0055] The object descriptor of a field object or state object can be represented as: (2) In the formula, It can be a base address or a distributed address; For data shape; For data layout and stride; The width of the halo or overlapping area; For coordinates, grids, or topology indexes; For identification of units or dimensions; For time-based or state-based versions; For validity, ownership, and consistency, the field-state storage system includes a field data area, a state history area, a neighborhood and halo buffer, a boundary data area, a topology index area, a spectral coefficient cache, and an intermediate result area.

[0056] The m-th candidate execution path By mathematical representation domain Hardware execution domain Numerical Algorithms sum of numerical precision Common limitations: (3) The mathematical representation domain may include the local physical space domain, the spectrum domain, the sparse matrix domain, the graph domain, the state space domain, the phase space domain, the low-rank domain, and the multi-resolution domain; the hardware execution domain may include digital fixed-point, digital floating-point, mixed precision, digital in-memory, analog in-memory, optical, reconfigurable logic, chip, and external processor fallback domain.

[0057] The combined cost of the candidate paths can be expressed as: (4) In the formula, To predict latency, To predict energy consumption, For prediction error, To predict the amount of data transported, Penalties are imposed for resource conflicts, calibration risks, execution failures, or communication congestion. , , , and For configurable weights. The target path is determined from the feasible set that satisfies hard constraints: where m is the candidate execution path index, M is the set of feasible candidate paths that satisfy boundary conditions, accuracy, capacity, hardware availability, and conservation laws or structural constraints, and m The target execution path is the one with the lowest overall cost.

[0058] (5) The heterogeneous operator execution array includes at least two of the following: local differentiation, integration and state evolution, spectral domain, sparse graph, Hamiltonian and structure preservation, linear or nonlinear solution, and tensor and universal backoff execution units.

[0059] Each execution unit receives descriptor microcode, field object identifier, boundary readiness information and resource token through the standardized task interface, and returns candidate results, local residuals, abnormal states and performance counts through the standardized completion interface.

[0060] The local differential operator execution unit includes a neighborhood address generator, row or surface buffer, halo buffer, programmable template coefficient memory, multiply-accumulate array, local reduction tree, non-uniform grid scale correction circuit, and result write-back circuit. The two-dimensional five-point Laplace discretization can be represented as: (6) The integration and state evolution unit includes a current state register, a historical state buffer, a derivative or residual buffer, a feedback path, a time step controller, an integral controller, a local error estimator, a candidate state register, and a commit or rollback circuit. For the state equation: (7) An explicit one-step update can be represented as: (8) The spectral domain operator execution unit includes a forward transform engine, a transpose and rearrangement network, a spectral coefficient buffer, a spectral coefficient operation array, an inverse transform engine, and a spectral truncation or filtering circuit. Under periodic boundaries, the spectral mapping of the Laplace operator is as follows: (9) The sparse graph operator execution unit includes a CSR or COO index decoder, an adjacency buffer, a Gather path, a Scatter path, a sparse multiply-accumulate array, a collision detection and merging circuit, a partition scheduler, and a cross-partition halo interface. The graph Laplace and its function can be represented as: (10) The Hamiltonian and structure-preserving operator execution unit includes Hamiltonian evaluation, state gradient, antisymmetric structure mapping, split execution, symmetric integral, energy detection, and symmetric structure detection circuits. A general Hamiltonian system can be represented as: (11) The boundary condition hardware engine includes a boundary descriptor register, a boundary node identifier, a virtual mesh cell generator, a boundary value and boundary flux calculator, a periodic address mapper, an absorbing boundary state machine, a cross-region halo exchange controller, and a multiphysics coupling interface.

[0061] Fixed value boundary, normal derivative boundary, and mixed boundary are respectively represented as: (12) (13) (14) For first-order normal discretization, the virtual mesh element values ​​can be generated from the internal nodes and the given normal gradient: (15) In the formula, For the field values ​​of the virtual mesh cells outside the boundary, The field value of the internal grid nodes adjacent to this boundary, where q is a given normal gradient or flux. The discrete distance is along the boundary normal. The conservation law and error control unit can perform detection after each operator, operator group, time step, or several time steps. For the conserved quantity Q, its normalized deviation can be expressed as: (16) In the formula, This represents the theoretical change caused by boundary inputs, source terms, or external actions. For incompressible fluids, Hamiltonian systems, and linear equations, these can be calculated separately: (17) (18) (19) In the formula, Let be the divergence residual norm of the incompressible constraint, and u be the velocity field; For Hamiltonian relative drift, and These are the Hamiltonian values ​​for adjacent submitted / candidate states, respectively. Let A be the residual norm of the linear equation, A be the system matrix, x be a candidate solution, and b be the right-hand side term. The conservation law and error control unit stores the candidate state in isolation from the most recently submitted state. A candidate state is atomically submitted when all mandatory thresholds are met; otherwise, based on the fault classification, local recalculation, global rollback, improving accuracy, reducing the time step, increasing the number of iterations, switching the numerical algorithm, switching the execution domain, or enabling redundant cross-validation are performed.

[0062] The multi-domain selection and scheduling unit can identify operator nodes with common inputs, common neighborhoods, the same topology, or continuous single-consumer dependencies, and combine them into composite operators. A continuous operator chain can be represented as: (20) In the formula, , and These represent three mathematical operators executed sequentially according to data dependency order, denoted by "". " indicates operator composition, and the whole operation is executed first." , then execute Finally, execute The fusion controller performs dependency checks, shape and precision compatibility checks, boundary consistency checks, on-chip buffer capacity checks, and intermediate object lifecycle allocation. After fusion, intermediate results are transferred via on-chip SRAM, neighborhood buffers, spectral coefficient caches, or bypass across execution units; in case of insufficient resources or execution anomalies, the controller splits the composite operator and replays it from the nearest safe boundary.

[0063] Optionally, the unified operator descriptor can be generated by a software compiler or dynamically generated by hardware from instructions, computation graphs, or equation descriptions; the descriptor can be fixed-length, variable-length, hierarchical encoded, compressed encoded, or a combination of basic and extended fields.

[0064] Heterogeneous execution arrays can be integrated into a single die, multiple dies, chips, packages, or compute nodes. Boundary condition engines and conservation law control units can be centrally located or distributed within each execution unit or chip.

[0065] Mathematical operators may also include fractional differentials, integral-differentials, nonlocal differentials, variational differentials, probabilistic differentials, stochastic differentials, tensor differentials, and user-defined composite operators; the hardware execution domain may also include memristors, phase-change memory, superconductors, optoelectronic hybrids, or other modules capable of performing corresponding mathematical operations.

[0066] Without departing from the core idea of ​​this invention, any equivalent substitutions or modifications made to the number of modules, connection method, descriptor encoding, cost model, numerical format, core partitioning, interconnection protocol and recovery strategy are all alternative implementations of the technical solution of this invention.

[0067] The multi-domain heterogeneous operator field processor provided in this embodiment makes mathematical operators such as differentiation, integration, spectral transformation, graph propagation, Hamiltonian evolution, and equation solving directly recognizable, scheduled, and verified first-level architecture objects by providing an operator field processor; it provides a unified operator descriptor to express operators, field objects, meshes or topologies, boundary conditions, numerical discretization, precision, error, conservation laws, candidate execution domains, and backoff strategies in the same data structure; it provides a multi-domain selection mechanism to allow the same mathematical operator to be selected among local spatial domains, spectral domains, sparse matrix domains, graph domains, state domains, and digital, analog in-memory, optical, or core-particle execution domains based on problem size, boundaries, topology, precision, energy consumption, data transport, and hardware status; it provides a boundary condition hardware engine to incorporate boundary node identification, virtual mesh cell generation, boundary flux, periodic mapping, halo exchange, and coupling interface processing into the hardware data path; and it provides a conservation law and error control unit to enable numerical residuals and invariant deviations to participate in state submission, precision adjustment, time step adjustment, algorithm switching, execution domain switching, and recalculation.

[0068] This invention also provides a heterogeneous operator core system, including: a control core, the control core comprising a unified operator descriptor parsing unit and a multi-domain selection and scheduling unit, used to receive an operator graph, parse or generate unified operator descriptors corresponding to mathematical operator nodes, and generate at least two candidate execution paths based on the unified operator descriptors, input data features and resource status of each heterogeneous operator core, and determine the target execution path from them; At least two heterogeneous operator cores, which have different data access modes, operational structures or numerical execution methods, and constitute a heterogeneous operator execution array, are used to perform different operations in local differentiation, integration and state evolution, spectral domain operations, sparse graph operations, Hamiltonian and structure preservation operations, and linear or nonlinear equation solving operations, and each heterogeneous operator core executes the corresponding mathematical operator according to the target execution path determined by the control core; Storage cores are used to store field data, state data, grid data, topology data, boundary data, operator coefficients, and intermediate results. Chip interconnection networks are used to transmit unified operator descriptors, field data, state data, boundary halo data, execution results, and control information between control chips, heterogeneous operator chips, and storage chips. A cross-core boundary condition processing module is used to generate, update, or exchange cross-core boundary data based on the boundary conditions in the unified operator descriptor; and, The global conservation law and error control module is used to calculate the numerical residual, error estimate or global conservation quantity deviation corresponding to the execution result of the mathematical operator, and generate status submission instructions or execution parameter adjustment, numerical algorithm switching, execution path switching, local recalculation and global recalculation instructions based on the calculation results. The control core selects a target heterogeneous operator core based on the capability description, operating status, and unified operator descriptor of each heterogeneous operator core. When the target heterogeneous operator core fails or the verification of the global conservation law and error control module fails, the corresponding mathematical operator is migrated to a backup heterogeneous operator core. The control core, heterogeneous operator core, cross-core boundary condition processing module, and global conservation law and error control module constitute a closed-loop execution path for cross-core path selection, boundary configuration, operator execution, result verification, status submission, or path reconstruction.

[0069] In practice, each operator core is equipped with a capability description register to record the supported operator categories, data types, numerical precision, maximum problem size, boundary type, mathematical representation domain, conservation law detection type, local storage capacity, operating load, temperature, power consumption, calibration status, and error status.

[0070] Chip interconnects consist of a control link, a data link, and an optional conservation reduction link. The control link transmits descriptors, schedules, heartbeats, and exception messages; the data link transmits field data, state data, spectral coefficients, topology indexes, and halo data; and the reduction link summarizes local mass, energy, momentum, residuals, or other invariants.

[0071] The compiler receives equations, numerical programs, tensor computation graphs, neural operator models, graph programs, or user-defined operator graphs, and performs operator identification, discretization, dependency analysis, mesh and topology analysis, boundary extraction, operator fusion, field object partitioning, candidate execution domain generation, initial precision planning, descriptor generation, core mapping, and backoff path generation.

[0072] During runtime, actual latency, energy consumption, cache hit rate, boundary communication traffic, numerical residuals, conservation bias, and failure states are collected. Corrections are made through lookup tables, recursive least squares, online gradient updates, or lightweight model updates to address path costs. New models are first written to a shadow parameter table, then atomically committed after quality gating. In case of anomalies, the model is rolled back to the most recent checkpoint to prevent the learning process from disrupting stable execution.

[0073] This invention also provides a method for executing multi-domain heterogeneous operator graphs, the method comprising: receiving an operator graph containing multiple mathematical operator nodes and their data dependencies; A unified operator descriptor is obtained or generated for each mathematical operator node, wherein the unified operator descriptor includes at least the operator category, the data object to be applied, the grid or topology, the boundary conditions, the numerical discretization method, the numerical precision, the error threshold, the conservation law or structural constraints, and the candidate execution domain information. At least two candidate execution paths are generated based on the unified operator descriptor, input data characteristics and hardware resource status. Each candidate execution path is jointly defined by the mathematical representation domain, numerical algorithm, numerical precision and hardware execution domain. Filter out candidate execution paths that do not meet boundary conditions, numerical precision, storage capacity, hardware availability, or conservation law constraints, and determine the target execution path from the remaining candidate execution paths; Configure the field-state storage system and boundary condition hardware engine to generate, update, or exchange the boundary data required for the execution of mathematical operators; Schedule mathematical operator nodes to heterogeneous operator execution units or heterogeneous operator cores corresponding to the target execution path; Obtain the execution results and calculate the numerical residuals, error estimates, or deviations of conserved quantities; When the numerical residual, error estimate, and conserved quantity deviation meet the corresponding thresholds, the execution result is submitted or transmitted; when at least one of them does not meet the corresponding threshold, at least one of the following is adjusted: numerical precision, time step, number of iterations, numerical algorithm, mathematical representation domain, hardware execution domain, operator execution unit, or operator core, and the corresponding mathematical operator node is re-executed.

[0074] In practice, the execution process of the multi-domain heterogeneous operator graph method can be as follows: Step 1: Obtain the program to be executed and convert it into an operator graph containing multiple mathematical operator nodes and data dependencies.

[0075] Step 2: Identify operator type, input / output field objects, mesh or topology, boundary conditions, numerical discretization, precision, error, and conservation law constraints.

[0076] Step 3: Generate a unified operator descriptor for each operator node and establish a field-state object descriptor.

[0077] Step 4: Generate multiple combinations of mathematical representation domains and hardware execution domains based on the operator capability table and data characteristics.

[0078] Step 5: Filter candidate paths that do not meet the requirements of boundary, accuracy, capacity, calibration, or conservation laws.

[0079] Step 6: Estimate the latency, energy consumption, error, data transfer, and risks of the remaining path, and determine the target execution path.

[0080] Step 7: Configure the field-state storage system, boundary condition hardware engine, and target execution unit or core.

[0081] Step 8: Execute mathematical operators to generate candidate results that are isolated from the most recently committed state.

[0082] Step 9: Calculate the residuals, local errors, global errors, or conserved quantity deviations of the candidate results.

[0083] Step 10: When the acceptance conditions are met, atomically submit the candidate results and release intermediate objects and resources.

[0084] Step 11: If the acceptance criteria are not met, adjust the precision, time step, number of iterations, numerical algorithm, mathematical representation domain, hardware execution domain, or recalculation range, and re-execute.

[0085] Step 12: Record actual performance and error data, and update the path cost model or shadow model.

[0086] Step 13: Continue executing subsequent operator nodes until the operator graph is complete or an unrecoverable exception occurs.

[0087] The method of the present invention will be further described below with reference to several specific embodiments. The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0088] The embodiments are used to illustrate the implementable structure, data path and control process of the present invention, and are not intended to limit the scope of protection.

[0089] The bit width, data format, clock frequency, buffer capacity, grid size, and interface protocol in each embodiment can be adjusted according to the target device or process.

[0090] The following verification results are derived from the actual execution of the Python golden reference model, C language reference programs, and RTL static structure checks in the respective embodiment project packages. The purpose is to verify the consistency of mathematical models, path decisions, exception handling, state machine strategies, and module hierarchies. Since the current platform does not have Icarus Verilog, Verilator, Yosys, Vivado, Quartus, and Design Compiler installed, nor is it configured with accurate FPGA devices and valid standard cell technology libraries, this version does not present functional-level expected timing diagrams or software cost model results as actual RTL dynamic simulation, FPGA placement and routing, or ASIC process mapping results.

[0091] Table 1

[0092] As shown in Table 1, all fourteen embodiments completed closed-loop checks at the reference model, C reference program, and RTL static level; dynamic HDL simulation and target process backend results still need to be executed in the corresponding EDA environment. The overall test scale and verification levels are detailed in Table 1. Figure 16 .

[0093] Example 1: Single-chip digital operator field processor like Figure 1 As shown, the single-chip digital operator field processor integrates a host interface, operator graph interface, descriptor parsing unit, multi-domain scheduling unit, field-state storage system, heterogeneous execution array, boundary condition hardware engine, conservation law and error control unit, and on-chip interconnection network in the same digital integrated circuit.

[0094] The host interface can be AXI4-Lite, PCIe, CXL, on-chip bus or other register and DMA interfaces.

[0095] In an unrestricted implementation, the control plane uses a single clock domain, while the task and data planes use configurable clock domains. Descriptors, control status, and performance counters are accessed via register mapping, and field data is transferred via DMA or streaming interface.

[0096] On-chip interconnects set up different virtual channels for control messages, field data, boundary data, and reduction results, and implement flow control through a credit or ready-to-effective handshake mechanism.

[0097] The task execution process proceeds in the following order: Operator graph loading, dependency readiness assessment, descriptor decoding, candidate path generation, resource reservation, boundary data preparation, execution unit startup, candidate result writing, residual and conservation law detection, and commit or rollback.

[0098] Status submission uses a version number and an atomic valid bit; candidate statuses will not overwrite the most recently submitted statuses until verification is complete.

[0099] This represents the spatial location vector or spatial coordinate point of the field variable to be determined within the computational domain. It is not a new physical field quantity to be determined, but a spatial independent variable that determines the field quantity, boundary parameters, normal vector, and boundary node addresses.

[0100] For d-dimensional problems, it can be written as In a two-dimensional problem, X = (x, y) In three-dimensional problems .when hour, Represents the computational domain Spatial position in; when hour, Represents the boundary of the computational domain Spatial position on.

[0101] In this embodiment, X represents the spatial coordinates of the field-state object in the global computational domain. The boundary condition hardware engine determines whether the location belongs to an internal node or a boundary node based on the coordinates and boundary label corresponding to X, and generates u(X), boundary value, or boundary flux accordingly.

[0102] In a single-chip implementation, commonly used differentiation, integration, spectral domain, sparse graph and solution functions can be used as dedicated execution units, while low-frequency or unsupported operators can be sent to a general fallback unit.

[0103] Each execution unit is configured with clock gating, partial reset, exception status register, and performance counter to support power consumption control and fault isolation.

[0104] Verification results and technical effects: The single-chip prototype uses the Q16 reference model to verify the consistency of local differentiation, integration, spectral domain, graph, Hamiltonian, solver and boundary path, and checks the top-level RTL file structure and C driver. The verification results are shown in Table 2.

[0105] Table 2

[0106] The results show that the single-chip top layer can cover the main operator types under a unified interface, and the reference model is consistent with the expected values. This conclusion belongs to the prototype functional consistency verification and is not equivalent to dynamic RTL simulation or device synthesis results. See the corresponding result figure. Figure 17 .

[0107] Example 2: Unified Operator Descriptor Resolution like Figure 2 As shown, the descriptor receiver receives the basic descriptor and optional extended descriptors according to a fixed word width, and completes the assembly using the frame length field and end marker. The parsing pipeline includes the receive and assembly stage, version and verification stage, default value normalization stage, basic field parsing stage, extended field parsing stage, microcode generation stage, and dispatch FIFO.

[0108] Field validation includes at least the following: whether the opcode is supported, whether the dimension and order fall within the allowed range, whether the boundary type and grid type are compatible, whether the precision format is supported by the target execution unit, whether the candidate execution domain mask is empty, whether the extended field pointers are aligned, and whether the error threshold is a valid non-negative number. If validation fails, the parsing unit outputs an error code, field index, and original descriptor identifier, and does not proceed to the execution array.

[0109] The normalization logic fills in pre-configured default values ​​when fields are omitted. For example, it selects the default safety precision when no precision is specified; it reads the field object or runtime configuration when no time step is specified; it uses the boundary label in the object descriptor when no boundary is specified; and it automatically appends a high-precision safety path when no fallback path is specified.

[0110] Microcode control words are used to configure address generation, template coefficients, transform length, precision conversion, boundary engine, conservation law mask, and backoff control. The descriptor parsing unit also retains high-level fields in the descriptor cache for runtime performance modeling and exception recovery reading.

[0111] In this embodiment, This represents the spatial location vector of the field object associated with the unified operator descriptor. The mesh, boundary type, and boundary parameters in the descriptor jointly define... Computational domain and boundaries This allows the boundary conditions to be parsed for a specific spatial location. Constraints.

[0112] Verification results and technical effects: The descriptor validation covers basic field packaging and parsing, default value normalization, automatic domain selection, version and dimension anomalies, extended field validation, and random round-trip consistency. The validation results are shown in Table 3.

[0113] Table 3

[0114] The results demonstrate that the unified operator descriptor can stably carry operator, mesh, boundary, precision, conservation, and backoff semantics, and can prevent illegal descriptors from being executed before the array. See the corresponding result figure. Figure 18 .

[0115] Example 3: Multi-domain selection like Figure 4 As shown, the multi-domain scheduler first generates a candidate set based on the opcode, grid, boundary, precision, capacity, and resource status, and then estimates the latency, energy consumption, error, and data transfer volume of each path. For a size of... take For a two-dimensional periodic grid, the spatial template path and the spectral path can be estimated using the following period estimation models: (twenty one) (twenty two) In the formula, CFFT represents the number of prediction execution cycles for the spectral path; Cstencil represents the number of prediction execution cycles for the local spatial template path. This represents the total number of points in the two-dimensional grid. and , respectively, represent the number of grid points in the x and y directions; L is the total number of butterfly series in the 2D Fast Fourier Transform; I is the number of local template iterations; P is the number of effective grid points in the template participating in one local update; The equivalent cycle cost for a single butterfly operation; The equivalent periodic cost of a single spectral coefficient multiplication; cmac is the cycle cost of one equivalent data transfer; cmac is the equivalent cycle cost of a single multiply-accumulate operation. The equivalent periodic cost for a single boundary halo exchange or update; The scheduler selects a spectral path only if the grid is of a supported period size, spectral resources are available, spectral error prediction does not exceed a threshold, and the spectral path estimation period is less than the local template path estimation period; otherwise, it selects a local spatial path.

[0116] In this embodiment, This indicates the spatial location of the field data processed by the candidate execution path. Spatial domain paths directly surround... Template access is performed on the spectrum domain and its neighborhood; although the spectrum domain path is executed in wavenumber space, its input and output still correspond to physical spatial locations. field defined above .

[0117] To reduce model mismatch, the actual cycle time, buffer pauses, boundary communication, and errors are written back to the cost table during runtime. The calibrator uses saturated fixed-point updates, with limited update magnitude; it reverts to a static safety table in case of model drift or anomalies.

[0118] Verification results and technical effects: The multi-domain scheduling reference model was validated for candidate filtering, spatial and spectral domain cost evaluation, error constraints, and resource constraints. The validation results are shown in Table 4.

[0119] Table 4

[0120] The results demonstrate that the scheduler can compare equivalent mathematical paths while satisfying error and boundary constraints, and backtrack to local spatial paths for tasks that do not meet the spectral domain conditions.

[0121] See the corresponding result image. Figure 19 .

[0122] Example 4: Boundary Condition Hardware Engine like Figure 8 As shown, the boundary node identifier classifies accesses into internal nodes, physical boundary nodes, cross-block nodes, cross-core nodes, or coupled interface nodes based on global coordinates, local block coordinates, mesh size, boundary labels, and coupling labels.

[0123] Internal nodes directly access local farm storage; Physical boundary nodes are used for boundary value or virtual unit calculations. Cross-regional nodes enter the halo zone for exchange; The coupled interface node enters interpolation and flux matching.

[0124] In a fixed-point implementation, the boundary coefficients and field values ​​are in Q16.16 format, and the multiplier output is rounded and saturated to restore it to the target format.

[0125] The Robin boundary is obtained by transposing terms and performing fixed-point division to obtain the virtual cell value; An error flag is generated if the divisor is too small, overflows, or the normal direction is not supported, triggering a software or high-precision rollback.

[0126] The period mapper generates the target address based on the relative side index and phase offset; the halo exchange controller maintains the transmit queue, receive queue, layer number, direction number, and version number, and only sets the boundary ready after the halo data of the same layer and the same field object has arrived completely.

[0127] The multiphysics coupling interface can perform coordinate transformation, linear interpolation, unit conversion, and flux continuity check.

[0128] In this embodiment, Spatial location vectors processed by the boundary node identifier.

[0129] when At that time, the Dirichlet condition is Directly stipulated Neumann condition in Regulations Along the outer normal The directional derivative or boundary flux; Robin conditions are at the same boundary location. Establish a linear combination constraint between the field value and the normal derivative.

[0130] In terms of hardware, It can be represented by global coordinates, local block coordinates, and boundary labels, and used to index the corresponding boundary parameters.

[0131] Verification results and technical effects: The boundary engine reference model covers fixed-value, normal derivative, mixed, periodic, symmetric, reflective, absorbing, and coupled boundaries, and examines ghost cells, boundary values, flux, and address mapping. The verification results are shown in Table 5.

[0132] Table 5

[0133] The results demonstrate that boundary conditions can be identified and computed within a unified data path, and that periodic mapping, reflection, and coupling boundaries can all output definite address or numerical results. See the corresponding result figures below. Figure 20 .

[0134] Example 5: Conservation Law-Driven Adaptive Execution like Figure 9 As shown, after candidate states are generated, the local reducer calculates the mass, energy, momentum, charge, divergence, minimum, and maximum values ​​of each block; the global reducer forms global statistics through on-chip or chip-level networks. To avoid misjudging boundary inputs and source terms as non-conservative, the comparator subtracts the theoretical increment given by the descriptor from the candidate changes.

[0135] The control strategy is stratified according to severity. When local residuals exceed the limit and global constraints are satisfied, only the corresponding block is recalculated; when global errors exceed the limit, the entire time step is rolled back; when mixed precision rounding causes errors, the precision is increased; when stability constraints fail, the time step is reduced; when Hamiltonian energy drift occurs, the system switches to symplectic integral; when analog in-memory residuals exceed the limit, the system switches to digital refinement or digital recalculation.

[0136] Each candidate state carries a version number, checkpoint number, and retry count. If the retry limit is exceeded, an unrecoverable exception is generated and the host is notified.

[0137] State commits and rollbacks use double buffering or multi-version storage to ensure that the reader can only observe committed states.

[0138] In this embodiment, This indicates the spatial sampling location corresponding to the conserved quantity or local residual. Local reduction occurs in different... The local physical quantities are calculated on the grid points, cells, or nodes represented, and then global conservation statistics are formed; the boundary input terms come from... The boundary position.

[0139] Verification results and technical effects: The conservation law control reference model was validated for actions such as acceptance, local recalculation, global recalculation, algorithm switching, execution domain switching, and host termination. The validation results are shown in Table 6.

[0140] Table 6

[0141] The results show that conserved quantities and errors can not only be monitored, but also directly drive closed-loop adjustments in execution granularity, numerical accuracy, algorithm, and hardware domains. See the corresponding results figure below. Figure 21 .

[0142] Example 6: Execution of the Poisson Equation like Figure 12 As shown, consider the Poisson equation and its boundary conditions: (twenty three) (twenty four) In the formula, u is the scalar field to be determined; f is the source term or volume excitation of the Poisson equation; For the computational domain, Let g be the boundary value; g is the Dirichlet field value given on the boundary. The compiler transforms the problem into operators such as boundary initialization, Laplace, residuals, preconditioning, state updates, and convergence checks. Regular meshes can use five-point or seven-point templates; periodic meshes can use FFT, spectral coefficient division, and inverse FFT; unstructured meshes can use sparse graphs or finite element paths.

[0143] The spatial domain actuator supports Jacobi, weighted Jacobi, matrix-free conjugate gradient, and multigrid control.

[0144] The conjugate gradient controller maintains the solution vector, residual vector, search direction, matrix-vector product and dot product reduction state; the multigrid controller sequentially performs pre-smoothing, residual constraint, coarse grid solution, error extension and post-smoothing.

[0145] The spectral domain actuator performs special processing on zero-frequency modes and irreversible frequencies. For purely periodic problems with a non-zero mean of the right-hand side, the actuator outputs an anomalous solvability; for problems that meet the solvability conditions, the zero-frequency modes are set to zero or have a fixed average value according to a preset normalization strategy.

[0146] After each iteration, the residual norm is calculated. If the tolerance is reached, the result is submitted; otherwise, the iteration continues or the preconditioner is switched.

[0147] In the Poisson equation corresponding to this embodiment, Represents the spatial position vector within the computational domain Ω. for The scalar field to be determined at the location, for The source term at the location; when hour, The Dirichlet field value given at this boundary location. In a two-dimensional regular mesh, this can be specifically written as... .

[0148] Verification results and technical effects: The Poisson reference model was validated for periodic spectral domain solution generation, weighted Jacobi, matrix free conjugate gradient, and multi-domain path selection. The validation results are shown in Table 7.

[0149] Table 7

[0150] The results show that unified scheduling can select spectral or spatial domain paths for different boundaries and problem sizes, while maintaining residual convergence and numerical consistency of the solution. See the corresponding results figure. Figure 22 .

[0151] Example 7: Heat Conduction and Adaptive Time Step Consider the two-dimensional heat conduction equation: (25) In the formula, T represents the temperature field at spatial location and time; t represents physical time. is the thermal diffusivity, characterizing the rate of temperature diffusion; s is the equivalent heat source term per unit volume. Let be the Laplace term of the temperature field. Local differential elements calculate the temperature Laplace, source term elements superimpose heat sources, and integral elements generate full-step candidate values ​​and two half-step candidate values. The difference between the full-step and the two half-step values ​​is used as a local error estimate; if the error exceeds the tolerance, the time step is rolled back and reduced; if the error is significantly less than the tolerance and stability allows, the time step is increased.

[0152] For a uniform two-dimensional mesh, the upper limit of stability for explicit diffusion updates can be written as: (26) In the formula, This is the time step for explicit integration; and They are respectively , The spatial grid step size is oriented; κ represents the thermal diffusivity, and this inequality gives the upper limit of stability for two-dimensional explicit diffusion discretization. The time-step controller simultaneously considers the upper limit of error, the upper limit of stability, the minimum and maximum time steps, the growth factor, the shrinkage factor, and the continuous low error count. The adiabatic boundary is generated by Neumann boundary hardware, and the periodic boundary reads data from the opposite side through a period mapper.

[0153] In the heat conduction problem involved in this embodiment, Representing the spatial location within a material or computational region, the temperature field can be written as: .when When the temperature is adiabatic, the Neumann boundary defines the normal temperature gradient or heat flux at that location; a given temperature boundary is defined by the Dirichlet condition. Boundary values.

[0154] Verification results and technical effects: The heat conduction reference model was validated for five-point Laplace, diffusion stability, full-step-double-half-step error estimation, and time step growth, hold, shrink and clamping strategies. The validation results are shown in Table 8.

[0155] Table 8

[0156] The results demonstrate that the adaptive controller can adjust the time step between error tolerance and diffusion stability constraints, while maintaining a finite temperature field and non-incremental peak values. See the corresponding results figure. Figure 23 .

[0157] Example 8: Incompressible Fluid Execution For incompressible fluids, a prediction-pressure Poisson-projection correction process is employed. First, predicted velocities are generated from convection and viscous diffusion units. Then, the right-hand side of the pressure equation is constructed from the predicted velocity divergence. After solving for the pressure, the velocity is corrected using the pressure gradient. Finally, the divergence of the corrected velocity is checked.

[0158] (27) (28) (29) In the formula, For the velocity field of the nth time layer, The predicted velocity field before pressure projection. The corrected velocity field for the next time layer; For time step; Kinematic viscosity; For the physical force or external source item of the nth time layer; For the pressure field of the next time layer; For fluid density; and These represent the divergence and gradient operators, respectively. The time step is jointly determined by the convection CFL and the viscous diffusion constraint. If the pressure residual does not converge, the controller increases the number of pressure iterations or switches the preconditioner; if the divergence still exceeds the limit after projection, the velocity field is not submitted, but the time step is reduced or the pressure is resolved. No-slip, free-slip, inlet, outlet, and periodic boundaries are handled uniformly by the boundary engine.

[0159] In the incompressible fluid problem involved in this embodiment, To represent the spatial position in the flow field, velocity, pressure, and body force can be written as follows: , and ).when hour, Used to determine the location of physical boundaries such as walls, inlets, and outlets, and to apply corresponding velocity, pressure, or flux boundary conditions.

[0160] Verification results and technical effects The verification results of the incompressible fluid reference model prediction—pressure Poisson—projection correction process, CFL strategy, pressure residual reduction and divergence constraint are shown in Table 9.

[0161] Table 9

[0162] The results show that pressure projection can significantly reduce the divergence of the predicted velocity field, and residual monitoring can provide a hardware control basis for increasing pressure iteration or reducing the time step. See the corresponding results figure. Figure 24 .

[0163] Example 9: Hamiltonian System Structure Preservation Execution For separable Hamiltonians H(q, p) = T(p) + V(q), the structure-preserving execution unit can be split using Störmer-Verlet: (30) (31) (32) In the formula, and Let be the generalized position and generalized momentum of the nth time level, respectively. It is half-step momentum; Δt is the time step; T(p) is the kinetic energy term; V(q) is the potential energy term; H(q,p)=T(p)+V(q) is the Hamiltonian; This represents the gradient of potential energy with respect to the generalized position; This represents the gradient of kinetic energy with respect to generalized momentum.

[0164] The energy monitor calculates relative energy drift, while the symplectic structure monitor can detect low-dimensional tangent mappings or user-provided structural parameters.

[0165] If the energy or symplectic defect exceeds the limit, the controller reduces the time step, switches the splitting order, selects a higher-order symplectic method, or rolls back the candidate state.

[0166] This embodiment mainly performs the structure-preserving integral in the phase space state (q, p).

[0167] If the Hamiltonian system originates from the spatial discretization of a continuous field, then It still represents the spatial location in the physical computational domain before discretization; q and p can be determined by each The field degrees of freedom at a given location are discretely formed. The meanings differ from those of the phase space state variables q and p.

[0168] Verification results and technical effects: The Hamiltonian reference model compares structure-preserving integrals with ordinary explicit integrals and verifies symplectic structure, time reversal, energy drift, and adaptive time step strategies. The verification results are shown in Table 10.

[0169] Table 10

[0170] The results demonstrate the superior long-term stability of the structure-preserving execution unit compared to ordinary explicit integration, and verify the energy-driven acceptance and rejection mechanism. See the corresponding results figure. Figure 25 .

[0171] Example 10: Unstructured Mesh and Graph Operators Unstructured meshes and graph operator implementations use CSR, COO, or block sparse formats to store row pointers, column indices, edge weights, node fields, and edge fields. The edge flow decoder generates neighbor access requests, the Gather cell reads neighbor field values, the sparse multiply-accumulate array calculates message or matrix contributions, and the Scatter cell writes the results back to the target node.

[0172] Write conflict handling can employ methods such as merging at the same address, atomic accumulation, node coloring, edge coloring, partition reduction, or merging after local caching. The partition scheduler performs load balancing based on the number of edges, nodes, and cross-partition edges in each partition, and prefetches remote node values ​​through the halo interface.

[0173] For a three-node triangular finite element method, the element computation unit generates the area, shape function gradient, and local stiffness matrix based on the node coordinates, and then sends nine contributions to the global assembly path. Boundary labels are used to identify fixed values, normal flux, and coupling interface nodes. Graph Laplacian results, finite element assembly symmetry, and row and constraint conditions can be checked by the residual elements.

[0174] In the unstructured mesh or finite element problem corresponding to this embodiment... This represents the physical space coordinate vector of a node, integration point, or interface point. In a two-dimensional triangular element, it can be written as... Boundary labels Determine if the node is located and in the corresponding Apply fixed values, normal flux, or coupling interface conditions at the point.

[0175] Verification results and technical effects: The graph operator reference model covers CSR sparse matrix-vector multiplication, graph Laplace, message aggregation, isolated nodes, Tri3 finite element assembly, and graph partitioning. The verification results are shown in Table 11.

[0176] Table 11

[0177] The results demonstrate that unstructured meshes and graph paths can perform Gather, multiply-accumulate, Scatter, and finite element assembly within the same sparse data path while preserving key algebraic properties. See the corresponding results figure. Figure 26 .

[0178] Example 11: Heterogeneous Operator Chip System like Figure 11 As shown, the control core broadcasts a capability discovery request upon system startup. Each operator core returns its capability register, local storage capacity, supported accuracy, boundary capabilities, current load, temperature, calibration status, and error status. The control core establishes a capability table and generates primary and backup targets for each task.

[0179] In a non-restrictive implementation, the core interconnect uses a 128-bit Flit containing message type, source identifier, destination identifier, task identifier, sequence number, payload, and CRC fields. Control and data use separate virtual channels, and the receiver uses credit flow control to prevent buffer overflows. Continuous operators are preferentially mapped to cores within the same core or those sharing local storage to reduce data migration.

[0180] The health monitor determines the core state based on heart rate, temperature, link errors, execution timeouts, and conservation anomalies. When a core fails, the control core freezes its corresponding output, restores the most recent checkpoint, migrates tasks to a backup core, and re-establishes halo dependencies. Global conservation variables are aggregated through hierarchical reduction or dedicated reduction messages.

[0181] In the corresponding core system of this embodiment, This represents the physical spatial location within the global field object. After the global computational domain is divided into multiple cores, the same... It can be mapped to global coordinates and local core coordinates; when When located near the boundary between core and grain regions, data consistency of adjacent local fields is maintained through halo region exchange.

[0182] Verification results and technical effects The verification results of the core reference model verification capability matching, target core selection for different operator categories, fault migration, and cross-core conservation reduction are shown in Table 12.

[0183] Table 12

[0184] The results show that core-particle capability description and global scheduling can support task assignment based on operator semantics and perform migration or rejection of submission in the event of faults or conservation anomalies. See the corresponding result figure. Figure 27 .

[0185] Example 12: Digital-Analog Hybrid Execution like Figure 14 As shown, the digital controller selects the digital, analog in-memory, or hybrid path based on matrix multiplexing counts, dynamic range, allowable error, analog macro calibration status, data conversion overhead, and digital backoff resource status. The analog in-memory macro body, acting as a process-dependent black box, connects to the digital logic through standardized DAC inputs, array startup, ADC outputs, calibration, and fault interfaces.

[0186] After the analog array generates an approximate solution or an approximate matrix-vector product, the digital residual unit is calculated: (33) In the formula, The residual vector is calculated on the digital side; A is the linear system matrix or discrete operator; x a This is an approximate candidate solution generated by simulating the in-memory computation path; b is the right-hand side vector; ε is the allowable residual tolerance; and ||r|| is the preset norm of the residual vector. If the tolerance is met, the approximate result is accepted; otherwise, it is used as the initial value for digital iteration for refinement, or the process is directly switched to the digital solver. The calibration manager estimates the gain and bias using the reference vector. Digital safety backoff is triggered by ADC saturation, DAC clipping, temperature drift, calibration failure, or persistent residual exceeding limits.

[0187] In the digital-analog in-memory hybrid execution involved in this embodiment, This represents the spatial location of the continuous physical field corresponding to the discrete equation. The system matrix A is derived from the spatial location. Discrete operators and boundary conditions together form the discrete unknowns; each discrete unknown corresponds to a set of spatial locations. The field degrees of freedom.

[0188] Verification results and technical effects: The digital-analog hybrid reference model validates digital, analog, and hybrid path selection, calibration, error tolerance, refinement, and digital backoff. The validation results are shown in Table 13.

[0189] Table 13

[0190] The results demonstrate that the execution domain selector can allocate tasks to digital, analog, or hybrid paths based on the error target, and uses digital residuals to ensure that the approximate results do not exceed a given tolerance. See the corresponding result figure. Figure 28 .

[0191] Example 13: Operator Fusion like Figure 10 As shown, the fusion controller identifies typical chains in the descriptor window, such as gradient-divergence-update, Laplacian-state update, FFT-spectral coefficient multiplication-IFFT, and matrix-vector multiplication-bias-activation. Fusion is only allowed when the intermediate objects have no external observers, the data shape and precision are compatible, the boundary semantics are consistent, the conservation law checkpoints are not violated, and the on-chip cache is sufficient.

[0192] During fusion execution, intermediate objects are allocated to on-chip slots and their reference counts and lifecycles are maintained. A bypass crossbar switch sends the output of the previous stage directly to the input of the next stage; only the final result is written back to off-chip memory when necessary. When the cache is insufficient, intermediate objects selectively overflow; in the event of an execution exception, the process is split and replayed according to the fusion boundary to ensure granular recovery and correctness.

[0193] In this embodiment of operator fusion, This represents the spatial location affected by multiple consecutive operators. Operators such as gradient, divergence, Laplace, and state update can be performed simultaneously. Execute continuously over its neighborhood; merging must not change The semantics and boundary parameters of the original boundary conditions.

[0194] Verification results and technical effects: The fusion reference model was used to verify typical operator chain recognition, data dependency constraints, external observation points, accuracy compatibility, buffer overflow, and split rollback. The verification results are shown in Table 14.

[0195] Table 14

[0196] The results show that operator fusion not only reduces kernel startup but also significantly reduces off-chip data movement through on-chip intermediate object residency. See the corresponding results figure. Figure 29 .

[0197] Example 14: Runtime Self-Learning Path Update like Figure 15 As shown, the runtime learning unit encodes operator type, problem size, boundary type, sparsity, accuracy, resource status, and calibration status into fixed-point features, predicts latency, energy consumption, error, and failure risk for each feasible path, and performs an exploration-exploitation decision after filtering through hard constraints.

[0198] After the task is completed, the telemetry unit writes back the actual cycle, energy consumption estimate, data transfer, residuals, and failure status. Model updates can use exponential weighted average, recursive least squares, or bounded-point stochastic gradient. To prevent online updates from compromising stability, new parameters are first written into the shadow model, and atomically committed only when the prediction error, failure rate, and constraint satisfaction rate reach thresholds within the validation window.

[0199] The drift detector can detect changes in workload, temperature, or device state based on cumulative sum or sliding window error; upon detecting drift, it temporarily increases the exploration ratio and decreases the confidence of the old model. Model parameters can be saved to external memory via DMA, and the most recent valid checkpoint can be restored upon system restart or abnormal rollback.

[0200] In the runtime path update involved in this embodiment, This represents the spatial location independent variable corresponding to the field problem of the task. The online model remains unchanged. Instead of the physical definition, we choose to process The execution path of its neighboring data; any path switching should maintain The boundary constraints specified therein remain unchanged.

[0201] Verification results and technical effects: The runtime learning reference model validates hard constraint filtering, exploratory selection, online weight update, drift detection, shadow model submission, and checkpoint rollback. The validation results are shown in Table 15.

[0202] Table 15

[0203] The results show that the online performance model can gradually reduce prediction errors under telemetry-driven operation, and limits the impact of erroneous updates on stable execution through shadow parameters and checkpoint mechanisms. See the corresponding results figure. Figure 30 .

[0204] This invention can be implemented using digital integrated circuits, on-chip memory, on-chip networks, field-programmable gate arrays, application-specific integrated circuits, advanced packaging, and chip interconnect technologies. The single-chip implementation is suitable for FPGA prototypes and digital ASICs; the chip implementation can manufacture different operator units using different processes and combine them within a package; the hybrid digital-analog implementation can combine digital control chips with analog in-memory macros, optical computing modules, or high-bandwidth memory chips.

[0205] This invention can be used in scientific computing servers, artificial intelligence servers, edge computing devices, industrial digital twins, robots, medical imaging, aerospace simulation, geophysical inversion, high-performance computing and real-time control systems, and has clear manufacturing and application feasibility.

[0206] The units described in the embodiments of the present invention can be implemented in software or in hardware.

[0207] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof.

[0208] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A multi-domain heterogeneous operator field processor, characterized in that, include: The operator graph interface is used to receive an operator graph consisting of at least one mathematical operator node and the data dependencies between the mathematical operator nodes. The unified operator descriptor parsing unit is used to parse the unified operator descriptor corresponding to the mathematical operator node. The unified operator descriptor includes operator category, applied data object, grid or topology, boundary conditions, numerical discretization method, numerical precision, error threshold, conservation law or structural constraint, and candidate execution domain information. The field-state object management unit and field-state storage system are used to manage and store field data, state variables, grid data, topology data, boundary data, historical states, and intermediate calculation results affected by mathematical operators. The multi-domain selection and scheduling unit is used to generate at least two candidate execution paths based on a unified operator descriptor, input data characteristics, hardware resource status and preset performance-precision constraints, and to determine the target execution path from them. A heterogeneous operator execution array includes at least two types of operator execution units with different data access modes, computational structures, or numerical execution methods, used to execute corresponding mathematical operators according to the target execution path; The boundary condition hardware engine is used to generate, update, or exchange boundary data before or during the execution of mathematical operators based on the boundary conditions in the unified operator descriptor. The conservation law and error control unit is used to calculate the numerical residual, error estimate, or conservation quantity deviation corresponding to the execution result of the mathematical operator, and to generate status submission instructions or instructions for adjusting execution parameters, switching numerical algorithms, switching execution paths, and re-executing based on the calculation results; and, Interconnection network is used to transmit field data, state data, unified operator descriptors and control information between operator graph interface, unified operator descriptor parsing unit, field-state storage system, multi-domain selection and scheduling unit, heterogeneous operator execution array, boundary condition hardware engine and conservation law and error control unit. The candidate execution path is jointly defined by the mathematical representation domain, numerical algorithm, numerical precision and hardware execution domain. The multi-domain selection and scheduling unit, the boundary condition hardware engine and the conservation law and error control unit constitute a closed-loop execution path of path selection-boundary configuration-operator execution-result verification-state submission or path reconstruction.

2. The operator field processor according to claim 1, characterized in that, The unified operator descriptor is encoded using fixed-length encoding, variable-length encoding, hierarchical encoding, or a combination of basic and extended descriptors, and is represented as follows: In the formula, For the first A unified operator descriptor for a mathematical operator node; Operator category; For the operator order and operator parameters; For input field objects and output field objects; For grids, graphs, or topologies; These are boundary conditions; It is a numerical discretization method; For numerical precision and data format; This is the error threshold; For conservation laws or structural constraints; Candidate execution domain; This refers to failure rollback and recovery strategies.

3. The operator field processor according to claim 2, characterized in that, The field-state object management unit establishes an object descriptor for the field object or state object, and the object descriptor is represented as follows: In the formula, It can be a base address or a distributed address; For data shape; For data layout and stride; The width of the halo or overlapping area; For coordinates, grids, or topology indexes; A unit or dimension identifier for physical quantities; For time-based or state-based versions; For validity, ownership, and consistency states; the field-state storage system performs block division, address generation, neighborhood prefetching, halo caching, version management, and intermediate result residency based on the object descriptor.

4. The operator field processor according to claim 1 or 2, characterized in that, The candidate execution path is represented as follows: in, This is the m-th candidate execution path; For mathematical representation domain; For hardware execution domain; It is a numerical algorithm; For numerical precision; the mathematical representation domain includes at least two of the following: local physical space domain, spectrum domain, sparse matrix domain, graph domain, state space domain, phase space domain, low-rank domain, and multi-resolution domain; the hardware execution domain includes at least two of the following: digital fixed-point execution domain, digital floating-point execution domain, mixed-precision execution domain, digital in-memory execution domain, analog in-memory execution domain, optical execution domain, reconfigurable logic execution domain, and external processor rollback execution domain.

5. The operator field processor according to claim 4, characterized in that, The multi-domain selection and scheduling unit calculates the comprehensive cost for each candidate execution path: In the formula, , , , and These include predicted execution latency, predicted energy consumption, predicted numerical error, predicted data transfer volume, and penalties for resource conflicts or execution risks. , , , and For the corresponding weights, This refers to the set of feasible paths that satisfy boundary conditions, numerical accuracy, storage capacity, hardware availability, and conservation laws or structural constraints. For the target execution path, This represents the comprehensive cost function value of the m-th candidate execution path, which is used to comprehensively measure the overall cost of the path in terms of execution latency, energy consumption, numerical error, data transfer volume, and resource conflicts or execution risks; m is the index of the candidate execution path.

6. The operator field processor according to claim 5, characterized in that, The multi-domain selection and scheduling unit is also used to identify multiple mathematical operator nodes in the operator graph that have common input data, common neighborhood data, the same grid or topology, or continuous data dependencies, to synthesize multiple mathematical operator nodes that meet the fusion conditions into a composite operator, and to allocate on-chip storage space or cross-execution unit bypass channels for the intermediate objects of the composite operator. When on-chip storage capacity is insufficient, there are multiple consumer dependencies, conservation law checkpoints cannot be crossed, or the target execution unit is unavailable, the composite operator is split and rolled back to independent execution.

7. The operator field processor according to claim 6, characterized in that, The heterogeneous operator execution array includes local differential operator execution units. Each local differential operator execution unit includes a reconfigurable neighborhood data reading circuit, a row buffer or surface buffer, a halo buffer, a programmable template coefficient storage circuit, a weighted operation array, a local reduction circuit, and a mesh scale correction circuit. It is configured to execute partial derivatives, gradients, divergences, curls, Hessian operators, Laplacian operators, finite difference operators, finite volume flux operators, or local convolution operators. For a five-point Laplacian discretization of a two-dimensional uniform mesh, the local differential operator execution unit generates the output according to the following formula: in, This represents the value of the field variable at the grid node with index (i, j) in a two-dimensional uniform grid; , , and These represent the values ​​of the field variables at the four adjacent grid nodes of the node in the two coordinate directions; i and j are the discrete grid indices in the two spatial coordinate directions; h represents the spatial step size of the uniform grid, i.e., the distance between adjacent grid nodes; This represents the Laplace operator value of the field variable u at node (i, j), used to characterize the local spatial curvature or diffusion intensity of the field variable at that location.

8. The operator field processor according to claim 7, characterized in that, The heterogeneous operator execution array includes an integral and state evolution operator execution unit, which includes a current state register, a historical state buffer, a derivative or increment buffer, a feedback data path, a time step control circuit, a local error estimator, and a state commit and rollback circuit, and is configured to process the state equation. Perform explicit integration, implicit integration, prediction-correction integration, adaptive time-step integration, or structure-preserving integration; in explicit Euler execution mode, candidate states are generated according to the following formula: in, Indicates the system status. Represents physical time. This represents the system state at the nth time level; This represents the candidate state for the next time step calculated by the explicit Euler method; n represents the discrete time step number. This represents the physical time corresponding to the nth time layer; This indicates the time step between two adjacent time layers; The state equation represents the state equation in state and time The rate of change of state or time derivative at a given point is, in physical terms, the instantaneous rate of evolution of the system state over time.

9. The operator field processor according to claim 8, characterized in that, The heterogeneous operator execution array includes spectral domain operator execution units, each comprising a forward transform circuit, a transpose or rearrangement network, a spectral coefficient storage circuit, a spectral coefficient operation circuit, and an inverse transform circuit, and is configured to select between a local spatial domain implementation and a spectral domain implementation for the same mathematical operator; wherein, for a Laplace operator under periodic boundary conditions, the spectral domain operator execution unit performs spectral coefficient mapping according to the following formula: in, Represents scalar field variables in physical space; express The Laplace operator is used to describe the spatial second-order transformation, diffusion, or curvature characteristics of field variables; denoted by , where represents the Fourier transform operator; k represents the wavenumber vector in the spectral domain, corresponding to the spatial frequency; Denotes the Euclidean modulus of the wavenumber vector k. Represents the square of the total spatial wavenumber; Represents the Fourier spectrum coefficients of the field variable u; This represents the result of the Laplace operator in the spectral domain. This relationship shows that, under periodic boundary conditions, the Laplace operation in physical space can be equivalently transformed into a Laplace operation in the spectral domain. Frequency-wise point multiplication.

10. The operator field processor according to claim 9, characterized in that, The heterogeneous operator execution array includes sparse graph operator execution units, each comprising a topology index parsing circuit, an adjacency data cache, an aggregated data path, a distributed data path, a sparse multiply-accumulate array, a write conflict handling circuit, and a dynamic load balancing circuit. These units are configured to perform sparse matrix-vector operations, graph message passing, unstructured mesh neighborhood operations, finite element assembly operations, or graph diffusion operations. The graph Laplacian matrix and its result are expressed as follows: Where L is the graph Laplacian matrix, used to characterize the discrete diffusion and coupling relationships between nodes on a graph or unstructured mesh; D is the degree matrix, whose diagonal elements represent the degree of the corresponding node or the sum of the weights of adjacent edges; A is the adjacency matrix, whose elements represent the connection relationships or coupling weights between nodes; x is the input node field value or state vector; and y is the output vector after the graph Laplacian operator is applied.

11. The operator field processor according to claim 10, characterized in that, The heterogeneous operator execution array includes Hamiltonian and structure-preserving operator execution units. Each Hamiltonian and structure-preserving operator execution unit includes a Hamiltonian function evaluation circuit, a state gradient calculation circuit, an antisymmetric structure mapping circuit, a state splitting circuit, a symmetric integral state update circuit, and an energy or symmetric structure detection interface. It is configured to execute Hamiltonian state evolution satisfying the following equation: Where z is the phase space state vector of the system, usually composed of generalized position q and generalized momentum p; t is physical time; The Hamiltonian function is used to physically characterize the total energy of a system or the corresponding conserved quantity. Let H be the gradient of the state vector z, representing the rate of change of energy with respect to each state component; J is the antisymmetric structure matrix or symplectic structure matrix, used to map the energy gradient to the state evolution direction; For the transpose of J, This indicates that the structure matrix has antisymmetry; The Hamiltonian and structure-preserving operator execution unit is configured to perform at least one of Symplectic Euler, Leapfrog, Verlet, Störmer-Verlet, operator splitting, or Poisson bracketing operations.

12. The operator field processor according to claim 11, characterized in that, The boundary condition hardware engine includes a boundary descriptor register, a boundary node identification circuit, a boundary parameter storage area, a virtual mesh cell generation circuit, a boundary value or boundary flux calculation circuit, a periodic address mapping circuit, a cross-region boundary exchange circuit, and a multiphysics coupling interface processing circuit. It supports at least one of the preset boundary conditions, including Dirichlet boundary conditions, Neumann boundary conditions, and Robin boundary conditions. The expression for the Dirichlet boundary condition is: or in, Let the field variable be the one to be determined; For the computational domain; For the boundary of the computational domain; Indicates the location at the boundary. The given Dirichlet boundary values, i.e., the field value functions pre-defined at the boundary, represent the direct specification at the boundary. The value of ; The expression for the Neumann boundary condition is: Where n is the boundary The outward normal unit vector on; for The directional derivative along the outer boundary can physically correspond to the normal gradient, heat flux density, or flux. Indicates the location at the boundary. The given Neumann normal derivative or boundary flux; The expression for the Robin boundary condition is: Where a and b are the boundary coefficients acting on the field value term and the normal derivative term, respectively; This represents the Robin hybrid boundary function or boundary excitation given at boundary location X; The boundary condition hardware engine also supports periodic boundary conditions, absorbing boundary conditions, symmetric or reflective boundary conditions, discontinuous interface conditions, and multiphysics coupling boundary conditions.

13. The operator field processor according to claim 12, characterized in that, The conservation law and error control unit includes a local error estimator, a residual calculator, a conservation quantity reducer, a threshold comparator, and a state submission and rollback unit, and is designed for conservation quantities. Calculate the normalized bias: In the formula, This is a conserved quantity from the previously committed state. The conserved quantity for the current candidate state. This refers to the theoretical change caused by boundary inputs, source terms, or external actions. The value is positive. A candidate state is submitted when the normalization deviation is not greater than the corresponding threshold. When the normalization deviation is greater than the corresponding threshold, at least one of the following is triggered: local recalculation, global recalculation, numerical precision adjustment, time step adjustment, iteration count adjustment, numerical algorithm switching, mathematical representation domain switching, hardware execution domain switching, or state rollback. The normalization deviation of the conserved quantity Q represents the degree of relative mismatch between the conserved quantity and the theoretical change after numerical evolution; n is the discrete-time layer or state version index of the submitted state. A regularization constant used to prevent the denominator from being zero and to improve the stability of small-scale calculations.

14. The operator field processor according to claim 13, characterized in that, The field-state storage system includes a field data storage area, a state history storage area, a neighborhood data buffer, a boundary data storage area, a topology index storage area, an operator coefficient storage area, a spectral coefficient storage area, and an intermediate result storage area. The neighborhood data buffer is used to cache and exchange overlapping region data or boundary halo data between adjacent grid regions, adjacent computation blocks, adjacent processing kernels, or adjacent cores. The state history storage area is used to save submitted states and candidate states, and restores the most recently submitted state when the conservation law or error check fails.

15. The operator field processor according to claim 14, characterized in that, The heterogeneous operator execution array includes at least two of the following: digital logic computing units, digital in-memory computing units, analog in-memory computing units, and optical computing units. The multi-domain selection and scheduling unit selects the execution unit based on numerical accuracy requirements, input dynamic range, calibration status, data conversion overhead, computational energy consumption, and hardware health status. Candidate solutions are obtained using simulated in-memory computing units. At that time, the digital logic unit calculates the residual according to the following formula: in, It is the residual norm of a linear system, used to measure the degree to which candidate solutions satisfy the discrete equations; For system matrices or discrete mathematical operators; This is a candidate solution vector obtained by simulating the in-memory computing unit; This represents the right-hand side term or external excitation vector of a linear system. Represents the predefined vector norm; A candidate solution is accepted when the residual meets a preset threshold. When the residual does not meet the preset threshold, the candidate solution is used as the initial value for digital iterative refinement, or the process is switched to the digital logic calculation unit for re-execution.

16. The operator field processor according to claim 15, characterized in that, It also includes a runtime path update unit, which collects the actual latency, actual energy consumption, data transfer volume, numerical error, conservation deviation, execution failure rate, temperature or calibration status of each candidate execution path, and updates the path cost model based on at least one of the following methods: statistical average, exponentially weighted moving average, recursive least squares, lookup table correction or fixed-point online learning. The updated model is first written to the shadow parameter table, and after passing the quality gate, it is atomically submitted. In the event of update failure, performance degradation or abnormal drift, it is restored to the most recent valid model checkpoint.

17. A heterogeneous operator core system, characterized in that, include: The control core includes a unified operator descriptor parsing unit and a multi-domain selection and scheduling unit, which are used to receive the operator graph, parse or generate unified operator descriptors corresponding to mathematical operator nodes, and generate at least two candidate execution paths based on the unified operator descriptors, input data characteristics and resource status of each heterogeneous operator core, and determine the target execution path from them. At least two heterogeneous operator cores, which have different data access modes, operational structures or numerical execution methods, and constitute a heterogeneous operator execution array, are used to perform different operations in local differentiation, integration and state evolution, spectral domain operations, sparse graph operations, Hamiltonian and structure preservation operations, and linear or nonlinear equation solving operations, and each heterogeneous operator core executes the corresponding mathematical operator according to the target execution path determined by the control core; Storage cores are used to store field data, state data, grid data, topology data, boundary data, operator coefficients, and intermediate results. Chip interconnection networks are used to transmit unified operator descriptors, field data, state data, boundary halo data, execution results, and control information between control chips, heterogeneous operator chips, and storage chips. A cross-core boundary condition processing module is used to generate, update, or exchange cross-core boundary data based on the boundary conditions in the unified operator descriptor; and, The global conservation law and error control module is used to calculate the numerical residual, error estimate or global conservation quantity deviation corresponding to the execution result of the mathematical operator, and generate status submission instructions or execution parameter adjustment, numerical algorithm switching, execution path switching, local recalculation and global recalculation instructions based on the calculation results. The control core selects a target heterogeneous operator core based on the capability description, operating status, and unified operator descriptor of each heterogeneous operator core. When the target heterogeneous operator core fails or the verification of the global conservation law and error control module fails, the corresponding mathematical operator is migrated to a backup heterogeneous operator core. The control core, heterogeneous operator core, cross-core boundary condition processing module, and global conservation law and error control module constitute a closed-loop execution path for cross-core path selection, boundary configuration, operator execution, result verification, status submission, or path reconstruction.

18. The heterogeneous operator core system according to claim 17, characterized in that, Each of the heterogeneous operator cores is provided with a standardized operator interface and a core capability description register; The standardized operator interface includes at least a unified operator descriptor input channel, a field data input channel, a state data input channel, a boundary data input channel, an execution result output channel, and an error state output channel; The chip capability description register records at least six of the following: supported operator type, data type, numerical precision, maximum problem size, local storage capacity, boundary condition type, mathematical representation domain, conservation law detection type, current load, current temperature, current power consumption, current calibration status, and current error status.

19. The heterogeneous operator core system according to claim 17, characterized in that, The core interconnect network includes a control network, a data network, and a conservation reduction network; The control network is used to transmit unified operator descriptors, scheduling instructions, exception information, and completion information; The data network is used to transmit field data, state data, topology data, spectral coefficients, and boundary halo data; The conservation reduction network is used to transmit local conservation quantities, local residuals, and global reduction results; The control kernel is configured to allow multiple mathematical operator nodes that execute sequentially and share intermediate data to preferentially execute on the same heterogeneous operator kernel or multiple heterogeneous operator kernels that share local memory.

20. The heterogeneous operator core system according to claim 17, characterized in that, The control core is a mathematical operator generator operator descriptor executed across multiple heterogeneous operator cores, which divides the global field object into multiple local field objects and establishes a boundary halo exchange table based on the adjacency relationship between the local field objects. The global conservation law and error control module performs global reduction after each local result is returned. When there is a local anomaly but the global error does not exceed the threshold, only the abnormal local field object is recalculated. When the global error or the deviation of the conservation quantity exceeds the threshold, all relevant local field objects are rolled back.

21. A method for executing multi-domain heterogeneous operator graphs, characterized in that, include: Receive an operator graph containing multiple mathematical operator nodes and their data dependencies; A unified operator descriptor is obtained or generated for each mathematical operator node, wherein the unified operator descriptor includes at least the operator category, the data object to be applied, the grid or topology, the boundary conditions, the numerical discretization method, the numerical precision, the error threshold, the conservation law or structural constraints, and the candidate execution domain information. At least two candidate execution paths are generated based on the unified operator descriptor, input data characteristics and hardware resource status. Each candidate execution path is jointly defined by the mathematical representation domain, numerical algorithm, numerical precision and hardware execution domain. Filter out candidate execution paths that do not meet boundary conditions, numerical precision, storage capacity, hardware availability, or conservation law constraints, and determine the target execution path from the remaining candidate execution paths; Configure the field-state storage system and boundary condition hardware engine to generate, update, or exchange the boundary data required for the execution of mathematical operators; Schedule mathematical operator nodes to heterogeneous operator execution units or heterogeneous operator cores corresponding to the target execution path; Obtain the execution results and calculate the numerical residuals, error estimates, or deviations of conserved quantities; When the numerical residual, error estimate, and conserved quantity deviation meet the corresponding thresholds, the execution result is submitted or transmitted; when at least one of them does not meet the corresponding threshold, at least one of the following is adjusted: numerical precision, time step, number of iterations, numerical algorithm, mathematical representation domain, hardware execution domain, operator execution unit, or operator core, and the corresponding mathematical operator node is re-executed.

22. The multi-domain heterogeneous operator graph execution method according to claim 21, characterized in that, The step of generating at least two candidate execution paths based on the unified operator descriptor, input data features, and hardware resource status includes: For the same mathematical operator, establish at least two of the following execution paths: local physical space domain execution path, spectrum domain execution path, sparse matrix domain execution path, graph domain execution path, state space domain execution path, simulated in-memory execution path, optical execution path, or external processor rollback execution path; estimate the execution latency, energy consumption, numerical error, data transfer volume, storage consumption, and execution risk of each candidate execution path; and determine the target execution path based on at least one of the following methods: weighted cost, Pareto optimization, lookup table, rule tree, online performance model, or lightweight machine learning model.

23. The multi-domain heterogeneous operator graph execution method according to claim 21, characterized in that, The steps for configuring the boundary condition hardware engine include: Identify internal nodes, physical boundary nodes, computational block boundary nodes, core boundary nodes, or multiphysics coupling interface nodes based on the global coordinates, local coordinates, and boundary labels of the field object. Generate boundary values, virtual mesh cell values, or boundary flux for physical boundary nodes; request and exchange boundary halo data of adjacent regions for computation block boundary nodes or core boundary nodes. Perform at least one of the following on the multiphysics coupling interface nodes: interpolation, coordinate transformation, unit conversion, and flux matching.

24. The multi-domain heterogeneous operator graph execution method according to claim 21, characterized in that, The step of re-executing the corresponding mathematical operator node includes: Mark the current execution result as a candidate state without overwriting the submitted state; The scope of local or global recalculation is determined based on local and global errors. When the error exceeds the limit, the time step can be reduced, the numerical accuracy improved, the number of iterations increased, the preconditioner switched, the explicit integral switched to the implicit integral or the structure-preserving integral switched, the analog execution domain switched to the digital execution domain, or the local physical space domain switched to the spectral domain; and the candidate state is submitted as a valid state after the re-execution result meets the corresponding threshold.

25. The multi-domain heterogeneous operator graph execution method according to claim 21, characterized in that, Also includes: Identify multiple mathematical operator nodes that share common input data, common neighborhood data, the same grid or topology, and continuous data dependencies; When there are no external consumers for intermediate results, the fusion does not cross forced error or conservation law checkpoints, and the on-chip storage resources meet the requirements, multiple mathematical operator nodes are fused into a composite operator. This allows intermediate results of composite operators to reside in a neighborhood buffer, state buffer, spectral coefficient cache, or local shared memory. When fusion execution fails, on-chip storage is insufficient, or the target execution unit is unavailable, the composite operator is split and replayed according to the original data dependencies.

26. The multi-domain heterogeneous operator graph execution method according to claim 21, characterized in that, Also includes: Collect the actual execution latency, actual energy consumption, data transfer volume, numerical error, conservation deviation and execution failure information of each candidate execution path under different data scales, boundary conditions, numerical precision and hardware conditions, and update the path cost model and path confidence based on the collected information; When hardware temperature changes, device drift, calibration failure, or prediction errors are detected, the priority of the safe execution path is increased or the proportion of exploratory execution is increased; the updated model is written to the shadow parameter area, submitted after passing quality gating, and restored to the most recent valid model checkpoint when model updates cause performance degradation or an increase in error rate.

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