A Shack-Hartmann fast wavefront processing system and method based on FPGA acceleration

CN122985708APending Publication Date: 2026-10-27SHANGHAI INST OF OPTICS & FINE MECHANICS CHINESE ACAD OF SCI
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Patent Information

Application Number
CN202610805241.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-05
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

对于由投影数据输入到波前相位输出的完整波前处理流程,若仍采用分段式软件处理或不同处理单元分工实现,容易引入外部存储访问、中间数据搬移和软件调度等待等问题

Benefits of technology

(1)本发明采用一维投影序列表征子孔径光斑,并通过固定基频Goertzel递推获得目标频点复响应。该方式不需要对一维投影序列进行完整频谱求解,可减少冗余频点计算,降低质心计算过程中的计算量和硬件实现复杂度。

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Abstract

The application provides a Shack-Hartmann fast wavefront processing system and method based on FPGA acceleration, which is used for shortening wavefront processing time. The method adopts one-dimensional projection sequence to represent a sub-aperture light spot, combines reference light spot centroid position data, and realizes centroid position calculation through fixed base frequency Goertzel recursion, so as to reduce redundant operation of complete spectrum calculation. In view of the problem that traditional path accumulation reconstruction is easy to produce integral error, central multi-path initial phase generation and fusion are adopted to obtain unified initial phase. In view of the problem that traditional Southwell iterative reconstruction starts from zero initial value and has many iteration times, fixed number of phase iteration updates are carried out with the unified initial phase as an iteration starting point, so as to reduce unnecessary iteration. The system connects the centroid calculation module and the wavefront reconstruction module through on-chip slope cache and on-chip phase cache, so as to reduce intermediate data moving and software scheduling overhead. The application forms a continuous FPGA processing flow from projection data input to wavefront phase output, and is suitable for fast wavefront detection.
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Description

Technical Field

[0001] This invention relates to the field of wavefront sensing and hardware acceleration technology, and in particular to a Shaker-Hartmann fast wavefront processing system and method based on FPGA acceleration. Background Technology

[0002] Shak-Hartmann wavefront sensors are optical sensing devices that achieve wavefront detection based on local wavefront slope measurement. They are widely used in adaptive optics, laser wavefront detection, precision optical measurement, and optical system aberration detection. These sensors typically use a microlens array to sample the incident wavefront in sections, forming an array of light spots corresponding to each sub-aperture on the detector target surface. By calculating the offset of each sub-aperture spot relative to the centroid of a reference spot, the local wavefront slope at the corresponding sub-aperture can be obtained, and the wavefront phase distribution can then be recovered based on the local wavefront slope. Therefore, Shak-Hartmann wavefront processing usually includes spot position calculation, wavefront slope conversion, and wavefront phase recovery. With the increasing demands for the number of sub-apertures, sampling resolution, and processing frame rate, traditional software processing methods easily encounter problems such as increased computational load, frequent data transfer, and increased processing time in the above processes. Prior technology 1 (Lambert A., Polo MC, “Real-time algorithms implemented in hardware for centroiding on a Shack-Hartmann Sensor”, Imaging and Applied Optics 2015, OSA Technical Digest, paper AOW3F.2) compares traditional centroid algorithms with spot localization methods based on the first Fourier coefficient and proposes a streaming implementation for dedicated hardware. This type of spot centroid position calculation method can use the phase of the target frequency to characterize the change in spot position, and is suitable for combining with fixed fundamental frequency Goertzel recursion to achieve fast processing. However, if it is implemented only as an independent front-end step, the subsequent wavefront slope conversion and phase recovery still need to be completed in software or other processing units, which may still generate intermediate data transmission and scheduling overhead.

[0003] Regarding wavefront reconstruction, prior art 2 (Zhariy M., Neubauer A., ​​Rosensteiner M., Ramlau R., “Cumulative wavefront reconstructor for the Shack-Hartmann sensor”, Inverse Problems and Imaging, 2011, 5(4):893–913) proposed the CumulativeReconstructor (CuRe) fast wavefront reconstruction method. This method, based on slope data measured by the Shack-Hartmann wavefront sensor, achieves wavefront phase recovery through direct accumulation, and features direct calculation and fast speed. Unlike the CuRe-like path accumulation reconstruction method, the Southwell iterative reconstruction method is a commonly used regional wavefront reconstruction method. Its basic idea is to iteratively update the phase grid based on the discrete relationship between adjacent phase nodes and the local wavefront slope. The Southwell iterative reconstruction method exhibits good reconstruction stability, but it typically requires a large number of iterations to obtain stable results when starting from zero or simple initial values. While CuRe-type methods are faster, their results are easily affected by the choice of propagation path and the direction of error propagation; phase accumulation along a single path can lead to the diffusion of local errors. Therefore, reducing the number of subsequent iterations while obtaining a good initial phase is a crucial issue for improving wavefront processing speed.

[0004] Existing methods for calculating the centroid position of light spots and fast wavefront reconstruction methods improve processing efficiency from the perspectives of front-end spot localization and back-end phase recovery, respectively. However, these two methods are usually presented as relatively independent algorithmic steps. For a complete wavefront processing flow from projection data input to wavefront phase output, if segmented software processing or different processing units are still used, problems such as external storage access, intermediate data transfer, and software scheduling waiting can easily arise. Furthermore, if wavefront reconstruction directly enters the iterative process from zero initial value, the number of iterations is excessive; if only a single path is used to accumulate phase results, it is easily affected by path error propagation. Therefore, it is necessary to propose a Shaker-Hartmann fast wavefront processing system and method accelerated by FPGA (Field-Programmable Gate Array). This system unifies the calculation of the centroid position of light spots, wavefront slope conversion, initial phase generation via multiple paths, phase fusion, and fixed-number phase iteration updates within the FPGA. On-chip slope and phase buffers enable continuous connection between the front-end and back-end processing modules, thereby shortening wavefront processing time while ensuring wavefront reconstruction accuracy. Summary of the Invention

[0005] This invention discloses a Shak-Hartmann fast wavefront processing system and method based on FPGA acceleration, used to shorten wavefront processing time. The method converts the spot array image acquired by the Shak-Hartmann wavefront sensor into a one-dimensional projection sequence, and performs centroid calculation, spot offset calculation, wavefront slope conversion, adjacent phase difference constraint construction, initial phase generation of the center multipath, initial phase fusion, fixed-number phase iteration update, and wavefront phase output in the FPGA, forming a continuous FPGA processing flow from projection data input to wavefront phase output. This invention also discloses the hardware system for implementing this method.

[0006] On one hand, this invention discloses a Shaker-Hartmann fast wavefront processing method based on FPGA acceleration, comprising the following steps: Step 1. Generate and input projection data and reference spot centroid position data. Acquire the spot array image obtained by the Shaker-Hartmann wavefront sensor. Divide the spot array image into multiple sub-aperture spot regions according to the sub-aperture arrangement. Perform gray-level accumulation projection on each sub-aperture spot region along two orthogonal directions to generate a horizontal projection sequence and a vertical projection sequence. Input the horizontal projection sequence, the vertical projection sequence, and the pre-calibrated reference spot centroid position data into the FPGA. The horizontal projection sequence is obtained by vertical gray-level accumulation of the corresponding sub-aperture spot region, and the vertical projection sequence is obtained by horizontal gray-level accumulation of the corresponding sub-aperture spot region. The reference spot centroid position data are the pre-calibrated reference spot centroid coordinate data of each sub-aperture under the reference plane wave incident condition, and are input into the FPGA in the same sub-aperture numbering order as the horizontal and vertical projection sequences.

[0007] Step 2. Configure wavefront processing parameters. Write the wavefront processing parameters into the FPGA via the control configuration interface. These parameters include the number of sub-apertures, projection sequence length, fixed fundamental frequency parameter, sub-aperture spacing, pixel size, microlens focal length, operating wavelength, number of iterations, and phase output unit.

[0008] Step 3. Perform fixed-fundamental-frequency Goertzel recursion. The FPGA reads the lateral and longitudinal projection sequences corresponding to the current sub-aperture according to the sub-aperture number, and performs fixed-fundamental-frequency Goertzel recursion on the lateral and longitudinal projection sequences respectively to obtain the target frequency complex response in the corresponding direction. The fixed-fundamental-frequency Goertzel recursion is used to obtain the target frequency complex response of the lateral and longitudinal projection sequences at a fixed fundamental frequency, without performing a complete spectrum solution on the lateral and longitudinal projection sequences. The target frequency complex response satisfies: In the formula, This represents the sampling point number in the projection sequence. The first in the horizontal projection sequence or the vertical projection sequence The grayscale value of each sampling point The length of the projection sequence. For fixed fundamental frequency serial numbers, This is the complex response at the target frequency point with a fixed fundamental frequency.

[0009] Step 4. Calculate the spot offset and convert it to the wavefront slope. The spot offset is obtained based on the phase difference between the phase of the complex response at the target frequency corresponding to the current sub-aperture and the reference phase corresponding to the centroid position data of the reference spot. The wavefront slope is then calculated based on the spot offset, with the following relationship: In the formula, For the first The spot offset of each sub-aperture spot in the corresponding direction, expressed in pixels or sampling points. To measure the phase of the light spot projection sequence at a fixed fundamental frequency, As a reference phase corresponding to the centroid position data of the reference spot, To fix the fundamental angular frequency, This indicates the phase foldback operation. For pixel size, The focal length of the microlens. This represents the wavefront slope in the corresponding direction. The above relationship is applied to two orthogonal directions to obtain the transverse wavefront slope and the longitudinal wavefront slope.

[0010] Step 5. Cache the wavefront slope. Write the transverse and longitudinal wavefront slopes into the on-chip slope cache of the FPGA. The on-chip slope cache stores the slope data according to the sub-aperture arrangement and provides slope input to the wavefront reconstruction module.

[0011] Step 6. Construct adjacent phase difference constraints. The wavefront reconstruction module reads the transverse and longitudinal wavefront slopes from the on-chip slope buffer, and constructs adjacent phase difference constraints between adjacent phase nodes in the phase grid based on the transverse and longitudinal wavefront slopes, sub-aperture spacing, and operating wavelength. The relationship is as follows: In the formula, Indicates the horizontal or vertical direction. Phase grid position Along the direction The phase difference increment between adjacent phase nodes, For the sub-aperture spacing, For the operating wavelength, Phase grid position Along the direction The wavefront slope.

[0012] Step 7. Generate initial phases using a central multipath. Based on the adjacent phase difference constraint, phase accumulation is performed along a central preset path to generate multiple sets of initial phases. In one embodiment, the central preset path includes a central column-priority path and a central row-priority path. The central column-priority path uses the central column of the phase grid as a reference, first accumulating phase along the central column direction, and then expanding column by column from the central column to the left and right sides. The central row-priority path uses the central row of the phase grid as a reference, first accumulating phase along the central row direction, and then expanding row by row from the central row to the upper and lower sides.

[0013] Step 8. Merge the initial phases and write them to the phase buffer. Merge the multiple sets of initial phases to obtain a unified initial phase, and write the unified initial phase to the FPGA on-chip phase buffer. In one embodiment, the first initial phase obtained by the center column-first path and the second initial phase obtained by the center row-first path are averaged and merged to obtain a unified initial phase, with the following relationship: In the formula, The first initial phase is obtained from the center column priority path. The second initial phase is obtained from the center row priority path. This is the unified initial phase after fusion. The unified initial phase serves as the initial value for subsequent Southwell iterative reconstruction methods.

[0014] Step 9. Perform a fixed number of phase iterations. Using the unified initial phase as the initial value for iteration, the Southwell iterative reconstruction method is executed according to the relationship between adjacent phase nodes and the adjacent phase difference constraint to perform a fixed number of phase iterations on the phase mesh, obtaining the reconstructed wavefront phase, whose relationship is as follows: In the formula, This is the initial phase for the Southwell iterative reconstruction method. For the unified initial phase, For the number of iterations, For the process The reconstructed phase after the next phase iteration update The output wavefront phase is determined by two separate sets of on-chip phase buffers on the FPGA. The current phase and the updated phase are stored in these buffers, and phase iterations are performed a fixed number of times using an alternating read-write method. The number of iterations is a preset number and is input via the control configuration interface.

[0015] Step 10. Output wavefront phase. The result output module performs mean removal and unit conversion on the reconstructed wavefront phase to obtain the final wavefront phase, and outputs it through the output interface.

[0016] In this invention, processing time refers to the time elapsed from the start of reading the transverse projection sequence, longitudinal projection sequence, and reference spot centroid position data from the streaming input interface to the output of the wavefront phase by the result output module. By unifying the centroid calculation module, on-chip slope buffer module, wavefront reconstruction module, and on-chip phase buffer module within the FPGA, this invention forms a complete hardware processing flow from projection data input to wavefront phase output, reducing the repeated transfer of intermediate results between the external software environment and hardware modules, and shortening the wavefront processing time.

[0017] On the other hand, this invention discloses a Shaker-Hartmann fast wavefront processing system based on FPGA acceleration.

[0018] The system includes a streaming input interface, a control configuration interface, a centroid calculation module, an on-chip slope buffer module, a wavefront reconstruction module, an on-chip phase buffer module, and a result output module.

[0019] The streaming input interface is used to receive the lateral projection sequence, the longitudinal projection sequence, and the reference spot centroid position data generated from the spot array image.

[0020] The control configuration interface is used to input the number of sub-apertures, projection sequence length, fixed fundamental frequency parameters, sub-aperture spacing, pixel size, microlens focal length, working wavelength, number of iterations, and phase output unit.

[0021] The centroid calculation module is used to perform fixed-frequency Goertzel recursion on the transverse projection sequence and the longitudinal projection sequence to obtain the complex response of the target frequency point, and calculate the spot offset based on the complex response of the target frequency point and the reference spot centroid position data, and then convert the spot offset into the transverse wavefront slope and the longitudinal wavefront slope.

[0022] The on-chip slope buffer module is used to store the transverse wavefront slope and the longitudinal wavefront slope, and to provide slope input to the wavefront reconstruction module.

[0023] The wavefront reconstruction module is used to construct adjacent phase difference constraints based on the transverse wavefront slope and the longitudinal wavefront slope, generate multiple sets of initial phases along the center preset path, merge the multiple sets of initial phases into a unified initial phase, and use the unified initial phase as the initial value of the Southwell iterative reconstruction method to perform a fixed number of phase iterations to obtain the reconstructed wavefront phase.

[0024] The on-chip phase cache module is used to store the unified initial phase and intermediate phase data during the phase iteration update process.

[0025] The result output module is used to perform mean removal and unit conversion on the reconstructed wavefront phase, and output the final wavefront phase.

[0026] Compared with the prior art, the present invention has at least the following beneficial effects: (1) This invention uses a one-dimensional projection sequence to characterize the sub-aperture spot and obtains the complex response of the target frequency point through a fixed fundamental frequency Goertzel recursion. This method does not require a complete spectrum solution for the one-dimensional projection sequence, which can reduce redundant frequency point calculations and reduce the computational load and hardware implementation complexity in the centroid calculation process.

[0027] (2) In this invention, the transverse wavefront slope and longitudinal wavefront slope obtained by converting the spot offset are written into the slope cache on the FPGA chip and directly read by the wavefront reconstruction module. This method reduces the transfer process of slope data between external memory, general-purpose processor and independent processing unit, which is conducive to forming a continuous FPGA processing flow.

[0028] (3) The present invention adopts a central multi-path initial phase generation and fusion method to obtain a unified initial phase. Compared with the single-path phase accumulation method, this method can reduce the influence of path selection and error propagation direction on the initial phase, and provide a better initial value for subsequent fixed-number phase iteration updates.

[0029] (4) This invention uses a unified initial phase as the initial value for the Southwell iterative reconstruction method and performs a fixed number of phase iterations. This method avoids long iterative calculations starting from zero initial value, reduces unnecessary iteration processes, and shortens wavefront processing time while maintaining the consistency of wavefront phase recovery.

[0030] (5) The present invention connects the centroid calculation module and the wavefront reconstruction module through on-chip slope buffer and on-chip phase buffer, so that centroid calculation, wavefront slope conversion, initial phase generation of center multipath, initial phase fusion and fixed number of phase iteration updates can be completed continuously in the same FPGA, reducing intermediate data transfer and software scheduling overhead, and is suitable for fast wavefront detection and online wavefront processing systems. Attached Figure Description

[0031] Figure 1 This is the overall flowchart of the FPGA-accelerated Shaker-Hartmann fast wavefront processing method of the present invention; Figure 2 This is a schematic diagram of the sub-aperture light spot and its one-dimensional projection of the present invention; Figure 3 This is a schematic diagram of the centroid calculation module in this invention; Figure 4 This is a schematic diagram of the wavefront reconstruction module in this invention; Figure 5 The image shows a comparison of wavefront reconstruction results in this invention, where (a) is the sensor reference phase, (b) is the unoptimized reconstructed phase, and (c) is the FPGA output phase of this invention. Detailed Implementation

[0032] This embodiment discloses a Shak-Hartmann fast wavefront processing method based on FPGA acceleration. The method uses a spot array image acquired by a Shak-Hartmann wavefront sensor as raw data. First, the spot array image is divided into multiple sub-aperture spot regions according to the sub-aperture arrangement relationship, and each sub-aperture spot region is converted into a horizontal projection sequence and a vertical projection sequence. Subsequently, the horizontal projection sequence, the vertical projection sequence, and the pre-calibrated reference spot centroid position data are used as input data to the FPGA. In the FPGA, the following steps are performed sequentially: centroid calculation, spot offset calculation, wavefront slope conversion, adjacent phase difference constraint construction, initial phase generation of the center multipath, initial phase fusion, fixed-number phase iteration update, and wavefront phase output.

[0033] like Figure 1 As shown, the overall process of this invention includes projection data input, reference spot centroid position data input, wavefront processing parameter configuration, fixed fundamental frequency Goertzel centroid calculation, spot offset solution, wavefront slope conversion, on-chip slope buffering, adjacent phase difference constraint construction, center multipath initial phase generation, initial phase fusion, fixed number of Southwell phase iteration updates, and wavefront phase output. Figure 1 This invention illustrates the complete processing sequence from front-end projection data input to back-end wavefront phase output, while also demonstrating the data connection relationships between the centroid calculation module, on-chip slope buffer module, wavefront reconstruction module, and on-chip phase buffer module. Through this process, the front-end centroid calculation result can be directly used as input to the back-end wavefront reconstruction module, thereby reducing intermediate data transfer and software scheduling overhead.

[0034] Example 1: Data Processing Flow for a 29×29 Experiment In this embodiment, the number of sub-apertures is 29×29, corresponding to 841 effective sub-apertures. The projection sequence length is 26 sampling points. The fixed fundamental frequency is the fundamental frequency component of the projection sequence, i.e., the fixed fundamental frequency index is 1. The sub-aperture spacing is 150 μm, the pixel size is 5.86 μm, the microlens focal length is 5.20 mm, the operating wavelength is 633 nm, and the number of iterations is 20. The phase output unit is wavelength units or radians.

[0035] Step 1: Generate and read the projection input data and the reference spot centroid position data. The Shaker-Hartmann wavefront sensor forms a spot array image on the detector plane through a microlens array. Based on the microlens array arrangement, the number of sub-apertures, and the spot window size, the system divides the spot array image into 29×29 sub-aperture spot regions. For each sub-aperture spot region, grayscale accumulation projection is performed along two orthogonal directions to obtain a horizontal projection sequence and a vertical projection sequence.

[0036] like Figure 2 As shown, the horizontal projection sequence is obtained by accumulating the gray values ​​of the corresponding sub-aperture spot regions along the vertical direction, and the vertical projection sequence is obtained by accumulating the gray values ​​of the corresponding sub-aperture spot regions along the horizontal direction. Each sub-aperture spot region corresponds to a local two-dimensional spot window. The gray values ​​within the window are accumulated along the vertical direction to form the horizontal projection sequence, and the vertical projection sequence is formed by accumulating the gray values ​​along the horizontal direction. Figure 2 This is used to illustrate the correspondence between the two-dimensional sub-aperture spot region and the two one-dimensional projection sequences. The subsequent centroid calculation module does not directly perform complete two-dimensional spectrum processing on the two-dimensional spot region, but instead performs fixed-fundamental-frequency Goertzel recursion on the transverse and longitudinal projection sequences respectively, thereby reducing the dimensionality of the input data and facilitating the formation of a regularized, streaming data processing structure in the FPGA.

[0037] For a 29×29 sub-aperture scale, the lateral projection data contains 841 projection sequences, and the longitudinal projection data contains 841 projection sequences, each with a length of 26 sampling points. Simultaneously, the system reads the reference spot centroid position data. This reference spot centroid position data is the centroid coordinate data of each sub-aperture reference spot, pre-calibrated by a Shaker-Hartmann wavefront sensor under reference plane wave incidence conditions. It includes the reference lateral and longitudinal centroid coordinates corresponding to the 29×29 sub-apertures, and is input into the FPGA in the same sub-aperture numbering order as the projection sequences.

[0038] Step 2: Configure wavefront processing parameters. The wavefront processing parameters are written to the FPGA via the control configuration interface. These parameters include the number of sub-apertures, projection sequence length, fixed fundamental frequency parameter, sub-aperture spacing, pixel size, microlens focal length, operating wavelength, number of iterations, and phase output unit. In this embodiment, the number of sub-apertures is 29×29, the projection sequence length is 26 sampling points, the fixed fundamental frequency number is 1, the sub-aperture spacing is 150 μm, the pixel size is 5.86 μm, the microlens focal length is 5.20 mm, the operating wavelength is 633 nm, and the number of iterations is 20. The fixed fundamental frequency characterizes the change in the position of the light spot in the projection sequence. In the same processing task, the fixed fundamental frequency remains unchanged, giving the centroid calculation module a fixed computational structure, facilitating the implementation of a regularized processing flow in the FPGA.

[0039] Step 3: Execute the fixed-fundamental-frequency Goertzel recursion. The centroid calculation module in the FPGA reads the lateral and longitudinal projection sequences corresponding to the current sub-aperture according to the sub-aperture number, and performs the fixed-fundamental-frequency Goertzel recursion on the lateral and longitudinal projection sequences respectively to obtain the target frequency complex response in the corresponding direction. The fixed-fundamental-frequency Goertzel recursion is used to obtain the target frequency complex response of the lateral and longitudinal projection sequences at a fixed fundamental frequency, without performing a complete spectrum solution on the lateral and longitudinal projection sequences. The target frequency complex response satisfies: In the formula, This represents the sampling point number in the projection sequence. The first in the horizontal projection sequence or the vertical projection sequence The grayscale value of each sampling point The length of the projection sequence. For fixed fundamental frequency serial numbers, This is the complex response at the target frequency point at a fixed fundamental frequency. In this embodiment, =1, =26, therefore the fundamental angular frequency is fixed. When the position of the light spot changes in the projection sequence, the phase of the complex response at the target frequency point changes accordingly. The centroid calculation module, based on the phase difference between the measured light spot and the reference light spot at a fixed fundamental frequency, and combined with the reference light spot centroid position data, obtains the centroid position of the measured light spot in the corresponding direction for the current sub-aperture. This process is applied to both the transverse and longitudinal projection sequences to obtain the centroid positions of the measured light spot in two orthogonal directions.

[0040] Step 4: Calculate the spot offset and convert it to the wavefront slope. The centroid calculation module obtains the spot offset based on the phase difference between the measured spot and the reference spot at a fixed fundamental frequency, and converts the spot offset to the wavefront slope. The relationship is as follows: In the formula, For the first The spot offset of each aperture spot in the corresponding direction To measure the phase of the light spot projection sequence at a fixed fundamental frequency, As a reference phase corresponding to the centroid position data of the reference spot, To fix the fundamental angular frequency, This indicates the phase foldback operation. For pixel size, The focal length of the microlens. This represents the wavefront slope in the corresponding direction. The relationship applies to two orthogonal directions to obtain the transverse and longitudinal wavefront slopes. In practice, the sign of the beam offset can be uniformly calibrated according to the detector coordinate direction, beam pattern arrangement direction, and hardware data stream direction.

[0041] Figure 3 This is a schematic diagram of the centroid calculation module in this embodiment. (Refer to...) Figure 3 The centroid calculation module receives the transverse projection sequence, the longitudinal projection sequence, and the centroid position data of the reference spot at its input terminals. The fixed-frequency Goertzel recursive unit is used to obtain the complex response of the target frequency point of the two orthogonal projection sequences at a fixed fundamental frequency. The phase difference calculation unit obtains the spot offset based on the phase difference between the measured spot and the reference spot at a fixed fundamental frequency. The slope conversion unit outputs the transverse wavefront slope and the longitudinal wavefront slope based on the pixel size and the focal length of the microlens. Figure 3 This illustrates the sequential processing relationship between centroid calculation, offset calculation, and slope conversion in the FPGA. That is, the measured spot position does not need to be output to external software for subsequent processing, but is directly converted into the slope data required for wavefront reconstruction within the centroid calculation module.

[0042] Step 5: Cache wavefront slopes. After processing 841 sub-apertures, the centroid calculation module obtains a 29×29 transverse wavefront slope array and a 29×29 longitudinal wavefront slope array. These arrays are written into the FPGA's on-chip slope cache. The on-chip slope cache stores slope data according to the sub-aperture grid order and provides slope input to the wavefront reconstruction module, enabling the module to directly read the slope data.

[0043] Figure 4 This is a schematic diagram of the wavefront reconstruction module in this embodiment. (Refer to...) Figure 4After reading the transverse and longitudinal wavefront slopes from the on-chip slope buffer, the wavefront reconstruction module first constructs adjacent phase difference constraints; then it generates initial phases along the center column priority path and the center row priority path respectively; then it merges the initial phase results obtained from the two paths into a unified initial phase; finally, it uses the unified initial phase as the initial value for the Southwell iterative reconstruction method and completes a fixed number of phase iterations using the on-chip phase buffer. Figure 4 This invention does not directly use the phase accumulation result of a single path as the final output. Instead, it combines the initial phase generation of the central multi-path, the initial phase fusion, and the fixed number of iterations for correction, thereby reducing the impact of path error propagation and reducing the amount of computation required to iterate from zero initial value.

[0044] Step 6: Construct adjacent phase difference constraints. The wavefront reconstruction module reads the transverse and longitudinal wavefront slope arrays from the on-chip slope buffer and constructs adjacent phase difference constraints between adjacent phase nodes in the phase grid based on the transverse wavefront slope, longitudinal wavefront slope, sub-aperture spacing, and operating wavelength. The phase grid corresponds to a 29×29 sub-aperture arrangement, with each phase node corresponding to an effective sub-aperture position. The adjacent phase difference constraints satisfy: In the formula, Indicates the horizontal or vertical direction. Phase grid position Along the direction The phase difference increment between adjacent phase nodes, For the sub-aperture spacing, For the operating wavelength, Phase grid position Along the direction The wavefront slope. In this embodiment, =150 μm, =633 nm.

[0045] Step 7: Initial Phase Generation via Center Multipath. The wavefront reconstruction module accumulates phase along a preset center path based on the adjacent phase difference constraint, generating multiple sets of initial phases. In one embodiment, the preset center path includes a center column-priority path and a center row-priority path. The center column-priority path uses the center column of the phase grid as a reference, first accumulating phase along the center column direction, then expanding column by column to the left and right to obtain the first initial phase. The center row-priority path uses the center row of the phase grid as a reference, first accumulating phase along the center row direction, then expanding row by row to the top and bottom to obtain the second initial phase. Under the 29×29 sub-aperture condition, both the center row and center column are located at the center of the phase grid. Using the center row and center column as propagation references helps shorten the average integration path and reduces error propagation caused by single-path phase accumulation.

[0046] Step 8: Merge the initial phases and write them to the phase buffer. The wavefront reconstruction module merges multiple sets of initial phases to obtain a unified initial phase, and writes the unified initial phase to the FPGA on-chip phase buffer. In one embodiment, the first initial phase obtained by the center column-first path and the second initial phase obtained by the center row-first path are averaged and merged to obtain a unified initial phase, with the following relationship: In the formula, The first initial phase is obtained from the center column priority path. The second initial phase is obtained from the center row priority path. The unified initial phase is the fused phase. This unified initial phase serves as the initial value for subsequent Southwell iterative reconstruction methods. Since the unified initial phase is obtained by fusing the phase accumulation results of two different paths and has a good global phase shape, subsequent phase iteration updates do not need to start from zero initial value to construct the overall phase distribution.

[0047] Step 9: Perform a fixed number of phase iterations. The wavefront reconstruction module uses the unified initial phase as the initial value for iteration. Based on the relationship between adjacent phase nodes and the adjacent phase difference constraint, it executes the Southwell iterative reconstruction method to perform a fixed number of phase iterations on the phase grid, obtaining the reconstructed wavefront phase, whose relationship is as follows: In the formula, This is the initial phase for the Southwell iterative reconstruction method. For the unified initial phase, For the number of iterations, For the process The reconstructed phase after the next phase iteration update To output the wavefront phase, the current phase and the updated phase are stored in two sets of on-chip phase caches on the FPGA, and phase iteration updates are achieved by alternating read and write operations to achieve a fixed number of iterations. In this embodiment, the number of iterations is set to 20. The inventors found through experiments that, under the condition of starting with the unified initial phase, the main decrease in phase residual is concentrated in the first 20 iterations. After 20 iterations, the residual RMS has dropped to 0.026λ. Further increasing the number of iterations (e.g., to 100 or 200 iterations) will result in a residual improvement of less than 0.005λ, which has limited benefits for wavefront detection applications. More importantly, fixing the number of iterations to 20 makes the processing time of the entire wavefront reconstruction module deterministic and predictable, avoiding the control overhead and timing uncertainty problems caused by changing the number of iterations to meet different input spot dynamic ranges in traditional methods. Therefore, 20 fixed iterations is an optimal configuration that balances reconstruction accuracy and processing speed.

[0048] It should be noted that the fixed-number phase iteration update used in this invention is fundamentally different from the traditional Southwell iterative reconstruction method. Traditional methods typically start from zero or empirical initial values ​​and require continuous iteration until the residual converges to a preset threshold. The number of iterations is uncertain and usually large (e.g., thousands of iterations are needed for a 100×100 sub-aperture scale). This invention, through the central multi-path initial phase generation and fusion method, obtains a unified initial phase that is close to the true wavefront phase, thus transforming the process requiring long iterations into a fixed-number phase fine-tuning process guided by superior initial values. Since the unified initial phase already possesses the correct overall shape and phase distribution, only a preset number of iterations (e.g., 20) is needed to achieve wavefront reconstruction accuracy comparable to long iterations. This fixed number of iterations is written once by the hardware system during the configuration phase and is stably executed in each wavefront processing task, avoiding the loop control and uncertain processing delays that rely on residual judgment in traditional software iterations. This makes it very suitable for FPGA hardware processing flows that require determinism and real-time performance.

[0049] Step 10: Output the wavefront phase. After a fixed number of phase iterations, the result output module reads the reconstructed wavefront phase, performs mean removal and unit conversion, and obtains the final wavefront phase. In this embodiment, the output result is a 29×29 wavefront phase. The row and column positions of the wavefront phase correspond to the 29×29 sub-aperture grid positions. The wavefront phase can be used for wavefront display, residual calculation, aberration analysis, and consistency evaluation.

[0050] Figure 5 This is a comparison chart of wavefront reconstruction results, in which... Figure 5 (a) represents the reference phase obtained from the sensor software output, which is used as the consistency evaluation benchmark in this embodiment; Figure 5 (b) indicates the unoptimized reconstructed phase, which reflects the impact of path accumulation error or insufficient initial value on the phase recovery result when only the unoptimized reconstruction method is used; Figure 5 (c) indicates the FPGA output phase of this invention. (Through...) Figure 5 (a) Figure 5 (b) and Figure 5 (c) shows that the output phase of the present invention is closer to the sensor reference phase in terms of overall morphology and phase fluctuation distribution, indicating that the central multipath initial phase generation, initial phase fusion and fixed number of Southwell phase iteration updates can improve the consistency of wavefront reconstruction results.

[0051] Under 10 sets of experimental light spot input conditions, the sensor software output phase was used as the reference phase for evaluation. Experimental results show that after adopting the wavefront reconstruction method of this invention, the hardware output phase and the reference phase maintain good consistency, with an average residual RMS of 0.026λ. This indicates that this embodiment can reduce unnecessary iterative calculations while maintaining the consistency of wavefront phase recovery under real experimental input conditions.

[0052] Example 2: Accelerated Verification at a 100×100 Scale This embodiment illustrates the processing time advantage of the present invention at a larger sub-aperture scale. This embodiment uses a 100×100 sub-aperture scale for verification, where 100×100 represents 100 effective sub-apertures in a single direction, and the entire wavefront processing grid contains 10,000 effective sub-apertures. Except for the number of sub-apertures and the corresponding on-chip buffer size, this embodiment uses the same processing flow as Embodiment 1, including projection data input, reference spot centroid position data input, centroid calculation, spot offset calculation, wavefront slope conversion, adjacent phase difference constraint construction, center multipath initial phase generation, initial phase fusion, fixed-number phase iteration update, and wavefront phase output. In this embodiment, the projection sequence length is 26 sampling points, the fixed fundamental frequency uses the fundamental frequency component of the projection sequence, and the fixed fundamental frequency number is 1; the sub-aperture spacing is 150 μm, the pixel size is 5.86 μm, the microlens focal length is 5.20 mm, the working wavelength is 633 nm, and the number of iterations is set to 20. For a 100×100 sub-aperture scale, the lateral projection data contains 10,000 projection sequences, and the longitudinal projection data contains 10,000 projection sequences, with each projection sequence having a length of 26 sampling points. The reference spot centroid position data includes 10,000 sets of reference lateral centroid coordinates and reference longitudinal centroid coordinates, which are input into the FPGA in the same sub-aperture numbering order as the projection sequences.

[0053] The general-purpose processor serial software test platform in this embodiment is an Intel Core i7-9750H CPU with a main frequency of 2.60 GHz, 6 processor cores, 12 logical processors, and 16 GB of memory. The test platform is equipped with an NVIDIA GeForce GTX 1660Ti graphics processor with 6 GB of dedicated video memory. It should be noted that the processing time of the general-purpose processor in this embodiment is obtained through testing with a Python serial program. During the test, GPU, CUDA, OpenCL, or other graphics processor acceleration methods were not invoked. The graphics processor is only used to describe the hardware configuration of the test platform and does not participate in the timing calculations for centroid calculation, wavefront slope conversion, and wavefront reconstruction.

[0054] In this embodiment, the FPGA implementation uses the AXU5EV-E development platform, with the core device being the Xilinx Zynq UltraScale+ MPSoC XCZU5EV. Processing time in the FPGA is statistically analyzed based on hardware synthesis results or board-level operation results. To ensure consistency in the comparison objects, the general-purpose processor serial software implementation uses the same projection input data, the same reference spot centroid position data, the same centroid calculation method, the same wavefront slope conversion relationship, and the same wavefront phase output format as the FPGA. The statistical range of the processing time is from the start of processing the transverse projection input data, longitudinal projection input data, and reference spot centroid position data, to the output of the complete wavefront phase, excluding spot image acquisition, external file reading and writing, result saving, plotting and display, and manual post-processing time.

[0055] During the centroid calculation process, the centroid calculation module performs fixed-fundamental-frequency Goertzel recursion on the transverse and longitudinal projection sequences corresponding to 10,000 sub-apertures, and obtains the centroid position of the measured spot based on the phase of the complex response at the target frequency. Since this method only calculates the complex response at the target frequency at the fixed fundamental frequency without performing a complete spectrum solution, it reduces redundant frequency point calculations. At a 100×100 sub-aperture scale, the centroid calculation time on a general-purpose processor using Python serial processing is 144.9 ms, while the centroid calculation time on an FPGA is 7.30 ms, resulting in a centroid calculation speedup of approximately 19.85 times.

[0056] In the wavefront reconstruction process, the FPGA converts the spot offset into transverse and longitudinal wavefront slopes, and writes 100×100 transverse and longitudinal wavefront slope arrays into an on-chip slope cache. The wavefront reconstruction module constructs adjacent phase difference constraints based on the slope arrays and generates two sets of initial phases using center column-first and center row-first paths. The two sets of initial phases are fused to obtain a unified initial phase. This unified initial phase is then used as the initial value for the Southwell iterative reconstruction method, and 20 phase iterations are performed to obtain the reconstructed wavefront phase. In contrast, the Southwell iterative reconstruction method starting from zero initial value requires approximately 5500 iterations to achieve a similar residual RMS under 100×100 conditions. This invention obtains a unified initial phase through a center multi-path initial phase generation and fusion method, and then performs a fixed number of phase iterations, transforming the long iterative convergence process into a fixed-number phase iteration update process guided by a unified initial phase, thereby reducing unnecessary iterative calculations. At a sub-aperture scale of 100×100, the Southwell iterative reconstruction method starting from zero initial value in the CPU requires 59530 ms, while the wavefront reconstruction time of the method of this invention in the FPGA is 15.42 ms, and the complete processing time is reduced from 59686 ms to 38.625 ms.

[0057] In this embodiment, the acceleration ratio is defined as: In the formula, For acceleration ratio, The processing time required for Python serial software to implement the same processing flow on a general-purpose processor. This refers to the processing time required to complete the same processing flow in an FPGA. The speedup ratio is used to illustrate the processing time advantage of this invention relative to a serial software implementation on a general-purpose processor, and not relative to sensor vendor software, GPU parallel programs, or different processing flows.

[0058] At a 100×100 sub-aperture scale, the FPGA's resource consumption is mainly concentrated on on-chip memory resources. BRAM accounts for 62%, URAM for 37%, DSP usage remains at approximately 13% to 14%, and LUT usage is approximately 29% to 30%. This result indicates that the main resource overhead of this invention at a high sub-aperture scale comes from on-chip slope buffering, on-chip phase buffering, and intermediate phase data storage during phase iteration updates, while multiplier and logic resources remain within feasible limits. This embodiment demonstrates that this invention can significantly reduce the processing time for centroid calculation and wavefront reconstruction at a 100×100 extended scale. The acceleration effect mainly comes from two aspects: first, reducing redundant calculations caused by complete spectrum solving through fixed-frequency Goertzel recursion; second, obtaining a unified initial phase through a center multipath initial phase generation and fusion method, and performing a fixed 20 phase iteration updates on this basis, reducing long iterative calculations starting from zero initial values. Therefore, this invention can shorten the processing time from projection data input to wavefront phase output while maintaining wavefront phase recovery consistency.

Claims

1. A Shaker-Hartmann fast wavefront processing method based on FPGA acceleration, characterized in that, Includes the following steps: Step 1. Generate and input projection data and reference spot centroid position data; acquire the spot array image obtained by the Shaker-Hartmann wavefront sensor, divide the spot array image into multiple sub-aperture spot regions according to the sub-aperture arrangement relationship, perform gray-scale accumulation projection on each sub-aperture spot region along two orthogonal directions to generate a horizontal projection sequence and a vertical projection sequence, and input the horizontal projection sequence, the vertical projection sequence, and the pre-calibrated reference spot centroid position data into the FPGA; Step 2. Configure wavefront processing parameters; the wavefront processing parameters include the number of sub-apertures, projection sequence length, fixed fundamental frequency parameter, sub-aperture spacing, pixel size, microlens focal length, working wavelength, number of iterations, and phase output unit; Step 3. Perform fixed-frequency Goertzel recursion; the FPGA reads the lateral projection sequence and longitudinal projection sequence corresponding to the current sub-aperture according to the sub-aperture number, and performs fixed-frequency Goertzel recursion on the lateral projection sequence and longitudinal projection sequence respectively to obtain the target frequency complex response in the corresponding direction; Step 4. Calculate the spot offset and convert the wavefront slope; Based on the phase of the complex response of the target frequency point and the reference phase determined by the centroid position data of the reference spot, calculate the spot offset of the current sub-aperture, and convert the lateral wavefront slope and longitudinal wavefront slope based on the spot offset, pixel size and microlens focal length. Step 5. Cache wavefront slope; write the transverse wavefront slope and longitudinal wavefront slope into the FPGA on-chip slope cache; Step 6. Construct adjacent phase difference constraints; based on the transverse wavefront slope, longitudinal wavefront slope, sub-aperture spacing and operating wavelength, construct adjacent phase difference constraints between adjacent phase nodes in the phase grid; Step 7. Generate initial phase using center multipath; Based on the adjacent phase difference constraint, accumulate phase along at least two center preset paths to generate multiple sets of initial phases respectively; Step 8. Fuse the initial phase and write it to the phase buffer; The multiple initial phases are fused to obtain a unified initial phase, and the unified initial phase is written into the FPGA on-chip phase cache; Step 9. Execute the Southwell iterative reconstruction method; using the unified initial phase as the initial value for iteration, execute the Southwell iterative reconstruction method according to the relationship between adjacent phase nodes and the adjacent phase difference constraint, perform a fixed number of phase iterations to update the phase grid, and obtain the reconstructed wavefront phase; Step 10. Output wavefront phase; The reconstructed wavefront phase is subjected to mean removal and unit conversion to obtain the final wavefront phase, which is then output through the output interface.

2. The FPGA-accelerated Shaker-Hartmann fast wavefront processing method according to claim 1, characterized in that, In step 1, the lateral projection sequence is obtained by accumulating the gray levels of the corresponding sub-aperture spot regions along the longitudinal direction, and the longitudinal projection sequence is obtained by accumulating the gray levels of the corresponding sub-aperture spot regions along the lateral direction. The reference spot centroid position data is the centroid coordinate data of each sub-aperture reference spot obtained in advance under the reference plane wave incident condition, and is input into the FPGA in the same sub-aperture numbering order as the lateral projection sequence and the longitudinal projection sequence.

3. The FPGA-accelerated Shaker-Hartmann fast wavefront processing method according to claim 1, characterized in that, The fixed-fundamental-frequency Goertzel recursion in step 3 is used to obtain the target frequency complex responses of the lateral projection sequence and the longitudinal projection sequence at the fixed fundamental frequency, without performing a complete spectral solution for the lateral projection sequence and the longitudinal projection sequence; the target frequency complex response satisfies: In the formula, This represents the sampling point number in the projection sequence. The first in the horizontal projection sequence or the vertical projection sequence The grayscale value of each sampling point The length of the projection sequence. For fixed fundamental frequency serial numbers, This is the complex response at the target frequency point with a fixed fundamental frequency.

4. The FPGA-accelerated Shaker-Hartmann fast wavefront processing method according to claim 1, characterized in that, In step 4, the spot offset is obtained based on the phase difference between the phase of the complex response at the target frequency corresponding to the current sub-aperture and the reference phase corresponding to the centroid position data of the reference spot. The wavefront slope is then calculated based on the spot offset, and the relationship is as follows: In the formula, For the first The spot offset of each sub-aperture spot in the corresponding direction, expressed in pixels or sampling points. To measure the phase of the light spot projection sequence at a fixed fundamental frequency, As a reference phase corresponding to the centroid position data of the reference spot, To fix the fundamental angular frequency, This indicates the phase foldback operation. For pixel size, The focal length of the microlens. The wavefront slope is the corresponding direction; the relationship is applied to two orthogonal directions to obtain the transverse wavefront slope and the longitudinal wavefront slope.

5. The FPGA-accelerated Shaker-Hartmann fast wavefront processing method according to claim 1, characterized in that, The adjacent phase difference constraint in step 6 is obtained according to the following relationship: In the formula, Indicates the horizontal or vertical direction. Phase grid position Along the direction The phase difference increment between adjacent phase nodes, For the sub-aperture spacing, For the operating wavelength, Phase grid position Along the direction The wavefront slope.

6. The FPGA-accelerated Shaker-Hartmann fast wavefront processing method according to claim 1, characterized in that, The two preset paths in step 7 include a center column priority path and a center row priority path. The center column priority path takes the center column of the phase grid as a reference, first accumulates phase along the center column direction, and then expands from the center column to the left and right sides column by column. The center row priority path takes the center row of the phase grid as a reference, first accumulates phase along the center row direction, and then expands from the center row to the top and bottom sides row by row.

7. The FPGA-accelerated Shaker-Hartmann fast wavefront processing method according to claim 6, characterized in that, In step 8, the initial phases obtained from the two preset central paths are averaged and fused to obtain a unified initial phase, the relationship of which is as follows: In the formula, The first initial phase is obtained from the center column priority path. The second initial phase is obtained from the center row priority path. The unified initial phase is the fused phase; the unified initial phase is used as the initial value for the Southwell iterative reconstruction method.

8. The FPGA-accelerated Shaker-Hartmann fast wavefront processing method according to claim 1, characterized in that, The Southwell iterative reconstruction method in step 9 uses the unified initial phase as the initial value for iteration and performs a fixed number of phase iterations on the phase grid. The relationship is as follows: In the formula, This is the initial phase for the Southwell iterative reconstruction method. For the unified initial phase, For the number of iterations, For the process The reconstructed phase after the next phase iteration update To output the wavefront phase; the Southwell iterative reconstruction method performs phase iterative updates based on the phase values ​​of adjacent nodes and the adjacent phase difference constraints of the current phase node; the current phase and the updated phase are stored in two sets of on-chip phase caches of the FPGA respectively, and the phase iterative updates are achieved by alternating read and write methods to achieve a fixed number of phase iterations; the number of iterations is a preset number.

9. A Shaker-Hartmann fast wavefront processing system based on FPGA acceleration, characterized in that, It includes a streaming input interface, a control configuration interface, a centroid calculation module, an on-chip slope buffer module, a wavefront reconstruction module, an on-chip phase buffer module, and a result output module; The streaming input interface is used to receive the horizontal projection sequence, the vertical projection sequence, and the reference spot centroid position data generated from the spot array image; The control configuration interface is used to input the number of sub-apertures, projection sequence length, fixed fundamental frequency parameters, sub-aperture spacing, pixel size, microlens focal length, working wavelength, number of iterations, and phase output unit; The centroid calculation module is used to perform fixed-fundamental-frequency Goertzel recursion on the horizontal projection sequence and the vertical projection sequence to obtain the target frequency complex response, and to calculate the spot offset based on the target frequency complex response and the reference spot centroid position data. The on-chip slope buffer module is used to store the transverse wavefront slope and longitudinal wavefront slope calculated from the spot offset, and to provide slope input to the wavefront reconstruction module; The wavefront reconstruction module is used to construct adjacent phase difference constraints based on the transverse wavefront slope and the longitudinal wavefront slope, generate multiple sets of initial phases along at least two preset central paths, merge the multiple sets of initial phases into a unified initial phase, and use the unified initial phase as the initial value of the Southwell iterative reconstruction method to perform a fixed number of phase iterations to obtain the reconstructed wavefront phase. The on-chip phase cache module is used to store the unified initial phase and intermediate phase data during the phase iteration update process; The result output module is used to perform mean removal and unit conversion on the reconstructed wavefront phase, and output the final wavefront phase.