A CAD electrical drawing link reconstruction method and system for data centers

Abstract

The application discloses a CAD electrical drawing link reconstruction method and system for a data center, which acquires CAD electrical drawings including system drawings and layout drawings, and analyzes to obtain graph elements, characters, blocks, connecting lines and coordinates; electrical symbol candidate units are extracted from the graph elements and the blocks, port constraint geometric fingerprints containing contour hash, graph element topology hash, port candidate points, port direction vectors and connecting line adsorption strength are generated, and electrical elements and ports are identified; cabinet numbers, loop numbers and upstream and downstream identifiers are obtained by analyzing the characters, a topology evidence graph taking the electrical elements, the ports, the cabinet and the bus as nodes is constructed; geometric connectivity, character pointing, port direction consistency and power supply level gating factors are calculated, edge comprehensive confidence is obtained, a maximum confidence path set satisfying power supply level monotonicity constraints is searched, power supply links are reconstructed, physical positions of the layout drawings are fused, and power supply topology and review items are output.

Description

Technical Field

[0001] This invention relates to the field of computer-aided design drawing analysis technology, and specifically to a method and system for reconstructing CAD electrical drawing links for data centers. Background Technology

[0002] During the construction, commissioning, and operation and maintenance of data centers, electrical CAD drawings are a crucial data source for establishing equipment ledgers, power supply links, estimating commissioning workload, generating DCIM basic data, and facilitating subsequent operation and maintenance analysis. These drawings typically include electrical system diagrams and floor plans. The system diagram primarily illustrates the logical power supply relationships between transformers, main switches, busbars, outgoing line cabinets, distribution cabinets, and terminal equipment, while the floor plan mainly shows the physical location information of cabinets, equipment, rooms, and rows. CAD drawings delivered by design institutes are often in DWG and DXF formats, containing a large amount of elements, blocks, text, connectors, coordinates, and layer information. While humans can understand their meaning through engineering experience, it remains challenging for computers to directly understand and reconstruct the power supply links. Currently, CAD drawings in data center deliveries often rely on manual transcription, resulting in low efficiency, non-reusability, and delivery delays.

[0003] In existing technologies, one approach primarily uses CAD analysis tools to read the underlying data of drawings, obtaining basic information such as line segments, arcs, text, block references, coordinates, and layers. However, this approach typically remains at the element-level analysis stage, making it difficult to further identify the engineering semantics of electrical symbols. For example, the same circuit breaker, transformer, or switch symbol may be drawn differently, on different layers, or even appear as an anonymous block in drawings from different design institutes. The block name itself does not reflect its true electrical meaning. If equipment is identified solely based on block names, layer names, or simple outline features, symbol misjudgment is likely to occur, leading to errors in power supply link reconstruction.

[0004] Another approach attempts to identify equipment symbols in CAD drawings based on image recognition or template matching. However, this method typically treats CAD drawings as ordinary image processing, easily losing precise coordinates, endpoints, connectors, layers, and block structure information from the original CAD file. It struggles to accurately determine the attraction relationship between symbol ports and connectors, and also fails to distinguish between electrical symbols that are "similar in appearance but have different access directions." In data center electrical system diagrams, the correctness of power supply links depends not only on the symbol category but also on port direction, connector continuity, upstream and downstream text markings, and electrical hierarchy relationships. Therefore, simple image recognition or template matching is insufficient to meet engineering application requirements.

[0005] Furthermore, data center electrical drawings commonly suffer from issues such as inconsistent drawing standards, crossed connecting lines, partial line breaks, cross-page references, text obscuring, differences in circuit numbering formats, and inconsistent cabinet numbering. Existing connectivity analysis methods based on general graph theory typically convert connecting lines in the drawing into edges, devices into nodes, and then search for paths according to geometric connectivity relationships. However, in system diagrams, geometrically connected line segments do not necessarily constitute a reasonable power supply relationship, and geometrically disconnected nodes may belong to the same power supply link due to cross-page references, breakpoints, or textual references. Without comprehensive constraints on power supply hierarchy, port direction, and textual semantics, problems such as reverse connections, incorrect bridging, missing connections, or excessive edge patching can easily occur.

[0006] Meanwhile, system diagrams and floor plans belong to different representational systems. System diagrams emphasize who supplies power to which equipment, while floor plans emphasize the location of the equipment. They often differ in coordinate systems, scale, and layer organization, making simple coordinate overlay insufficient for fusion. Existing technologies typically rely on manual verification based on cabinet numbers or equipment names. However, when cabinet numbers contain abbreviations, omissions, duplicates, or inconsistent labeling, manual verification is labor-intensive and prone to errors. Therefore, there is an urgent need for a technical solution that can automatically reconstruct power supply links and output verifiable results based on data center CAD electrical drawings, comprehensively utilizing element structure, symbol ports, textual semantics, power supply hierarchy, and physical location information. Summary of the Invention

[0007] To address the aforementioned technical problems, this invention provides a method and system for reconstructing CAD electrical drawing links for data centers. The method acquires CAD electrical drawings including system diagrams and floor plans, and parses them to obtain primitives, text, blocks, connecting lines, and coordinates. It extracts electrical symbol candidate units from the primitives and blocks, generating a port constraint geometric fingerprint containing contour hashes, primitive topological hashes, port candidate points, port direction vectors, and connecting line adsorption strength to identify electrical components and ports. It parses the text to obtain cabinet numbers, circuit numbers, and upstream / downstream identifiers, constructing a topological evidence graph with electrical components, ports, cabinets, and buses as nodes. It calculates geometric connectivity, text orientation, port direction consistency, and power supply level gating factors to obtain edge comprehensive confidence. It searches for the set of paths with the maximum confidence that satisfy the monotonic constraints of the power supply level, reconstructs the power supply link, and integrates the physical locations from the floor plan to output the power supply topology and verification items.

[0008] This application provides a method for reconstructing CAD electrical drawing links for data centers, including the following steps: S1. Obtain the data center CAD electrical drawings, which include system diagrams and floor plans, and parse them to obtain graphic elements, text, blocks, connecting lines and coordinates; S2. Extract electrical symbol candidate units from primitives and blocks, generate port constraint geometric fingerprints containing contour hash, primitive topological hash, port candidate points, port direction vectors and connector adsorption strength, and identify electrical components and ports. S3. Parse the text to obtain the cabinet number, circuit number, and upstream and downstream identifiers; S4. Construct a topology evidence graph based on the electrical components and ports, the cabinet nodes determined by the text parsing results, and the bus nodes obtained by the connection line shape recognition. The topology evidence graph uses electrical components, ports, cabinet nodes, and bus nodes as nodes, and geometric connectivity, text pointing relationships, and cabinet affiliation relationships as edges. S5. Calculate the geometric connectivity confidence, text direction confidence, port direction consistency confidence, and power supply level gating factor of the edge respectively to obtain the overall edge confidence. S6. Search the set of paths with the highest confidence that satisfy the monotonic constraint of the power supply level in the topology evidence graph, reconstruct the power supply links, and merge the power supply links with the physical location information of the floor plan according to the cabinet number, and output the power supply topology and verification items.

[0009] Preferably, the power supply level gating factor is determined based on the power supply level difference between two adjacent nodes; when the direction of the edge is from the power supply side level to the load side level, the power supply level gating factor is positive; when the direction of the edge is from the load side level to the power supply side level, the power supply level gating factor is zero or negative.

[0010] Preferably, the power supply hierarchy includes transformer hierarchy, main switch hierarchy, busbar hierarchy, outgoing cabinet hierarchy, distribution cabinet hierarchy, and terminal equipment hierarchy; the monotonic constraint of the power supply hierarchy is: the power supply hierarchy of adjacent nodes in the maximum confidence path remains unchanged along the direction from the power source side to the load side; when fusing the power supply link with the physical location information of the floor plan, a topology location code is generated for the link nodes in the system diagram, the topology location code includes power supply hierarchy, upstream node category, downstream node category, loop number vector, and cabinet number character vector; a spatial location code is generated for the equipment objects in the floor plan, the spatial location code includes room affiliation, adjacent cabinet number, arrangement direction, physical coordinates, and cabinet number character vector; fusion is completed based on the matching score of the topology location code and the spatial location code.

[0011] Preferably, the edge comprehensive confidence Cij satisfies: Cij=αCg+βCs+γCp+δGh; where Cg is the geometric connectivity confidence, Cs is the text direction confidence, Cp is the port direction consistency confidence, Gh is the power supply level gating factor, and α, β, γ, and δ are weighting coefficients.

[0012] In some embodiments, such as Figure 3As shown, the port candidate points in the port constraint geometric fingerprint are determined based on the symbol bounding box boundary points, the snap points of the connecting line endpoints, and the intersection points of the primitives; the port direction vector is determined based on the direction between the port candidate points and the symbol center point, as well as the extension direction of the external connecting lines.

[0013] Preferably, when generating port-constrained geometric fingerprints, the weights of port candidate points and port direction vectors in geometric fingerprint matching are adaptively increased based on the connection line density of the local region where the electrical symbol candidate units are located.

[0014] Preferably, when there is no direct geometrically connected edge between two nodes in the topological evidence graph, at least two of the following conditions are met: the loop numbers are consecutive, the power supply levels are adjacent, the port directions are opposite, and the text points upstream and downstream, a candidate completion edge is generated, and the candidate completion edge is added to the topological evidence graph and participates in the search for the maximum confidence path set.

[0015] Preferably, the confidence level Cb of the candidate completed edge satisfies: Cb = η1Ct + η2Ch + η3Co + η4Cr - μDb; where Ct is the semantic consistency of the text, Ch is the adjacency of the power supply level, Co is the relativity of the port direction, Cr is the continuity of the loop number, Db is the distance between the breakpoint or the page span, and μ is the penalty coefficient for the breakpoint completion edge.

[0016] Preferably, the breakpoint patching penalty coefficient μ is adaptively adjusted according to the overall breakage rate of the CAD electrical drawings; when the overall breakage rate increases, the breakpoint patching penalty coefficient is reduced to increase the probability of completing reasonable breakpoints in low-quality drawings; when the overall breakage rate decreases, the breakpoint patching penalty coefficient is increased to suppress excessive patching; the overall breakage rate is determined based on the ratio of the number of connection line endpoints not attached to electrical component ports, cabinet nodes, or busbar nodes to the total number of connection line endpoints.

[0017] This application also provides a CAD electrical drawing link reconstruction system for data centers, including: The drawing parsing module acquires the data center CAD electrical drawings, which include system diagrams and floor plans, and parses them to obtain graphic elements, text, blocks, connecting lines, and coordinates. The symbol recognition module extracts electrical symbol candidate units from primitives and blocks, generates a port constraint geometric fingerprint containing contour hash, primitive topological hash, port candidate points, port direction vector, and connection line adsorption strength, and identifies electrical components and ports. The text parsing module parses text to obtain cabinet number, circuit number, and upstream / downstream identifiers; The topology evidence diagram construction module constructs a topology evidence diagram based on the electrical components and ports, cabinet nodes determined by text parsing results, and bus nodes identified by connection line morphology. The confidence calculation module calculates the geometric connectivity confidence, text direction confidence, port direction consistency confidence, and power supply level gating factor of the edge respectively to obtain the overall edge confidence. The link reconstruction module searches the topology evidence graph for the set of paths with the maximum confidence that satisfy the monotonic constraint of the power supply level, and then reconstructs the power supply link. The multi-image fusion and verification learning module merges the power supply link with the physical location information of the floor plan according to the cabinet number, and outputs the power supply topology and verification items.

[0018] Compared with the prior art, the technical solution of the present invention has the following beneficial effects: (1) Based on CAD drawing analysis, this invention does not rely solely on block names, layer names, or symbol outlines for identification. Instead, it generates a port constraint geometric fingerprint that includes outline hash, primitive topology hash, port candidate points, port direction vectors, and connection line adsorption strength. Thus, even if different design institutes use different symbol drawing methods, anonymous block names, or non-standard layers, they can still identify electrical components and ports by combining the symbol's own geometric structure and its connection relationship with external connection lines. This reduces misidentification of objects such as circuit breakers, switches, busbars, and cabinets, providing a more reliable node foundation for subsequent power supply link reconstruction.

[0019] (2) This invention constructs a topological evidence graph with electrical components, ports, cabinet nodes, and bus nodes as nodes, and geometric connectivity, textual pointing, and cabinet affiliation as edges. It also comprehensively calculates the confidence of geometric connectivity, textual pointing, port direction consistency, and power supply level gating factor. By searching the maximum confidence path set through monotonic constraints of the power supply level, it can eliminate geometrically similar but electrically logically unreasonable reverse connections or incorrect bridging. Even in complex situations such as crossovers, broken lines, text occlusion, and cross-page references, it can still accurately reconstruct the power supply link from the power supply side to the load side.

[0020] (3) After reconstructing the power supply link, this invention integrates the logical power supply relationship in the system diagram with the physical location information in the floor plan according to the cabinet number, forming structured data that simultaneously includes power supply topology, cabinet nodes, equipment locations, and verification items. For nodes that do not have direct geometrically connected edges but meet multiple completion conditions, candidate completion edges can be generated, and the breakpoint completion penalty coefficient can be adaptively adjusted according to the overall disconnection rate, thereby increasing the probability of reasonable link completion in low-quality drawings and suppressing excessive edge completion in high-quality drawings, ultimately reducing the workload of manual verification and improving the data generation efficiency of data center debugging, operation and maintenance, and DCIM initialization. Attached Figure Description

[0021] Figure 1 Flowchart of the CAD electrical drawing link reconstruction method of this invention; Figure 2 Hardware architecture diagram of the CAD electrical drawing link reconstruction system for data centers; Figure 3 A schematic diagram of port constraint geometric fingerprint generation and electrical component identification in this invention; Figure 4 A schematic diagram of the construction of the topological evidence graph of this invention; Figure 5 A schematic diagram of the power supply topology output and verification items of this invention. Detailed Implementation

[0022] Those skilled in the art will understand that, in order to make the above-mentioned objects, features, and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Figure 1 This application illustrates a method for reconstructing CAD electrical drawing links for data centers, including the following steps: S1. Obtain the data center CAD electrical drawings, which include system diagrams and floor plans, and parse them to obtain graphic elements, text, blocks, connecting lines and coordinates; In some embodiments, a user uploads a CAD electrical drawing package for a data center project via a drawing upload interface. The CAD electrical drawing package includes at least one electrical system diagram and at least one floor plan. The file format can be DWG, DXF, or an intermediate vector file converted from DWG. Upon receiving the drawing package, the system generates a project number, drawing batch number, and drawing version number for the package, and records metadata such as drawing name, upload time, design institute source, building number, floor number, and professional category.

[0023] For each CAD electrical drawing, the system first performs file format and version identification. For example, if the file header information indicates that the drawing is in DWG format, the DWG parsing program is called to parse it; if the file is in DXF format, the SECTION, ENTITIES, BLOCKS, TABLES, and other data segments are directly read. If parsing a high-version DWG file fails, it can be converted to a low-version DWG or DXF file before structured parsing. During the parsing process, the system preserves the original coordinate system, layer information, block definition information, and entity relationships in the CAD drawing, and does not simply rasterize the drawing into an image to avoid losing endpoint coordinates, connector positions, and block reference structures.

[0024] During the parsing process, the system extracts sets of graphic elements, text, blocks, connectors, and coordinates from the CAD drawing. The graphic element set includes basic entities such as lines, polylines, circles, arcs, rectangles, splines, filled areas, and section lines; the text set includes single-line text, multi-line text, attribute text, and annotation text; the block set includes block definitions, block references, anonymous blocks, dynamic blocks, and nested elements within blocks; the connector set includes straight connectors, polyline connectors, busbar segments, page-crossing connectors, and lines with arrows; and the coordinate set includes the coordinates of each graphic element's endpoints, block insertion points, text bounding boxes, connector inflection points, and the drawing's outer frame.

[0025] Specifically, for straight line entities, the system records their start-point coordinates, end-point coordinates, layer, color, line type, line width, and entity identifier; for polyline entities, the system records their vertex coordinates, closure state, line segment direction, and line segment length; for text entities, the system records their text content, insertion point coordinates, rotation angle, font height, text bounding box, and layer; for block reference entities, the system records their block name, insertion point coordinates, scaling ratio, rotation angle, mirror state, attribute fields, and list of primitives within the block. For anonymous blocks, the system does not use the block name as the basis for semantic recognition, but instead fully preserves its internal primitive structure for subsequent generation of port constraint geometric fingerprints.

[0026] Furthermore, the system makes a preliminary judgment on the drawing type based on the drawing name, title block text, layer name, text keywords, and element distribution characteristics. If the drawing name or title block text contains keywords such as system diagram, primary system diagram, low-voltage system diagram, high-voltage system diagram, or power distribution system diagram, and the drawing has a dense distribution of connecting lines, busbars, switch symbols, and circuit numbers, it is marked as a system diagram. If the drawing name or title block text contains keywords such as floor plan, power distribution room plan, machine room plan, or equipment layout diagram, and the drawing contains room boundaries, equipment outlines, column numbers, grid lines, or wall lines, it is marked as a floor plan. For drawings that cannot be directly judged, the system performs a comprehensive score based on the density of connecting lines, the proportion of text categories, the pattern of block repetition, and the title information of the drawing frame, and selects the type with the highest score as the drawing type.

[0027] After identifying the drawing type, the system establishes analytical indexes for both system diagrams and floor plan layouts. For system diagrams, the focus is on establishing spatial indexes between electrical symbols, connecting lines, busbars, circuit numbers, cabinet numbers, and upstream / downstream identifiers. For floor plan layouts, the focus is on establishing spatial indexes between equipment outlines, room boundaries, cabinet rows, cabinet numbers, and physical coordinates. These spatial indexes can employ grid indexes, R-tree indexes, or boundary-based proximity indexes for subsequent quick lookups of adjacent objects around a given text, graphic element, or block.

[0028] In one optional implementation, the system uniformly converts the parsed data into structured data objects. For example, each primitive object includes entity ID, entity type, layer, geometric coordinates, color, line type, and parent block ID; each text object includes text ID, text content, text coordinates, text direction, text bounding box, and neighboring primitive IDs; each block object includes block ID, block name, insertion point, rotation angle, scaling ratio, internal primitive set, and attribute fields; each connector object includes connector ID, endpoint coordinates, vertex sequence, snap candidate points, line type, layer, and adjacent symbol candidate units.

[0029] For example, after parsing a low-voltage system diagram, the system can obtain the following structured results: several long straight lines or polylines representing busbars, several anonymous blocks representing circuit breakers or switches, several text objects representing cabinet numbers, several text objects representing cable types and protection settings, and a large number of connection line objects representing circuit connection relationships. After parsing a floor plan, the system can obtain data such as equipment rectangular outlines, room boundary lines, column text, cabinet number text, and equipment coordinates. The above parsing results are written into a structured database or cache and bound to the project number, drawing number, and drawing type, serving as the data foundation for subsequent electrical symbol recognition, text semantic parsing, topology evidence diagram construction, and the fusion of system diagrams and floor plans.

[0030] S2. Extract electrical symbol candidate units from primitives and blocks, generate port constraint geometric fingerprints containing contour hash, primitive topological hash, port candidate points, port direction vectors and connector adsorption strength, and identify electrical components and ports. In one specific embodiment, after completing the CAD structured parsing of S1, the system obtains the set of graphic elements, the set of blocks, the set of connecting lines, and the set of coordinates in the system diagram. The system first extracts electrical symbol candidate units from the graphic elements and blocks. The electrical symbol candidate units can be block reference objects in the CAD drawing, or they can be local graphic units formed by combining several basic graphic elements but not defined as blocks. For example, circuit breakers, disconnect switches, contactors, transformers, fuses, instruments, bus tie switches, etc., may exist in the form of blocks, or they may be formed by combining multiple straight lines, arcs, circles, rectangles, or polylines.

[0031] Specifically, the system first traverses the block set, treating each block reference object as a first-class candidate unit, and extracts its internal primitives, insertion point, rotation angle, scaling factor, and bounding box. For primitives not encapsulated as blocks, the system clusters them based on the adjacency of primitive endpoints, spatial distance, and bounding box overlap, aggregating several primitives located in the same area and connected or close to each other into a second-class candidate unit. During clustering, the system excludes objects that clearly belong to the drawing frame, title block, long busbar, room outline, or large area boundary line to avoid mistaking non-electrical symbols for electrical symbols.

[0032] For each candidate electrical symbol, the system calculates its bounding box and performs coordinate normalization on the candidate symbol based on the center point and dimensions of the bounding box. Normalization includes translation normalization, scale normalization, rotation normalization, and mirror equivalence processing. After normalization, the same electrical symbol can be mapped to a unified geometric representation space even if there are differences in size, rotation angle, or mirror arrangement in different drawings.

[0033] Subsequently, the system generates contour hashes for candidate units. Specifically, the system extracts the outer contour points, key endpoints, intersections, and inflection points of the candidate units and maps them onto a normalized grid to form a contour occupancy matrix; then, it hashes this contour occupancy matrix to obtain the contour hash. The contour hash is used to describe the overall shape characteristics of the candidate unit, but it is not used as a sole basis for symbol identification to avoid misjudging different electrical components with similar shapes.

[0034] Furthermore, the system generates primitive topology hashes. The system uses the primitive endpoints, intersections, connection points, and closed regions within the candidate unit as topology nodes, and line segments, arc segments, and multi-segment line segments as topology edges to construct a local primitive topology graph. A topology adjacency matrix is ​​generated based on the adjacency, intersection, containment, and connection relationships between topology nodes, and this matrix is ​​encoded to obtain the primitive topology hash. Compared to simple contour hashing, primitive topology hashing can reflect the internal structure of symbols, such as the open structure of a switch, the ring structure of a transformer, the circular structure of an instrument, and the contact structure of a circuit breaker.

[0035] After generating the outline hash and primitive topology hash, the system further determines port candidate points. Port candidate points are not determined solely by the symbol shape, but rather by a combination of the symbol boundary and external connecting lines. Specifically, the system filters port candidate points from the following locations: primitive endpoints near the boundary of the candidate unit's outer frame, adjacent points of primitives within the candidate unit and external connecting lines, snap points of connecting line endpoints, primitive intersections, and locations where candidate units intersect with busbars or loop segments. When the distance from a candidate point to the endpoint of an external connecting line is less than a preset snap distance, or when the extension direction of the external connecting line is consistent with the direction of the primitive containing the candidate point, the candidate point is marked as a port candidate point.

[0036] For each candidate port point, the system calculates a port direction vector. This port direction vector is determined by considering the direction the candidate port point points towards the center of the candidate unit, the extension direction of the external connecting line at the port, and the entry or exit direction of adjacent connecting lines. For example, if a candidate port point is located on the left side of the symbol's outer frame, and the external connecting line enters the symbol from left to right, then the port direction vector can be represented as an entry direction from left to right; if a candidate port point is located below the symbol, and the connecting line extends downwards to the next-level device, then the port direction vector can be represented as a downward feed-out direction. Thus, the system not only identifies what the symbol is, but also where the symbol enters from and where it feeds out from.

[0037] Simultaneously, the system calculates the adhesion strength of the connecting line. For a candidate port point p and an adjacent connecting line l, the system calculates the adhesion strength based on factors such as the distance from the candidate port point to the endpoint of the connecting line, the consistency between the port direction and the connecting line direction, whether the connecting line belongs to an electrical connection layer, whether the connecting line length satisfies the loop connection characteristics, and whether the candidate port point is located near a symbol boundary. For example, the adhesion strength A of the connecting line can satisfy: A=w1·exp(-d / τ)+w2·cosθ+w3·L+w4·M; Where d is the distance between the candidate port point and the endpoint of the connector, τ is the distance attenuation parameter, θ is the angle between the port direction vector and the extension direction of the connector, L is the normalized score of the connector length, M is the layer matching score, and w1, w2, w3, and w4 are weighting coefficients. The higher the adsorption strength, the more likely the connector is to actually connect to the port.

[0038] After obtaining the contour hash, primitive topological hash, port candidate points, port direction vectors, and connector adsorption strength, the system generates a port-constrained geometric fingerprint. The port-constrained geometric fingerprint can be represented as: F = {Hc, Ht, P, D, A}; Where Hc is the contour hash, Ht is the primitive topology hash, P is the set of port candidate points, D is the set of port direction vectors, and A is the set of connection line adsorption strengths. Unlike ordinary geometric fingerprints, this port-constrained geometric fingerprint simultaneously characterizes the symbol's own shape and the connection relationship between the symbol and the external power supply connection line, thus avoiding misidentification based solely on shape similarity.

[0039] In a preferred embodiment, the system adaptively adjusts the weights of port candidate points and port direction vectors in geometric fingerprint matching based on the connection line density of the local area where the electrical symbol candidate unit is located. Specifically, the system expands outward by a preset distance from the outer frame of the candidate unit to form a local area, and counts the number of connection lines, the total length of connection lines, and the number of connection line intersections within this local area to obtain the connection line density ρ. When the connection line density ρ is high, it indicates that there may be multiple adjacent symbols and complex wiring in this area, and relying solely on the contour is prone to misjudgment. In this case, the weights of the port candidate points and port direction vectors are increased. When the connection line density ρ is low, the weights of the contour hash and the primitive topology hash are appropriately increased to enhance the recognition ability of isolated symbols or simple symbols. In some embodiments, the port candidate point weight λp and the port direction weight λd can be adjusted as follows: λp=λp0·log(1+ρ); λd=λd0·log(1+ρ); Among them, λp0 and λd0 are the basic weights. In this way, in areas with complex wiring, the system pays more attention to the port access relationships; in areas with simple wiring, the system pays more attention to the symbol body structure.

[0040] After generating the port constraint geometric fingerprint, the system matches this fingerprint with known symbol fingerprints in the electrical symbol knowledge base. The electrical symbol knowledge base stores standard fingerprints, historically confirmed fingerprints, port quantity, port orientation, typical connection methods, and semantic categories for various electrical components. During matching, the system calculates contour similarity, topological similarity, port position similarity, port orientation consistency, and connection adhesion strength consistency, and obtains a comprehensive matching score. If the comprehensive matching score is greater than a first threshold, the system determines the electrical component category and port definition of the candidate unit; if the comprehensive matching score is between the first and second thresholds, the system retains multiple candidate categories and performs a secondary judgment based on subsequent topological evidence maps; if the comprehensive matching score is lower than the second threshold, the candidate unit is output as a symbol to be verified.

[0041] For example, in a low-voltage system diagram, the name of an anonymous block is merely an automatically generated number, failing to reflect its true semantic meaning. The system analyzes its internal elements and discovers that this candidate unit has a switch contact structure with connection point attachments on both the left and right sides, with port directions pointing towards the upstream bus and downstream circuit, respectively. Through port constraint geometric fingerprint matching, the system can identify it as a circuit breaker or switch-type component and determine its upstream and downstream ports. Compared to methods relying solely on block names or outlines for identification, this method combines external connection line relationships to determine symbol ports, reducing the probability of misidentification between similarly shaped symbols.

[0042] Through the above steps, the system obtains the electrical component category, number of ports, port location, port orientation, and recognition confidence score for each electrical symbol candidate unit, and stores the recognition results in association with the original primitive ID, block ID, and coordinate information. This result serves as the data foundation for subsequent text parsing, topology evidence graph construction, edge confidence calculation, and power supply link reconstruction.

[0043] S3. Parse the text to obtain the cabinet number, circuit number, and upstream and downstream identifiers; In one specific embodiment, after completing the CAD structured parsing in S1 and the electrical symbol candidate unit identification in S2, the system parses the text objects in the system diagram and floor plan to obtain cabinet numbers, circuit numbers, and upstream and downstream identifiers. The text objects include single-line text, multi-line text, block attribute text, leader line annotation text, table text, and title block text in the CAD drawings. The purpose of this step is to transform the originally scattered and unstructured engineering text in the CAD drawings into structured fields that can participate in the construction of the topology evidence diagram. The CAD drawings contain unstructured engineering terms such as 500kVA and G1C-2AA6-3, which need to be converted into standard fields to serve subsequent link reconstruction and data aggregation.

[0044] Specifically, the system first preprocesses the text collection. For each text object, the system reads its text content, text insertion point coordinates, text bounding box, rotation angle, font height, layer, parent block ID, and adjacent element IDs. For annotations that have been split into multiple adjacent text fragments by CAD, the system merges them based on text spacing, baseline direction, font height, and spatial proximity. For example, a cabinet number might be split into three text objects: G1C-, 2AA6, and -3. The system determines that the three are located on the same text baseline and the spacing is less than a preset threshold, then merges them into G1C-2AA6-3. For multi-line text, the system preserves the line break structure and simultaneously generates standardized text after removing line breaks, spaces, and special characters.

[0045] Then, the system standardizes the text content. Standardization includes unifying full-width and half-width characters, unifying capitalization, removing redundant spaces, unifying Chinese and English parentheses, unifying different hyphens such as —, -, and – to -, and mapping common engineering abbreviations to standard expressions. For example, “incoming cabinet,” “incoming line,” and “Incoming” are unified as “incoming line” identifiers; “feedout,” “outgoing line,” and “to TO” are unified as “downstream” identifiers; and “from,” “from,” and “from” are unified as “upstream” identifiers. This standardization process reduces the impact of differences in annotation habits among different design institutes on subsequent analysis results.

[0046] After obtaining the standardized text, the system categorizes and parses the text according to preset field rules. For cabinet numbers, the system identifies number strings containing meanings such as distribution cabinet, switch cabinet, row cabinet, UPS cabinet, PDU cabinet, incoming line cabinet, bus tie cabinet, and outgoing line cabinet. The format of cabinet numbers can include letters, numbers, hyphens, and partition prefixes, such as AA1, 2AA6-3, G1C-2AA6-3, UPS-A1, PDU-B03, AP-1F-02, etc. The system can use regular expressions to identify strings with cabinet number characteristics and combine factors such as the layer where the text is located, whether there is a cabinet outline or electrical symbol near the text, and whether the text is within a cabinet partition in the system diagram to determine whether it is a cabinet number.

[0047] For circuit numbers, the system identifies numbers associated with circuit breakers, outgoing circuits, cable circuits, or terminal loads, such as QF1, WL-01, C1-3, L1, MCC-02-05, feeder 01, etc. Circuit numbers are typically located near circuit breaker symbols, beside outgoing connection lines, or inside cabinet sections. The system determines whether a text is a circuit number based on the distance between the text and candidate electrical symbol units, the projection relationship between the text and the connection line, and the number of symbols in the local area containing the text, and associates it with the nearest electrical component, port, or connection line.

[0048] For upstream and downstream identifiers, the system identifies directional words and number combinations from the text. For example, if the text reads "from T1 transformer," "from AA1 bus," or "FROM TR-1," the system parses "T1 transformer," "AA1 bus," and "TR-1" as upstream identifiers. If the text reads "to UPS-A1," "feedout to PDU-B03," or "TO 2AA6-3," the system parses "UPS-A1," "PDU-B03," and "2AA6-3" as downstream identifiers. For text that does not explicitly contain directional words like "from" or "to," the system determines its possible upstream or downstream meaning by combining the text's relative position to the connecting line arrow, port direction vector, and power supply level.

[0049] Furthermore, the system combines text parsing with spatial association. For each parsed cabinet number, circuit number, or upstream / downstream identifier, the system establishes a neighborhood search window around its text bounding box to find nearby electrical symbol candidate units, connecting lines, busbar nodes, and cabinet outlines. If the text is located inside a cabinet's outer frame or its distance from the outer frame is less than a first threshold, the text is associated with that cabinet node; if the text is less than a second threshold from a connecting line and its direction is substantially consistent with the connecting line's direction, the text is associated with that connecting line; if the text is located near an electrical component symbol and is not occupied by other candidate objects, it is associated with that electrical component or its port.

[0050] In a specific example, the system identifies the text "G1C-2AA6-3" in the low-voltage system diagram. This text is located at the top of a cabinet section, with multiple circuit breaker symbols and outgoing circuits below it. The system resolves "G1C-2AA6-3" to a cabinet number and generates the corresponding cabinet node. The system also identifies the text "QF3, 400A to UPS-A1". "QF3" is resolved to a circuit number, "400A" to a circuit breaker rated parameter, and "to UPS-A1" to a downstream identifier. Since all of these texts are within the same cabinet section, and "to UPS-A1" is close to an outgoing connection line, the system records the downstream target corresponding to that outgoing connection line as "UPS-A1".

[0051] In another specific example, the system identifies the text "UPS-A1" and "Battery Room 1" in the floor plan, with "UPS-A1" located inside the rectangular outline of a certain device. The system resolves "UPS-A1" as a device or cabinet number and "Battery Room 1" as room ownership information, linking the two through physical coordinates. Subsequently, in S6, when a downstream device of a power supply link in the system diagram is identified as "UPS-A1," the logical link node can be merged with the physical device location in the floor plan using the cabinet number or device number.

[0052] For text with complex formats or that does not meet preset rules, the system can use a semantic parsing model for auxiliary parsing. The input to the semantic parsing model includes the original text, the drawing type where the text is located, the categories of adjacent symbols, the direction of adjacent connecting lines, and the layer information of the local area where the text is located; the output includes field type, field value, original text reference, and parsing confidence level. To avoid the semantic parsing results affecting the accuracy of critical engineering fields, the system performs secondary verification on cabinet numbers, loop numbers, and upstream / downstream identifiers. If the field value output by the semantic parsing model cannot find the corresponding original text in the neighborhood of adjacent text, identified cabinet nodes, or symbols, the confidence level of that field is reduced or it is added to the verification items.

[0053] After parsing, the system generates structured fields for each text parsing result. These structured fields include at least: text ID, original text, normalized text, field type, field value, corresponding drawing type, spatial coordinates, associated object ID, association type, and parsing confidence level. Field types can include cabinet number, circuit number, upstream identifier, downstream identifier, capacity parameter, cable number, protection setting, room affiliation, etc. Among these, the cabinet number, circuit number, and upstream / downstream identifiers will directly participate in the subsequent construction of the topology evidence diagram.

[0054] Through the above processing, the system can obtain structured textual semantic results from CAD electrical drawings. Cabinet numbers are used to determine the primary key for merging cabinet nodes and system diagrams with floor plans; circuit numbers are used to distinguish different outgoing lines or load branches within the same cabinet; upstream and downstream identifiers are used to supplement power supply direction relationships that cannot be fully expressed by geometric connection lines. Therefore, the textual parsing results are not only saved as drawing annotation information, but also serve as an important basis for textual pointing edges, cabinet affiliation edges, and candidate completion edges in the topology evidence diagram.

[0055] S4. Construct a topology evidence graph based on the electrical components and ports, the cabinet nodes determined by the text parsing results, and the bus nodes obtained by the connection line shape recognition. The topology evidence graph uses electrical components, ports, cabinet nodes, and bus nodes as nodes, and geometric connectivity, text pointing relationships, and cabinet affiliation relationships as edges. In one specific embodiment, after completing the electrical component and port identification in S2 and the text parsing in S3, the system constructs a topology evidence graph based on the electrical components, ports, cabinet nodes, and bus nodes. The purpose of this step is not to directly determine the final power supply link, but to organize the geometric connection evidence, textual pointing evidence, and cabinet attribution evidence from the CAD drawings into a computable graph structure, providing a foundation for subsequent edge comprehensive confidence calculation and maximum confidence path search. It is necessary to establish the power supply topology based on the connections in the system graph and associate the system graph and layout diagram data through cabinet numbers.

[0056] First, the system generates a first type of node based on the electrical components and ports identified by S2. For each electrical component, the system generates a component node with attributes including component ID, component category, drawing, layer, geometric center point, bounding box, identification confidence level, number of ports, and original element ID. For each port of the electrical component, the system further generates a port node, which establishes an internal association with its associated component node. The port node's attributes include port ID, port coordinates, port direction vector, connection line adhesion strength, the side where the port is located, and the corresponding original element endpoint. This allows for the differentiation between the device itself and its access point, preventing incorrect connections caused by relying solely on the component center point for subsequent connection determination.

[0057] Secondly, the system generates cabinet nodes based on the cabinet numbers obtained in S3. Specifically, when the system recognizes cabinet number text in the system diagram, such as AA1, 2AA6-3, G1C-2AA6-3, UPS-A1, etc., it determines the cabinet node based on the text position, text bounding box, the area within the drawing frame, and the distribution range of surrounding electrical components. If there is a clear cabinet outer frame in the drawing, the outer frame is used as the spatial range of the cabinet node; if there is no clear outer frame, the cabinet area is inferred based on the cabinet numbers, circuit numbers, circuit breaker symbols, and connection line distribution within the same area. The attributes of the cabinet node include the cabinet number, the cabinet area bounding box, the system diagram to which it belongs, the possible corresponding floor plan object, the cabinet type, and the associated text ID.

[0058] Next, the system identifies busbar nodes based on the shape of the connecting lines. Specifically, the system traverses the set of connecting lines, filtering straight lines or segments with a length greater than a preset length threshold, stable direction, line width or layer conforming to busbar characteristics, and multiple branch access points as candidate busbars. For multiple long lines that are parallel to each other and have a spacing less than a preset spacing threshold, the system can merge them into the same busbar group; for line segments that are interrupted by text, symbols, or diagrams but have the same direction, close endpoints, and continuous branch access points on both sides, the system merges them into the same busbar node. The attributes of a busbar node include busbar ID, busbar direction, busbar endpoints, busbar segment set, number of branch access points, cabinet node to which it belongs, and original connecting line ID.

[0059] Then, the system constructs a topological evidence graph. This graph can be a directed multigraph or a graph structure with attribute edges. Nodes in the graph include electrical component nodes, port nodes, cabinet nodes, and busbar nodes; edges include geometric connectivity edges, textual linking edges, and cabinet affiliation edges. Each edge retains its edge type, edge direction, evidence source, associated original object ID, initial confidence level, and subsequent feature parameters that can be used to calculate the overall confidence level.

[0060] For geometric connectivity edges, the system primarily generates them based on the spatial relationships between connectors, ports, and busbars. Specifically, the system performs snap-fit ​​matching between connector endpoints and candidate port points. When the distance between a connector endpoint and a port node is less than an endpoint snap-fit ​​threshold, and the angle between the connector extension direction and the port direction vector is less than a preset angle threshold, a geometric connectivity edge is generated between the two port nodes connected by the connector. If one end of a connector snaps to a port node and the other end snaps to a busbar node, a geometric connectivity edge is generated between the port node and the busbar node. If there are vertices or intersections in a polyline, the system first splits the intersections and then establishes geometric connectivity edges for each of the split segments. In this way, the system can transform scattered line segments, polylines, and busbar branches in CAD into connectivity evidence in the drawing.

[0061] For text-based pointing relationships, the system generates them based on the upstream and downstream identifiers obtained from S3 parsing. If a text object is parsed as originating from T1 transformer, drawn from AA1 bus, FROM TR-1, or other upstream identifiers, the system establishes a text-based pointing relationship edge between the port node, connecting line, or cabinet node adjacent to the text and the corresponding upstream target node. If a text object is parsed as originating from UPS-A1, fed out to PDU-B03, TO 2AA6-3, or other downstream identifiers, the system establishes a text-based pointing relationship edge between the current node adjacent to the text and the downstream target node. If the text only contains cabinet number or circuit number without a clear directional term, the system preliminarily infers the edge direction by combining the direction of the connecting line containing the text, the port direction vector, and the power supply level, and marks the edge as a weak text-based pointing relationship edge.

[0062] For cabinet affiliation edges, the system generates them based on the spatial inclusion and textual affiliation relationships between cabinet nodes and electrical components, ports, busbars, and circuit numbers. If the outer frame of an electrical component is located within the spatial range of a cabinet node, or its corresponding circuit number is located within that cabinet area, a cabinet affiliation edge is generated between the electrical component node and the cabinet node. If a busbar segment is located at the top or middle of the cabinet area and has branch connections with multiple outgoing switches within the cabinet, a cabinet affiliation edge is generated between the busbar node and the cabinet node. This type of edge is used to express affiliation information such as a component belonging to a cabinet, a port belonging to a circuit, or a busbar located within a cabinet area.

[0063] In a specific example, the system identifies cabinet number G1C-2AA6-3 in the low-voltage system diagram, and below it, identifies three circuit breaker symbols QF1, QF2, and QF3, as well as a horizontal busbar. The system determines G1C-2AA6-3 as a cabinet node based on text location and local area; it determines the busbar node based on the horizontal line and multiple branch connection points; and it determines the upstream and downstream ports of each circuit breaker based on the port constraint geometric fingerprint of the circuit breaker symbols. Subsequently, the system generates geometric connectivity edges between the busbar node and the upstream ports of each circuit breaker, and between the downstream ports of the circuit breakers and their corresponding outgoing connection lines. It also generates textual pointing edges between the downstream ports of the circuit breakers and the target node UPS-A1 based on text such as "to UPS-A1". Simultaneously, the system establishes cabinet affiliation edges between QF1, QF2, QF3 and cabinet node G1C-2AA6-3.

[0064] In another specific example, a connecting line is obscured by text in the drawing, resulting in a geometrically discontinuous line segment. In this case, the system will not directly complete the final link in S4, but will instead write the existing geometrically connected edges, text-directed edges, and cabinet-attributed edges into the topological evidence graph, such as... Figure 4As shown, for example, if there is text pointing to PDU-B03 near one port of the connection line, and cabinet number PDU-B03 exists in another area of ​​the floor plan or system diagram on the other side, the system can first establish a text-pointing relationship edge. Subsequently, in S5 and S7, the system combines the edge comprehensive confidence, power supply level gating factor, and candidate completion edge rules to determine whether this relationship participates in the final power supply link.

[0065] To improve subsequent calculation efficiency, the system also establishes node and edge indexes when constructing the topology evidence graph. The node index includes indexes based on drawing number, node type, cabinet number, circuit number, spatial coordinates, and candidate power supply level values; the edge index includes indexes based on edge type, nodes at both ends of the edge, evidence source, connection line ID, text ID, and cabinet number. Through these indexes, the system can quickly query all electrical components within a cabinet, all ports of a busbar connection, upstream and downstream nodes involved in a textual relationship, and candidate connection objects around a node.

[0066] After constructing the topology evidence graph, the system outputs structured records for each node and edge. Node records include at least the node ID, node type, node coordinates, associated primitive ID, associated text ID, cabinet number, and identification confidence level. Edge records include at least the edge ID, edge type, starting node, ending node, evidence source, associated connection line ID, associated text ID, spatial distance, directional angle, whether it spans multiple pages, whether it is an inferred edge, and initial confidence level. The aforementioned topology evidence graph does not require all edges to represent the final actual power supply relationship; instead, it retains multiple possible connection evidences for subsequent S5 calculation of the edge's overall confidence level. S6 then searches for the set of paths with the highest confidence level that satisfy the monotonic constraints of the power supply hierarchy, thereby reconstructing the data center's electrical power supply links.

[0067] S5. Calculate the geometric connectivity confidence, text direction confidence, port direction consistency confidence, and power supply level gating factor of the edge respectively to obtain the overall edge confidence. In one specific embodiment, after constructing the S4 topology evidence graph, the system calculates the confidence level of each edge in the graph. These edges can be geometrically connected edges, textual pointing edges, or cabinet affiliation edges, or candidate completion edges added later based on breakpoint completion rules. The purpose of this step is to uniformly quantify connection evidence from different sources, avoiding the direct determination of power supply links based solely on geometric intersections of CAD line segments or single textual annotations, thereby improving the reliability of link reconstruction in the data center electrical system graph. The system graph handles logical relationships; link reconstruction requires establishing a power supply topology based on the connections in the system graph. This embodiment further refines this process into a multi-confidence fusion calculation.

[0068] Specifically, for an edge eij in the topological evidence graph, the system denotes its starting node as vi and its ending node as vj. Nodes vi and vj can be electrical component nodes, port nodes, cabinet nodes, or busbar nodes. The system calculates the geometric connectivity confidence Cg, text direction confidence Cs, port direction consistency confidence Cp, and power supply level gating factor Gh for this edge, and obtains the edge comprehensive confidence Cij based on the above parameters.

[0069] First, the system calculates the geometric connectivity confidence Cg. For edges with geometric connectivity formed directly by connectors, the system reads the distance between the connector endpoint and the port node, bus node, or cabinet node, the continuity of the connector, the endpoint snapping, the consistency of the line segment direction, and the layer information to which the connector belongs. For example, the geometric connectivity confidence Cg can be expressed as: Cg=a1·exp(-dij / σd)+a2·Rline+a3·Rsnap+a4·Rlayer; Where, dij is the minimum distance between the endpoint of the connector and the target port or busbar, σd is the distance attenuation parameter, Rline is the connector continuity score, Rsnap is the endpoint snapping score, Rlayer is the layer matching score, and a1, a2, a3, and a4 are weighting coefficients. If the endpoint of a connector falls accurately near the candidate port point, and the direction of the connector is consistent with the direction of the port, and the layer to which it belongs is the electrical connection layer, then Cg takes a higher value; if the connector is interrupted by text, the endpoint does not snap, or only an extension line is inferred, then Cg takes a lower value.

[0070] Secondly, the system calculates the text direction confidence Cs. The system makes this judgment based on the upstream and downstream identifiers, cabinet numbers, loop numbers, and text spatial positions parsed in S3. If the direction of an edge matches an upstream identifier such as "from," "from," or "FROM," or a downstream identifier such as "to," "feedback to," or "TO," the text direction confidence of that edge is increased. For example, the text direction confidence Cs can be determined based on the strength of the directional word, the degree of target number matching, and the degree of text proximity. Cs=b1·Rdir+b2·Rid+b3·exp(-dt / σt); Where Rdir is the directional word recognition score, Rid is the matching score of cabinet number, circuit number, or equipment number, dt is the distance from the text object to the edge-associated connection line or port, σt is the text distance attenuation parameter, and b1, b2, and b3 are weighting coefficients. For example, if a port is marked "to UPS-A1" and the endpoint node number of the edge is also "UPS-A1", then the edge has a higher Cs score; if the text only contains the number and no directional word, then the Cs score is lower, but it can still be used as weak evidence in the comprehensive calculation.

[0071] Next, the system calculates the port direction consistency confidence score Cp. For edges involving port nodes, the system compares whether the port direction vector is consistent with the connection direction represented by the edge. If the port direction vector points to the extension direction of the connection line, and the directions of two adjacent ports have a reasonable access-feedback relationship, then the port direction consistency of the edge is considered to be high. For example, the port direction consistency confidence score Cp can be expressed as: Cp=c1·(1+cosθ) / 2+c2·Aport; Where θ is the angle between the port direction vector and the edge direction vector, Aport is the adsorption strength of the connecting line obtained in S2, and c1 and c2 are weighting coefficients. When θ is close to 0°, it indicates that the port direction is consistent with the edge direction, and Cp is high; when θ is close to 180°, it indicates that the port direction may be reversed, and Cp decreases. For cabinet nodes or busbar nodes without a clear port direction, Cp can be estimated based on the port direction of its adjacent electrical components, the extension direction of the busbar, or the circuit direction within the cabinet.

[0072] Then, the system calculates the power supply level gating factor Gh. The system pre-configures power supply levels for different types of nodes, such as transformer level, main switch level, busbar level, outgoing cabinet level, distribution cabinet level, and terminal equipment level. The power supply level sequence number remains constant along the direction from the power supply side to the load side. For edge eij, the system obtains the power supply level Li of the starting node vi and the power supply level Lj of the ending node vj, and calculates the level difference ΔL = Lj - Li. If ΔL is greater than or equal to 0 and does not exceed the preset allowable level jump range, it indicates that the edge conforms to the power supply logic from the power supply side to the load side, and Gh is positive; if ΔL is less than 0, it indicates that the edge may reverse from the load side to the power supply side, and Gh is zero or negative.

[0073] For example, Gh can be determined as follows: When 0 ≤ ΔL ≤ Lmax, Gh = exp(-|ΔL-1| / σh); When ΔL < 0, Gh = -k; When ΔL>Lmax, Gh=0; Where Lmax is the maximum number of levels allowed to be crossed, σh is the level attenuation parameter, and k is the reverse penalty coefficient. With this setting, higher gate values ​​are obtained in directions such as transformer to main switch, main switch to busbar, busbar to outgoing cabinet, outgoing cabinet to distribution cabinet, and distribution cabinet to terminal equipment; while edges that do not conform to power supply logic, such as terminal equipment connecting to the busbar in reverse or distribution cabinet connecting to the transformer in reverse, are suppressed.

[0074] After calculating the above four types of parameters, the system obtains the edge synthesis confidence Cij. For example, the edge synthesis confidence satisfies: Cij=αCg+βCs+γCp+δGh; Where Cg is the geometric connectivity confidence score, Cs is the text orientation confidence score, Cp is the port orientation consistency confidence score, Gh is the power supply level gating factor, and α, β, γ, and δ are weighting coefficients. These weighting coefficients can be pre-configured based on drawing quality, drawing type, or node type. For example, for system diagrams with good line segment continuity, α can be appropriately increased; for system diagrams with complete text annotations but broken lines, β can be appropriately increased; for areas with dense symbols and prone to misconnection, γ and δ can be appropriately increased to enhance port orientation and power supply level constraints.

[0075] In a specific example, the system identifies an edge pointing from a bus node to the upstream port of a circuit breaker. This edge has a direct connection, with its endpoints clustered near the upstream port of the circuit breaker, resulting in a high geometric connectivity confidence level (Cg). There are no explicit textual references near this edge, leading to a low textual reference confidence level (Cs). The direction of the upstream port of the circuit breaker aligns with the direction of the bus branch, resulting in a high port direction consistency confidence level (Cp). The bus level points to the level of the outgoing cabinet or circuit breaker, satisfying the monotonic constraint of the power supply level, and the power supply level gating factor (Gh) is positive. After comprehensive calculation, this edge has a high Cij, making it more likely to be included in the maximum confidence path set.

[0076] In another specific example, the system identifies a connecting line near a terminal device that geometrically intersects with a busbar segment. However, the endpoint of this connecting line does not attach to the busbar port, and the port direction is inconsistent with the direction of the busbar branch. Furthermore, the power supply hierarchy shows the terminal device pointing in the opposite direction to the busbar. Although this edge may gain a certain Cg due to the geometric intersection, Cp is low, Gh is zero or negative, and ultimately Cij is significantly reduced. In this way, the system can eliminate erroneous edges that are "geometrically connected but electrically illogical."

[0077] In another specific example, a connection line is interrupted due to text obscuring it, resulting in a low Cg between the two nodes. However, the text annotation indicates a connection to PDU-B03, and the terminal node's cabinet number is also PDU-B03. Furthermore, the two nodes are adjacent in power supply level and have opposite port directions. In this case, Cs, Cp, and Gh are all high. Even with a low Cg, this edge can still achieve a moderate to high overall confidence level and participate in the search as part of the candidate path in subsequent S6. Therefore, the system can consider both geometric connection evidence and engineering semantic evidence, avoiding link loss due to localized disconnections.

[0078] In a preferred embodiment, the system further normalizes the edge comprehensive confidence score, mapping Cij to a range of 0 to 1. If the calculated Cij is higher than a first threshold, the edge is marked as a strong connection edge; if Cij is between the first and second thresholds, the edge is marked as a candidate connection edge; if Cij is lower than the second threshold, the edge is marked as a weak connection edge or an abnormal edge. Strong connection edges participate in power link reconstruction first, candidate connection edges participate selectively in path search based on the overall path score, and weak connection edges typically do not enter the final link but can be output as verification items.

[0079] Through the above implementation method, the system can generate an interpretable comprehensive confidence score for each edge in the topological evidence graph. This comprehensive confidence score not only reflects the spatial connectivity of the CAD connection lines, but also reflects the direction of text annotations, the direction of port access, and the power supply hierarchy logic of the data center, enabling subsequent maximum confidence path searches to reconstruct the power supply link under the constraints of multi-source evidence.

[0080] S6. Search the set of paths with the highest confidence that satisfy the monotonic constraint of the power supply level in the topology evidence graph, reconstruct the power supply links, and merge the power supply links with the physical location information of the floor plan according to the cabinet number, and output the power supply topology and verification items.

[0081] In one specific embodiment, after completing the edge synthesis confidence calculation in S5, the system searches for the set of paths with the maximum confidence that satisfy the monotonic constraint of the power supply level in the topology evidence graph, reconstructs the power supply link of the data center, and merges the power supply link with the physical location information in the floor plan, and finally outputs the power supply topology and verification items.

[0082] Specifically, the system first determines the starting and ending nodes of the link search based on the node type and power supply level. The starting node can be a transformer node, incoming cabinet node, main switch node, or upstream busbar node; the ending node can be an outgoing cabinet node, distribution cabinet node, UPS node, PDU node, rack-mounted cabinet node, or terminal equipment node. For each node, the system configures its power supply level based on the electrical component category identified in S2, the text identifier parsed in S3, and the cabinet affiliation relationship constructed in S4. For example, the transformer is configured as level 1, the main switch as level 2, the busbar as level 3, the outgoing cabinet as level 4, the distribution cabinet as level 5, and the terminal equipment as level 6.

[0083] Then, the system performs directional filtering on the edges in the topological evidence graph. For any edge eij, if the power supply level of its starting node vi is not higher than that of its ending node vj (i.e., the power supply level does not decrease along the direction from the power supply side to the load side), then the edge is retained as a searchable edge. If the edge points from the load side back to the power supply side and does not have special identifiers such as bus tie, bypass, or dual power supply switching, then the edge is marked as a suspected reverse edge, which is usually not included in the main path search but can be retained as a verification item. Thus, the system can avoid simply connecting the end device to the bus or transformer in reverse based on geometric connectivity.

[0084] After constructing the set of searchable edges, the system uses the edge comprehensive confidence Cij as the path search weight. For example, for a candidate path P = {v1, v2, ..., vn}, its path score Score(P) can be calculated as follows: Score(P)=Σlog(ε+Cij)-λ1Nskip-λ2Ninfer; Where Cij is the overall confidence of edges between adjacent nodes in the path, ε is a smoothing parameter to prevent the logarithm from being zero, Nskip is the number of level jumps in the path, Ninfer is the number of candidate completion edges in the path, and λ1 and λ2 are penalty coefficients. In this way, the system prioritizes paths with high edge confidence, continuous levels, and fewer inferred edges, rather than simply choosing the path with the shortest geometric distance.

[0085] In the specific search process, the system can employ hierarchical dynamic programming, Dijkstra's algorithm, A* search algorithm, or K-shortest path search algorithm. The system first starts from the power supply-side starting node and extends downstream only along edges that satisfy the monotonic constraints of the power supply hierarchy. When multiple downstream branches exist, the system retains candidate paths for each branch. When multiple candidate paths exist for the same endpoint node, the system compares the scores of each path, selects the path with the highest score as the primary power supply path, and uses paths with similar scores but conflicting evidence as candidate verification paths.

[0086] For branch power supply scenarios in data center electrical drawings, the system does not output just one path with maximum confidence, but rather a set of paths with maximum confidence. For example, when power is supplied from a bus node to multiple outgoing cabinet nodes, the system uses the bus node as a common upstream and searches for paths with maximum confidence to each outgoing cabinet, distribution cabinet, and terminal device. This forms a tree-like or mesh-like power supply topology, which can express the multi-branch power supply relationships of transformers, main switches, buses, multiple outgoing cabinets, and multiple terminal devices.

[0087] In a specific example, the system identifies nodes such as transformer T1, incoming cabinet AA1, busbar M1, circuit breaker QF1, UPS-A1, and PDU-B03. Edge T1→AA1 has high textual direction confidence and power supply level gating factor; edge AA1→M1 has high geometric connectivity confidence; edge M1-QF1 has high port direction consistency confidence; and there is textual labeling to UPS-A1 near edge QF1-UPS-A1. After considering the above edge confidences, the system searches for the path T1 transformer, incoming cabinet AA1, busbar M1, circuit breaker QF1, and UPS-A1, and outputs it as a power supply link. If UPS-A1 continues to connect to PDU-B03 via another outgoing line, the system continues searching downstream, forming a complete multi-level power supply path.

[0088] When there is no direct geometric connection between two nodes in the topology evidence graph, but at least two of the following conditions are met: consecutive loop numbers, adjacent power supply levels, opposite port directions, and upstream / downstream text pointing to each other, the system generates a candidate completion edge and adds it to the topology evidence graph for path search. For candidate completion edges, the system calculates Cb according to the confidence formula defined in S8 and adaptively adjusts the breakpoint completion edge penalty coefficient based on the overall breakpoint rate of the drawing. If the overall breakpoint rate is high, it indicates that there may be widespread breakpoints, obstructions, or cross-page connections in the drawing. In this case, the completion edge penalty is appropriately reduced to allow reasonable completion edges to participate in path search. If the overall breakpoint rate is low, the completion edge penalty is increased to avoid over-inferring connection relationships in high-quality drawings.

[0089] After the power supply link reconstruction is completed, the system integrates the power supply link with the physical location information of the floor plan. Specifically, the system extracts equipment objects, cabinet outlines, room boundaries, column numbers, coordinate positions, and cabinet number text from the floor plan, and uses the cabinet number as the first matching key to match the link nodes in the system diagram with the physical equipment objects in the floor plan. For example, after the link node UPS-A1 in the system diagram matches the outline of the equipment labeled UPS-A1 in the floor plan, the link node obtains the corresponding room affiliation, plan coordinates, equipment frame, and adjacent cabinet information.

[0090] When cabinet numbers are missing, abbreviated, duplicated, or inconsistent in format, the system further employs topological location coding and spatial location coding for auxiliary matching. For link nodes in the system diagram, the system generates a topological location code, which includes power supply level, upstream node category, downstream node category, loop number vector, and cabinet number character vector. For equipment objects in the floor plan, the system generates a spatial location code, which includes room affiliation, adjacent cabinet numbers, arrangement direction, physical coordinates, and cabinet number character vector. The system determines the most probable correspondence based on the matching score between these two codes.

[0091] For example, a node in the system diagram is labeled 2AA6-3, while the corresponding object in the floor plan is also labeled AA6-3. If the character vectors of their cabinet numbers are similar, and in the system diagram, the upstream of this node is the AA6 busbar and the downstream is PDU-B03, while in the floor plan, this object is located near the AA6 cabinet row and adjacent to the PDU device, then the system determines that they match. In this way, even if the cabinet numbers are not completely identical, the system diagram and the floor plan can be integrated using the upstream and downstream power supply relationships and spatial adjacency relationships.

[0092] After fusion, the system generates a structured link record for each power supply link. The structured link record includes at least the link ID, upstream node, downstream node, node power supply level, edge comprehensive confidence level, whether it contains candidate completion edges, cabinet number, corresponding floor plan coordinates, room affiliation, cabinet column position, and associated original element ID. The system can also generate a power supply topology diagram based on the link records, where nodes represent transformers, main switches, busbars, outgoing line cabinets, distribution cabinets, and terminal equipment, and edges represent power supply relationships. The display status of edges can be distinguished based on confidence level, whether it is inferred, or whether it is verified.

[0093] Simultaneously, the system generates review items. Review items can include the following types: First, low-confidence links, i.e., paths containing edges with a comprehensive confidence level below a threshold; second, candidate completion links, i.e., paths containing edges generated by breakpoint completion rules; third, hierarchical conflict links, i.e., paths with abnormal power supply hierarchies (reverse or skipped levels); fourth, number conflict items, i.e., the same cabinet number corresponding to multiple floor plan objects, or multiple system diagram nodes corresponding to the same floor plan device object; fifth, physical location anomalies, i.e., downstream equipment in the floor plan's room or column location is clearly inconsistent with the power supply link logic.

[0094] For example, if a certain outgoing circuit in the system diagram is labeled as PDU-B03, but there are two PDU-B03 objects in the floor plan, located in different rooms, the system adds this matching result to the verification item and outputs two candidate locations and their matching scores. As another example, if a link is directly connected from the distribution cabinet to the transformer, resulting in a reverse power supply hierarchy, the system marks this link as a hierarchy conflict verification item. Figure 5 As shown, instead of being directly output as an effective power supply link.

[0095] Through the above implementation, the system can search for the set of paths with maximum confidence in the topology evidence graph based on multi-source evidence and monotonic constraints of power supply hierarchy, forming power supply links that conform to the engineering logic of the data center. Simultaneously, by using cabinet numbers, topology location codes, and spatial location codes, the logical power supply relationships in the system diagram are fused with the physical location data in the floor plan, ultimately outputting the power supply topology, structured link data, and verification items requiring manual confirmation. This process improves the automation level of link reconstruction and avoids directly using uncertain inference results as definitive results, making it suitable for data center commissioning, operation and maintenance, DCIM initialization, and digital twin basic data generation.

[0096] Preferably, the power supply level gating factor is determined based on the power supply level difference between two adjacent nodes; when the direction of the edge is from the power supply side level to the load side level, the power supply level gating factor is positive; when the direction of the edge is from the load side level to the power supply side level, the power supply level gating factor is zero or negative.

[0097] Preferably, the power supply hierarchy includes transformer hierarchy, main switch hierarchy, busbar hierarchy, outgoing cabinet hierarchy, distribution cabinet hierarchy, and terminal equipment hierarchy; the monotonic constraint of the power supply hierarchy is: the power supply hierarchy of adjacent nodes in the maximum confidence path remains unchanged along the direction from the power source side to the load side; when fusing the power supply link with the physical location information of the floor plan, a topology location code is generated for the link nodes in the system diagram, the topology location code includes power supply hierarchy, upstream node category, downstream node category, loop number vector, and cabinet number character vector; a spatial location code is generated for the equipment objects in the floor plan, the spatial location code includes room affiliation, adjacent cabinet number, arrangement direction, physical coordinates, and cabinet number character vector; fusion is completed based on the matching score of the topology location code and the spatial location code.

[0098] Preferably, the edge comprehensive confidence Cij satisfies: Cij=αCg+βCs+γCp+δGh; where Cg is the geometric connectivity confidence, Cs is the text direction confidence, Cp is the port direction consistency confidence, Gh is the power supply level gating factor, and α, β, γ, and δ are weighting coefficients.

[0099] Preferably, the port candidate points in the port constraint geometric fingerprint are determined based on the symbol bounding box boundary points, the snap points of the connecting line endpoints, and the intersection points of the primitives; the port direction vector is determined based on the direction between the port candidate points and the symbol center point, as well as the extension direction of the external connecting lines.

[0100] Preferably, when generating port-constrained geometric fingerprints, the weights of port candidate points and port direction vectors in geometric fingerprint matching are adaptively increased based on the connection line density of the local region where the electrical symbol candidate units are located.

[0101] Preferably, when there is no direct geometrically connected edge between two nodes in the topological evidence graph, at least two of the following conditions are met: the loop numbers are consecutive, the power supply levels are adjacent, the port directions are opposite, and the text points upstream and downstream, a candidate completion edge is generated, and the candidate completion edge is added to the topological evidence graph and participates in the search for the maximum confidence path set.

[0102] Preferably, the confidence level Cb of the candidate completed edge satisfies: Cb = η1Ct + η2Ch + η3Co + η4Cr - μDb; where Ct is the semantic consistency of the text, Ch is the adjacency of the power supply level, Co is the relativity of the port direction, Cr is the continuity of the loop number, Db is the distance between the breakpoint or the page span, and μ is the penalty coefficient for the breakpoint completion edge.

[0103] Preferably, the breakpoint patching penalty coefficient μ is adaptively adjusted according to the overall breakage rate of the CAD electrical drawings; when the overall breakage rate increases, the breakpoint patching penalty coefficient is reduced to increase the probability of completing reasonable breakpoints in low-quality drawings; when the overall breakage rate decreases, the breakpoint patching penalty coefficient is increased to suppress excessive patching; the overall breakage rate is determined based on the ratio of the number of connection line endpoints not attached to electrical component ports, cabinet nodes, or busbar nodes to the total number of connection line endpoints.

[0104] This application also provides a CAD electrical drawing link reconstruction system for data centers. This system can be deployed in the server environment of a data center construction unit, operation and maintenance unit, or engineering management platform, or in a cloud server environment. The system is as follows: Figure 2 The system includes: drawing upload terminal, network switching equipment, application server, CAD drawing parsing server, symbol recognition and link reconstruction server, semantic parsing server, database server, file storage server, verification and annotation terminal, and external system interface server.

[0105] The drawing upload terminal is used by designers, delivery personnel, or maintenance personnel to upload CAD electrical drawings for the data center. The drawing upload terminal can be a desktop computer, laptop, engineering workstation, or mobile terminal, and can store system diagrams and floor plans in DWG and DXF formats. The drawing upload terminal communicates with the application server via a corporate LAN, dedicated network, or VPN network, and uploads the CAD electrical drawings to the application server through a browser page or client program.

[0106] The network switching equipment includes switches, routers, firewalls, or gateways. The drawing upload terminal, application server, CAD drawing parsing server, symbol recognition and link reconstruction server, database server, file storage server, and external system interface server are all connected to the network switching equipment via wired Ethernet or wireless network. Preferably, the servers are connected via gigabit or 10-gigabit Ethernet to ensure efficient transmission of large CAD files, structured parsing results, and power supply topology data.

[0107] The application server is used to receive drawing upload requests, manage user permissions, record project numbers and drawing versions, and schedule subsequent parsing tasks. The application server communicates with the CAD drawing parsing server. When the application server receives a CAD electrical drawing, it stores the original drawing file in a file storage server and sends a parsing task to the CAD drawing parsing server. This communication connection can use a REST interface, RPC interface, message queue, or internal task scheduling interface.

[0108] The CAD drawing parsing server is used to perform structured parsing of CAD electrical drawings. This server may include a central processing unit, memory, hard disk, and network interface, and may install CAD parsing or format conversion programs. The CAD drawing parsing server reads the original CAD drawings from the file storage server, parses them to obtain elements, text, blocks, connectors, and coordinates, and writes the parsing results to the database server and file storage server in JSON, XML, or database record format.

[0109] The symbol recognition and link reconstruction server is used to perform port constraint geometric fingerprint generation, topology evidence graph construction, edge synthesis confidence calculation, and maximum confidence path set search. This server can be a CPU server, or it can be configured with a GPU, NPU, or other accelerator card. The symbol recognition and link reconstruction server connects to the database server, reads CAD parsing results, electrical symbol knowledge base, text parsing results, and historical review data; and writes the identified electrical components, ports, cabinet nodes, bus nodes, topology evidence graphs, power supply links, and review items back to the database server.

[0110] The semantic parsing server is used to perform semantic parsing on engineering text in CAD drawings. The semantic parsing server can be a locally deployed large model server or an interface gateway communicating with external large model services. The semantic parsing server communicates with the application server or symbol recognition and link reconstruction server, receiving contextual information such as the text to be parsed, text coordinates, neighboring symbol categories, and drawing type, and outputs cabinet number, loop number, upstream and downstream identifiers, and parsing confidence score. To ensure engineering data security, preferably, the semantic parsing server only receives necessary text fragments and contextual features, and does not receive complete drawing files.

[0111] The database server is used to store structured data during system operation. The database server includes at least the following tables: project table, drawing table, element table, text table, block table, connector table, symbol knowledge base table, cabinet node table, busbar node table, topology edge table, power supply link table, review item table, and user operation record table. The database server is connected to the application server, CAD drawing parsing server, symbol recognition and link reconstruction server, and external system interface server to provide data read and write services.

[0112] The file storage server is used to store original CAD drawings, intermediate parsing files, symbol thumbnails, topology diagram files, verification screenshots, and exported reports. The file storage server can be NAS storage, an object storage server, or a distributed file system. The application server writes the uploaded CAD drawings to the file storage server; the CAD drawing parsing server reads the original drawings from the file storage server and writes the parsing results; the verification and annotation terminal reads symbol thumbnails and link verification diagrams from the file storage server.

[0113] The verification and annotation terminal is used by electrical engineers to manually confirm low-confidence symbols, candidate completion edges, hierarchical conflict links, numbered conflict items, and physical location conflict items. The verification and annotation terminal can be a regular computer, tablet, or an engineering terminal with a touchscreen. The terminal connects to the application server via a browser or client, displaying the SVG thumbnail of the symbol to be verified, candidate power supply paths, system diagram location, and floor plan location. After engineer confirmation, the verification result is written to the database server via the application server, and the electrical symbol knowledge base and verification item status are updated synchronously.

[0114] The external system interface server is used to provide power supply topology and structured drawing data to the commissioning platform, operation and maintenance platform, DCIM system, or digital twin system. The external system interface server communicates with the database server, reads power supply links, equipment ledgers, cabinet locations, room ownership, and verification status, and sends data to external systems via REST interfaces, database views, message queues, or file export interfaces. The external system interface server can also receive equipment codes, operation and maintenance numbers, or DCIM object numbers returned by external systems and write them back to the database server to achieve bidirectional association between power supply link data and operation and maintenance asset data.

[0115] In one specific connection method, the drawing upload terminal connects to the application server via a network switching device; the application server connects to the file storage server, the database server, and the CAD drawing parsing server; the CAD drawing parsing server connects to the file storage server and the database server; the symbol recognition and link reconstruction server connects to the database server, the file storage server, and the semantic parsing server; the review and annotation terminal connects to the application server; and the external system interface server connects to the database server and external DCIM, debugging, or maintenance platforms. This forms a closed-loop hardware system of "drawing upload—structured parsing—symbol recognition—text semantic parsing—topology link reconstruction—multi-drawing fusion—manual review—external system output".

[0116] In another deployment method, the application server, CAD drawing parsing server, symbol recognition and link reconstruction server, and semantic parsing server can be deployed on the same physical server, implementing their respective functions through different software processes; the database server and file storage server can also be deployed on the same storage device. This deployment method is suitable for small projects or single-machine verification environments. For large data center projects, the above servers can be deployed as independent physical devices or server clusters to improve concurrent parsing capabilities, link reconstruction speed, and data storage reliability.

[0117] The drawing parsing module acquires the data center CAD electrical drawings, which include system diagrams and floor plans, and parses them to obtain graphic elements, text, blocks, connecting lines, and coordinates. The symbol recognition module extracts electrical symbol candidate units from primitives and blocks, generates a port constraint geometric fingerprint containing contour hash, primitive topological hash, port candidate points, port direction vector, and connection line adsorption strength, and identifies electrical components and ports. The text parsing module parses text to obtain cabinet number, circuit number, and upstream / downstream identifiers; The topology evidence diagram construction module constructs a topology evidence diagram based on the electrical components and ports, cabinet nodes determined by text parsing results, and bus nodes identified by connection line morphology. The confidence calculation module calculates the geometric connectivity confidence, text direction confidence, port direction consistency confidence, and power supply level gating factor of the edge respectively to obtain the overall edge confidence. The link reconstruction module searches the topology evidence graph for the set of paths with the maximum confidence that satisfy the monotonic constraint of the power supply level, and then reconstructs the power supply link. The multi-image fusion and verification learning module merges the power supply link with the physical location information of the floor plan according to the cabinet number, and outputs the power supply topology and verification items.

[0118] Compared with the prior art, the technical solution of the present invention has the following beneficial effects: (1) Based on CAD drawing analysis, this invention does not rely solely on block names, layer names, or symbol outlines for identification. Instead, it generates a port constraint geometric fingerprint that includes outline hash, primitive topology hash, port candidate points, port direction vectors, and connection line adsorption strength. Thus, even if different design institutes use different symbol drawing methods, anonymous block names, or non-standard layers, they can still identify electrical components and ports by combining the symbol's own geometric structure and its connection relationship with external connection lines. This reduces misidentification of objects such as circuit breakers, switches, busbars, and cabinets, providing a more reliable node foundation for subsequent power supply link reconstruction.

[0119] (2) This invention constructs a topological evidence graph with electrical components, ports, cabinet nodes, and bus nodes as nodes, and geometric connectivity, textual pointing, and cabinet affiliation as edges. It also comprehensively calculates the confidence of geometric connectivity, textual pointing, port direction consistency, and power supply level gating factor. By searching the maximum confidence path set through monotonic constraints of the power supply level, it can eliminate geometrically similar but electrically logically unreasonable reverse connections or incorrect bridging. Even in complex situations such as crossovers, broken lines, text occlusion, and cross-page references, it can still accurately reconstruct the power supply link from the power supply side to the load side.

[0120] (3) After reconstructing the power supply link, this invention integrates the logical power supply relationship in the system diagram with the physical location information in the floor plan according to the cabinet number, forming structured data that simultaneously includes power supply topology, cabinet nodes, equipment locations, and verification items. For nodes that do not have direct geometrically connected edges but meet multiple completion conditions, candidate completion edges can be generated, and the breakpoint completion penalty coefficient can be adaptively adjusted according to the overall disconnection rate, thereby increasing the probability of reasonable link completion in low-quality drawings and suppressing excessive edge completion in high-quality drawings, ultimately reducing the workload of manual verification and improving the data generation efficiency of data center debugging, operation and maintenance, and DCIM initialization.

[0121] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products, and therefore this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects.

[0122] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for reconstructing CAD electrical drawing links for data centers, characterized in that, Including the following steps: S1. Obtain the data center CAD electrical drawings, which include system diagrams and floor plans, and parse them to obtain graphic elements, text, blocks, connecting lines and coordinates; S2. Extract electrical symbol candidate units from primitives and blocks, generate port constraint geometric fingerprints containing contour hash, primitive topological hash, port candidate points, port direction vectors and connector adsorption strength, and identify electrical components and ports. S3. Parse the text to obtain the cabinet number, circuit number, and upstream and downstream identifiers; S4. Construct a topology evidence graph based on the electrical components and ports, the cabinet nodes determined by the text parsing results, and the bus nodes obtained by the connection line shape recognition. The topology evidence graph uses electrical components, ports, cabinet nodes, and bus nodes as nodes, and geometric connectivity, text pointing relationships, and cabinet affiliation relationships as edges. S5. Calculate the geometric connectivity confidence, text direction confidence, port direction consistency confidence, and power supply level gating factor of the edge respectively to obtain the overall edge confidence. S6. Search the set of paths with the highest confidence that satisfy the monotonic constraint of the power supply level in the topology evidence graph, reconstruct the power supply links, and merge the power supply links with the physical location information of the floor plan according to the cabinet number, and output the power supply topology and verification items.

2. The method for reconstructing CAD electrical drawing links for data centers according to claim 1, characterized in that, The power supply level gating factor is determined based on the power supply level difference between two adjacent nodes; when the direction of the edge is from the power supply side level to the load side level, the power supply level gating factor is positive; when the direction of the edge is from the load side level to the power supply side level, the power supply level gating factor is zero or negative.

3. The method for reconstructing CAD electrical drawing links for data centers according to claim 2, characterized in that, The power supply hierarchy includes transformer hierarchy, main switch hierarchy, busbar hierarchy, outgoing line cabinet hierarchy, distribution cabinet hierarchy, and terminal equipment hierarchy; the monotonic constraint of the power supply hierarchy is: the power supply hierarchy of adjacent nodes in the maximum confidence path remains unchanged along the direction from the power source side to the load side; when fusing the power supply link with the physical location information of the floor plan, a topology location code is generated for the link nodes in the system diagram, the topology location code includes power supply hierarchy, upstream node category, downstream node category, loop number vector, and cabinet number character vector; a spatial location code is generated for the equipment objects in the floor plan, the spatial location code includes room affiliation, adjacent cabinet number, arrangement direction, physical coordinates, and cabinet number character vector; fusion is completed based on the matching score of the topology location code and the spatial location code.

4. The method for reconstructing CAD electrical drawing links for data centers according to claim 1, characterized in that, The edge-comprehension confidence Cij satisfies: Cij=αCg+βCs+γCp+δGh; where Cg is the geometric connectivity confidence, Cs is the text direction confidence, Cp is the port direction consistency confidence, Gh is the power supply level gating factor, and α, β, γ, and δ are weighting coefficients.

5. The method for reconstructing CAD electrical drawing links for data centers according to claim 1, characterized in that, The port candidate points in the port constraint geometric fingerprint are determined based on the symbol bounding box boundary points, the snap points of the connector endpoints, and the intersection points of primitives; the port direction vector is determined based on the direction between the port candidate points and the symbol center point, as well as the extension direction of the external connectors.

6. The method for reconstructing CAD electrical drawing links for data centers according to claim 5, characterized in that, When generating port-constrained geometric fingerprints, the weights of port candidate points and port direction vectors in geometric fingerprint matching are adaptively increased based on the connection line density of the local region where the electrical symbol candidate units are located.

7. The method for reconstructing CAD electrical drawing links for data centers according to claim 1, characterized in that, When there is no direct geometrically connected edge between two nodes in the topological evidence graph, and at least two of the following conditions are met: the loop numbers are consecutive, the power supply levels are adjacent, the port directions are opposite, and the text points upstream and downstream, a candidate completion edge is generated, and the candidate completion edge is added to the topological evidence graph and participates in the search for the maximum confidence path set.

8. A method for reconstructing CAD electrical drawing links for data centers according to claim 7, characterized in that, The confidence level Cb of the candidate completed edge satisfies: Cb = η1Ct + η2Ch + η3Co + η4Cr - μDb; where Ct is the semantic consistency of the text, Ch is the adjacency of the power supply level, Co is the relativity of the port direction, Cr is the continuity of the loop number, Db is the distance between the breakpoint or the page span, and μ is the penalty coefficient for the breakpoint completion edge.

9. A method for reconstructing CAD electrical drawing links for data centers according to claim 8, characterized in that, The breakpoint patching penalty coefficient μ is adaptively adjusted according to the overall breakage rate of the CAD electrical drawings. When the overall breakage rate increases, the breakpoint patching penalty coefficient is reduced to increase the probability of completing reasonable breakpoints in low-quality drawings. When the overall breakage rate decreases, the breakpoint patching penalty coefficient is increased to suppress excessive patching. The overall breakage rate is determined based on the ratio of the number of connection endpoints not attached to electrical component ports, cabinet nodes, or busbar nodes to the total number of connection endpoints.

10. A CAD electrical drawing link reconstruction system for data centers, characterized in that, include: The drawing parsing module acquires the data center CAD electrical drawings, which include system diagrams and floor plans, and parses them to obtain graphic elements, text, blocks, connecting lines, and coordinates. The symbol recognition module extracts electrical symbol candidate units from primitives and blocks, generates a port constraint geometric fingerprint containing contour hash, primitive topological hash, port candidate points, port direction vector, and connection line adsorption strength, and identifies electrical components and ports. The text parsing module parses text to obtain cabinet number, circuit number, and upstream / downstream identifiers; The topology evidence diagram construction module constructs a topology evidence diagram based on the electrical components and ports, cabinet nodes determined by text parsing results, and bus nodes identified by connection line morphology. The confidence calculation module calculates the geometric connectivity confidence, text direction confidence, port direction consistency confidence, and power supply level gating factor of the edge respectively to obtain the overall edge confidence. The link reconstruction module searches the topology evidence graph for the set of paths with the maximum confidence that satisfy the monotonic constraint of the power supply level, and then reconstructs the power supply link. The multi-image fusion and verification learning module merges the power supply link with the physical location information of the floor plan according to the cabinet number, and outputs the power supply topology and verification items.

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