A hardware-in-the-loop simulation method and device based on playback of recorded wave data

Abstract

The application provides a hardware-in-the-loop simulation method and device based on playback of recorded wave data. The recorded wave data of a simulated object under full operating conditions can be collected according to a preset sampling interval, then the recorded wave data is read according to three-phase instantaneous voltage of a grid-connected point, and then the recorded wave data is input into a preset playback simulation model, so as to realize hardware-in-the-loop simulation of a sending-end control protection device or a receiving-end control protection device. The application effectively improves the accuracy and reliability of the hardware-in-the-loop simulation by collecting and reading the recorded wave data and combining the playback simulation model. The application models the simulated object by a controlled current source, retains the dynamic characteristics of the simulated object, saves simulation resources, and improves the simulation accuracy.

Description

Technical Field

[0001] This application relates to the field of power system simulation technology, specifically to a hardware-in-the-loop simulation method and apparatus based on waveform data playback. Background Technology

[0002] Because wind power and other new energy sources are intermittent and uncontrollable, power output fluctuations can easily cause frequent disturbances in grid voltage and power, posing many challenges to the stable operation of DC transmission systems. Therefore, it is urgent to conduct hardware-in-the-loop simulation of control and protection devices for DC transmission systems to simulate various operating scenarios, verify the transient steady-state response capability of DC transmission systems, and ensure grid connection safety and reliability.

[0003] The relevant technologies typically involve wind turbine manufacturers providing black-box packaged model link library files, which are then called on the simulation platform to achieve transient steady-state simulation verification. While this can guarantee the accuracy of electromechanical / electromagnetic transient simulations of individual turbine models to a certain extent, the entire wind farm involves multiple turbines connected in series and parallel, stray parameters of submarine cables, and capacitance effects. This often requires multiplication and equivalent simplification of individual turbines, leading to low accuracy in the simulation results of electrical parameters such as voltage, power, harmonics, and transient response characteristics at the DC transmission system grid connection point. Summary of the Invention

[0004] To address the issue of low accuracy in simulation results in existing technologies, this application provides a hardware-in-the-loop simulation method and apparatus based on waveform data playback.

[0005] Firstly, this application provides a hardware-in-the-loop simulation method based on waveform data playback, which may include: Waveform data of the simulated object under full operating conditions are collected according to the preset sampling interval.

[0006] The waveform data is read from the three-phase instantaneous voltage at the grid connection point.

[0007] Input the recorded waveform data into a preset playback simulation model to perform hardware-in-the-loop simulation of the sending-end control and protection device or the receiving-end control and protection device.

[0008] The sampling interval is equal to the simulation step size of the playback simulation model.

[0009] Optionally, the electrical quantity types of the waveform data include three-phase instantaneous voltage, three-phase instantaneous current, active power, and reactive power at the grid connection point.

[0010] For example, the full operating conditions include a first steady-state phase, an unlocking transition phase, a second steady-state phase, a transient fault phase, a fault recovery phase, and a third steady-state phase.

[0011] The first steady-state phase is used to indicate the phase between the sampling start time and the unlocking time of the simulated object.

[0012] The unlocking transition phase is used to indicate the period between the unlocking time of the simulated object and the steady-state start time before the fault occurs.

[0013] The second steady-state stage is used to indicate the period between the start of steady-state before the fault occurs and the time when the fault occurs.

[0014] The transient fault phase is used to indicate the period between the time the fault occurs and the time the fault is recovered.

[0015] The fault recovery phase is used to indicate the period between the fault recovery time and the steady-state start time after the fault recovery.

[0016] The third steady-state phase is used to indicate the period between the start of steady-state after fault recovery and the end of sampling.

[0017] In some possible implementations, waveform data is read from the three-phase instantaneous voltage at the grid connection point, including: The control signal is determined based on the three-phase instantaneous voltage and the effective value of the three-phase instantaneous voltage at the grid connection point.

[0018] The simulation time is determined based on the control signal.

[0019] The reading time is calculated based on the simulation time.

[0020] The waveform data is read based on the reading time.

[0021] Furthermore, the control signal is determined based on the three-phase instantaneous voltage and the effective value of the three-phase instantaneous voltage at the grid connection point, including: The three-phase instantaneous voltage at the grid connection point is controlled by a phase-locked loop, and the obtained grid phase is zero-crossing detected to obtain a judgment signal. Alternatively, the three-phase instantaneous voltage at the grid connection point is zero-crossing detected to obtain a judgment signal.

[0022] The three-phase instantaneous voltage RMS values ​​are compared with preset voltage RMS threshold values ​​to obtain a comparison signal.

[0023] The control signal is obtained by performing a logical AND operation on the judgment signal and the comparison signal.

[0024] The simulation time is determined based on the control signals, including: The trigger outputs an enable signal based on the control signal.

[0025] The hold circuit outputs the simulation time based on the simulation time and the enable signal.

[0026] Optionally, the read timing must satisfy: .

[0027] in, Indicates the time of reading. Indicates the simulation time. Indicates the simulation time. Indicates the error time.

[0028] In some other possible implementations, the waveform data is read according to the reading time, including: Read the three-phase instantaneous voltage or three-phase instantaneous current based on the reading time.

[0029] Output three-phase instantaneous voltage or three-phase instantaneous current, or filter and output three-phase instantaneous voltage or three-phase instantaneous current.

[0030] Optionally, the playback simulation model includes a controlled source module and a flexible DC transmission module. The flexible DC transmission module includes a sending-end converter unit and a receiving-end converter unit. The sending-end converter unit includes a sending-end converter transformer and a sending-end converter. The sending-end converter is connected to the sending-end control and protection device. The receiving-end converter unit includes a receiving-end converter transformer and a receiving-end converter. The receiving-end converter is connected to the receiving-end control and protection device.

[0031] The controlled source module is connected to the grid side of the sending-end converter transformer through the grid connection point. The valve side of the sending-end converter transformer is connected to the AC side of the sending-end converter. The DC side of the sending-end converter is connected to the DC side of the receiving-end converter through the transmission line. The AC side of the receiving-end converter is connected to the AC power grid through the receiving-end converter transformer.

[0032] Secondly, this application provides a hardware-in-the-loop simulation device based on waveform data playback, which may include: The sampling module is used to collect waveform data of the simulated object under all operating conditions according to a preset sampling interval.

[0033] The reading module is used to read the waveform data based on the three-phase instantaneous voltage at the grid connection point.

[0034] The simulation module is used to input the recorded waveform data into a preset playback simulation model to perform hardware-in-the-loop simulation of the sending-end control and protection device or the receiving-end control and protection device.

[0035] The sampling interval is equal to the simulation step size of the playback simulation model.

[0036] Optionally, the electrical quantity types of the waveform data include three-phase instantaneous voltage, three-phase instantaneous current, active power, and reactive power at the grid connection point.

[0037] The full operating conditions include the first steady-state stage, the unlocking transition stage, the second steady-state stage, the transient fault stage, the fault recovery stage, and the third steady-state stage.

[0038] The first steady-state phase is used to indicate the phase between the sampling start time and the unlocking time of the simulated object.

[0039] The unlocking transition phase is used to indicate the period between the unlocking time of the simulated object and the steady-state start time before the fault occurs.

[0040] The second steady-state stage is used to indicate the period between the start of steady-state before the fault occurs and the time when the fault occurs.

[0041] The transient fault phase is used to indicate the period between the time the fault occurs and the time the fault is recovered.

[0042] The fault recovery phase is used to indicate the period between the fault recovery time and the steady-state start time after the fault recovery.

[0043] The third steady-state phase is used to indicate the period between the start of steady-state after fault recovery and the end of sampling.

[0044] In some possible implementations, the read module is specifically used for: The control signal is determined based on the three-phase instantaneous voltage and the effective value of the three-phase instantaneous voltage at the grid connection point.

[0045] The simulation time is determined based on the control signal.

[0046] The reading time is calculated based on the simulation time.

[0047] The waveform data is read based on the reading time.

[0048] Furthermore, the read module is used for: The three-phase instantaneous voltage at the grid connection point is controlled by a phase-locked loop, and the obtained grid phase is zero-crossing detected to obtain a judgment signal. Alternatively, the three-phase instantaneous voltage at the grid connection point is zero-crossing detected to obtain a judgment signal.

[0049] The three-phase instantaneous voltage RMS values ​​are compared with preset voltage RMS threshold values ​​to obtain a comparison signal.

[0050] The control signal is obtained by performing a logical AND operation on the judgment signal and the comparison signal.

[0051] The read module is used for: The trigger outputs an enable signal based on the control signal.

[0052] The hold circuit outputs the simulation time based on the simulation time and the enable signal.

[0053] Optionally, the read timing must satisfy: .

[0054] in, Indicates the time of reading. Indicates the simulation time. Indicates the simulation time. Indicates the error time.

[0055] In some other possible implementations, the read module is specifically used for: Read the three-phase instantaneous voltage or three-phase instantaneous current based on the reading time.

[0056] Output three-phase instantaneous voltage or three-phase instantaneous current, or filter and output three-phase instantaneous voltage or three-phase instantaneous current.

[0057] In some possible implementations, the replay simulation model includes a controlled source module and a flexible DC transmission module. The flexible DC transmission module includes a sending-end converter unit and a receiving-end converter unit. The sending-end converter unit includes a sending-end converter transformer and a sending-end converter. The sending-end converter is connected to the sending-end control and protection device. The receiving-end converter unit includes a receiving-end converter transformer and a receiving-end converter. The receiving-end converter is connected to the receiving-end control and protection device.

[0058] The controlled source module is connected to the grid side of the sending-end converter transformer through the grid connection point. The valve side of the sending-end converter transformer is connected to the AC side of the sending-end converter. The DC side of the sending-end converter is connected to the DC side of the receiving-end converter through the transmission line. The AC side of the receiving-end converter is connected to the AC power grid through the receiving-end converter transformer.

[0059] In another aspect, this application also provides a computer device, including: one or more processors.

[0060] A processor is used to execute one or more programs.

[0061] The hardware-in-the-loop simulation method described above is implemented when one or more programs are executed by one or more processors.

[0062] Furthermore, this application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed, it implements the hardware-in-the-loop simulation method described above.

[0063] Compared with the prior art, the beneficial effects of this application are as follows: The hardware-in-the-loop simulation method based on waveform data playback provided in this application can collect waveform data of the simulated object under all operating conditions according to a preset sampling interval. Then, the waveform data is read based on the three-phase instantaneous voltage at the grid connection point, and finally, the waveform data is input into a preset playback simulation model to achieve hardware-in-the-loop simulation of the sending-end control and protection device or the receiving-end control and protection device. This application effectively improves the accuracy and reliability of the simulation by collecting and reading waveform data and combining it with the playback simulation model.

[0064] The hardware-in-the-loop simulation method provided in this application is simple to implement and can verify the simulation accuracy of the simulation model by recording waveform data, effectively solving the problem of modeling difficulties caused by many reasons.

[0065] This application uses a controlled current source to perform equivalent modeling of the simulated object, preserving the dynamic characteristics of the simulated object, saving simulation resources, and improving simulation accuracy. Attached Figure Description

[0066] To more clearly illustrate the technical solutions in this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0067] Figure 1 This is a schematic flowchart of a hardware-in-the-loop simulation method in an embodiment of this application; Figure 2 This is a waveform diagram of the instantaneous voltage and instantaneous current of phase A in an embodiment of this application; Figure 3 This is a schematic flowchart of a hardware-in-the-loop simulation method in an embodiment of this application; Figure 4 This is a schematic structural diagram of a playback simulation model in an embodiment of this application; Figure 5a This is a comparison diagram of the waveform of the playback simulation model and the original waveform of the recorded data in the embodiments of this application; Figure 5b This is a comparison diagram of the waveform of the playback simulation model and the original waveform of the recorded data in the embodiments of this application; Figure 6 This is a schematic structural diagram of a hardware-in-the-loop simulation device in the embodiments of this application. Detailed Implementation

[0068] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0069] The terms "first," "second," etc., used in the specification, embodiments, claims, and drawings of this application are for distinguishing purposes only and should not be construed as indicating or implying relative importance or order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, such as including a series of steps or units. A method, system, product, or apparatus is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or apparatuses.

[0070] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0071] Example 1: This application provides a hardware-in-the-loop simulation method based on waveform data playback. Hardware-in-the-loop (HIL) simulation, also known as hardware-in-the-loop simulation, is a method that connects real controller hardware to a real-time digital model to form a closed loop, and performs safe and repeatable extreme tests on the simulated object (such as a wind farm) before deployment.

[0072] like Figure 1 As shown, the hardware-in-the-loop simulation method 100 includes the following steps: Step S1: Collect waveform data of the simulated object under full operating conditions according to the preset sampling interval.

[0073] Step S2: Read the waveform data based on the three-phase instantaneous voltage at the grid connection point.

[0074] Step S3: Input the recorded waveform data into the preset playback simulation model to perform hardware-in-the-loop simulation of the sending-end control and protection device or the receiving-end control and protection device.

[0075] The sampling interval is equal to the simulation step size of the playback simulation model, which can be 50μs.

[0076] Optionally, the above-mentioned waveform data sources may include: on-site grid-connected measurements, low-voltage physical dynamic model tests, offline digital simulations, real-time digital simulations, and controller semi-physical tests, etc. The waveform data formats are .cfg and .dat. The waveform data formats may also include .txt, .mat, and other recognizable file formats; this application embodiment does not limit the specific format.

[0077] Optionally, the electrical quantity types of the recorded data include three-phase instantaneous voltage, three-phase instantaneous current, active power, and reactive power at the grid connection point. The waveforms of phase A instantaneous voltage and instantaneous current are shown below. Figure 2 As shown. Figure 2 In the diagram, the horizontal axis represents time: t1 represents the sampling start time, t2 represents the unlocking time of the simulated object, t3 represents the steady-state start time before the fault occurs, t4 represents the fault occurrence time, t5 represents the fault recovery time, t6 represents the steady-state start time after fault recovery, and t7 represents the sampling end time. Three-phase instantaneous voltage is used to determine whether it is synchronized with the voltage waveform of the playback simulation model and to determine the precise import time of the three-phase instantaneous current from the recorded waveform data. Active and reactive power data are used for error comparison after importing into the playback simulation model.

[0078] The transient steady-state characteristics and time points of the recorded waveform data are synchronized with the transient steady-state of the playback simulation model. For the simulated object being grid-connected power electronic equipment, it can be modeled as a controlled current source in the playback test model. In order to avoid the excessive current change at the moment of switching of the controlled current source causing the surge arrester on the line to malfunction, and at the same time to fully observe the impact of the transient process of the wind farm on the control and protection of the connected flexible DC transmission system, the three-phase instantaneous current needs to be taken as the starting point of the zero-power state of the wind farm. That is, at the beginning, the wind farm is not unlocked and the current approaches zero. The dynamic waveform of the entire process of gradually unlocking and increasing the power to the rated condition, the occurrence of fault, and the recovery to steady state is recorded.

[0079] For example, the entire operating condition can be divided into the first steady-state stage, the unlocking transition stage, the second steady-state stage, the transient fault stage, the fault recovery stage, and the third steady-state stage according to different times.

[0080] The first steady-state phase indicates the period from the start of sampling to the unlocking time of the simulated object. The unlocking transition phase indicates the period from the unlocking time of the simulated object to the steady-state start time before the fault occurred. The second steady-state phase indicates the period from the steady-state start time before the fault occurred to the time of the fault occurrence. The transient fault phase indicates the period from the time of the fault occurrence to the time of fault recovery. The fault recovery phase indicates the period from the time of fault recovery to the steady-state start time after fault recovery. The third steady-state phase indicates the period from the steady-state start time after fault recovery to the end of sampling.

[0081] In some possible implementations, step S2, which involves reading the waveform data based on the three-phase instantaneous voltage at the grid connection point, may specifically include: Step S21: Based on the three-phase instantaneous voltage at the grid connection point and the effective value of three-phase instantaneous voltage Determine the control signals. Specifically, this may include: like Figure 3 As shown, the three-phase instantaneous voltage at the grid connection point is... After phase-locked loop (PLL) control, and by controlling the obtained grid phase... θ Zero-point detection is performed to obtain a judgment signal. Alternatively, the three-phase instantaneous voltage at the grid connection point is analyzed. A zero-crossing detection is performed directly to obtain the judgment signal.

[0082] The effective value of the three-phase instantaneous voltage and the preset effective voltage threshold The comparison is performed by a comparator to obtain the comparison signal.

[0083] The control signal is obtained by performing a logical AND operation (i.e., AND operation) on the judgment signal and the comparison signal.

[0084] Step S22: Determine the simulation time based on the control signal. Specifically, this may include: like Figure 3 As shown, the flip-flop (which can be a D flip-flop, etc.) outputs an enable signal Flag_time based on the control signal. The hold outputs an enable signal Flag_time based on the simulation time. And the enable signal Flag_time output simulation time .

[0085] Step S23: The read-in module can be based on the simulation time. Calculate the reading time Understandably, if the enable signal is high, the reading time is calculated based on the simulation time. If the enable signal is low, the reading time is 0, and there is no need to read the waveform data.

[0086] The read timing can meet the following requirements: . Indicates the simulation time. Indicates the simulation time. Indicates the error time.

[0087] Step S24: Read the waveform data according to the reading time. Specifically, this may include: Read the three-phase instantaneous voltage according to the reading time. or three-phase instantaneous current .

[0088] like Figure 3 As shown, the output three-phase instantaneous voltage or three-phase instantaneous current Or the three-phase instantaneous voltage or three-phase instantaneous current Filtering is performed and the output is then displayed. Specifically, the three-phase instantaneous voltage can be directly output based on the control command Flag_aver. or three-phase instantaneous current Alternatively, the output can be filtered.

[0089] Optional, such as Figure 4The simulation model includes a controlled source module 10 and a flexible DC transmission module 20. The flexible DC transmission module 20 includes a sending-end converter unit 21 and a receiving-end converter unit 22. The sending-end converter unit 21 includes a sending-end converter transformer 211 and a sending-end converter 212. The sending-end converter 212 can be connected to a sending-end control and protection device. The receiving-end converter unit 22 includes a receiving-end converter transformer 221 and a receiving-end converter 222. The receiving-end converter 222 is connected to a receiving-end control and protection device.

[0090] The controlled source module 10 is connected to the grid side of the sending-end converter transformer 211 through the grid connection point PCC. The valve side of the sending-end converter transformer 211 is connected to the AC side of the sending-end converter 212. The DC side of the sending-end converter 212 is connected to the DC side of the receiving-end converter 222 through the transmission line. The AC side of the receiving-end converter 222 is connected to the AC power grid S through the receiving-end converter transformer 221.

[0091] In this embodiment of the application, a comparison diagram of the waveform of the playback simulation model and the waveform of the original recorded waveform is shown below. Figure 5a and Figure 5b As shown. Taking the voltage waveform of phase A as an example, Figure 5a In the diagram, the gray solid line represents the A-phase output voltage at the grid connection point of the simulation model during the first steady-state stage, and the black solid line represents the instantaneous A-phase voltage in the recorded waveform data. Figure 5b In the diagram, the gray solid line represents the A-phase output voltage of the grid-connected point in the playback simulation model during the second steady-state stage, transient fault stage, fault recovery stage, and third steady-state stage. The black solid line represents the instantaneous A-phase voltage in the waveform data read during the second steady-state stage, transient fault stage, fault recovery stage, and third steady-state stage. Figure 5a and Figure 5b It can be seen whether the instantaneous voltage of phase A of the original waveform data matches after being imported into the playback simulation model. If they do not match, then the voltage is read... Figure 5a and Figure 5b Find the phase difference between the instantaneous voltages of phase A of the two phases and calculate it. This is used to correct the reading time, with the ultimate goal of ensuring that... The three-phase instantaneous voltage of the waveform data initially read in is completely consistent with the three-phase instantaneous voltage of the playback test model to ensure the simulation accuracy of the playback simulation model.

[0092] Example 2: Based on the same inventive concept, embodiments of this application also provide a hardware-in-the-loop simulation device based on waveform data playback. For example... Figure 6 As shown, the hardware-in-the-loop simulation device 200 may include: The sampling module 201 is used to collect waveform data of the simulated object under all operating conditions according to a preset sampling interval.

[0093] The reading module 202 is used to read the waveform data based on the three-phase instantaneous voltage at the grid connection point.

[0094] The simulation module 203 is used to input the recorded waveform data into a preset playback simulation model to perform hardware-in-the-loop simulation of the sending-end control and protection device or the receiving-end control and protection device.

[0095] The sampling interval is equal to the simulation step size of the playback simulation model, which can be 50μs.

[0096] Optionally, the above-mentioned waveform data sources may include: on-site grid-connected measurements, low-voltage physical dynamic model tests, offline digital simulations, real-time digital simulations, and controller semi-physical tests, etc. The waveform data formats are .cfg and .dat. The waveform data formats may also include .txt, .mat, and other recognizable file formats; this application embodiment does not limit the specific format.

[0097] Optionally, the electrical quantity types of the recorded data include three-phase instantaneous voltage, three-phase instantaneous current, active power, and reactive power at the grid connection point. The waveforms of phase A instantaneous voltage and instantaneous current are shown below. Figure 2 As shown. Figure 2 In the diagram, the horizontal axis represents time, t1 represents the sampling start time, t2 represents the unlocking time of the simulated object, t3 represents the steady-state start time before the fault occurs, t4 represents the fault occurrence time, t5 represents the fault recovery time, t6 represents the steady-state start time after the fault recovery, and t7 represents the sampling end time.

[0098] For example, the entire operating condition can be divided into the first steady-state stage, the unlocking transition stage, the second steady-state stage, the transient fault stage, the fault recovery stage, and the third steady-state stage according to different times.

[0099] The first steady-state phase indicates the period from the start of sampling to the unlocking time of the simulated object. The unlocking transition phase indicates the period from the unlocking time of the simulated object to the steady-state start time before the fault occurred. The second steady-state phase indicates the period from the steady-state start time before the fault occurred to the time of the fault occurrence. The transient fault phase indicates the period from the time of the fault occurrence to the time of fault recovery. The fault recovery phase indicates the period from the time of fault recovery to the steady-state start time after fault recovery. The third steady-state phase indicates the period from the steady-state start time after fault recovery to the end of sampling.

[0100] In some possible implementations, the reading module 202 is specifically used for: Based on the three-phase instantaneous voltage at the grid connection point and the effective value of three-phase instantaneous voltage Determine the control signals. Specifically, such as... Figure 3 As shown, the three-phase instantaneous voltage at the grid connection point is... After phase-locked loop (PLL) control, and by controlling the obtained grid phase... θ Zero-point detection is performed to obtain a judgment signal. Alternatively, the three-phase instantaneous voltage at the grid connection point is analyzed. Directly perform zero-crossing detection to obtain the judgment signal. The effective values ​​of the three-phase instantaneous voltages are then used. and the preset effective voltage threshold The comparison signal is obtained by comparing the two signals using a comparator. The control signal is then obtained by performing a logical AND operation (AND operation) between the judgment signal and the comparison signal.

[0101] The simulation timing is determined based on the control signals. Specifically, for example... Figure 3 As shown, the flip-flop (which can be a D flip-flop, etc.) outputs an enable signal Flag_time based on the control signal. The hold outputs an enable signal Flag_time based on the simulation time. And the enable signal Flag_time output simulation time .

[0102] The read module can be based on the simulation time. Calculate the reading time Understandably, if the enable signal is high, the read time is calculated based on the simulation time. If the enable signal is low, the read time is 0, and there is no need to read the waveform data. The read time can satisfy: . Indicates the simulation time. Indicates the simulation time. Indicates the error time.

[0103] The waveform data is read based on the reading time. Specifically, the three-phase instantaneous voltage is read based on the reading time. or three-phase instantaneous current .like Figure 3 As shown, the output three-phase instantaneous voltage or three-phase instantaneous current Or the three-phase instantaneous voltage or three-phase instantaneous current Filtering is performed and the output is then displayed. Specifically, the three-phase instantaneous voltage can be directly output based on the control command Flag_aver. or three-phase instantaneous current Alternatively, the output can be filtered.

[0104] Among other possible implementations, such as Figure 4The simulation model includes a controlled source module 10 and a flexible DC transmission module 20. The flexible DC transmission module 20 includes a sending-end converter unit 21 and a receiving-end converter unit 22. The sending-end converter unit 21 includes a sending-end converter transformer 211 and a sending-end converter 212. The sending-end converter 212 can be connected to a sending-end control and protection device. The receiving-end converter unit 22 includes a receiving-end converter transformer 221 and a receiving-end converter 222. The receiving-end converter 222 is connected to a receiving-end control and protection device.

[0105] The controlled source module 10 is connected to the grid side of the sending-end converter transformer 211 through the grid connection point PCC. The valve side of the sending-end converter transformer 211 is connected to the AC side of the sending-end converter 212. The DC side of the sending-end converter 212 is connected to the DC side of the receiving-end converter 222 through the transmission line. The AC side of the receiving-end converter 222 is connected to the AC power grid S through the receiving-end converter transformer 221.

[0106] Example 3: Based on the same inventive concept, this application also provides a computer device, which includes a processor and a memory. The memory stores a computer program, which includes program instructions. The processor executes the program instructions stored in the computer storage medium. The processor may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing and control core of the terminal, and is suitable for implementing one or more instructions. Specifically, it is suitable for loading and executing one or more instructions in the computer storage medium to implement the corresponding method flow or corresponding function, so as to implement the steps of the method provided in the above embodiments.

[0107] Example 4: Based on the same inventive concept, this application also provides a computer-readable storage medium, specifically a computer-readable storage medium (Memory). A computer-readable storage medium is a memory device in a computer device used to store programs and data. It is understood that the computer-readable storage medium here can include both the built-in storage medium in the computer device and extended storage media supported by the computer device. The computer-readable storage medium provides storage space that stores the terminal's operating system. Furthermore, the storage space also stores one or more instructions suitable for loading and execution by a processor. These instructions can be one or more computer programs (including program code). It should be noted that the computer-readable storage medium here can be high-speed RAM or non-volatile memory, such as at least one disk storage device. The processor can load and execute one or more instructions stored in the computer-readable storage medium to implement the steps of the method provided in the above embodiments.

[0108] Those skilled in the art will understand that the embodiments of the application can be provided as a method, system, or computer program product. Therefore, the application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0109] The application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0110] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1The function specified in one or more boxes.

[0111] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0112] The above are merely examples of the application and are not intended to limit the application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the application shall be included within the scope of the claims of the pending application.

Claims

1. A hardware-in-the-loop simulation method and apparatus based on waveform data playback, characterized in that, include: The waveform data of the simulated object under all operating conditions are collected according to the preset sampling interval; The waveform data is read based on the three-phase instantaneous voltage at the grid connection point; The recorded waveform data is input into a preset playback simulation model to perform hardware-in-the-loop simulation of the sending-end control and protection device or the receiving-end control and protection device.

2. The hardware-in-the-loop simulation method according to claim 1, characterized in that, The electrical quantity types of the recorded waveform data include the three-phase instantaneous voltage, three-phase instantaneous current, active power, and reactive power at the grid connection point.

3. The hardware-in-the-loop simulation method according to claim 1, characterized in that, The full operating conditions include a first steady-state stage, an unlocking transition stage, a second steady-state stage, a transient fault stage, a fault recovery stage, and a third steady-state stage; The first steady-state phase is used to indicate the phase between the sampling start time and the unlocking time of the simulated object; The unlocking transition phase is used to indicate the phase between the unlocking time of the simulated object and the steady-state start time before the fault occurs. The second steady-state phase is used to indicate the phase between the steady-state start time before the fault occurs and the time when the fault occurs; The transient fault phase is used to indicate the phase between the time the fault occurs and the time the fault is recovered; The fault recovery phase is used to indicate the period between the fault recovery time and the steady-state start time after fault recovery; The third steady-state phase is used to indicate the phase between the start time of the steady-state after the fault recovery and the end time of sampling.

4. The hardware-in-the-loop simulation method according to claim 1, characterized in that, The step of reading the waveform data based on the three-phase instantaneous voltage at the grid connection point includes: The control signal is determined based on the three-phase instantaneous voltage and the effective value of the three-phase instantaneous voltage at the grid connection point; The simulation time is determined based on the control signal; Calculate the reading time based on the simulation time; The waveform data is read according to the specified reading time.

5. The hardware-in-the-loop simulation method according to claim 4, characterized in that, The step of determining the control signal based on the three-phase instantaneous voltage and the effective value of the three-phase instantaneous voltage at the grid connection point includes: The three-phase instantaneous voltage at the grid connection point is controlled by a phase-locked loop, and the obtained grid phase is zero-crossing detected to obtain a judgment signal; or, the three-phase instantaneous voltage at the grid connection point is zero-crossing detected to obtain a judgment signal. The three-phase instantaneous voltage RMS values ​​are compared with a preset voltage RMS threshold value to obtain a comparison signal; The control signal is obtained by performing a logical AND operation between the judgment signal and the comparison signal.

6. The hardware-in-the-loop simulation method according to claim 4, characterized in that, Determining the simulation time based on the control signal includes: The trigger outputs an enable signal based on the control signal; The hold circuit outputs the simulation time based on the simulation time and the enable signal.

7. The hardware-in-the-loop simulation method according to claim 4, characterized in that, The reading time satisfies: ; in, Indicates the reading time. This represents the simulation time. Indicates the simulation time. Indicates the error time.

8. The hardware-in-the-loop simulation method according to claim 2, characterized in that, The step of reading the waveform data according to the reading time includes: The three-phase instantaneous voltage or the three-phase instantaneous current is read according to the reading time; Output the three-phase instantaneous voltage or the three-phase instantaneous current, or filter the three-phase instantaneous voltage or the three-phase instantaneous current and output it.

9. The hardware-in-the-loop simulation method according to claim 1, characterized in that, The playback simulation model includes a controlled source module and a flexible DC transmission module; wherein, the flexible DC transmission module includes a sending-end converter unit and a receiving-end converter unit; the sending-end converter unit includes a sending-end converter transformer and a sending-end converter; the sending-end converter is connected to the sending-end control and protection device; the receiving-end converter unit includes a receiving-end converter transformer and a receiving-end converter; the receiving-end converter is connected to the receiving-end control and protection device; The controlled source module is connected to the grid side of the sending-end converter transformer through the grid connection point. The valve side of the sending-end converter transformer is connected to the AC side of the sending-end converter. The DC side of the sending-end converter is connected to the DC side of the receiving-end converter through the transmission line. The AC side of the receiving-end converter is connected to the AC power grid through the receiving-end converter transformer.

10. The hardware-in-the-loop simulation method according to claim 1, characterized in that, The sampling interval is equal to the simulation step size of the playback simulation model.

11. A hardware-in-the-loop simulation device based on waveform data playback, characterized in that, include: The sampling module is used to collect waveform data of the simulated object under all operating conditions according to a preset sampling interval; The reading module is used to read the waveform data based on the three-phase instantaneous voltage at the grid connection point; The simulation module is used to input the recorded waveform data into a preset playback simulation model to perform hardware-in-the-loop simulation of the sending-end control and protection device or the receiving-end control and protection device.

12. The hardware-in-the-loop simulation device according to claim 11, characterized in that, The electrical quantity types of the recorded waveform data include the three-phase instantaneous voltage, three-phase instantaneous current, active power, and reactive power at the grid connection point.

13. The hardware-in-the-loop simulation device according to claim 11, characterized in that, The full operating conditions include a first steady-state stage, an unlocking transition stage, a second steady-state stage, a transient fault stage, a fault recovery stage, and a third steady-state stage; The first steady-state phase is used to indicate the phase between the sampling start time and the unlocking time of the simulated object; The unlocking transition phase is used to indicate the phase between the unlocking time of the simulated object and the steady-state start time before the fault occurs. The second steady-state phase is used to indicate the phase between the steady-state start time before the fault occurs and the time when the fault occurs; The transient fault phase is used to indicate the phase between the time the fault occurs and the time the fault is recovered; The fault recovery phase is used to indicate the period between the fault recovery time and the steady-state start time after fault recovery; The third steady-state phase is used to indicate the phase between the start time of the steady-state after the fault recovery and the end time of sampling.

14. The hardware-in-the-loop simulation device according to claim 11, characterized in that, The reading module is specifically used for: The control signal is determined based on the three-phase instantaneous voltage and the effective value of the three-phase instantaneous voltage at the grid connection point; The simulation time is determined based on the control signal; Calculate the reading time based on the simulation time; The waveform data is read according to the specified reading time.

15. The hardware-in-the-loop simulation device according to claim 14, characterized in that, The reading module is used for: The three-phase instantaneous voltage at the grid connection point is controlled by a phase-locked loop, and the obtained grid phase is zero-crossing detected to obtain a judgment signal; or, the three-phase instantaneous voltage at the grid connection point is zero-crossing detected to obtain a judgment signal. The three-phase instantaneous voltage RMS values ​​are compared with a preset voltage RMS threshold value to obtain a comparison signal; The control signal is obtained by performing a logical AND operation between the judgment signal and the comparison signal.

16. The hardware-in-the-loop simulation device according to claim 14, characterized in that, The reading module is used for: The trigger outputs an enable signal based on the control signal; The hold circuit outputs the simulation time based on the simulation time and the enable signal.

17. The hardware-in-the-loop simulation device according to claim 14, characterized in that, The reading time satisfies: ; in, Indicates the reading time. This represents the simulation time. Indicates the simulation time. Indicates the error time.

18. The hardware-in-the-loop simulation device according to claim 12, characterized in that, The reading module is specifically used for: The three-phase instantaneous voltage or the three-phase instantaneous current is read according to the reading time; Output the three-phase instantaneous voltage or the three-phase instantaneous current, or filter the three-phase instantaneous voltage or the three-phase instantaneous current and output it.

19. The hardware-in-the-loop simulation device according to claim 11, characterized in that, The playback simulation model includes a controlled source module and a flexible DC transmission module; wherein, the flexible DC transmission module includes a sending-end converter unit and a receiving-end converter unit; the sending-end converter unit includes a sending-end converter transformer and a sending-end converter; the sending-end converter is connected to the sending-end control and protection device; the receiving-end converter unit includes a receiving-end converter transformer and a receiving-end converter; the receiving-end converter is connected to the receiving-end control and protection device; The controlled source module is connected to the grid side of the sending-end converter transformer through the grid connection point. The other side of the sending-end converter transformer is connected to the valve side of the sending-end converter. The DC side of the sending-end converter is connected to the DC side of the receiving-end converter through the transmission line. The AC side of the receiving-end converter is connected to the AC power grid through the receiving-end converter transformer.

20. The hardware-in-the-loop simulation device according to claim 1, characterized in that, The sampling interval is equal to the simulation step size of the playback simulation model.

21. A computer device, characterized in that, include: One or more processors; The processor is used to store one or more programs; When the one or more programs are executed by the one or more processors, the hardware-in-the-loop simulation method as described in any one of claims 1 to 10 is implemented.

22. A computer-readable storage medium, characterized in that, It contains a computer program, which, when executed, implements the hardware-in-the-loop simulation method as described in any one of claims 1 to 10.

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