Wafer edge detection method, device and storage medium

Abstract

The application provides a wafer edge detection method, device and storage medium, and relates to the technical field of semiconductors. The method comprises the following steps: acquiring multiple edge images of a wafer to be detected collected by multiple shooting devices simultaneously; calculating the gradient direction and gradient amplitude of each pixel point in each edge image; determining an edge position pixel point based on the gradient direction and gradient amplitude of each pixel point in each edge image, and obtaining a gradient image of the edge position pixel point of each edge image; performing multi-level threshold filtering processing on each gradient image to obtain multiple edge binary images of the wafer to be detected; determining the coordinate set of a sub-pixel edge point corresponding to each edge binary image based on the gradient amplitude of each edge point in each edge binary image; converting the coordinate set of the sub-pixel edge point corresponding to each edge binary image to a set coordinate system, and determining the position of the center of a circle of the wafer to be detected and the position of the fitting center of a notch. The application can improve the accuracy of detection.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a wafer edge detection method, device, and storage medium. Background Technology

[0002] Wafer bonding is a core process in semiconductor packaging technology that enables 3D integration and advanced packaging. Before wafer bonding can begin, high-precision alignment of the two wafers is essential. Accurate identification of the wafer edge positions is a prerequisite for achieving precise wafer alignment.

[0003] Currently, wafer edge detection mainly relies on edge detection algorithms such as Canny and Sobel. However, these edge detection algorithms can only output pixel-level edges, which cannot meet the accuracy requirements at the sub-micron level. Summary of the Invention

[0004] This invention provides a wafer edge detection method, apparatus, device, and storage medium to solve the problem that the target cannot accurately identify the wafer edge.

[0005] In a first aspect, embodiments of the present invention provide a wafer edge detection method, comprising: Multiple edge images of a wafer under inspection are acquired simultaneously by multiple imaging devices; wherein at least one edge image includes a notch in the wafer under inspection. Based on the gradient direction and gradient magnitude of each pixel in each edge image, the edge position pixels are determined, and the gradient image of the edge position pixels in each edge image is obtained. Each gradient image is subjected to multi-level threshold filtering to obtain multiple edge binary images of the wafer to be inspected; wherein, the edge binary images include multiple edge points; Based on the gradient magnitude of each edge point in each edge binary image, determine the coordinate set of the sub-pixel edge points corresponding to each edge binary image; The coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps are transformed to a set coordinate system, and the center position of the wafer to be detected and the fitted center position of the notch are determined.

[0006] In one possible implementation, based on the gradient magnitude of each edge point in each edge binary image, the coordinate set of the sub-pixel edge points corresponding to each edge binary image is determined, including: Based on the gradient magnitude of the target edge point and the gradient magnitude of the target edge point at adjacent edge points, a quadratic curve is fitted, and the vertex coordinates of the quadratic fitted curve are determined as the coordinates of the sub-pixel edge point of the target edge point; wherein, the target edge point is any edge point in the edge binary image; Based on the coordinates of the sub-pixel edge points of all target edge points in each edge binary map, determine the coordinate set of the sub-pixel edge points corresponding to each edge binary map.

[0007] In one possible implementation, the step of performing quadratic curve fitting based on the gradient magnitude of the target edge point and the gradient magnitudes of adjacent edge points of the target edge point, and determining the vertex coordinates of the quadratic fitted curve as the coordinates of the sub-pixel edge point of the target edge point, includes: Based on the gradient magnitude of the target edge point and the gradient magnitude of the edge points adjacent to the target edge point in the column direction, a quadratic curve fitting is performed, and the abscissa of the vertex of the obtained first quadratic fitting curve is used as the ordinate of the sub-pixel edge point of the target edge point. Based on the gradient magnitude of the target edge point and the gradient magnitude of the edge points adjacent to the target edge point in the row direction, a quadratic curve fitting is performed, and the abscissa of the vertex of the obtained second quadratic fitting curve is used as the abscissa of the sub-pixel edge point of the target edge point.

[0008] In one possible implementation, after determining the coordinate set of sub-pixel edge points corresponding to each of the edge binary maps based on the coordinates of the sub-pixel edge points of all target edge points in each edge binary map, the method further includes: Based on the coordinate set of the sub-pixel edge points corresponding to each of the aforementioned edge binary maps, circle fitting is performed; Based on the circle fitting results, sub-pixel edge points that do not meet the set distance threshold are identified as outliers. The coordinates of the outliers are removed from the coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps, resulting in the coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps after removing the outliers. The step of transforming the coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps to a set coordinate system includes: The coordinate sets of the sub-pixel edge points corresponding to each of the binary edge maps after removing outliers are transformed to a set coordinate system.

[0009] In one possible implementation, the step of performing multi-level threshold filtering on each of the gradient images to obtain multiple edge binary images of the wafer to be inspected includes: Based on the gradient magnitude of each column of pixels in the target gradient image, the column direction threshold of each column is determined; wherein, the target gradient image is any gradient image; Based on the column direction threshold of the target column, only the pixel values ​​of pixels whose gradient magnitude is less than the column direction threshold of the target column are set to a set value, thus obtaining the set of retained pixels of the target column; wherein, the target column is any column in the target gradient image; The set of retained pixels for all the target columns is determined as the first set of pixels; A global threshold is determined based on the gradient magnitude of all pixels in the first pixel set; Only the pixel values ​​of pixels whose gradient magnitude is less than the global threshold in the first pixel set are set to the set value to obtain the second pixel set; Based on the pixel values ​​of all pixels in the second pixel set, multiple edge binary maps of the wafer to be inspected are determined.

[0010] In one possible implementation, the method further includes: Based on the center position of the wafer to be inspected and the fitted center position of the notch, the azimuth angle of the notch of the wafer to be inspected is determined; Based on the center positions of adjacent wafers to be tested and the fitted center position of the notch, the azimuth angle of the notch of the adjacent wafers to be tested is determined; wherein, the adjacent wafers to be tested are wafers aligned with the wafer to be tested. Based on the center position of the wafer to be tested and the center position of the adjacent wafer to be tested, the translational deviation of the wafer to be tested and the adjacent wafer to be tested during wafer alignment is determined; Based on the azimuth angle of the notch on the wafer to be tested and the azimuth angle of the notch on the adjacent wafer to be tested, the rotation angle deviation between the wafer to be tested and the adjacent wafer to be tested during wafer alignment is determined.

[0011] In one possible implementation, determining the edge location pixels based on the gradient direction and gradient magnitude of each pixel in each edge image, and obtaining the gradient image of the edge location pixels in each edge image, includes: For an edge image containing the notch, if the gradient direction of the target pixel satisfies the threshold range of the gradient direction of the notch edge, then the target pixel is determined to be a pixel at the edge position; otherwise, it is a pixel at a non-edge position, and the pixel values ​​of all non-edge position pixels are set to the set value. For an edge image that does not contain the notch, if the gradient direction of the target pixel meets the threshold range of the gradient direction of the non-notch edge, then the target pixel is determined to be a pixel at the edge position; otherwise, it is a pixel at a non-edge position, and the pixel value of the non-edge position pixel is set to the set value. For all edge locations in each edge image, non-maximum suppression is performed based on the gradient magnitude of the pixel. The pixel with the largest gradient magnitude among its adjacent pixels is set as the edge location pixel, otherwise it is a noise pixel, and the pixel value of all noise pixels is set to the set value. Based on the gradient direction and gradient magnitude of the pixels at the edge positions in each edge image, the gradient image of the pixels at the edge positions in each edge image is obtained.

[0012] In one possible implementation, before calculating the gradient direction and gradient magnitude of each pixel in each of the edge images, the method further includes: Anisotropic diffusion filtering is applied to all the edge images.

[0013] Secondly, embodiments of the present invention provide a wafer edge detection device, comprising: An acquisition module is used to acquire multiple edge images of a wafer to be inspected, captured simultaneously by multiple imaging devices; wherein at least one edge image includes a notch in the wafer to be inspected; An edge determination module is used to determine edge position pixels based on the gradient direction and gradient magnitude of each pixel in each edge image, and to obtain the gradient image of the edge position pixels in each edge image; The filtering module is used to perform multi-level threshold filtering on each of the gradient images to obtain multiple edge binary images of the wafer to be inspected; wherein, the edge binary images include multiple edge points; The coordinate determination module is used to determine the coordinate set of sub-pixel edge points corresponding to each edge binary map based on the gradient magnitude of each edge point in each edge binary map; The center determination module is used to transform the coordinate set of the sub-pixel edge points corresponding to each of the edge binary maps to a set coordinate system, and determine the center position of the wafer to be detected and the position of the fitted center of the notch.

[0014] Thirdly, embodiments of the present invention provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method described in the first aspect or any possible implementation thereof.

[0015] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the first aspect or any possible implementation thereof.

[0016] Fifthly, embodiments of the present invention provide a computer program product, including a computer program that, when executed by a processor, implements the method described in the first aspect or any possible implementation thereof.

[0017] In this embodiment of the invention, to accurately detect the wafer under test, multiple imaging devices are used to simultaneously acquire edge images of the wafer, thereby overcoming the problem of large edge fitting errors with a single imaging device. By calculating the gradient direction and gradient magnitude of each pixel in each edge image, it is easier to distinguish pixels at edge locations from noise pixels and pixels at non-edge locations based on the gradient direction and gradient magnitude. By performing multi-level threshold filtering on each gradient image, noise pixels in non-edge regions can be further eliminated. In addition, to improve accuracy, the coordinate set of sub-pixel edge points corresponding to each edge binary image is obtained based on the gradient magnitude of each edge point, thereby improving the accuracy of edge detection to the sub-pixel level. Attached Figure Description

[0018] Figure 1 This is a flowchart illustrating the implementation of the wafer edge detection method provided in this embodiment of the invention. Figure 2 This is a schematic diagram of an edge including a notch provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of an edge without notches provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the wafer edge detection device provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0019] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0020] Wafer edge detection has a wide range of applications in the semiconductor manufacturing industry, such as wafer positioning, wafer edge finding, and wafer bonding. Wafer edge detection can effectively improve wafer positioning accuracy, thereby ensuring high-precision wafer alignment.

[0021] However, the inventors discovered that current edge detection algorithms such as Canny and Sobel can only output pixel-level edges, failing to meet sub-micron alignment accuracy requirements. Even with sub-pixel localization using interpolation methods, system bias is often introduced due to the asymmetry of gradient calculation. Furthermore, wafer surfaces may contain interference such as scratches, particle contamination, and uneven oxide layers; however, traditional methods struggle to effectively distinguish between real edges and interference, causing the fitting results to deviate from the true center.

[0022] See Figure 1 The diagram illustrates the implementation flowchart of the wafer edge detection method provided in this embodiment of the invention, which is described in detail below: S110. Acquire multiple edge images of the wafer to be inspected simultaneously captured by multiple imaging devices.

[0023] At least one edge image includes a notch in the wafer to be detected.

[0024] In some embodiments, the wafer to be inspected is placed on a rotary translation platform that can move along the X-axis, Y-axis and rotation axis.

[0025] In this embodiment, after the wafer to be inspected is placed on the rotation and translation platform, the platform moves from the wafer loading position to the image acquisition position. Since edge images captured by a single imaging device have significant errors during edge fitting and are easily affected by noise, multiple imaging devices are needed at the image acquisition position. These multiple devices can simultaneously acquire the arc images of the wafer's edge, i.e., the edge images.

[0026] For example, four optical cameras can be set up simultaneously to acquire arc images of the edge of the wafer to be inspected, resulting in four edge images. Among them, at least one optical camera's field of view includes the notch of the wafer to be inspected.

[0027] In some embodiments, since noise exists in the multiple edge images obtained, it is also necessary to perform denoising processing on all edge images.

[0028] In this embodiment, anisotropic diffusion filtering can be applied to all edge images to remove noise while preserving and highlighting the edge features of the wafer under inspection. During image smoothing, the diffusion intensity of the anisotropic diffusion filter adaptively changes with the image gradient, automatically adjusting the smoothing degree according to the local texture of the edge image, thereby preserving the edge features of the wafer under inspection.

[0029] S120. Based on the gradient direction and gradient magnitude of each pixel in each edge image, determine the edge position pixels and obtain the gradient image of the edge position pixels in each edge image.

[0030] In this embodiment, the Prewitt operator can be used to calculate the gradient direction and gradient magnitude of each pixel in each edge image.

[0031] The Prewitt operator is a discrete differential operator used to approximate the rate of change of grayscale in an image along the horizontal and vertical directions, i.e., the gradient. The gradient magnitude, or edge strength, represents the drastic change in grayscale at that pixel. The gradient direction, or the normal to the edge, represents the direction of the most drastic grayscale change. Furthermore, the Prewitt operator has all weights of 1, without a central weight, making it slightly more sensitive to noise than the Sobel operator, but its calculation is simpler. The calculation process for the gradient direction and magnitude will not be elaborated here.

[0032] Inevitably, each edge image will contain pixels at non-edge locations. If all pixels in each edge image are directly used for fitting to determine the center position of the wafer to be inspected and the fitted center position of the notch, there will be a large deviation, and the obtained positions will be inaccurate. To improve accuracy, it is necessary to filter out pixels at both non-edge and edge locations.

[0033] In some embodiments, the characteristics of the gradient direction at the edge location can be used to first determine whether a pixel belongs to an edge location or a non-edge location. Then, the gradient magnitude can be used to further determine whether the pixel is a noise pixel or an edge location pixel.

[0034] In this embodiment, since edge locations include notched edges and non-notched edges, and their gradient directions are not entirely the same, for an edge image containing a notch, if the gradient direction of the target pixel meets the threshold range of the notched edge gradient direction, then the target pixel is determined to be a pixel at an edge location; otherwise, it is a pixel at a non-edge location. After determining the pixels at edge locations and non-edge locations, the pixel values ​​of all non-edge location pixels can be set to a preset value, while the pixel values ​​of edge location pixels remain unchanged.

[0035] In this embodiment, for an edge image without notches, if the gradient direction of the target pixel meets the threshold range for gradient directions of non-notched edges, the target pixel is determined to be a pixel at an edge location; otherwise, it is a pixel at a non-edge location. The pixel value of the non-edge location pixel is set to a preset value, while the pixel value of the edge location pixel remains unchanged.

[0036] The target pixel is any pixel in the edge image.

[0037] For example, the setting value can be 0, which means setting the grayscale value of the target pixel to 0.

[0038] For example, such as Figure 2 and 3As shown, since the edge location includes both notched and non-notched edges, the non-notched edge is almost a straight line in the field of view of the imaging device, and its gradient direction is close to -90°. Considering that wafer offset may cause edge tilting, the threshold range of the gradient direction for the non-notched edge is set to -110° to -70°. For images containing notched edges, they are close to a semicircle in the field of view of the imaging device, and the gradient direction range at the corresponding position is larger. Therefore, the threshold range of the gradient direction for the notched edge can be set to -150° to -30°.

[0039] By filtering based on gradient direction, pixels outside the threshold range for either the non-notch edge gradient direction or the notch edge gradient direction can be filtered out, and these non-edge pixels are set to 0, meaning only pixels at the edge locations in each edge image are retained. Thus, only pixels at the edge locations in each edge image are preserved. After processing, each edge image contains only pixels at the edge locations.

[0040] In this embodiment, considering that there may still be noisy pixels, further denoising processing is required for all edge positions in each edge image based on the gradient magnitude.

[0041] Specifically, for all pixels at edge locations in each edge image, non-maximum suppression is performed based on the pixel's gradient magnitude. The pixel with the largest gradient magnitude among its neighboring pixels is designated as the edge pixel; otherwise, it is considered a noise pixel. The pixel values ​​of all noise pixels are set to a preset value, while the pixel values ​​of edge pixels remain unchanged.

[0042] Non-maximum suppression is performed based on the gradient magnitude of each pixel. Specifically, if the gradient magnitude of a target pixel is greater than the gradient magnitudes of two adjacent pixels, the target pixel is identified as an edge pixel. Otherwise, the target pixel is considered a noise pixel, and its pixel value is set to a predetermined value.

[0043] For example, the setting value can be 0, which means setting the grayscale value of the target pixel to 0.

[0044] It should be noted that when performing non-maximum suppression based on gradient magnitude, only pixels at edge positions are considered. Pixels with pixel values ​​set to a predetermined value do not need to undergo non-maximum suppression processing.

[0045] After filtering by gradient direction and gradient magnitude, the pixels at the edge positions that are finally retained satisfy both the range of gradient direction and the condition of maximum gradient magnitude.

[0046] Finally, the gradient image of the pixels at the edge position in each edge image can be obtained based on the gradient magnitude of the pixels at the edge position in each edge image.

[0047] The gradient image includes the gradient magnitude of all pixels at the edge locations.

[0048] S130. Perform multi-level threshold filtering on each gradient image to obtain multiple edge binary images of the wafer to be inspected.

[0049] The edge binary map includes multiple edge points.

[0050] Although the pixels at non-edge locations and noise pixels have already been filtered out, there may still be pixels in non-edge regions. Therefore, it is necessary to further perform multi-level threshold filtering on the gradient images of pixels at edge locations in each edge image.

[0051] In some embodiments, a two-stage threshold filtering process is performed on the gradient image of the edge position pixels of each edge image. Considering that the edges are horizontal, the first stage is based on the column direction threshold of each column, and the second stage is based on the global threshold.

[0052] In this embodiment, firstly, a column direction threshold for each column is determined based on the gradient magnitude of each column of pixels in the target gradient image. Then, based on the column direction threshold of the target column, only the pixel values ​​of pixels in that target column whose gradient magnitude is less than the column direction threshold are set to a predetermined value, resulting in a set of retained pixels for that target column. Next, the set of retained pixels for all target columns is determined as the first pixel set of the target gradient image. Thus, the first-level filtering process can be performed on each gradient image using the column direction threshold for each column.

[0053] In this context, the target gradient image is any gradient image, and the target column is any column within that target gradient image. If we still use the example of four cameras capturing images simultaneously, then there are four edge images. By processing the gradient direction and magnitude of each pixel in these four edge images (i.e., through S130), four gradient images are obtained. The target gradient image is any one of these four gradient images. After the first-level filtering process, four sets of first pixels are obtained. For example, for the pixels of the target column of the target gradient image, all non-zero gradient magnitudes of each pixel in the target column are extracted, sorted in ascending order, and the 99th percentile of the sorted column is calculated as the column direction threshold of the target column.

[0054] Through the above processing, only the pixel values ​​of pixels exceeding the column direction threshold of the target column are retained, while the pixel values ​​of the remaining non-compliant pixels are set to the set value. After the first-level processing, a second-level processing is required.

[0055] In this embodiment, a global threshold is first determined based on the gradient magnitudes of all pixels in the first pixel set of the target gradient image. Then, only the pixel values ​​of pixels in the first pixel set whose gradient magnitudes are less than the global threshold are set to a predetermined value, resulting in a second pixel set of the target gradient image. Finally, multiple edge binary maps of the wafer to be inspected can be determined based on the pixel values ​​of each pixel in the second pixel set.

[0056] For example, by collecting the non-zero gradient magnitudes of all first pixel points and sorting them in ascending order, the 90th percentile of the sorted gradient magnitudes is calculated as a global threshold.

[0057] For example, since the pixel values ​​of pixels that do not meet the conditions have been set to the set values ​​through processing, while the pixel values ​​of other pixels that meet the conditions remain unchanged, the grayscale value of pixels with set values ​​can be set to 0, and the grayscale value of pixels with non-set values ​​can be set to 255. This allows all the second pixel sets to be converted into edge binary maps. Taking the four first pixel sets above as an example, after the second-level filtering process, four second pixel sets will be obtained, thus converting them into four edge binary maps of the wafer to be inspected.

[0058] By employing a two-level adaptive threshold mechanism of column percentile filtering and global percentile filtering, noise points in non-edge regions can be effectively eliminated.

[0059] S140. Based on the gradient magnitude of each edge point in each edge binary map, determine the coordinate set of the sub-pixel edge points corresponding to each edge binary map.

[0060] To meet the precision requirements at the sub-micron level, the pixels at the edge positions are converted to the sub-pixel level, which enables more accurate determination of the center position of the wafer under inspection and the fitted center position of the notch.

[0061] In some embodiments, firstly, a quadratic curve fitting can be performed based on the gradient magnitude of the target edge point and the gradient magnitude of the target edge point at adjacent edge points. The vertex coordinates of the quadratic fitted curve obtained by the quadratic curve fitting are then determined as the coordinates of the sub-pixel edge points of the target edge point. Then, based on the coordinates of the sub-pixel edge points of all the target edge points in each edge binary map, the coordinate set of the sub-pixel edge points corresponding to each edge binary map is determined.

[0062] In this embodiment, quadratic curve fitting can be performed based on the gradient magnitude of the target edge point and the gradient magnitude of the adjacent edge points in the column direction. The abscissa of the vertex of the first quadratic fitting curve is used as the ordinate of the sub-pixel edge point of the target edge point. Similarly, quadratic curve fitting can be performed based on the gradient magnitude of the target edge point and the gradient magnitude of the adjacent edge points in the row direction. The abscissa of the vertex of the second quadratic fitting curve is used as the abscissa of the sub-pixel edge point of the target edge point.

[0063] Specifically, let the pixel coordinates of the target edge point be (x, y), and the gradient magnitude of this target edge point be k1. Then, the pixel gradient magnitudes of the two adjacent edge points (x, y-1) and (x, y+1) above and below it are k0 and k2, respectively. Based on the two vector data: X=[y-1, y, y+1] and Y=[k0, k1, k2], a quadratic curve y=ax can be used. 2 Least square fitting is performed using +bx+c to obtain the x-coordinate of the vertex of the curve as -b / (2a). -b / (2a) is then used as the sub-pixel y-direction position coordinate of the target edge point: ysub=-b / (2a).

[0064] Similarly, let the pixel coordinates of the target edge point be (x, y), and the gradient magnitude of this target edge point be k1. Then the pixel gradient magnitudes of its two adjacent edge points at positions (x-1, y) and (x+1, y) are k3 and k4, respectively. Based on the two vector data: X=[x-1, x, x+1] and Y=[k3, k1, k4], a quadratic curve y=mx can be used. 2 By performing least-squares fitting with +mx+r, the x-coordinate of the curve's vertex is obtained as -n / (2m). -n / (2m) is then used as the sub-pixel x-direction coordinate of the target edge point, xsub = -n / (2m). Therefore, the position of the sub-pixel edge point at the target edge point (x, y) is (xsub, ysub).

[0065] By calculating the coordinates of the sub-pixel edge points of all target edge points in each edge binary image, the coordinate set of the sub-pixel edge points corresponding to each edge binary image can be determined.

[0066] By performing anisotropic diffusion filtering on each edge image to preserve edge details, and combining the unbiased gradient calculation of the Prewitt operator with subpixel interpolation of the quadratic fitting curve, the positioning accuracy of edge pixels is improved to the subpixel level, with a theoretical accuracy of less than 0.1 pixels, laying the foundation for subsequent high-precision alignment.

[0067] In some embodiments, considering that the wafer surface may have scratches, contamination or double wafer interference, making it impossible to stably fit the true edge, and there may also be interference from outliers, after obtaining the coordinate set of sub-pixel edge points corresponding to each edge binary map, it is necessary to further remove abnormal pixel points.

[0068] In this embodiment, the RANSAC algorithm can be used to perform circle fitting on the coordinate set of sub-pixel edge points. Based on the circle fitting result, sub-pixel edge points that do not meet the set distance threshold are identified as outliers. The coordinates of the outliers are then removed from the coordinate sets of the sub-pixel edge points corresponding to each edge binary map, resulting in the coordinate sets of the sub-pixel edge points corresponding to each edge binary map after removing the outliers.

[0069] Specifically, after performing circle fitting, wafer edges and notch edges can be distinguished and identified based on prior knowledge of the radius, such as the wafer radius range and notch radius range. Based on the fitted circle, pixels that are too far from the circle radius are filtered out, thereby obtaining a set of coordinates for sub-pixel edge points with high confidence.

[0070] Therefore, by using prior knowledge of the radius, the RANSAC fitting process can automatically distinguish between the wafer body edge and the notch edge without the need for manual specification of the detection mode, thus improving the automation level of the algorithm.

[0071] S150. Transform the coordinate set of the sub-pixel edge points corresponding to each edge binary map to the set coordinate system, and determine the center position of the wafer to be detected and the fitted center position of the notch.

[0072] After obtaining the coordinate sets of sub-pixel edge points corresponding to each edge binary image, since the positions of each imaging device are different, it is necessary to unify the coordinate system of the multiple imaging devices through endo-parameter calibration. Then, the sub-pixel edge points detected by each imaging device are transformed to the unified platform coordinate system through the endo-parameter matrix. Finally, by fitting using the least squares method, the center position of the wafer to be inspected and the fitted center position of the notch can be determined.

[0073] Furthermore, the azimuth angle of the notch relative to the platform coordinate system can be obtained by connecting the center position of the wafer to be inspected and the fitted center position of the notch.

[0074] In some embodiments, when applying wafer alignment, after determining the center position of the wafer to be inspected, the fitted center position of the notch, and the azimuth angle of the notch on the wafer to be inspected, the azimuth angle of the notch on adjacent wafers to be inspected can be determined based on the center positions of the adjacent wafers to be inspected and the fitted center positions of the notches. The adjacent wafers to be inspected are those aligned with the wafer to be inspected.

[0075] Therefore, by using the center positions of the wafer under test and adjacent wafers under test, the translational deviation during wafer alignment can be determined. Based on the azimuth angles of the notches on the wafer under test and adjacent wafers under test, the rotational angle deviation during wafer alignment can be determined. This allows for the output of the offset amount used to control the adjustment of the rotation and translation platform, thereby achieving accurate alignment between adjacent wafers under test.

[0076] In this embodiment of the invention, to accurately detect the wafer under test, multiple imaging devices are used to simultaneously acquire edge images of the wafer, thereby overcoming the problem of large edge fitting errors with a single imaging device. By calculating the gradient direction and gradient magnitude of each pixel in each edge image, it is easier to distinguish pixels at edge locations from noise pixels and pixels at non-edge locations based on the gradient direction and gradient magnitude. By performing multi-level threshold filtering on each gradient image, noise pixels in non-edge regions can be further eliminated. In addition, to improve accuracy, the coordinate set of sub-pixel edge points corresponding to each edge binary image is obtained based on the gradient magnitude of each edge point, thereby improving the accuracy of edge detection to the sub-pixel level.

[0077] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0078] The following are device embodiments of the present invention. For details not described in detail, please refer to the corresponding method embodiments described above.

[0079] Figure 4 A schematic diagram of the wafer edge detection device provided in an embodiment of the present invention is shown. For ease of explanation, only the parts related to the embodiment of the present invention are shown, and are described in detail below: like Figure 4 As shown, the wafer edge detection device includes: The acquisition module 410 is used to acquire multiple edge images of the wafer to be inspected simultaneously captured by multiple imaging devices; wherein at least one edge image includes a notch in the wafer to be inspected; The edge determination module 420 is used to determine the edge position pixel based on the gradient direction and gradient magnitude of each pixel in each edge image, and to obtain the gradient image of the edge position pixel of each edge image; The filtering module 430 is used to perform multi-level threshold filtering on each of the gradient images to obtain multiple edge binary images of the wafer to be inspected; wherein, the edge binary images include multiple edge points; The coordinate determination module 440 is used to determine the coordinate set of sub-pixel edge points corresponding to each edge binary map based on the gradient magnitude of each edge point in each edge binary map; The center determination module 450 is used to transform the coordinate set of the sub-pixel edge points corresponding to each of the edge binary maps to a set coordinate system, and determine the center position of the wafer to be detected and the position of the fitted center of the notch.

[0080] Figure 5 This is a schematic diagram of an electronic device provided in an embodiment of the present invention. For example... Figure 5 As shown, the electronic device 5 of this embodiment includes a processor 50 and a memory 51. The memory 51 stores a computer program 52. When the processor 50 executes the computer program 52, it implements the steps in the various method embodiments described above. Alternatively, when the processor 50 executes the computer program 52, it implements the functions of each module / unit in the various device embodiments described above.

[0081] For example, computer program 52 may be divided into one or more modules / units, which are stored in memory 51 and executed by processor 50 to complete the present invention. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of computer program 52 in electronic device 5.

[0082] Electronic device 5 may include, but is not limited to, processor 50 and memory 51. Those skilled in the art will understand that... Figure 5 This is merely an example of electronic device 5 and does not constitute a limitation on electronic device 5. It may include more or fewer components than shown, or combine certain components, or different components. For example, electronic device 5 may also include input / output devices, network access devices, buses, etc.

[0083] The processor 50 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0084] The memory 51 can be an internal storage unit of the electronic device 5, such as a hard disk or RAM. The memory 51 can also be an external storage device of the electronic device 5, such as a plug-in hard disk, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, the memory 51 can include both internal and external storage units of the electronic device 5. The memory 51 is used to store the computer program 52 and other programs and data required by the electronic device 5. The memory 51 can also be used to temporarily store data that has been output or will be output.

[0085] For the sake of simplicity and clarity, only the above-described functional modules / units are used as examples. In practical applications, the functions described above can be assigned to different functional modules / units as needed. These modules / units can be implemented in hardware, software, or a combination of both.

[0086] This invention also provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the methods described in the above-described method embodiments.

[0087] This invention also provides a computer program product, including a computer program. When the computer program is executed by a processor, it implements the methods described in the above-described method embodiments.

[0088] Computer programs include computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. Computer-readable media can include: any entity or device capable of carrying computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc.

[0089] In the above embodiments, the descriptions of each embodiment have their own emphasis. Parts not detailed or described in a particular embodiment can be referred to in the relevant descriptions of other embodiments. Unless otherwise specified or in conflict with logic, the terminology and / or descriptions between different embodiments are consistent and can be referenced interchangeably. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0090] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A wafer edge detection method, characterized in that, include: Multiple edge images of a wafer under inspection are acquired simultaneously by multiple imaging devices; wherein at least one edge image includes a notch in the wafer under inspection. Based on the gradient direction and gradient magnitude of each pixel in each edge image, the edge position pixels are determined, and the gradient image of the edge position pixels in each edge image is obtained. Each gradient image is subjected to multi-level threshold filtering to obtain multiple edge binary images of the wafer to be inspected; wherein, the edge binary images include multiple edge points; Based on the gradient magnitude of each edge point in each edge binary image, determine the coordinate set of the sub-pixel edge points corresponding to each edge binary image; The coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps are transformed to a set coordinate system, and the center position of the wafer to be detected and the fitted center position of the notch are determined.

2. The wafer edge detection method according to claim 1, characterized in that, The step of determining the coordinate set of sub-pixel edge points corresponding to each edge binary map based on the gradient magnitude of each edge point in each edge binary map includes: Based on the gradient magnitude of the target edge point and the gradient magnitude of the target edge point at adjacent edge points, a quadratic curve is fitted, and the vertex coordinates of the quadratic fitted curve are determined as the coordinates of the sub-pixel edge point of the target edge point; wherein, the target edge point is any edge point in the edge binary image; Based on the coordinates of the sub-pixel edge points of all target edge points in each edge binary image, determine the coordinate set of the sub-pixel edge points corresponding to each edge binary image.

3. The wafer edge detection method according to claim 2, characterized in that, The process of performing quadratic curve fitting based on the gradient magnitude of the target edge point and the gradient magnitude of the target edge point at adjacent edge points, and determining the vertex coordinates of the quadratic fitted curve as the coordinates of the sub-pixel edge point of the target edge point, includes: Based on the gradient magnitude of the target edge point and the gradient magnitude of the edge points adjacent to the target edge point in the column direction, a quadratic curve fitting is performed, and the abscissa of the vertex of the obtained first quadratic fitting curve is used as the ordinate of the sub-pixel edge point of the target edge point. Based on the gradient magnitude of the target edge point and the gradient magnitude of the edge points adjacent to the target edge point in the row direction, a quadratic curve fitting is performed, and the abscissa of the vertex of the obtained second quadratic fitting curve is used as the abscissa of the sub-pixel edge point of the target edge point.

4. The wafer edge detection method according to claim 2, characterized in that, After determining the coordinate set of sub-pixel edge points corresponding to each of the edge binary maps based on the coordinates of the sub-pixel edge points of all target edge points in each of the edge binary maps, the method further includes: Based on the coordinate set of the sub-pixel edge points corresponding to each of the aforementioned edge binary maps, circle fitting is performed; Based on the circle fitting results, sub-pixel edge points that do not meet the set distance threshold are identified as outliers. The coordinates of the outliers are removed from the coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps, resulting in the coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps after removing the outliers. The step of transforming the coordinate sets of the sub-pixel edge points corresponding to each of the edge binary maps to a set coordinate system includes: The coordinate sets of the sub-pixel edge points corresponding to each of the binary edge maps after removing outliers are transformed to a set coordinate system.

5. The wafer edge detection method according to any one of claims 1-4, characterized in that, The step of performing multi-level threshold filtering on each of the gradient images to obtain multiple edge binary images of the wafer to be inspected includes: Based on the gradient magnitude of each column of pixels in the target gradient image, the column direction threshold of each column is determined; wherein, the target gradient image is any gradient image; Based on the column direction threshold of the target column, only the pixel values ​​of pixels whose gradient magnitude is less than the column direction threshold of the target column are set to a set value, thus obtaining the set of retained pixels of the target column; wherein, the target column is any column in the target gradient image; The set of retained pixels in all the target columns is determined as the first set of pixels in the target gradient image; A global threshold is determined based on the gradient magnitude of all pixels in the first pixel set; Only the pixel values ​​of pixels whose gradient magnitude is less than the global threshold in the first pixel set are set to the set value to obtain the second pixel set of the target gradient image; Based on the pixel values ​​of the pixels in each of the second pixel point sets, multiple edge binary maps of the wafer to be inspected are determined.

6. The wafer edge detection method according to any one of claims 1-4, characterized in that, The method further includes: Based on the center position of the wafer to be inspected and the fitted center position of the notch, the azimuth angle of the notch of the wafer to be inspected is determined; Based on the center positions of adjacent wafers to be tested and the fitted center position of the notch, the azimuth angle of the notch of the adjacent wafers to be tested is determined; wherein, the adjacent wafers to be tested are wafers aligned with the wafer to be tested. Based on the center position of the wafer to be tested and the center position of the adjacent wafer to be tested, the translational deviation of the wafer to be tested and the adjacent wafer to be tested during wafer alignment is determined; Based on the azimuth angle of the notch on the wafer to be tested and the azimuth angle of the notch on the adjacent wafer to be tested, the rotation angle deviation between the wafer to be tested and the adjacent wafer to be tested during wafer alignment is determined.

7. The wafer edge detection method according to any one of claims 1-4, characterized in that, The step of determining edge position pixels based on the gradient direction and gradient magnitude of each pixel in each edge image, and obtaining the gradient image of the edge position pixels in each edge image, includes: For an edge image containing the notch, if the gradient direction of the target pixel satisfies the threshold range of the gradient direction of the notch edge, then the target pixel is determined to be a pixel at the edge position; otherwise, it is a pixel at a non-edge position, and the pixel values ​​of all non-edge position pixels are set to the set value. For an edge image that does not contain the notch, if the gradient direction of the target pixel meets the threshold range of the gradient direction of the non-notch edge, then the target pixel is determined to be a pixel at the edge position; otherwise, it is a pixel at a non-edge position, and the pixel value of the non-edge position pixel is set to the set value. For all edge locations in each edge image, non-maximum suppression is performed based on the gradient magnitude of the pixel. The pixel with the largest gradient magnitude among its adjacent pixels is set as the edge location pixel, otherwise it is a noise pixel, and the pixel value of all noise pixels is set to the set value. Based on the gradient direction and gradient magnitude of the pixels at the edge positions in each edge image, the gradient image of the pixels at the edge positions in each edge image is obtained.

8. The wafer edge detection method according to any one of claims 1-4, characterized in that, Before calculating the gradient direction and gradient magnitude of each pixel in each of the edge images, the method further includes: Anisotropic diffusion filtering is applied to all the edge images.

9. An electronic device, characterized in that, It includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method as described in any one of claims 1 to 7.

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