Display panel and display device

Abstract

The application discloses a display panel and a display device, and relates to the technical field of display panels, and specifically discloses a display panel comprising: a plurality of positive power voltage signal lines; a plurality of negative power voltage signal lines; a positive power voltage signal line convergence part located in a non-display area, wherein the plurality of positive power voltage signal lines extend out of a display area and are electrically connected with the positive power voltage signal line convergence part, the positive power voltage signal line convergence part has a clearance space, and a first area is orthographically projected in a second direction and falls in the clearance space; and a negative power voltage signal line convergence part located in the clearance space, wherein the plurality of negative power voltage signal lines extend out of the display area and are electrically connected with the negative power voltage signal line convergence part. Compared with the prior art, the negative power voltage signal line convergence part is arranged in the clearance space of the positive power voltage signal line convergence part, so that the negative power voltage signal line convergence part and the positive power voltage signal line convergence part are prevented from overlapping in a large area, and the reliability of the display panel is improved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display panel and a display device. Background Technology

[0002] Display panels include the AA area (Active Area, display area) and the NA area (Non-display Area). With the rapid development of electronic devices, users have higher and higher requirements for screen ratio, and narrow bezel technology has attracted more and more attention.

[0003] Existing technologies include FIAA products (fanout in AA, fanout lines located in the display area) that partially incorporate fanout lines into the display area. In order to reduce screen power consumption, ELVSS (negative power supply voltage signal line) In AA designs are implemented in non-FIAA areas to reduce ELVSS voltage drop. However, this results in a large overlap between the positive and negative power supply voltage signal line junctions, leading to heat concentration, which can easily burn out the organic film layer and cause reliability failure. Summary of the Invention

[0004] The purpose of this invention is to provide a display panel and a display device to solve the technical problems in the prior art, which can avoid the overlap of large areas of positive power voltage signal line junctions and negative power voltage signal line junctions.

[0005] In a first aspect, the present invention provides a display panel including a display area and a non-display area, the display area including a first region and a second region, wherein, in a first direction, the second region is located on opposite sides of the first region, and the display panel includes:

[0006] Multiple positive power supply voltage signal lines are located in the first and second areas of the display area. The positive power supply voltage signal lines extend along the second direction, and the multiple positive power supply voltage signal lines are spaced apart along the first direction.

[0007] Multiple negative power supply voltage signal lines are located in the first area of ​​the display area. The negative power supply voltage signal lines extend along a second direction, and the multiple negative power supply voltage signal lines are spaced apart along a first direction.

[0008] A positive power voltage signal line junction is located in the non-display area. Multiple positive power voltage signal lines extend out of the display area and are electrically connected to the positive power voltage signal line junction. The positive power voltage signal line junction has a clearance space. The orthographic projection of the first area in the second direction falls within the clearance space.

[0009] The negative power supply voltage signal line convergence point is located within the clearance space, and multiple negative power supply voltage signal lines extend out of the display area and are electrically connected to the negative power supply voltage signal line convergence point.

[0010] In the display panel described above, preferably, the positive power supply voltage signal line confluence portion includes a first sub-portion and a second sub-portion. In the first direction, the second sub-portion is connected to opposite sides of the first sub-portion. The first sub-portion and the second sub-portion together form the clearance space. The first sub-portion is closer to the display area than the negative power supply voltage signal line confluence portion.

[0011] In the display panel described above, preferably, the first sub-part and the junction of the negative power supply voltage signal line are located on different conductive layers, and the negative power supply voltage signal line and the junction of the negative power supply voltage signal line are electrically connected through a wire-changing hole.

[0012] In a display panel as described above, preferably, the first sub-part is located in the anode layer.

[0013] In a display panel as described above, preferably, the positive power voltage signal line confluence portion includes two confluence segments separated along a first direction, the clearance space is formed between the two confluence segments, the positive power voltage signal line in the first region is connected to the positive power voltage signal line in the second region via a data connection line, and the positive power voltage signal line in the second region extends out of the display area and is electrically connected to the confluence segments.

[0014] In the display panel described above, preferably, the positive power supply voltage signal lines within the display area are connected in a mesh-like structure.

[0015] In the display panel described above, preferably, the positive power supply voltage signal line confluence portion includes a first sub-portion and a second sub-portion. In the first direction, the second sub-portion is connected to opposite sides of the first sub-portion. The first sub-portion and the second sub-portion together form the clearance space. The first sub-portion is further away from the display area than the negative power supply voltage signal line confluence portion.

[0016] In the display panel described above, preferably, multiple positive power supply voltage signal lines and multiple negative power supply voltage signal lines in the first area are arranged alternately.

[0017] In the display panel described above, preferably, the second area is provided with multiple first data signal lines, multiple second data signal lines, and multiple data connection lines, wherein:

[0018] Multiple first data signal lines are spaced apart along a first direction, and the first data signal lines extend along a second direction;

[0019] Multiple second data signal lines are farther away from the first region than the first data signal line, and the multiple second data signal lines are spaced apart along the first direction, and the second data signal lines extend along the second direction;

[0020] Multiple data connection lines are spaced apart along a second direction, and the data connection lines extend along a first direction. Each data connection line is electrically connected to a first data signal line and another first data signal line.

[0021] Secondly, the present invention provides a display device including the aforementioned display panel.

[0022] Compared with the prior art, the present invention, by placing the negative power supply voltage signal line junction within the clearance space of the positive power supply voltage signal line junction, can avoid large-area overlap between the negative power supply voltage signal line junction and the positive power supply voltage signal line junction, thereby improving the reliability of the display panel. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of a display panel provided by existing technology;

[0024] Figure 2 This is a schematic diagram of the structure of the display panel provided in Embodiment 1 of the present invention;

[0025] Figure 3 This is a schematic diagram of the cable replacement connection method provided in Embodiment 1 of the present invention;

[0026] Figure 4 This is a schematic diagram of the display panel in the hidden portion structure state provided in Embodiment 2 of the present invention;

[0027] Figure 5 This is a schematic diagram of the structure of the display panel provided in Embodiment 3 of the present invention;

[0028] Figure 6 This is a schematic diagram of the structure of the display device provided in an embodiment of the present invention.

[0029] Explanation of reference numerals in the attached figures:

[0030] 1- Positive power supply voltage signal line, 2- Negative power supply voltage signal line, 3- Positive power supply voltage signal line junction, 31- First sub-section, 32- Second sub-section, 33- Junctioning section, 34- Clearance space, 35- Protrusion, 4- Negative power supply voltage signal line junction, 5- First data signal line, 6- Second data signal line, 7- Data connection line, 8- Replacement hole;

[0031] 10-Display panel;

[0032] 100 - Display device;

[0033] A1 - Display area;

[0034] A2 - Non-display area;

[0035] D1 - First direction;

[0036] D2 - Second direction;

[0037] Q1 - First Region;

[0038] Q2 - Second Region. Detailed Implementation

[0039] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0040] To make the objectives, technical solutions, and advantages of this application clearer, the display panel 10 of this application will be further described in detail below through embodiments and in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this application and are not intended to limit this application.

[0041] The serial numbers assigned to components in this document, such as "first" and "second," are used solely to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages). It should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are used solely for the convenience of describing this application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0042] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower level than the second feature.

[0043] The display screen includes an AA area (active area, display area) and an NA area (non-display area, non-display area), as described in the background art, refer to Figure 1 As shown, in existing FIAA products (fanout in AA, fanout line located in the display area), multiple positive power supply voltage signal lines 1 and multiple negative power supply voltage signal lines 2 are located in the AA area, while the positive power supply voltage signal line junction 3 and the negative power supply voltage signal line junction 4 are located in the NA area. After the multiple positive power supply voltage signal lines 1 extend out of the AA area, they are electrically connected to the positive power supply voltage signal line junction 3, and after the multiple negative power supply voltage signal lines 2 extend out of the AA area, they are electrically connected to the negative power supply voltage signal line junction 4. The positive power supply voltage signal line junction 3 and the negative power supply voltage signal line junction 4 overlap over a large area, resulting in heat concentration, which easily burns the organic film layer and causes reliability failure.

[0044] The inventors discovered that the problem arises because the positive power supply voltage signal line junction 3 is a long straight line on the bottom edge and is connected to each column of pixels. The non-FIAA wiring area of ​​the FIAA product is located in the middle area of ​​the AA area. Therefore, the connected positive power supply voltage signal line junction 3 needs to span a large area across the positive power supply voltage signal line junction 3. Both the positive power supply voltage signal line junction 3 and the negative power supply voltage signal line junction 4 are high-current lines, which are prone to ESD breakdown. At the same time, high-current lines are prone to heat generation, which leads to heat concentration and can easily burn out the organic film layer, causing reliability failure.

[0045] Therefore, how to avoid large-area overlap between the positive power supply voltage signal line junction 3 and the negative power supply voltage signal line junction 4 has become a problem that urgently needs to be solved in the design and manufacturing process of the display panel 10.

[0046] Based on this, refer to Figures 2 to 6 As shown, embodiments of the present invention provide a display panel 10 and a display device 100, which aim to solve the above-mentioned technical problems. The following embodiments will specifically describe the display panel 10 and the display device 100 of the present invention.

[0047] Reference Figures 2 to 5 As shown, this embodiment of the invention provides a display panel 10, including a display area A1 (AA area) and a non-display area A2 (NA area). The display area A1 can be used to display patterns, and the non-display area A2 can be used to set auxiliary circuits or integrated circuits. In the embodiment provided by this invention, a first direction D1 and a second direction D2 extending perpendicularly are defined, wherein the first direction D1 is defined as... Figure 2 The horizontal extension direction shown defines the second direction D2 as... Figure 1 The vertical extension direction is shown.

[0048] Display area A1 includes a first area Q1 and a second area Q2. In the first direction D1, the second area Q2 is located on opposite sides of the first area Q1. The first area Q1 is located in the middle of the display panel 10, and the second area Q2 is located on the left and right sides of the first area Q1. The first area Q1 is a non-FIAA area, and the second area Q2 is a FIAA area. The data signal lines at the left and right corners of the second area Q2 are switched to the non-corner area and then connected vertically downward to the fan-out line.

[0049] The display panel 10 includes multiple positive power supply voltage signal lines 1, multiple negative power supply voltage signal lines 2, a positive power supply voltage signal line confluence section 3, and a negative power supply voltage signal line confluence section 4, wherein:

[0050] The positive power supply voltage signal line 1 is used to provide a positive voltage signal to the driving circuit of the display area A1 of the display panel 10. The positive voltage signal is a necessary condition for the normal operation of the driving circuit and is used to control the pixel brightness or other display functions of the display panel 10. Multiple positive power supply voltage signal lines 1 are located in the first region Q1 and the second region Q2 of the display area A1. The positive power supply voltage signal lines 1 extend along the second direction D2, and the multiple positive power supply voltage signal lines 1 are spaced apart along the first direction D1. By distributing the positive power supply voltage signal lines 1 in the two regions of the display area A1 and uniformly arranging them along the first direction D1 and the second direction D2, it can be ensured that the voltage signal can be evenly distributed to all parts of the display area A1, ensuring that the driving circuit of each region can obtain a stable voltage signal. This helps to reduce voltage signal attenuation or distortion, thereby improving the stability and consistency of the display effect.

[0051] The negative power supply voltage signal line 2 is used to provide a negative voltage signal to the driving circuit of the display area A1 of the display panel 10, controlling the pixel shutdown or other display functions of the display panel 10. Multiple negative power supply voltage signal lines 2 are located in the first region Q1 of the display area A1, extending along the second direction D2. These multiple negative power supply voltage signal lines 2 are spaced apart along the first direction D1. By distributing the negative power supply voltage signal lines 2 in the first region Q1 of the display area A1 and uniformly arranging them along the first direction D1 and the second direction D2, it can be ensured that the voltage signal can be evenly distributed to all parts of the display area A1, ensuring that the driving circuit of each region can obtain a stable voltage signal. This helps reduce voltage signal attenuation or distortion, thereby improving the stability and consistency of the display effect.

[0052] The positive power supply voltage signal line confluence section 3 is located in the non-display area A2. The positive power supply voltage signal line confluence section 3 mainly extends along the second direction D2. Multiple positive power supply voltage signal lines 1 extend out of the display area A1 and are electrically connected to the positive power supply voltage signal line confluence section 3 to form a centralized connection point. The positive power supply voltage signal line confluence section 3 summarizes multiple positive power supply voltage signal lines 1 in order to distribute and manage voltage signals more efficiently.

[0053] The positive power supply voltage signal line junction 3 has a clearance space 34 to avoid interference or conflict between signal lines. The orthogonal projection of the first region Q1 in the second direction D2 falls within the clearance space 34. The size of the first region Q1 in the first direction D1 is smaller than the size of the clearance space 34, so that the extension lines of all negative power supply voltage signal lines 2 fall within the clearance space 34.

[0054] The negative power supply voltage signal line junction 4 is located within the clearance space 34. Multiple negative power supply voltage signal lines 2 extend out of the display area A1 and are electrically connected to the negative power supply voltage signal line junction 4. In the thickness direction of the display panel 10 (i.e., the direction perpendicular to the plane of the display panel 10), the negative power supply voltage signal line junction 4 is offset from the positive power supply voltage signal line junction 3, and there is no overlap between the positive power supply voltage signal line junction 3 and the negative power supply voltage signal line junction 4. This effectively disperses heat, prevents heat from concentrating in the same area, reduces component aging or damage caused by heat concentration, and thus improves the reliability and service life of the display panel 10. At the same time, it also reduces signal interference caused by electromagnetic interference between the negative power supply voltage signal line junction 4 and the positive power supply voltage signal line junction 3, avoids damage to the integrity of signal transmission, and ensures the stability and integrity of signal transmission.

[0055] The structure and layout of the positive power supply voltage signal line junction 3 are described below through several embodiments. Those skilled in the art can make more modifications based on the following embodiments, all of which fall within the scope of the inventive concept of this invention.

[0056] Example 1

[0057] Referring to Figure 2, in this embodiment, the negative power supply voltage signal line confluence 4 is farther away from the display area A1 than the positive power supply voltage signal line confluence 3. The main body of the positive power supply voltage signal line confluence 3 extends mainly along the first direction D1. Multiple positive power supply voltage signal lines 1 can be directly electrically connected to the positive power supply voltage signal line confluence 3 without crossing the negative power supply voltage signal line confluence 4, thus avoiding large-area overlap. The clearance space 34 is located on the side of the main body of the positive power supply voltage signal line confluence 3 away from the display area A1. The negative power supply voltage signal line confluence 4 is located within the clearance space 34. After the negative power supply voltage signal line 2 is led out from the display area A1, it can be led to a different conductive layer than the positive power supply voltage signal line confluence 3 through the cable replacement hole 8, and then electrically connected to the negative power supply voltage signal line confluence 4. This reduces the spatial overlap between the negative power supply voltage signal line 2 and the positive power supply voltage signal line confluence 3, thereby avoiding heat concentration and electromagnetic interference.

[0058] Specifically, refer to Figure 2 As shown, the positive power supply voltage signal line confluence portion 3 includes a first sub-portion 31 and a second sub-portion 32. In the first direction D1, the second sub-portion 32 is connected to the opposite sides of the first sub-portion 31. The first sub-portion 31 and the second sub-portion 32 are preferably integrally formed. In one feasible embodiment, the projection of the positive power supply voltage signal line 1 in the first region Q1 onto the second direction D2 falls on the first sub-portion 31, and the projection of the positive power supply voltage signal line 1 in the second region Q2 onto the second direction D2 falls on the second sub-portion 32. The first sub-portion 31 and the second sub-portion 32 together constitute the main body of the positive power supply voltage signal line confluence portion 3, and the first sub-portion 31 and the second sub-portion 32 together form a clearance space 34.

[0059] Continue to refer to Figure 2As shown, the first sub-part 31 is a block-shaped trace extending along the first direction D1, and the second sub-part 32 includes a block-shaped trace extending along the first direction D1. The block-shaped trace design can provide greater current carrying capacity while reducing mutual interference between signal lines. The length of the second sub-part 32 in the second direction D2 is greater than the length of the first sub-part 31 in the second direction D2. The opposite ends of the first sub-part 31 are electrically connected to the two second sub-parts 32 respectively. One side edge of the first sub-part 31 is flush with one side edge of the second sub-part 32. One end of the positive power supply voltage signal line 1 extending out of the display area A1 is connected to this side edge of the first sub-part 31 and the second sub-part 32. The other side edge of the first sub-part 31 is closer to the display area A1 than the other side edge of the second sub-part 32, thereby forming a groove on the surface of the positive power supply voltage signal line confluence portion 3, thereby effectively utilizing the non-display area A2 of the display panel 10. The negative power supply voltage signal line junction 4 is housed in this groove. A protrusion 35 is provided on the second sub-part 32 along the second direction D2. The edge of the protrusion 35 is flush with the edge of the groove, thereby forming a clearance space 34. The flush edge ensures a regular clearance space 34. The distance between the two protrusions 35 is greater than the width of the first region Q1, ensuring that the negative power supply voltage signal line 2 has enough space for wiring.

[0060] The first sub-section 31 is closer to the display area A1 than the negative power supply voltage signal line junction 4. The first sub-section 31 and the negative power supply voltage signal line junction 4 are located on different conductive layers. The negative power supply voltage signal line 2 and the negative power supply voltage signal line junction 4 are electrically connected through the line exchange hole 8. This layered design avoids large-area overlap between the negative power supply voltage signal line junction 4 and the positive power supply voltage signal line junction 3, improving the reliability of the display panel 10. On the other hand, by patterning the same conductive layer, multiple lines can be manufactured simultaneously, thereby simplifying the manufacturing process, reducing process steps and the number of photomasks, and lowering production costs.

[0061] In one feasible implementation, the first sub-section 31 is located on the M3 metal layer, and the negative power supply voltage signal line junction 4 is located on the M5 metal layer. The negative power supply voltage signal line 2 is electrically connected to the negative power supply voltage signal line junction 4 through the cable exchange hole 8. Different metal layers are used for wiring of different functions in the display panel 10. By rationally allocating metal layers, optimizing signal transmission and space utilization, large-area overlap between the positive power supply voltage signal line junction 3 and the negative power supply voltage signal line 2 on the plane is effectively avoided. Isolation between different metal layers also helps to reduce electromagnetic interference, ensuring the stability and integrity of signal transmission, making the wiring of the display panel 10 more compact and efficient, and making full use of vertical space. At the same time, by patterning the same conductive layer, multiple lines can be manufactured simultaneously, reducing the process steps and the number of photomasks required in the manufacturing process, thereby reducing production costs.

[0062] The size of the transceiver hole 8 is slightly larger than the diameter of the signal line to ensure smooth and stable passage of the signal line. This reduces the contact area reduction caused by misalignment during signal line fabrication, which could affect signal transmission. The diameter of the transceiver hole 8 is 3-5µm. While meeting manufacturing process requirements, the diameter of the transceiver hole 8 is set to a smaller value (i.e., as small as possible within the 3-5µm range). This reduces light obstruction; a smaller transceiver hole 8 diameter means a smaller area of ​​light obstruction per hole. This reduces obstruction to the pixel's light-emitting area, improving the light transmittance of the display area.

[0063] Furthermore, using Ti-Al-Ti as the conductive material for the metal layer not only ensures the conductivity and stability of the circuit, but also improves the overall performance of the substrate through consistent material properties.

[0064] In another feasible implementation, the first sub-part 31 is located in the anode layer, while the second sub-part 32, the positive power supply voltage signal line 1, the negative power supply voltage signal line 2, and the negative power supply voltage signal line junction 4 are located in another conductive layer. The first sub-part 31 and the second sub-part 32 are electrically connected between different layers through the wire exchange hole 8. The anode layer is usually made of a transparent conductive material (such as ITO, indium tin oxide), which has good conductivity. Placing the first sub-part 31 in the anode layer can utilize the conductivity of the anode layer to ensure the efficient transmission of the positive power supply voltage signal line 1. At the same time, the transparency of the anode layer ensures the normal transmission of light, thereby improving the display effect of the display panel 10. Since the anode layer is usually formed earlier in the manufacturing process of the display panel 10, placing the first sub-part 31 in the anode layer can simplify the subsequent manufacturing process and reduce complex wiring steps.

[0065] In another feasible embodiment, the first sub-part 31, the negative power supply voltage signal line 2, and the negative power supply voltage signal line junction 4 may all be located on the same conductive layer, while the data connection line 7 is located on another conductive layer. The negative power supply voltage signal line 2 and the negative power supply voltage signal line junction 4 may each be provided with a wire-changing hole 8, and the data connection line 7 connects the two wire-changing holes, thereby electrically connecting the negative power supply voltage signal line 2 and the negative power supply voltage signal line junction 4 through the data connection line 7 and the wire-changing hole 8.

[0066] In the last feasible implementation, the first sub-part 31 and the second sub-part 32 may be located in the same conductive layer, while the positive power supply voltage signal line 1, the negative power supply voltage signal line 2, and the negative power supply voltage signal line junction 4 may be located in another conductive layer. The negative power supply voltage signal line 2 and the negative power supply voltage signal line junction 4 may be directly electrically connected. The positive power supply voltage signal line 1 may be electrically connected to the first sub-part 31 and the second sub-part 32 through the data connection line 7 and the line replacement hole 8.

[0067] In this embodiment, multiple positive power supply voltage signal lines 1 and multiple negative power supply voltage signal lines 2 are arranged alternately within the first region Q1, meaning that a positive power supply voltage signal line 1 is immediately adjacent to a negative power supply voltage signal line 2, and so on. This wiring method allows the two types of signal lines to be spatially separated while remaining closely adjacent. When transmitting signals, the positive power supply voltage signal line 1 and the negative power supply voltage signal line 2 are independent of each other and do not interfere with each other, but are physically adjacent, facilitating signal integration and management.

[0068] The staggered arrangement effectively reduces electromagnetic interference between the positive power supply voltage signal line 1 and the negative power supply voltage signal line 2. Because the two signal lines are arranged alternately and are relatively close together, this close arrangement utilizes the mutual cancellation effect of electromagnetic fields to reduce electromagnetic interference during signal transmission, thereby reducing signal distortion and noise generation. Simultaneously, it allows for better utilization of the space within the display panel 10, making the signal line layout more compact and accommodating more signal lines within a limited space, thus improving the space utilization rate of the display area A1.

[0069] In this embodiment, the first region Q1 is a non-FIAA region, and the second region Q2 is a FIAA region. The second region Q2 contains multiple first data signal lines 5, multiple second data signal lines 6, and multiple data connection lines 7, wherein:

[0070] Multiple first data signal lines 5 are spaced apart along a first direction D1 and extend along a second direction D2. Multiple second data signal lines 6 are located further away from the first data signal lines 5 than the first data signal lines 5 in the first region Q1. These multiple second data signal lines 6 are spaced apart along the first direction D1 and extend along the second direction D2. Multiple data connection lines 7 are spaced apart along the second direction D2 and extend along the first direction D1. Each data connection line 7 is electrically connected to one first data signal line 5 and another first data signal line 5.

[0071] The first data signal line 5 is then led out to the driver chip via a fan-out line. The fan-out line receives the data signal output by the driver chip, and the data signal is then transmitted to the corresponding first data signal line 5 via the first data signal line 5.

[0072] Both the first data signal line 5 and the corresponding second data signal line 6 are provided with switching holes 8. Switching holes 8 are the connection points between the data connection line 7 and the first data signal line 5 and the second data signal line 6. The first data signal line 5 and the second data signal line 6 are located on the same conductive layer, while the data connection line 7 is located on a different conductive layer. The two ends of the data connection line 7 are respectively connected to these two switching holes 8, connecting the points on the first data signal line 5 to the corresponding points on the second data signal line 6. This ensures the accuracy and efficiency of signal transmission, avoids signal loss or interference during transmission, and improves the stability and reliability of signal transmission.

[0073] Example 2

[0074] Reference Figure 4 As shown, in this embodiment, the positive power supply voltage signal line confluence section 3 includes two confluence segments 33 separated along the first direction D1. The coverage area of ​​each confluence segment 33 is adapted to the range of the corresponding second region Q2. In the first direction D1, the width of the confluence segment 33 is slightly larger than the width of the second region Q2, thereby providing sufficient space so that all positive power supply voltage signal lines 1 in the second region Q2 can be smoothly connected to the confluence segment 33, realizing centralized management and efficient transmission of signals. At the same time, it avoids mutual interference between signal lines and ensures the quality of signal transmission.

[0075] The structures and sizes of the two merging units 33 can be the same or different, and can be adjusted according to actual needs. There are no restrictions here, in order to optimize the performance and layout of the display panel 10. For example, if the size or shape of the second region Q2 is different, the size and structure of the merging unit 33 can be adjusted accordingly to ensure the efficiency and stability of signal transmission.

[0076] The clearance space 34 is formed between the two converging parts 33, which cleverly utilizes the structural features of the positive power supply voltage signal line converging part 3 to provide space for the negative power supply voltage signal line converging part 4. The shape of the clearance space 34 is adapted to the shape of the negative power supply voltage signal line converging part 4, and the size of the clearance space 34 is slightly larger than the size of the negative power supply voltage signal line converging part 4, so as to make full use of the space of the non-display area A2 and make the overall layout more compact.

[0077] Reference Figure 4 As shown, the negative power supply voltage signal line junction 4 has a T-shaped structure to better integrate the negative power supply voltage signal lines 2, improving signal transmission efficiency and stability. The T-shaped junction provides multiple connection points, facilitating the connection and integration of multiple negative power supply voltage signal lines 2. The clearance space 34 also has a slightly larger T-shaped structure. This not only ensures that the negative power supply voltage signal line junction 4 can be perfectly placed within the clearance space 34, but also avoids wasted space and improves the space utilization of the non-display area A2.

[0078] The positive power supply voltage signal line 1 in the first region Q1 is connected to the positive power supply voltage signal line 1 in the second region Q2 via the data connection line 7. Both the positive power supply voltage signal line 1 in the first region Q1 and the corresponding positive power supply voltage signal line 1 in the second region Q2 are provided with a switching hole 8. The switching hole 8 is the connection point between the data connection line 7 and the positive power supply voltage signal line 1. The data connection line 7 and the positive power supply voltage signal line 1 are located on different conductive layers. The two ends of the data connection line 7 are respectively connected to these two switching holes 8, connecting the positive power supply voltage signal line 1 in the first region Q1 to the corresponding positive power supply voltage signal line 1 in the second region Q2. This ensures the accuracy and efficiency of signal transmission and avoids signal loss or interference during transmission, improving the stability and reliability of signal transmission. The positive power supply voltage signal line 1 in the second region Q2 extends out of the display area A1 and is electrically connected to the merging unit 33, forming a complete power supply voltage transmission path.

[0079] The positive power supply voltage signal line 1 in the first region Q1 no longer extends out of the display area A1. Instead, it is electrically connected to the corresponding positive power supply voltage signal line 1 in the second region Q2 to ensure signal continuity. This makes the signal transmission path more compact, reduces the exposed length of the positive power supply voltage signal line 1 in the non-display area A2, and reduces the electrostatic induction area of ​​the positive power supply voltage signal line 1 in the external environment, thereby reducing the risk of ESD breakdown caused by electrostatic accumulation.

[0080] The negative power supply voltage signal line junction 4 in the clearance space 34 does not overlap with the positive power supply voltage signal line 1 and the positive power supply voltage signal line junction 3, avoiding direct contact or close parallel arrangement between the signal lines, thereby reducing the high voltage difference caused by electrostatic induction, reducing the risk of ESD breakdown, and improving the reliability of the display panel 10.

[0081] In one feasible implementation, the positive power supply voltage signal lines 1 within the display area A1 are arranged in a mesh-like structure. The negative power supply voltage signal lines 2 may be located on different conductive layers from the positive power supply voltage signal lines 1, while the data connection lines 7 may be located on the same conductive layer as the positive power supply voltage signal lines 1. The positive power supply voltage signal lines 1 are interconnected through multiple connection points, forming an interwoven network. The mesh-like structure may include horizontal data connection lines 7 and vertical positive power supply voltage signal lines 1, which are connected at intersections to form a two-dimensional network. Signals can be transmitted through multiple paths, rather than a single linear path.

[0082] The positive power supply voltage signal line 1 located in the first region Q1 is connected to the positive power supply voltage signal line 1 in the second region Q2 via a mesh connection structure. This mesh connection structure provides multiple signal transmission paths, reducing signal delay and loss during transmission. This multi-path transmission method ensures fast and stable signal transmission within the display area A1, thereby improving the display quality of the display panel 10. The mesh connection structure also provides redundant signal paths; even if some connection points or the positive power supply voltage signal line 1 fails, the signal can still be transmitted through other paths, thus improving system reliability.

[0083] Example 3

[0084] In this embodiment, refer to Figure 5 As shown, the positive power supply voltage signal line junction 3 includes a first sub-part 31 and a second sub-part 32. In the first direction D1, the second sub-part 32 is connected to the opposite sides of the first sub-part 31. The first sub-part 31 and the second sub-part 32 are preferably integrally formed. Unlike the first embodiment, in this embodiment, the first sub-part 31 is connected between two protrusions 35, so that the clearance space 34 is closer to the display area A1 than the first sub-part 31. The clearance space 34 forms an opening on the side closer to the display area A1.

[0085] The negative power supply voltage signal line junction 4 is located within the clearance space 34. The negative power supply voltage signal line 2 in the first region Q1 is directly connected to the negative power supply voltage signal line junction 4. The positive power supply voltage signal line 1 in the second region Q2 is directly connected to the second sub-part 32. The positive power supply voltage signal line 1 in the first region Q1 is connected to the first sub-part 31 through the data connection line 7 and the cable replacement hole 8. The positive power supply voltage signal line 1, the negative power supply voltage signal line junction 4, and the first sub-part 31 are all located on the same conductive layer. The data connection line 7 is located on another conductive layer. The positive power supply voltage signal line 1 does not extend to the negative power supply voltage signal line junction 4. Cable replacement holes 8 are provided on both the positive power supply voltage signal line 1 and the first sub-part 31. The data connection line 7 is connected to the corresponding cable replacement hole 8, thereby realizing the electrical connection between the positive power supply voltage signal line 1 in the first region Q1 and the first sub-part 31.

[0086] Based on the display panel 10 provided in the above embodiments, the present invention also provides a display device 100, including the display panel 10 as described above. The display panel 100 avoids large-area overlap between the negative power supply voltage signal line junction 4 and the positive power supply voltage signal line junction 3 by placing the negative power supply voltage signal line junction 4 within the clearance space 34 of the positive power supply voltage signal line junction 3, thereby improving the reliability of the display device 100.

[0087] The display device 100 can be Figure 6 The mobile phone shown can also be a computer, television, smart wearable display device 100, etc., and the embodiments of the present invention do not make any special limitations on this.

[0088] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0089] The above embodiments merely illustrate several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of this patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A display panel, comprising a display area and a non-display area, the display area comprising a first region and a second region, wherein, in a first direction, the second region is located on opposite sides of the first region, characterized in that, include: Multiple positive power supply voltage signal lines are located in the first and second areas of the display area. The positive power supply voltage signal lines extend along the second direction, and the multiple positive power supply voltage signal lines are spaced apart along the first direction. Multiple negative power supply voltage signal lines are located in the first area of ​​the display area. The negative power supply voltage signal lines extend along a second direction, and the multiple negative power supply voltage signal lines are spaced apart along a first direction. A positive power voltage signal line junction is located in the non-display area. Multiple positive power voltage signal lines extend out of the display area and are electrically connected to the positive power voltage signal line junction. The positive power voltage signal line junction has a clearance space. The orthographic projection of the first area in the second direction falls within the clearance space. The negative power supply voltage signal line convergence point is located within the clearance space, and multiple negative power supply voltage signal lines extend out of the display area and are electrically connected to the negative power supply voltage signal line convergence point.

2. The display panel according to claim 1, characterized in that, The positive power voltage signal line confluence includes a first sub-section and a second sub-section. In the first direction, the second sub-section is connected to the opposite sides of the first sub-section. The first sub-section and the second sub-section together form the clearance space. The first sub-section is closer to the display area than the negative power voltage signal line confluence.

3. The display panel according to claim 2, characterized in that, The first sub-section and the junction of the negative power supply voltage signal line are located on different conductive layers, and the negative power supply voltage signal line and the junction of the negative power supply voltage signal line are electrically connected through a wire-changing hole.

4. The display panel according to claim 2, characterized in that, The first sub-section is located in the anode layer.

5. The display panel according to claim 1, characterized in that, The positive power voltage signal line confluence includes two confluence segments separated along a first direction. The clearance space is formed between the two confluence segments. The positive power voltage signal line in the first region is connected to the positive power voltage signal line in the second region via a data connection line. The positive power voltage signal line in the second region extends out of the display area and is electrically connected to the confluence segments.

6. The display panel according to claim 5, characterized in that, The positive power supply voltage signal lines within the display area are connected in a mesh-like structure.

7. The display panel according to claim 1, characterized in that, The positive power voltage signal line confluence includes a first sub-section and a second sub-section. In the first direction, the second sub-section is connected to the opposite sides of the first sub-section. The first sub-section and the second sub-section together form the clearance space. The first sub-section is further away from the display area than the negative power voltage signal line confluence.

8. The display panel according to claim 1, characterized in that, In the first region, multiple positive power supply voltage signal lines and multiple negative power supply voltage signal lines are arranged alternately.

9. The display panel according to claim 1, characterized in that, The second area is provided with multiple first data signal lines, multiple second data signal lines, and multiple data connection lines, wherein: Multiple second data signal lines are spaced apart along a first direction, and the first data signal lines extend along a second direction; Multiple first data signal lines are farther away from the first region than the first data signal lines, and multiple second data signal lines are spaced apart along the first direction, and the second data signal lines extend along the second direction; Multiple data connection lines are spaced apart along a second direction, and the data connection lines extend along a first direction. Each data connection line is electrically connected to a first data signal line and another first data signal line.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-9.

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