Mode switching control circuit and display device

Abstract

The present disclosure relates to a mode switching control circuit and a display device. The mode switching control circuit comprises a mode control unit, a mode switching unit and a timing control unit; wherein the mode control unit is configured to output at least one mode switching signal; the mode switching unit stores mode configuration data of a display module in at least one preset working mode, and is in communication connection with the mode control unit and the timing control unit; the timing control unit is in communication connection with the display module, and is configured to acquire the mode configuration data stored in the mode switching unit, and provide corresponding driving control parameters for the display module according to the mode configuration data, so as to switch the display module to the preset working mode corresponding to the mode configuration data.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, specifically to a mode switching control circuit and a display device. Background Technology

[0002] With the rapid development of display technology, display modules have been widely used in various electronic devices such as laptops, tablets, and smartphones. Users have increasingly diverse performance requirements for display modules, not only focusing on the display quality but also placing higher demands on power consumption, touch experience, and adaptability in specific scenarios.

[0003] In the current market landscape, display modules are often positioned in a sharply polarized manner. On one hand, to meet the stringent requirements of long battery life in business office scenarios, business laptops typically feature low-power display panels. While these panels excel in energy efficiency, their refresh rates and resolutions are generally set at levels suitable for everyday office work, making it difficult to handle the smooth display needs of high-dynamic-range visuals. On the other hand, gaming laptops designed for gamers are equipped with high-performance displays that support high refresh rates (such as 144Hz and above) and high resolutions to ensure extremely smooth and detailed game visuals. However, this high performance often comes with high power consumption, leading to a significant decrease in battery life and failing to meet the mobile office needs of business professionals.

[0004] For some business professionals, in addition to focusing on efficient office work, there is also a need for leisure and entertainment or light gaming. However, the low refresh rates of the low-power displays in business laptops lead to screen tearing or ghosting when running games or watching high frame rate videos, making it difficult to provide an ideal user experience. Conversely, if users choose gaming laptops equipped with high-performance displays for business work, they will frequently face battery anxiety, and the high cost of high-performance display modules also increases the user's purchasing burden. Therefore, how to achieve a perfect integration of low-power office work and high-performance entertainment on a single display module has become a pressing technical challenge. Summary of the Invention

[0005] This disclosure aims to solve at least one of the technical problems existing in the prior art, and proposes a mode switching control circuit and display device.

[0006] To achieve the above objectives, this disclosure provides a mode switching control circuit, which includes: a mode control unit, a mode switching unit, and a timing control unit;

[0007] The mode control unit is configured to output at least one mode switching signal;

[0008] The mode switching unit stores mode configuration data of the display module in at least one preset working mode, and the mode switching unit is communicatively connected to the mode control unit and is configured to communicate with the timing control unit in response to the mode switching signal.

[0009] The timing control unit is communicatively connected to the display module, and the timing control unit is configured to acquire the mode configuration data stored in the mode switching unit, and provide corresponding drive control parameters to the display module according to the mode configuration data, so that the display module switches to a preset working mode corresponding to the mode configuration data.

[0010] In some embodiments, the mode switching signal is multiple;

[0011] The mode switching unit includes:

[0012] Multiple configuration storage sub-units are configured to store mode configuration data of the display module in a preset working mode;

[0013] A mode switching subunit is configured to communicate with the different configuration storage subunits in response to different mode switching signals.

[0014] The timing control unit is configured to acquire the mode configuration data stored in the configuration storage subunit.

[0015] In some embodiments, the mode control unit is further configured to output a plurality of mode control signals, wherein the mode control signals are configured to correspond to the mode switching signals;

[0016] The timing control unit is communicatively connected to the mode control unit, and before acquiring the mode configuration data stored in the configuration storage subunit, the timing control unit is also configured to perform a reset operation to clear the internal cache in response to the mode control signal.

[0017] In some embodiments, the mode control signal and the corresponding mode switching signal are the same signal.

[0018] In some embodiments, the plurality of mode switching signals include a first mode switching signal and a second mode switching signal;

[0019] The plurality of configuration storage sub-units include a first configuration storage sub-unit and a second configuration storage sub-unit, wherein the first configuration storage sub-unit and the second configuration storage sub-unit respectively store mode configuration data of the display module under different preset working modes;

[0020] The mode switching subunit is configured to, in response to the first mode switching signal, communicatively connect the first configuration storage subunit to the timing control unit; and in response to the second mode switching signal, communicatively connect the second configuration storage subunit to the timing control unit.

[0021] The timing control unit is configured to, in response to the first mode switching signal, perform a reset operation to clear the internal cache and obtain the mode configuration data stored in the first configuration storage subunit; and in response to the second mode switching signal, perform a reset operation to clear the internal cache and obtain the mode configuration data stored in the second configuration storage subunit.

[0022] In some embodiments, one of the first mode switching signal and the second mode switching signal is a high-level signal, and the other of the first mode switching signal and the second mode switching signal is a low-level signal.

[0023] In some embodiments, the mode control unit includes a microcontroller unit.

[0024] In some embodiments, the microcontroller unit is also communicatively connected to a system-on-a-chip;

[0025] The system-on-chip is configured to output mode switching instructions;

[0026] The microcontroller unit is configured to output a mode switching signal in response to the mode switching command.

[0027] In some embodiments, the system-on-a-chip is configured to output one of a plurality of different mode switching instructions;

[0028] The microcontroller unit is configured to output different mode switching signals in response to different mode switching commands.

[0029] In some embodiments, the mode control unit includes a system-on-a-chip.

[0030] In some embodiments, the system-on-a-chip is electrically connected to the timing control unit and the mode switching unit respectively via a display connector;

[0031] The display connector is configured to transmit the mode switching signal.

[0032] In some embodiments, the display connector includes control pins, and the system-on-a-chip is electrically connected to the timing control unit and the mode switching unit respectively through the control pins of the display connector. The control pins are used to transmit mode switching signals.

[0033] In some embodiments, the mode switching signal is one;

[0034] The mode switching unit includes:

[0035] At least one configuration storage subunit is configured to store mode configuration data of the display module in a preset working mode;

[0036] A mode switching subunit is configured to, in response to the mode switching signal, communicatively connect one of the configuration storage subunits to the timing control unit;

[0037] The timing control unit is configured to acquire the mode configuration data stored in the configuration storage subunit.

[0038] In some embodiments, the mode control unit includes a system-on-a-chip;

[0039] The system-on-a-chip is electrically connected to the mode switching unit via a display connector;

[0040] The display connector includes multiple touch pins for transmitting touch signals;

[0041] The system-on-a-chip is electrically connected to the configuration storage sub-unit via at least one touch pin of the display connector;

[0042] The mode switching subunit is further configured to acquire the level signal of the touch pin and use the level signal of the touch pin as the mode switching signal.

[0043] In some embodiments, there are multiple configuration storage sub-units, and the multiple configuration storage sub-units include a first configuration storage sub-unit and a second configuration storage sub-unit, wherein the first configuration storage sub-unit and the second configuration storage sub-unit respectively store mode configuration data of the display module under different preset working modes;

[0044] The level signal of the touch pin is one of a first level signal and a second level signal, and the first level signal and the second level signal are different;

[0045] The mode switching subunit is configured to, in response to a first level signal of the touch pin, communicate with the first configuration storage subunit and the timing control unit; the timing control unit is configured to acquire the mode configuration data stored in the first configuration storage subunit.

[0046] Alternatively, the mode switching subunit is configured to, in response to a second level signal of the touch pin, communicatively connect the second configuration storage subunit to the timing control unit; the timing control unit is configured to acquire the mode configuration data stored in the second configuration storage subunit.

[0047] In some embodiments, the mode configuration data of the display module in a preset working mode includes: an association configuration for indicating the display refresh rate and the touch input type, and underlying execution parameters for implementing the association configuration; the underlying execution parameters include at least one of timing control parameters, driving voltage parameters, image data processing parameters, and touch coordination parameters.

[0048] In some embodiments, the mode switching subunit includes an electronic switch having normally open contacts and normally closed contacts;

[0049] The enable pin of the electronic switch is electrically connected to the mode control unit;

[0050] When the mode control unit outputs a first mode control signal to the enable pin, the normally open contact is turned on so that the timing control unit is electrically connected to the first configuration storage subunit.

[0051] When the mode control unit outputs a second mode control signal to the enable pin, the normally closed contact is turned on, so that the timing control unit is electrically connected to the second configuration storage subunit.

[0052] In some embodiments, the timing control unit and the configuration storage subunit are connected via a communication bus, which includes a serial communication bus, such as an I2C bus or an SPI bus.

[0053] In some embodiments, the timing control unit is configured to power off and restart in response to the mode switching signal, and to acquire the mode configuration data corresponding to the mode switching signal after restarting.

[0054] This disclosure also provides a display device, including:

[0055] Display module;

[0056] The mode switching control circuit as described in any one of the above statements is communicatively connected to the display module. Attached Figure Description

[0057] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings:

[0058] Figure 1 These are schematic diagrams of the circuit framework of the display device in some embodiments.

[0059] Figure 2 These are timing diagrams of the operating modes of the display device in some embodiments.

[0060] Figure 3 This is a schematic diagram of the composition and structure of the mode switching control circuit in some embodiments of this disclosure.

[0061] Figure 4 This is a schematic diagram of the composition of the mode switching control circuit in some other embodiments of this disclosure.

[0062] Figure 5 This is a schematic diagram of the composition of the mode switching control circuit in some other embodiments of this disclosure.

[0063] Figure 6 This is a schematic diagram of the composition structure of the mode switching unit in some embodiments of this disclosure.

[0064] Figure 7 This is a timing diagram of some embodiments of the present disclosure when the power supply is not interrupted.

[0065] Figure 8 This is a timing diagram of the power supply restarting in some other embodiments of this disclosure.

[0066] Figure 9 This is a timing diagram of the power supply restarting in some embodiments of this disclosure.

[0067] Figure 10 This is a timing diagram of the power supply when it fails in some other embodiments of this disclosure.

[0068] Figure 11 This is a schematic diagram showing the composition of the connector in some embodiments of this disclosure.

[0069] Figure 12 This is a schematic diagram showing the composition of the connector in some other embodiments of this disclosure.

[0070] Figure 13 This is a timing diagram of the display module in some embodiments of this disclosure.

[0071] Figure 14 This is a touch timing diagram of the display module in some embodiments of this disclosure.

[0072] Figure 15 This is a timing diagram of the operating modes of the display device in some embodiments of this disclosure. Detailed Implementation

[0073] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.

[0074] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0075] Unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0076] As used herein, “parallel” and “perpendicular” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°.

[0077] This document describes exemplary embodiments with reference to sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Therefore, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0078] In related technologies, in order to enable the switching of display modules in different application scenarios, some solutions attempt to adopt multi-timing switching technology.

[0079] However, supporting multiple timing switching typically requires the use of higher-specification and more complex timing control units (Tcon). These high-specification Tcon not only significantly increase the hardware cost of the display module, but may also affect the overall yield and competitiveness of the product due to the increased circuit complexity.

[0080] In addition, this multi-time-sequence switching scheme often has difficulty in flexibly adapting the coordination between touch functions (such as finger touch or active stylus) and display refresh rate, resulting in problems such as touch failure or display abnormality during mode switching.

[0081] Figure 1 These are schematic diagrams of the circuit framework of the display device in some embodiments. Optionally, Figure 1 A schematic diagram of the circuit framework of an in-cell touch display device is shown.

[0082] like Figure 1 As shown, the display device includes a display module 50, a system-on-chip (SOC), an eDP connector 20, a microcontroller unit (MCU), a timing control unit 40 (Tcon), a touch module IC (TMIC), a memory unit 80, and a level shifter (LS). The display module 50 includes a source driver IC (SRIC) 51 and a display panel 52.

[0083] During normal operation of the embedded display device, the timing control unit 40 reads the display code from the storage unit 80 via the I2C (or IIC) bus and loads the preset display program configuration according to the display code. These codes contain key information such as the screen's timing parameters and voltage configuration. After loading these configurations, the timing control unit 40 begins to drive the display panel 52 to display the image according to the predetermined timing.

[0084] Optionally, the storage unit 80 includes at least one of electrically erasable programmable read-only memory (EEPROM) and flash memory.

[0085] Optionally, in one example, both types of memory are integrated into storage unit 80 and configured to provide display code to timing control unit 40. The electrically erasable programmable read-only memory (EEPROM) is used to store small amounts of data that need to be frequently read or occasionally updated, such as initialization parameters, gamma correction tables, and timing configurations of the timing control unit 40. Its advantage lies in its byte-level operation, making it suitable for storing fine-grained configuration information. Flash memory is used to store larger firmware programs, multiple display mode configurations, or user-defined settings.

[0086] Meanwhile, the microcontroller unit 30 independently stores and loads the touch firmware (FW), and its operating timing is controlled by the touch synchronization signal (Tsync, Touch-Sync) output by the timing control unit 40:

[0087] When the touch synchronization signal is high, the display panel 52 displays information. At this time, the microcontroller unit 30 stops touch scanning, and the display panel 52 refreshes the screen at full capacity.

[0088] When the touch synchronization signal goes low, the microcontroller unit 30 immediately switches to the touch scanning stage. Furthermore, the source driver chip 51, through the coordinated control of the timing control unit 40 and the microcontroller unit 30, achieves time-division multiplexing of display signals and touch signals.

[0089] The level conversion chip 70 is used for voltage conversion between the timing control unit 40 and the source driver chip 51. For example, the timing control unit 40 outputs a low-voltage signal, while the source driver chip 51 requires a high-voltage signal. The core function of the level conversion chip 70 is to "boost" the low-voltage data signal from the timing control unit 40 to the level required by the source driver chip 51. The source driver chip 51 receives the level signal after level conversion from the level conversion chip 70 and generates precise data signals for each column of data lines. These data signals are applied to the sub-pixels of the display panel 52 to achieve display.

[0090] The touch driver chip 60 receives touch scanning commands from the microcontroller unit 30 and converts them into physical electrical signals to drive the touch electrodes inside the display panel 52 to perform scanning. For example, in one example, the microcontroller unit 30 sends touch commands to the touch driver chip 60 during the touch phase according to the touch synchronization signal. After receiving the touch command, the touch driver chip 60 drives the touch electrodes inside the display panel 52 to perform capacitive scanning, detecting capacitance changes caused by a finger or stylus. After scanning is complete, the touch driver chip 60 sends the capacitance data back to the microcontroller unit 30, which performs filtering, coordinate calculation, and gesture recognition.

[0091] Figure 2 These are timing diagrams of the operating modes of the display device in some embodiments.

[0092] like Figure 2 As shown, in the driving timing of the display panel 52, the blanking period and the active display period are the two most crucial time periods that constitute a complete frame. The active display period is the time period during which the display panel 52 is displaying a frame. The blanking period is a non-display time period or a rest period outside the active display period, such as the rest time between two frames or after each line of scanning ends.

[0093] For example, the embedded touch display module 50 can support two working modes: LH Mode (Long H-blank) and LV Mode (Long V-blank).

[0094] Figure 2 The diagram shows the process timing diagram for implementing two different working modes in the same display module 50 through time-division multiplexing (TDM) of touch and display.

[0095] Optionally, LH Mode may support finger-only touch and not active pen. In finger-only mode, the touch refresh rate is correlated (tied) with the display refresh rate. Finger-only mode is suitable for everyday finger swipes and clicks, as well as light gaming (such as 144Hz high refresh rate games). Because of timing binding, users can reduce the touch scanning frequency by lowering the display refresh rate (such as 72Hz), thereby achieving low power consumption while maintaining a good touch experience.

[0096] LV Mode supports active pen writing and is also compatible with finger touch. In active pen touch mode, the touch refresh rate and the display refresh rate are independent (decoupled). Active pen touch mode is suitable for scenarios requiring high-frequency sampling, such as professional drawing and fine writing. In addition, due to the independent timing, regardless of whether the display refresh rate is 60Hz or 120Hz, active pen touch mode can maintain a stable high-frequency reporting rate (such as 240Hz), and will not cause pen disconnection or delay due to high refresh rate displays.

[0097] In finger touch mode, the touch synchronization signal period output by the timing control unit 40 is strictly synchronized with the current display refresh rate. For example, when the display is at 144Hz, the touch synchronization signal will switch between high level Tsync_H and low level Tsync_L at a frequency of 144Hz. If the display refresh rate is switched to 72Hz, the touch synchronization frequency will be halved.

[0098] A high-level Tsync_H signal indicates that the touch synchronization signal is high. During this stage, the timing control unit 40 will fully direct the source driver chip 51 to write video image data to the display panel 52 to display the image. Optionally, at this time, the microcontroller unit 30 and the touch driver chip 60 are in a "silent" or "standby" state and do not perform touch scanning. This is because if touch scanning were performed at this time, the high-voltage electrical signal driving the display would generate significant noise, potentially causing the touch data to become completely invalid.

[0099] A low-level Tsync_L indicates that the touch synchronization signal is low. During this stage, the display panel 52 pauses refreshing video image data. Optionally, this stage can utilize the vertical blanking period between two frames. After the microcontroller unit 30 detects that the touch synchronization signal has become low, it will immediately "wake up" and instruct the touch driver chip 60 to send scanning signals to the touch electrodes in the display panel 52 to detect changes in capacitance of the finger or stylus, thereby calculating the touch coordinates.

[0100] In active pen touch mode, the timing of the touch synchronization signal output by the timing control unit 40 is independently configured and is no longer limited by the display refresh rate. For example, even if the timing control unit 40 is outputting the screen at a high refresh rate of 120Hz, the touch synchronization signal can still be inserted into a sufficiently long and dense touch time window to meet the high-frequency scanning requirements of active pen touch mode.

[0101] The proportion of time occupied by touch scanning in a single display frame determines the display refresh rate of the display panel 52.

[0102] Table 1

[0103]

[0104] As shown in Table 1, in Display Only mode, when the display panel 52 does not perform any touch scanning and the touch period is 0, the timing control unit 40 and the source driver chip 51 use all physical time to refresh the screen. At this time, the display refresh rate of the display panel 52 can reach 144Hz.

[0105] When the touch scan time accounts for 15%, meaning that 15% of each frame display cycle is used for touch scanning and the remaining 85% is used for displaying the image, the display panel 52 can maintain a high refresh rate of 120Hz. In this case, the display panel 52 can balance a smooth touch experience and gaming performance, making it suitable for working modes with shorter touch scan times, such as finger touch modes.

[0106] When the touch scan time accounts for 50%, meaning that 50% of each frame display cycle is dedicated to touch scanning and 50% to displaying the image, the display panel's refresh rate is reduced to 72Hz. This is suitable for users who don't need high refresh rates for gaming and only need to scroll casually, allowing more time to be allocated to touch scanning. Simultaneously, the reduced refresh rate to 72Hz significantly reduces screen power consumption, meeting the long battery life requirements of business office work.

[0107] As can be seen from the above, due to time-division multiplexing, the touch driving timing part will occupy the display timing, resulting in the timing control unit 40 with the same performance operating as a pure display panel 52 and a display panel 52 with touch function, the maximum refresh rate of the display panel 52 with touch function will be lower than that of the pure display panel 52.

[0108] Therefore, the display module 50 struggles to balance low-power business office work and high-performance entertainment experience at a low cost, and lacks a flexible and efficient mode switching mechanism to meet the diverse needs of different user scenarios.

[0109] In order to meet the diverse needs of users, such as high refresh rate gaming, low power consumption office work, and active pen writing, under limited hardware performance, there is an urgent need for a mode control scheme that can dynamically adjust the touch time ratio and flexibly switch the display refresh rate.

[0110] In order to at least alleviate or solve one of the aforementioned technical problems, this disclosure provides a mode switching control circuit and a display device.

[0111] Figure 3 This is a schematic diagram of the composition and structure of the mode switching control circuit in some embodiments of this disclosure. Figure 4 This is a schematic diagram of the composition of the mode switching control circuit in some other embodiments of this disclosure. Figure 5 This is a schematic diagram of the composition of the mode switching control circuit in some other embodiments of this disclosure.

[0112] like Figure 3 , Figure 4 and Figure 5 As shown, the present disclosure provides a mode switching control circuit, including: a mode control unit 100, a mode switching unit 90, and a timing control unit 40.

[0113] The mode control unit 100 is configured to output at least one mode switching signal.

[0114] The mode switching unit 90 stores mode configuration data of the display module 50 in at least one preset working mode.

[0115] It is understood that the preset working mode can be, for example, a pure display mode, a finger touch mode, an active pen touch mode, etc. Of course, it can also be other custom working modes, which can be set according to actual needs by those skilled in the art.

[0116] Accordingly, the mode configuration data includes the necessary parameter settings required to implement one of the preset operating modes. For example, in some embodiments, the mode configuration data of the display module 50 in a preset operating mode includes: an association configuration for indicating the display refresh rate and the touch input type, and underlying execution parameters for implementing the association configuration. The underlying execution parameters include at least one of timing control parameters, driving voltage parameters, image data processing parameters, and touch coordination parameters.

[0117] In one example, the configuration used to indicate the association between the display refresh rate and the touch input type may include, for example, the refresh rate setting, the touch mode type (e.g., finger touch or active pen touch), and the association between touch and display (e.g., whether the timing is synchronized).

[0118] The underlying execution parameters corresponding to the refresh rate setting include timing control parameters (such as the vertical synchronization signal period), driving voltage parameters (different refresh rate settings often correspond to different driving voltage parameters in order to reduce power consumption or reduce electromagnetic interference during touch scanning), and image data processing parameters (such as Gamma correction parameters, color correction / white balance parameters, etc.).

[0119] The underlying execution parameters corresponding to the touch mode type include touch coordination parameters (such as the working status of the touch IC and the reporting rate setting).

[0120] The underlying execution parameters corresponding to the relationship between touch and display include the linkage logic between timing control parameters and touch coordination parameters.

[0121] The mode switching unit 90 is communicatively connected to the mode control unit 100 and is configured to communicate with the timing control unit 40 in response to a mode switching signal.

[0122] The timing control unit 40 is communicatively connected to the display module 50, and the timing control unit 40 is configured to acquire the mode configuration data stored in the mode switching unit 90, and provide the display module 50 with corresponding drive control parameters according to the mode configuration data, so that the display module 50 switches to the preset working mode corresponding to the mode configuration data.

[0123] This embodiment of the disclosure is equivalent to using a certain working mode as a preset working mode, and storing the necessary mode configuration data required to achieve the preset working mode in the mode switching unit 90. In this case, the mode switching unit 90 is further configured to achieve electrical connection with the timing control unit 40 under the control of the mode switching signal, so that the timing control unit 40 can obtain the mode configuration data of a certain working mode from the mode switching unit 90, and generate a corresponding drive signal according to the mode configuration data, thereby driving the display panel 52, so that the display module 50 is in the working mode corresponding to the mode configuration data.

[0124] Optionally, in some embodiments, the timing control unit 40 in this disclosure may use a low-specification timing control unit, which may be combined with the mode switching unit 90 to achieve the function of a high-specification timing control unit.

[0125] It should be noted that the high-specification timing control unit can store multiple complete timing configurations, such as supporting two sets of touch-display time-sharing timings (LH mode and LV mode), supporting power-off restart to load different configurations, and having ample internal SRAM / cache resources. Specifically, the high-specification timing control unit can enable the same embedded display panel to be compatible with two models: finger touch only and external active pen touch.

[0126] Low-specification timing control units can only fix a single set of timing parameters; for example, they can only support LH mode and do not support LV mode, let alone switching between multiple timing configurations. Specifically, low-specification timing control units can only be used on finger-only touch models and cannot be adapted to external active pen touch solutions. If forced to use on models with external active pen touch, the touch timing will continuously output noise, resulting in ghost dots.

[0127] Therefore, in this embodiment of the present disclosure, the low-specification timing control unit can drive different preset working modes by acquiring the mode configuration data stored in the mode switching unit 90. Moreover, compared with the fixed configuration settings in the high-specification timing control unit, the preset working modes corresponding to the mode configuration data stored in the mode switching unit 90 can be set according to actual needs. Thus, different mode switching units 90 can match the same low-specification timing control unit to provide different working modes, thereby meeting the needs of different display modules for preset working modes.

[0128] Of course, alternatively, in some other embodiments, the timing control unit 40 in this disclosure embodiment can also be replaced with a high-specification timing control unit. After replacing it with a high-specification timing control unit, the mode switching control circuit in this disclosure embodiment enables the display module to have more working modes.

[0129] For example, after storing mode configuration data for two different preset working modes in the mode switching unit 90, the working mode corresponding to the mode configuration data may be different from the working mode provided by the high-specification timing control unit itself. In this case, compared with the display module that only uses the high-specification timing control unit, the mode switching control circuit of this disclosure can provide twice as many mode configurations through the mode switching unit 90, thereby enabling more working modes and switching between different working modes.

[0130] It should be noted that, Figure 3 , Figure 4 and Figure 5 The connection relationship between the mode switching control circuit shown and other components such as the touch driver chip 60 can be found by referring to... Figure 1 .

[0131] Figure 6 This is a schematic diagram of the composition of the mode switching unit 90 in some embodiments of this disclosure.

[0132] like Figure 6 As shown, the mode switching unit 90 includes multiple configuration storage subunits 92 and mode switching subunits 91.

[0133] Specifically, the configuration storage subunit 92 stores mode configuration data of the display module 50 in one preset operating mode. Different configuration storage subunits 92 store mode configuration data of the display module 50 in different preset operating modes.

[0134] Accordingly, the mode control unit 100 outputs multiple mode switching signals.

[0135] The mode switching subunit 91 is configured to communicate with different configuration storage subunits 92 and timing control unit 40 in response to different mode switching signals. The timing control unit 40 is configured to acquire the mode configuration data stored in the configuration storage subunits 92.

[0136] In this embodiment of the disclosure, a plurality of configuration storage sub-units 92 are provided in the mode switching unit 90, and different configuration storage sub-units 92 store the mode configuration data required by the display module 50 in different preset working modes.

[0137] Furthermore, the mode control unit 100 outputs a corresponding mode switching signal so that the mode switching subunit 91 can respond to different mode switching signals to realize the electrical connection between different configuration storage subunits 92 and the timing control unit 40. Ultimately, the timing control unit 40 can obtain different mode configuration data from different configuration storage subunits 92 to control the display module 50 to switch back and forth between different working modes.

[0138] In some embodiments, the mode control unit 100 is further configured to output a plurality of mode control signals, wherein the mode control signals are set to correspond to the mode switching signals.

[0139] The timing control unit 40 is communicatively connected to the mode control unit 100, and before acquiring the mode configuration data stored in the configuration storage subunit 92, the timing control unit 40 is also configured to perform a reset operation to clear the internal cache in response to the mode control signal.

[0140] This embodiment of the present disclosure is equivalent to resetting the timing control unit 40 before each working mode switch to eliminate the mode configuration data cached in the previous working mode, so as to avoid confusion after obtaining the mode configuration data in the current working mode and affecting the mode switching effect, while reducing the operating pressure of the timing control unit 40.

[0141] In some embodiments, the mode control signal and the corresponding mode switching signal are the same signal.

[0142] In this embodiment of the present disclosure, the timing control unit 40 is cleared by the same signal, and the timing control unit 40 is electrically connected to the corresponding configuration storage subunit 92 to obtain the corresponding mode configuration data, thereby ensuring the synchronization of working mode switching and data loading, and ensuring the continuity of working mode switching.

[0143] For example, in Figure 6 In the illustrated embodiment, the plurality of configuration storage subunits 92 include a first configuration storage subunit 921 and a second configuration storage subunit 922. The first configuration storage subunit 921 and the second configuration storage subunit 922 respectively store mode configuration data of the display module 50 in different preset working modes. For example, the first configuration storage subunit 921 stores mode configuration data of the display module 50 in finger touch mode, and the second configuration storage subunit 922 stores mode configuration data of the display module 50 in active pen touch mode.

[0144] Accordingly, the multiple mode switching signals output by the mode control unit 100 include a first mode switching signal and a second mode switching signal.

[0145] The mode switching subunit 91 is configured to, in response to a first mode switching signal, communicate with the first configuration storage subunit 921 and the timing control unit 40; and in response to a second mode switching signal, communicate with the second configuration storage subunit 922 and the timing control unit 40.

[0146] The timing control unit 40 is configured to, in response to a first mode switching signal, perform a reset operation to clear the internal cache and acquire the mode configuration data stored in the first configuration storage subunit 921. It is also configured to, in response to a second mode switching signal, perform a reset operation to clear the internal cache and acquire the mode configuration data stored in the second configuration storage subunit 922.

[0147] In this embodiment of the present disclosure, the first mode switching signal controls the mode switching subunit 91 to electrically connect the first configuration storage subunit 921 to the timing control unit 40, so that the timing control unit 40 can obtain the mode configuration data in the first configuration storage subunit 921. At the same time, the first mode switching signal controls the timing control unit 40 to clear the cache, so as to facilitate mode switching.

[0148] Similarly, in this embodiment of the present disclosure, the second mode switching signal controls the mode switching subunit 91 to electrically connect the second configuration storage subunit 922 to the timing control unit 40, so that the timing control unit 40 can obtain the mode configuration data in the second configuration storage subunit 922. At the same time, the second mode switching signal controls the timing control unit 40 to clear the cache, so as to facilitate mode switching.

[0149] As can be seen from the above, after setting multiple configuration storage sub-units 92 in this embodiment of the present disclosure, a mode switching signal can be configured for each of them. The mode switching signal controls the mode configuration data in the configuration storage sub-unit 92 while clearing the cache of the content previously run by the timing control unit 40, so as to facilitate the smooth operation of the new working mode.

[0150] In some embodiments, one of the first mode switching signal and the second mode switching signal is a high-level signal H, and the other of the first mode switching signal and the second mode switching signal is a low-level signal L.

[0151] For example, the first mode switching signal is a high-level signal H, and the second mode switching signal is a low-level signal L.

[0152] In this case, refer to Figure 3 or Figure 4 ,as well as Figure 6 In response to a high-level signal H, the mode switching subunit 91 electrically connects the first configuration storage subunit 921 to the timing control unit 40. Simultaneously, the timing control unit 40 clears its buffer and reads mode configuration data from the first configuration storage subunit 921. In response to a low-level signal L, the mode switching subunit 91 electrically connects the second configuration storage subunit 922 to the timing control unit 40. Simultaneously, the timing control unit 40 clears its buffer and reads mode configuration data from the second configuration storage subunit 922. Based on the above process, this disclosure can realize switching between different operating modes.

[0153] exist Figure 3 In the illustrated embodiment, the mode control unit 100 includes a microcontroller unit 30. That is... Figure 3 In the illustrated embodiment, the microcontroller unit 30 is used as the mode control unit 100 in this disclosure to output mode switching signals. The microcontroller unit 30 is electrically connected to the timing control unit 40 and the mode switching unit 90, respectively.

[0154] As can be seen from the foregoing, reference Figure 1 In the original circuit framework, the timing control unit 40 is electrically connected to the microcontroller 30. Therefore, using the microcontroller 30 as the mode control unit 100 does not require additional hardware structure. It is only necessary to add an electrical connection between the mode switching unit 90 and the microcontroller 30, and add software programming control logic to the microcontroller 30 so that the microcontroller 30 can output a mode switching signal.

[0155] Therefore, in this embodiment, the microcontroller unit 30 can generate and output the mode switching signal through software logic instructions without modifying the pins of the display connector 20. This minimizes hardware changes, allows reuse of existing hardware connectors, reduces hardware modification costs, and ensures hardware compatibility. In some embodiments, such as... Figure 3 As shown, the microcontroller unit 30 is also communicatively connected to the system-on-a-chip 10.

[0156] The system-on-chip 10 is configured to output mode switching instructions.

[0157] The microcontroller unit 30 is configured to output a mode switching signal in response to a mode switching command. It is understood that the operating mode corresponding to the mode switching signal output by the microcontroller unit 30 at this time is different from the current operating mode of the display module 50.

[0158] In this case, the user can send a mode switching command through the system-on-a-chip 10, thereby controlling the microcontroller unit 30 to output a mode switching signal, and thus realize the switching of the display module 50 between different working modes.

[0159] For example, combining Figure 3 and Figure 6 As shown, the system-on-a-chip 10 sends a mode switching command to the microcontroller unit 30 via the IIC bus, triggering the microcontroller unit 30 to generate a high-level signal H according to the mode switching command. The microcontroller unit 30 then sends the high-level signal H to both the timing control unit 40 and the mode switching unit 90.

[0160] After receiving a high-level signal H, the mode switching unit 90 switches to the first configuration storage subunit 921. Simultaneously, after receiving the high-level signal H, the timing control unit 40 performs a reset action, clears the buffer, and then rereads the mode configuration data from the first configuration storage subunit 921. The switching in the mode switching unit 90 and the "reread" action after the timing control unit 40 reset coordinate to complete the dynamic update of the display configuration.

[0161] Accordingly, when switching operating modes again, the system-on-chip 10 sends a mode switching command to the microcontroller unit 30 via the IIC bus, triggering the microcontroller unit 30 to generate a low-level signal L according to the mode switching command. The microcontroller unit 30 then sends the low-level signal L to both the timing control unit 40 and the mode switching unit 90.

[0162] After receiving a low-level signal L, the mode switching unit 90 switches to the second configuration storage subunit 922. Simultaneously, after receiving the low-level signal L, the timing control unit 40 performs a reset action, clears the buffer, and then rereads the mode configuration data from the second configuration storage subunit 922. The switching in the mode switching unit 90 and the "reread" action after the timing control unit 40 reset coordinate to complete the dynamic update of the display configuration.

[0163] As can be seen from the above, the embodiments disclosed herein do not require the addition of a connector, can maintain the existing standard VESA definition interface, do not require hardware modifications, only add instructions, which helps customers directly upgrade their existing systems.

[0164] In this embodiment, the system-on-a-chip (SoC) 10 first issues a mode switching command, and then the microcontroller unit 30 outputs a mode switching signal. This delegates the complex timing pulses and level control to the microcontroller unit 30, avoiding output jitter caused by the operating system scheduling of the SoC 10. Furthermore, even if task blocking occurs on the SoC 10 side, after the SoC 10 outputs the mode switching command, the microcontroller unit 30 can still strictly follow the mode switching command to output a mode switching signal that meets the timing requirements, unaffected by the operating pressure of the SoC 10, thus improving the timing stability of mode switching.

[0165] Optionally, in the foregoing embodiments, two storage sub-units 92 are configured. In this case, in order to improve the convenience of mode switching, the mode switching instruction output by the system-on-chip 10 can be the same. The microcontroller unit 30 can output the corresponding mode switching signal according to this same mode switching instruction and the current working mode, thereby changing the current working mode and realizing the working mode switching.

[0166] Optionally, the configuration storage sub-unit 92 can be set to more than two. In this case, in order to facilitate the control of the switching of the working mode and the accuracy of the switching, different mode switching instructions and mode switching signals can be configured for different working modes.

[0167] In this configuration, the system-on-chip 10 is configured to output one of several different mode switching instructions. That is, the system-on-chip 10 can output multiple different mode switching instructions, and the user can select and control the output of one of these instructions each time a switch occurs.

[0168] The microcontroller unit 30 is configured to output different mode switching signals in response to different mode switching commands. These different mode switching signals can then switch between their respective operating modes.

[0169] For example, the configuration storage subunit 92 consists of three subunits: a first configuration storage subunit 921, a second configuration storage subunit 922, and a third configuration storage subunit. The mode configuration data stored in the first configuration storage subunit 921, the second configuration storage subunit 922, and the third configuration storage subunit correspond to the three different working modes: a first preset working mode, a second preset working mode, and a third preset working mode, respectively.

[0170] The system-on-chip 10 is configured to output one of a first mode switching instruction, a second mode switching instruction, and a third mode switching instruction. The microcontroller unit 30 is configured to output a first mode switching signal in response to the first mode switching instruction; output a second mode switching signal in response to the second mode switching instruction; and output a third mode switching signal in response to the third mode switching instruction.

[0171] For example, if the current operating mode is the first preset operating mode, the system-on-a-chip 10 outputs a third mode switching command. The microcontroller unit 30 outputs a third mode switching signal according to the third mode switching command. In response to the third mode switching signal, the mode switching unit 90 connects the third configuration storage subunit to the timing control unit 40. The timing control unit 40 clears the buffer and reads the mode configuration data from the third configuration storage subunit, ultimately realizing the switching from the first preset operating mode to the third preset operating mode.

[0172] Furthermore, the system-on-a-chip 10 outputs a second mode switching command again. The microcontroller unit 30 outputs a second mode switching signal according to the second mode switching command. In response to the second mode switching signal, the mode switching unit 90 connects the second configuration storage subunit 922 with the timing control unit 40. The timing control unit 40 clears the cache and reads the mode configuration data from the second configuration storage subunit 922, ultimately realizing the switching from the third preset working mode to the second preset working mode.

[0173] Similarly, embodiments of this disclosure can achieve switching between different modes through different mode switching commands.

[0174] In some embodiments, such as Figure 4 As shown, the mode control unit 100 includes a system-on-a-chip 10. That is... Figure 4 The embodiment shown uses the system-on-a-chip 10 as the mode control unit 100 in this disclosure to output mode switching signals.

[0175] In some embodiments, the system-on-a-chip 10 is electrically connected to the timing control unit 40 and the mode switching unit 90 via the display connector 20. The display connector 20 is configured to transmit mode switching signals.

[0176] In this embodiment of the disclosure, the system-on-a-chip 10 transmits the mode switching signal to the timing control unit 40 and the mode switching unit 90 respectively through the display connector 20.

[0177] Therefore, in comparison Figure 1 and Figure 4 As can be seen, the embodiments disclosed herein are equivalent to modifying the signals that the display connector 20 can transmit. For example, Figure 1 In this context, the display connector 20 can, for example, transmit video image signals to the timing control unit 40, and transmit touch control and power supply signals to the microcontroller unit 30, etc. Figure 1 In addition, the display connector 20 is also used to transmit mode switching signals to the timing control unit 40 and the mode switching unit 90.

[0178] But compared to Figure 3 The embodiment shown, Figure 4 The illustrated embodiment can directly output a mode switching signal via the system-on-a-chip 10, without requiring the system-on-a-chip 10 to output a mode switching command and then control the microcontroller unit 30 to output a mode switching command. Therefore, Figure 4 The embodiment shown does not require adding complex logic instructions. It only requires adding interface transmission definitions in the display connector and providing mode switching signals through the system-on-chip 10 to switch between different working modes.

[0179] This embodiment of the disclosure takes into account that the processing power of the system-on-a-chip 10 is much higher than that of the microcontroller unit 30. Therefore, this embodiment of the disclosure adopts the implementation method of the system-on-a-chip 10 directly outputting the mode switching signal, so that the mode switching related control tasks can be undertaken by the system-on-a-chip 10 with stronger processing power, thereby reducing the operating pressure of the microcontroller unit 30.

[0180] As can be seen from the foregoing description, the microcontroller unit 30 usually also needs to undertake business tasks such as touch control. By separating the task of outputting the mode switching signal, the computing resources of the microcontroller unit 30 can be avoided from being squeezed out, and the original business such as touch control can be executed stably and reliably.

[0181] Therefore, this embodiment of the present disclosure directly outputs the mode switching signal through the system-on-a-chip 10. On the one hand, it eliminates the inter-chip interaction step of the system-on-a-chip 10 issuing mode switching instructions to the microcontroller unit 30, shortening the signal link and reducing the risk of instruction delay and communication anomalies caused by cross-chip communication. On the other hand, by centralizing the overall control logic of mode switching within the system-on-a-chip 10, the microcontroller unit 30 does not need to participate in the switching process, which simplifies the overall software architecture and reduces the workload of firmware integration between the two chips. In some embodiments, the display connector 20 includes control pins, and the system-on-a-chip 10 is electrically connected to the timing control unit 40 and the mode switching unit 90 respectively through the control pins of the display connector 20. The control pins are used to transmit the mode switching signal.

[0182] This embodiment of the disclosure is equivalent to redefining the interface of the display connector 20, using at least one pin of the display connector 20 as a control pin to transmit mode switching signals. There is no need to add complex logic instructions; only the mode switching signal is required to switch the operating mode of the display module 50.

[0183] In some embodiments, such as Figure 5 As shown, the mode control unit 100 can output at least one mode switching signal, and when the mode control unit 100 can output multiple mode switching signals, the multiple mode switching signals are different. However, in an independent display module 50, the mode control unit 100 outputs only one mode switching signal. For example, the mode control unit 100 can output two mode switching signals: a high-level signal H and a low-level signal L. In a fixed display module 50, the mode control unit 100 outputs only one of the high-level signal H and the low-level signal L.

[0184] The mode switching unit 90 includes at least one configuration storage subunit 92 and a mode switching subunit 91. For example, as... Figure 6 As shown, the mode switching unit 90 includes two configuration storage subunits 92: a first configuration storage subunit 921 and a second configuration storage subunit 922.

[0185] The configuration storage subunit 92 is configured to store mode configuration data of the display module 50 in a preset operating mode. For example, the first configuration storage subunit 921 and the second configuration storage subunit 922 store mode configuration data of the display module 50 in a first preset operating mode and a second preset operating mode, respectively. The first preset operating mode and the second preset operating mode are different.

[0186] The mode switching subunit 91 is configured to, in response to a mode switching signal, communicatively connect one of its configuration storage subunits 92 to the timing control unit 40. The timing control unit 40 is configured to acquire the mode configuration data stored in the configuration storage subunit 92.

[0187] For example, in a display module 50, in response to a high-level signal H, the mode switching subunit 91 connects the first configuration storage subunit 921 to the timing control unit 40, and the timing control unit 40 reads the mode configuration data from the first configuration storage subunit 921, and the display module 50 is in a first preset working mode.

[0188] In another display module 50, in response to a low-level signal L, the mode switching subunit 91 connects the second configuration storage subunit 922 with the timing control unit 40. The timing control unit 40 reads the mode configuration data from the second configuration storage subunit 922, and the display module 50 is in the second preset working mode.

[0189] It is understood that the embodiments of this disclosure are equivalent to providing a mode switching unit 90 with different operating modes. Users can select the mode switching signal output by the mode control unit 100 according to actual needs, thereby determining the operating mode of the display module 50. Therefore, the embodiments of this disclosure are equivalent to providing only one mode switching unit 90, which can meet the needs of display modules with different operating modes.

[0190] In some embodiments, such as Figure 5 As shown, the mode control unit 100 includes a system-on-a-chip 10. That is... Figure 5 The embodiment shown uses the system-on-a-chip 10 as the mode control unit 100.

[0191] The system-on-chip 10 is electrically connected to the mode switching unit 90 via a display connector 20. The display connector 20 includes a plurality of touch pins for transmitting touch signals. The system-on-chip 10 is electrically connected to a configuration storage subunit 92 via at least one touch pin of the display connector 20. The mode switching subunit 91 is also configured to acquire the level signal of the touch pin and use the level signal of the touch pin as a mode switching signal.

[0192] In other words, the embodiments disclosed herein are equivalent to using the level signal output by the touch pin as a mode switching signal.

[0193] For example, in some embodiments, there are multiple configuration storage sub-units 92, and the multiple configuration storage sub-units 92 include a first configuration storage sub-unit 921 and a second configuration storage sub-unit 922, wherein the first configuration storage sub-unit 921 and the second configuration storage sub-unit 922 respectively store mode configuration data of the display module 50 under different preset working modes.

[0194] The touch pin's voltage level signal is either a first voltage level signal or a second voltage level signal, and the first voltage level signal and the second voltage level signal are different. For example, one of the first voltage level signal and the second voltage level signal is a high voltage level signal H, and the other is a low voltage level signal L.

[0195] The mode switching subunit 91 is configured to, in response to a first level signal from the touch pin, communicatively connect the first configuration storage subunit 921 to the timing control unit 40; the timing control unit 40 is configured to acquire the mode configuration data stored in the first configuration storage subunit 921. Alternatively, the mode switching subunit 91 is configured to, in response to a second level signal from the touch pin, communicatively connect the second configuration storage subunit 922 to the timing control unit 40; the timing control unit 40 is configured to acquire the mode configuration data stored in the second configuration storage subunit 922.

[0196] For example, the touch pin can specifically be a touch power supply pin. In this case, in a display module 50 in a pure display mode or a display module 50 with embedded touch function, the touch power supply pin is not powered on, and the level signal is a low level signal L. At this time, the low level will be used as a mode switching signal to control the timing control unit 40 and the mode switching unit 90, thereby controlling the working mode of the display module 50.

[0197] In a display module 50 with active pen touch function, when the touch power supply pin is powered on, the level signal is a high level signal H. At this time, the high level will be used as a mode switching signal to control the timing control unit 40 and the mode switching unit 90, thereby controlling the working mode of the display module 50.

[0198] Therefore, this embodiment essentially redefines only the touch pins in the display connector 20, requiring no additional hardware modifications. Furthermore, a single mode switching unit 90 can be provided to meet the needs of different display modules 50, which facilitates the standardization of module part numbers.

[0199] In some embodiments, the timing control unit 40 and the configuration storage subunit 92 are connected via a communication bus, which includes a serial communication bus, such as an I2C bus or an SPI bus.

[0200] For example, the configuration storage subunit 92 may optionally include an EEPROM, which can communicate with the timing control unit 40 via the IIC protocol. The configuration storage subunit 92 may also include Flash memory, which can communicate with the timing control unit 40 via the SPI protocol.

[0201] Optionally, the mode switching subunit 91 includes a switch integrated circuit (switchIC).

[0202] For example, when the storage subunit 92 is configured to include Flash, the present disclosure embodiment can achieve the switching of the two Flash by controlling the CS (Chip Select) signal of the two Flash by a switching chip.

[0203] In some embodiments, such as Figure 6 As shown, the mode switching subunit 91 includes an electronic switch with a normally open contact NO and a normally closed contact NC. The enable pin EN of the electronic switch is electrically connected to the mode control unit 100.

[0204] When the mode control unit 100 outputs the first mode control signal to the enable pin EN, the normally open contact NO is turned on, so that the timing control unit 40 is electrically connected to the first configuration storage subunit 921.

[0205] When the mode control unit 100 outputs the second mode control signal to the enable pin EN, the normally closed contact NC is turned on, so that the timing control unit 40 is electrically connected to the second configuration storage subunit 922.

[0206] Table 2 is a truth table of mode switching subunit 91 in some embodiments of this disclosure.

[0207] Table 2

[0208]

[0209] For example, in Figure 3 In the illustrated embodiment, refer to Table 2:

[0210] When the microcontroller unit 30 outputs a high-level signal H, the enable pin EN of the mode switching subunit 91 receives the high-level signal H, opens the normally open contact NO, and closes the normally closed contact NC. The output terminal MSDA of the mode switching unit 90 is connected to the output terminal MSDA1 of the first configuration storage subunit 921, and the output terminal MSDA2 of the second configuration storage subunit 922 is turned off. After receiving the high-level signal H, the timing control unit 40 triggers a reset operation, reloads the code, and reads the mode configuration data in the first configuration storage subunit 921.

[0211] When the microcontroller unit 30 outputs a low-level signal L, the enable pin EN of the mode switching unit 90 receives the low-level signal L, which closes the normally open contact NO and opens the normally closed contact NC. The output terminal MSDA of the mode switching unit 90 and the output terminal MSDA2 of the second configuration storage subunit 922 are turned on, while the output terminal MSDA1 of the first configuration storage subunit 921 is turned off. When the timing control unit 40 receives the level switching signal, it triggers a reset operation, which will reload the code and read the mode configuration data in the second configuration storage subunit 922.

[0212] In some embodiments, for example, in Figure 3 and Figure 4 In the illustrated embodiment, the timing control unit 40 is configured to power down and restart in response to a mode switching signal, and acquire the mode configuration data corresponding to the mode switching signal after restarting. After a power outage and restart, the internal cache and registers of the timing control unit 40 are cleared due to power loss, and the corresponding mode configuration data can be loaded upon power-on. Figure 3 In this context, the microcontroller unit 30 serves as the mode control unit 100. Figure 4 In this system, the system-on-a-chip 10 serves as the mode control unit 100.

[0213] This disclosure is equivalent to no longer controlling the timing control unit 40 to reset and clear the buffer through software logic instructions, but only requiring a power-off restart.

[0214] In summary, this disclosure enables multi-mode switching through the configuration storage subunit 92 in the mode switching unit 90 in conjunction with the timing control unit 40. It allows the timing control unit 40, which previously did not support multiple timing configuration settings, to support various mode switching modes. By using a low-specification timing control unit 40, high-specification functions can be achieved, adapting to diverse working scenarios and enhancing product competitiveness. Furthermore, the technical solution of this disclosure can also meet the customer's requirement for normalized part numbers. Using a single mode switching control circuit design, it simultaneously satisfies the needs of both the pure display module 50 and the touch display module 50.

[0215] Next, this disclosure will further describe the technical solution of this disclosure in conjunction with specific embodiments.

[0216] Example 1: Reference Figure 3 , Figure 3 The core control logic process of the mode switching control circuit shown includes: system triggering stage, level control stage, reset and rereading stage, and mode switching stage. The specific process is as follows:

[0217] During the system triggering phase, the system-on-a-chip 10 sends a mode switching command to the microcontroller unit 30 via the IIC bus, triggering the level switching logic of the microcontroller unit 30.

[0218] During the level control phase, the microcontroller unit 30 generates a mode switching signal according to the mode switching instruction. The mode switching signal is a high-level signal H or a low-level signal L, and is transmitted to the timing control unit 40 and the mode switching unit 90 through the high-level signal H or the low-level signal L.

[0219] During the reset and reread phases and the mode switching phase: After receiving a high-level signal H or a low-level signal L, the timing control unit 40 performs a reset action and clears the buffer. After receiving a high-level or low-level signal L, the mode switching unit 90 switches to the corresponding configuration storage subunit 92. The timing control unit 40 rereads the mode configuration data in the configuration storage subunit 92. The rereading in the timing control unit 40 and the switching action of the mode switching unit 90 work together to complete the dynamic update of the display configuration.

[0220] The embodiments disclosed herein can realize the multi-time configuration switching function that only high-time control unit can achieve through logic circuits by enabling the low-time control unit 40 to achieve the high-time control unit, thereby realizing a variety of functions such as touch control and gaming requirements.

[0221] The embodiments disclosed herein do not require additional connectors to the system-on-a-chip 10, can maintain the existing standard VESA defined interface, require no hardware modifications, only additional instructions, and facilitate direct upgrades of customers' existing logic circuits.

[0222] Example 2: Reference Figure 4 , Figure 4 The control logic of the mode switching control circuit shown includes a system triggering stage, a reset and rereading stage, and a mode switching stage. The specific process is as follows:

[0223] During the system triggering phase: the system-on-chip 10 outputs a high-level signal H or a low-level signal L, which simultaneously controls the timing control unit 40 and the mode switching unit 90.

[0224] During the reset and reread phases and the mode switching phase: After receiving a high-level signal H or a low-level signal L, the timing control unit 40 performs a reset action, clears the buffer, and then rereads the mode configuration data. After receiving a high-level signal H or a low-level signal L, the mode switching unit 90 switches to the corresponding mode configuration data. The switching operation of the mode switching unit 90 coordinates with the "reread" action of the timing control unit 40 after reset to complete the dynamic update of the display configuration.

[0225] Compared to Embodiment 1, Embodiment 2 of this disclosure adds a control pin between the system-on-a-chip 10 and the timing control unit 40 for transmitting mode switching signals. Embodiment 2 essentially delegates the action of the microcontroller 30 outputting the switching control signal in Embodiment 1 to the system-on-a-chip 10 directly, skipping the process of the microcontroller 30 receiving the mode switching command and then generating the mode switching signal.

[0226] Therefore, the interface definition in the display connector 20 needs to be added to the mode switching control circuit in Embodiment 2. However, compared to Embodiment 1, no complex logic instructions need to be added; only a mode switching signal is needed to switch the working mode.

[0227] The timing schemes in Embodiments 1 and 2 can be mainly divided into two types: the timing control unit 40's power supply VDD is reset without power loss and the power supply VDD is restarted after power loss. The following description assumes that the mode switching signal is initially a low-level signal L.

[0228] Figure 7 This is a timing diagram of the power supply VDD in some embodiments of this disclosure when the power supply VDD is not powered off. Specifically, it is a timing diagram of the timing control unit 40 in embodiment 1 when the power supply VDD is not powered off.

[0229] like Figure 7 As shown, when the power supply VDD of the timing control unit 40 does not fail, the system-on-a-chip 10 in Example 1 sends a mode switching command to the microcontroller 30 through the IIC bus. After receiving the mode switching command, the microcontroller 30 pulls the mode switching signal high. After receiving the high-level signal H, the timing control unit 40 will reset and reload the code to complete the reading of the new mode configuration data.

[0230] Figure 8 This is a timing diagram of the power supply VDD restarting in some other embodiments of this disclosure, specifically a timing diagram of the power supply VDD restarting in the timing control unit 40 of embodiment 2.

[0231] like Figure 8 As shown, when the power supply VDD of the timing control unit 40 does not fail, the system-on-a-chip 10 in embodiment 2 directly pulls the mode switching signal high. After receiving the high-level signal H, the timing control unit 40 will reset and reload the code to complete the reading of the new configuration.

[0232] Figure 9 This is a timing diagram of the power supply VDD restarting in some embodiments of this disclosure, specifically a timing diagram of the power supply VDD restarting in the timing control unit 40 of embodiment 1.

[0233] like Figure 9 As shown in Embodiment 1, the system-on-a-chip 10 sends a mode switching command to the microcontroller 30 via the IIC bus. After receiving the mode switching command, the microcontroller 30 pulls the mode switching signal high. After receiving the high-level signal H, the timing control unit 40 will power down and restart, and reload the code after restarting to complete the reading of the new mode configuration data.

[0234] Figure 10 This is a timing diagram of the power supply VDD when it is powered off in some other embodiments of this disclosure, specifically the timing diagram of the timing control unit 40 in embodiment 2 when the power supply VDD is powered off.

[0235] like Figure 10 As shown in Example 2, the system-on-a-chip 10 directly pulls the mode switching signal high. After the timing control unit 40 receives the high-level signal H, it will power down and restart, and then reload the code to complete the reading of the new configuration.

[0236] It is understood that the only difference between Embodiment 1 and Embodiment 2 is whether the mode switching signal is provided by the system-on-a-chip 10 or by the microcontroller unit 30, and the restart configuration takes effect process is the same.

[0237] Compared to setting software logic control instructions to achieve reconfiguration, the method of reconfiguring the timing control unit 40 by power-off restart of the power supply VDD in this embodiment is simpler and more efficient.

[0238] Optionally, the mode switching unit 90 is powered by the VTSP, and the mode switching unit 90 can remain powered on when the timing control unit 40 is powered off.

[0239] In this embodiment of the disclosure, after the mode switching signal is switched to a high-level signal H, the power supply VDD is powered off and restarted, and the system performs a standard power-on link establishment process again to complete the configuration switching.

[0240] As mentioned above, before the matching mode switching unit 90, the low-specification timing control unit can only store one set of fixed timing configuration data, which is burned in before leaving the factory, and only supports one working mode, such as LH Mode. However, to switch to LV Mode, it cannot rely on local switching by the low-specification timing control unit. For example, the configuration data stored by the low-specification timing control unit can be rewritten online in real time via the system-on-a-chip 10. However, this switching method will result in the complete loss of the rewritten configuration after the timing control unit is powered off. After power-on, the complete timing parameters must be re-issued via the system-on-a-chip 10, which greatly limits the convenience of mode switching. Furthermore, repeated writing will also incur significant development costs.

[0241] This disclosure, by using a low-specification timing control unit in conjunction with a mode switching unit 90, allows mode configuration data to be burned into the configuration storage subunit 91 within the mode switching unit 90. Even if the timing control unit 40, microcontroller 30, or system-on-a-chip 10 experiences a power outage, the mode configuration data in this disclosure will not be affected. Furthermore, after power-on, the timing control unit 40 can read the corresponding alternative mode configuration data to complete the mode switching, without requiring the mode control unit 100 to issue additional read commands.

[0242] Example 3: Reference Figure 5 , Figure 5The mode switching control circuit shown can be applied to the same display panel 52 in different types of display modules 50.

[0243] In related technologies, one display module 50 model requires an embedded display panel that supports touch control, such as finger touch mode. Another display module 50 model requires an embedded display panel that is purely for display, and is fitted with a cover glass (CG) and an external touch component to support active pen touch mode. However, because the display panel 52 itself is an embedded touch solution, touch timing adjustments are performed. This can cause noise interference to the external touch component on the cover glass after it is fitted, making accidental touches more likely.

[0244] To address the aforementioned technical problems, this disclosure provides, for example... Figure 5 The mode switching control circuit shown. Figure 5 The mode switching control circuit shown can support the two aforementioned touch integration schemes.

[0245] The system-on-chip 10 automatically matches the corresponding operating mode during the power-on phase by detecting the level status of the touch pins, such as the VTSP pin, in the display connector 20.

[0246] For example, for a display module 50 with an embedded display panel (display panel 52 with built-in touch), a 40-pin display connector 20 can be used. The first 30 pins are used for display signal connections. The last 10 pins are used for transmitting touch signals and providing VTSP power. These last 10 pins are the touch pins.

[0247] At this time, the VTSP is in a high-level signal H, indicating that the display module 50 has enabled the built-in touch function of the display panel 52. Therefore, the mode configuration data in the configuration storage subunit 92, which is in communication with the timing control unit 40 at this time, can be configured as the configuration data required for the finger touch mode.

[0248] For the display module 50 that attaches to the cover plate and the external touch component, a 30-pin connector can be used to transmit only the display signal. For example, for the aforementioned 40-pin display connector 20, only the first 30 pins need to be connected. At this time, only the display power supply and signal are retained; the touch signal path and VTSP power supply are not enabled. Therefore, the VTSP level is a low-level signal L, indicating that the touch function of the external touch component is enabled in the display module 50. Thus, the mode configuration data in the configuration storage subunit 92, which is currently communicating with the timing control unit 40, can be configured as the configuration data required for the active pen touch mode.

[0249] Obviously, in the control logic process of this embodiment, no software intervention is required for reset, rereading, or dynamic control. During the power-on initialization phase, the mode switching unit 90 will automatically switch to the preset corresponding display timing and configuration mode based on the received VTSP level signal.

[0250] As can be seen from the above, this embodiment can solve the needs of different touch integration solutions. It only needs to output the mode switching signal of the touch pin in the display connector 20, without any additional hardware modifications, and can realize the normalization of module part numbers.

[0251] Figure 11 This is a schematic diagram showing the composition of the connector in some embodiments of this disclosure. Specifically, Figure 11 This is a description of the pins of connector 20 shown in Embodiments 1 and 3. Figure 12 This is a schematic diagram showing the composition of the connector in some other embodiments of this disclosure, specifically, Figure 12 This is a description of the pinout of connector 20 shown in Example 2.

[0252] Figure 11 In the diagram, the first 30 pins are display pins, using the standard VESA definition, while the last 10 pins are touch pins. The touch pin definitions differ for each terminal customer, while the display pin definitions are the same.

[0253] As can be seen from the foregoing, in Examples 1 and 3, as Figure 11 As shown, connector 20 remains unchanged. In embodiment 2, as... Figure 14 As shown, it is necessary to select a normally off pin NC to change into a control pin for the transmission mode switching signal.

[0254] For example, comparison Figure 11 and Figure 12 In Example 2, the 37th pin can be used as the control pin for the transmission mode signal. Figure 11 and Figure 12 This only indicates the structural composition of one type of display connector and is not a specific limitation on the display connector.

[0255] Figure 13 This is a timing diagram of the display module 50 in some embodiments of this disclosure. Figure 14 This is a touch timing diagram of the display module 50 in some embodiments of this disclosure.

[0256] like Figure 13 As shown, the power-on timing maintains the current standard VESA timing. During the switching process, only the mode switching signal and the reset timing of the timing control unit 40 are added; the normal display timing of the display panel 52 in the display module 50 is not changed. After the switching is completed, the display section is powered on and off again, and then executes according to the standard timing.

[0257] The touch timing section needs to be referred to Figure 14 The VTSP is required to remain powered on during power-on and power-off processes to ensure that the mode switching unit 90 is operational and switches the configuration upon receiving a mode switching signal.

[0258] Finally, it should be noted that regarding the mode configuration data in the configuration storage subunit 92, there is no limitation on whether the various mode configuration data of the display module 50 in Embodiments 1 and 2 are the same or different. As for the various mode configuration data in Embodiment 3, as described above, the differences between the two modes are that the touch settings are removed and noise reduction measures are added in the pure display configuration, while the display specifications such as resolution and refresh rate are the same.

[0259] Optionally, in one example, the mode switching unit 90 includes a first configuration storage subunit 921 and a second configuration storage subunit 922.

[0260] Specifically, the mode configuration data in the first configuration storage subunit 921 is configured as follows: a low refresh rate (60Hz) with active pen writing function and a high refresh rate (120Hz) with smooth writing by active pen. Under this configuration, the touch solution selects LH mode. This working mode supports active pen touch, and the touch refresh rate and display refresh rate are independent. Therefore, switching refresh rates will not affect the use of the active pen, while allowing users to choose between high and low power consumption scenarios.

[0261] The mode configuration data in the second configuration storage subunit 922 is specifically configured as follows: two low refresh rates (72Hz) combined with finger touch experience, and a light gaming experience under pure display mode (144Hz). The touch solution selected in this configuration is LVmode. This working mode only supports finger touch. The touch refresh rate and display refresh rate are related, so users can choose a low refresh rate to maintain a balance between low power consumption and touch experience, while also choosing a high refresh rate for a light gaming experience.

[0262] Figure 15 This is a timing diagram of the operating modes of the display device in some embodiments of this disclosure.

[0263] like Figure 15As shown, in the hardware configuration of the second configuration storage subunit 922, under the high refresh rate (144Hz) setting, its blanking period follows the pure display timing, without reserving touch scanning time to meet the low latency requirements of lightweight gaming scenarios. Because display priority is higher than touch in the embedded display panel solution, when the reserved scanning time is insufficient for touch scanning, touch scanning will be skipped, and the next frame will be displayed. When the system switches to a low refresh rate mode (72Hz), the display frequency is reduced by extending the blanking period. At this time, the extended blanking period provides a complete signal acquisition window for touch scanning. The blanking period time meets the time required for touch scanning, allowing normal touch scanning and enabling touch functionality.

[0264] Depend on Figure 15 It can be seen that the blanking period duration (T_blanking_lowFreq) at low refresh rates > touch scan duration (T_touch_scan) > blanking period duration (T_blanking_highFreq) at high refresh rates. Specifically, in high refresh rate mode: the blanking period is compressed, and touch scan is disabled (T_touch_function OFF). In low refresh rate mode, the blanking period is extended, and touch scan is enabled (T_touch_function ON).

[0265] It is understandable that the specific configuration settings for setting the working mode can be arbitrarily configured according to project requirements.

[0266] For example, optionally, the low refresh rate configured in the aforementioned first configuration storage subunit 921 can be set to a refresh rate of 30 / 40 / 48 / 72 / 90, and the high refresh rate can be set to other refresh rates, such as 90 / 120 / 144 / 165, provided that the touch driver chip 60 and the display driver chip support it.

[0267] Similarly, optionally, the low refresh rate configured in the second configuration storage subunit 922 can also be set to a refresh rate of 30 / 40 / 48 / 72 / 90, as long as the blanking period of the low refresh rate > the touch scan period > the blanking period of the high refresh rate is met. The high refresh rate can be set to other refresh rates, such as 90 / 120 / 144 / 165.

[0268] Optionally, the first configuration storage subunit 921 and the second configuration storage subunit 922 can also be set to the same refresh rate, and further configurations with different function activation or timing can be made to meet different customer needs, such as in embodiment 3.

[0269] Furthermore, the technical solution disclosed herein can also be applied to conventional display panels, and is not limited to embedded display panel products. In conventional display panel products, the corresponding mode switching unit 90 is configured with the different operating modes that the display panel 52 can support, avoiding cost waste. It is understood that a conventional display panel refers to a display panel 52 that does not have embedded touch electrodes.

[0270] This disclosure also provides a display device, including: a display module 50; and a mode switching control circuit as described in any of the preceding statements, wherein the mode switching control circuit is communicatively connected to the display module 50, and the specific connection method can be referred to the foregoing description, which will not be repeated here.

[0271] The display device disclosed herein can flexibly switch between multiple working modes to adapt to diverse work scenarios, whether it is focused artistic work, efficient and convenient office needs, or immersive gaming experiences.

[0272] The mode switching control circuit disclosed herein enables the display device to adapt to diverse working scenarios, satisfying different working scenarios of end users through a single display panel 52, enhancing product competitiveness, and reducing module costs.

[0273] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. A mode switching control circuit, characterized in that, The mode switching control circuit includes: a mode control unit, a mode switching unit, and a timing control unit; The mode control unit is configured to output at least one mode switching signal; The mode switching unit stores mode configuration data of the display module in at least one preset working mode, and the mode switching unit is communicatively connected to the mode control unit and is configured to communicate with the timing control unit in response to the mode switching signal. The timing control unit is communicatively connected to the display module, and the timing control unit is configured to acquire the mode configuration data stored in the mode switching unit, and provide corresponding drive control parameters to the display module according to the mode configuration data, so that the display module switches to a preset working mode corresponding to the mode configuration data.

2. The mode switching control circuit according to claim 1, characterized in that, There are multiple mode switching signals; The mode switching unit includes: Multiple configuration storage sub-units are configured to store mode configuration data of the display module in a preset working mode; A mode switching subunit is configured to communicate with the different configuration storage subunits in response to different mode switching signals. The timing control unit is configured to acquire the mode configuration data stored in the configuration storage subunit.

3. The mode switching control circuit according to claim 2, characterized in that, The mode control unit is further configured to output multiple mode control signals, wherein the mode control signals are set in correspondence with the mode switching signals. The timing control unit is communicatively connected to the mode control unit, and before acquiring the mode configuration data stored in the configuration storage subunit, the timing control unit is also configured to perform a reset operation to clear the internal cache in response to the mode control signal.

4. The mode switching control circuit according to claim 3, characterized in that, The mode control signal and the corresponding mode switching signal are the same signal.

5. The mode switching control circuit according to any one of claims 2 to 4, characterized in that, The multiple mode switching signals include a first mode switching signal and a second mode switching signal; The plurality of configuration storage sub-units include a first configuration storage sub-unit and a second configuration storage sub-unit, wherein the first configuration storage sub-unit and the second configuration storage sub-unit respectively store mode configuration data of the display module under different preset working modes; The mode switching subunit is configured to, in response to the first mode switching signal, communicatively connect the first configuration storage subunit to the timing control unit; and in response to the second mode switching signal, communicatively connect the second configuration storage subunit to the timing control unit. The timing control unit is configured to, in response to the first mode switching signal, perform a reset operation to clear the internal cache and obtain the mode configuration data stored in the first configuration storage subunit; and in response to the second mode switching signal, perform a reset operation to clear the internal cache and obtain the mode configuration data stored in the second configuration storage subunit.

6. The mode switching control circuit according to claim 5, characterized in that, One of the first mode switching signal and the second mode switching signal is a high-level signal, and the other of the first mode switching signal and the second mode switching signal is a low-level signal.

7. The mode switching control circuit according to any one of claims 2 to 4, characterized in that, The mode control unit includes a microcontroller unit.

8. The mode switching control circuit according to claim 7, characterized in that, The microcontroller unit is also communicatively connected to the system-on-a-chip. The system-on-chip is configured to output mode switching instructions; The microcontroller unit is configured to output a mode switching signal in response to the mode switching command.

9. The mode switching control circuit according to claim 8, characterized in that, The system-on-chip is configured to output one of a plurality of different mode switching instructions; The microcontroller unit is configured to output different mode switching signals in response to different mode switching commands.

10. The mode switching control circuit according to any one of claims 2 to 4, characterized in that, The mode control unit includes a system-on-a-chip.

11. The mode switching control circuit according to claim 10, characterized in that, The system-on-a-chip is electrically connected to the timing control unit and the mode switching unit respectively via a display connector; The display connector is configured to transmit the mode switching signal.

12. The mode switching control circuit according to claim 11, characterized in that, The display connector includes control pins. The system-on-a-chip is electrically connected to the timing control unit and the mode switching unit respectively through the control pins of the display connector. The control pins are used to transmit mode switching signals.

13. The mode switching control circuit according to claim 2, characterized in that, The mode switching signal is one; The mode switching unit includes: At least one configuration storage subunit is configured to store mode configuration data of the display module in a preset working mode; A mode switching subunit is configured to, in response to the mode switching signal, communicatively connect one of the configuration storage subunits to the timing control unit; The timing control unit is configured to acquire the mode configuration data stored in the configuration storage subunit.

14. The mode switching control circuit according to claim 13, characterized in that, The mode control unit includes a system-on-a-chip; The system-on-a-chip is electrically connected to the mode switching unit via a display connector; The display connector includes multiple touch pins for transmitting touch signals; The system-on-a-chip is electrically connected to the configuration storage sub-unit via at least one touch pin of the display connector; The mode switching subunit is further configured to acquire the level signal of the touch pin and use the level signal of the touch pin as the mode switching signal.

15. The mode switching control circuit according to claim 14, characterized in that, The configuration storage sub-unit is multiple, and the multiple configuration storage sub-units include a first configuration storage sub-unit and a second configuration storage sub-unit. The first configuration storage sub-unit and the second configuration storage sub-unit respectively store the mode configuration data of the display module under different preset working modes. The level signal of the touch pin is one of a first level signal and a second level signal, and the first level signal and the second level signal are different; The mode switching subunit is configured to, in response to a first level signal of the touch pin, communicate with the first configuration storage subunit and the timing control unit. The timing control unit is configured to acquire the mode configuration data stored in the first configuration storage subunit; Alternatively, the mode switching subunit is configured to, in response to a second level signal of the touch pin, communicatively connect the second configuration storage subunit to the timing control unit; the timing control unit is configured to acquire the mode configuration data stored in the second configuration storage subunit.

16. The mode switching control circuit according to any one of claims 2 to 5, 13 to 15, characterized in that, The mode configuration data of the display module in a preset working mode includes: an association configuration for indicating the display refresh rate and the touch input type, and underlying execution parameters for implementing the association configuration; the underlying execution parameters include at least one of timing control parameters, driving voltage parameters, image data processing parameters, and touch coordination parameters.

17. The mode switching control circuit according to any one of claims 2 to 5, 13 to 15, characterized in that, The mode switching subunit includes an electronic switch with normally open contacts and normally closed contacts; The enable pin of the electronic switch is electrically connected to the mode control unit; When the mode control unit outputs a first mode control signal to the enable pin, the normally open contact is turned on so that the timing control unit is electrically connected to the first configuration storage subunit. When the mode control unit outputs a second mode control signal to the enable pin, the normally closed contact is turned on, so that the timing control unit is electrically connected to the second configuration storage subunit.

18. The mode switching control circuit according to any one of claims 2 to 5, 13 to 15, characterized in that, The timing control unit and the configuration storage subunit are connected via a communication bus, which includes a serial communication bus, such as an I2C bus or an SPI bus.

19. The mode switching control circuit according to any one of claims 2 to 5, characterized in that, The timing control unit is configured to power off and restart in response to the mode switching signal, and to acquire the mode configuration data corresponding to the mode switching signal after restarting.

20. A display device, characterized in that, include: Display module; The mode switching control circuit as described in any one of claims 1 to 19 is communicatively connected to the display module.

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