An LED display system adapter plate, system and bad point detection method

Abstract

The application discloses an LED display system adapter plate, system and bad point detection method, and relates to the technical field of LED display screens. The adapter plate comprises a processor, a plurality of HUB75 standard interfaces and a level conversion circuit. The interfaces are divided into forward ports configured as output modes and reverse ports configured as input modes, and the two form bidirectional data channels according to a preset pairing relationship. The level conversion circuit is arranged between the reverse ports and the processor. In the application, part of the HUB75 standard interfaces in the adapter plate is redefined from output to input, and the existing lamp panel cascade link is reused as a data backhaul channel, so that the bad point detection can be realized without changing the standard LED lamp panel hardware. The application solves the problem that the traditional scheme needs to customize lamp panels and has high modification cost, and significantly reduces the upgrade cost of inventory screens.

Description

Technical Field

[0001] This invention relates to the field of LED display control technology, and more specifically, to an LED display system adapter board, system, and method for detecting dead pixels. Background Technology

[0002] Outdoor LED display systems operate 24 / 7, constantly exposed to harsh weather conditions such as high temperatures, torrential rain, and freezing temperatures. Combined with factors like drastic temperature changes, electrostatic discharge, and impacts, the LED chips on the display panel gradually age and fail or are directly damaged. At the circuit level, chip failure manifests in two typical states: open circuit failure, where the internal gold wire breaks, preventing current flow and causing the chip to not light up; and short circuit failure, where the PN junction breaks down, creating a low-impedance path. When a chip suffers a short circuit, it triggers what the industry calls the "caterpillar phenomenon." The mechanism is that LED panels typically use a row-column scanning drive architecture. When the damaged chip is in a column, the short circuit creates an abnormal continuous loop, causing all chips in that column to remain uncontrolled and continuously lit. This results in a continuously lit line running through the entire column, resembling a glowing caterpillar, severely compromising the integrity and readability of the displayed content. This phenomenon is particularly prominent in outdoor traffic guidance screens, advertising screens, and other scenarios, directly affecting the accuracy of information transmission and the viewing experience of the audience, and may even cause safety hazards.

[0003] To promptly detect and repair defective pixels, various defect detection solutions have been developed within the industry. However, traditional solutions face significant limitations in practical engineering applications. In traditional LED chassis architectures, defect detection, as a core means of chassis health monitoring, typically requires specially designed LED boards. Specifically, the LED board must have an additional dedicated data return channel to transmit the status signal of each LED to the adapter board via an independent physical link. This means that return routing must be reserved during the LED board design phase, increasing PCB design complexity and consuming valuable wiring space. Simultaneously, the adapter board also requires specialized development, necessitating the design of corresponding return signal receiving circuits, signal conditioning circuits, and dedicated interface terminals, making it incompatible with existing chassis hardware. Even more challenging is that upgrading the defect detection function for existing LED displays requires replacing both the LED board and the adapter board, resulting in extremely high material and construction costs. This deters many operators, forcing them to tolerate defective pixels until they affect major events or safety.

[0004] The above background information is provided only to aid in understanding the inventive concept and technical solution of this invention. It does not necessarily belong to the prior art of this patent application. In the absence of clear evidence that the above information was disclosed on the filing date of this patent application, the above background information should not be used to evaluate the novelty and inventiveness of this application. Summary of the Invention

[0005] Therefore, the purpose of this invention is to provide a flexible and alternative solution that is compatible with existing display solutions, enabling efficient and reliable defect detection without modifying the LED light board hardware. This facilitates the maintenance of the LED chassis, reduces the upgrade and modification costs of existing screens, and solves the technical problems of high modification costs and the need for customized light boards in defect detection in the prior art.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] In a first aspect, the present invention provides an LED display system adapter board, comprising:

[0008] processor;

[0009] Multiple HUB75 standard interfaces are electrically connected to the processor;

[0010] The multiple HUB75 standard interfaces are divided into at least one forward port and at least one reverse port;

[0011] The forward port is configured in output mode to send a forward display data stream to the LED light panel;

[0012] The reverse port is configured in input mode to receive the reverse detection data stream from the LED light board;

[0013] The forward port and the reverse port form at least one bidirectional data channel according to a preset pairing mapping relationship.

[0014] A level conversion circuit is disposed between the reverse port and the processor for level adaptation of the reverse detection data stream.

[0015] Optionally, the LED display system adapter board has 2N HUB75 standard interfaces; where N is a positive integer.

[0016] The number of forward ports is N, which are the 1st to the Nth HUB75 standard interfaces;

[0017] The number of reverse ports is N, which are the N+1 to 2Nth HUB75 standard interfaces;

[0018] The preset pairing mapping relationship is as follows: the i-th forward port is paired with the (i+N)-th reverse port, where i is an integer from 1 to N.

[0019] Optionally, the LED display system adapter board has N bidirectional data channels;

[0020] Each of the bidirectional data channels physically shares the same cascaded link and logically carries the forward display data stream and the reverse detection data stream in a time-division manner.

[0021] Optionally, the LED display system adapter board includes a bidirectional buffer in its level conversion circuit.

[0022] The direction control pin of the bidirectional buffer is connected to the processor and is used to switch the signal transmission direction according to the working state.

[0023] The input of the bidirectional buffer is connected to the inverting port, and the output is connected to the input pin of the processor.

[0024] Optionally, in the LED display system adapter board, the processor is an FPGA or an ARM chip;

[0025] The processor is equipped with a dead pixel detection module, which generates a detection excitation signal and sends it to the LED board through the forward port, and parses the LED status data received through the reverse port.

[0026] In a second aspect, the present invention provides an LED display system, comprising:

[0027] Host computer;

[0028] The transmitting box is connected to the host computer for communication.

[0029] The aforementioned LED display system adapter board is communicatively connected to the transmitting box;

[0030] A standard LED light board is connected to the LED display system adapter board via a cascaded link;

[0031] The standard LED light board does not have a dedicated data feedback channel; its cascade output is directly connected to the reverse port of the LED display system adapter board.

[0032] Thirdly, the present invention provides a method for detecting defective pixels in an LED display system, comprising the following steps:

[0033] S1: The host computer sends a dead pixel detection command to the LED display system adapter board; the LED display system adapter board verifies its own firmware version and replies with a list of supported detection types; the host computer determines the detection strategy based on the list of detection types.

[0034] S2: The host computer initiates a defect detection process of the corresponding type; the LED display system adapter board enters the detection state and scans the standard LED light boards within its jurisdiction row by row and column by column; the host computer polls the detection progress register at fixed time intervals and refreshes the display progress information;

[0035] S3: After the test is completed, the LED display system adapter board reads the lamp bead status data returned by each standard LED board through the reverse port step by step, and temporarily stores it after internal processing;

[0036] S4: The host computer reads the overall verification value and reads the complete bad pixel data and location mapping table in batches; the host computer executes a verification algorithm on the received data to obtain a local verification value and compares it with the overall verification value; if they match, the data is determined to be valid; otherwise, a re-detection is prompted.

[0037] S5: After the verification is passed, the host computer generates a pixel grid canvas according to the chassis resolution, marks the bad points with a bright color and marks the row and column coordinates, and renders it as a visual image.

[0038] Optionally, in the defect detection method, in step S3, before reading back the data, the LED display system adapter board first sends a characteristic character code to verify the data line connection.

[0039] If a connection is determined to be faulty, the corresponding position will be filled with bad data.

[0040] Optionally, in the bad pixel detection method, in step S4, the verification algorithm is CRC32 or Checksum algorithm;

[0041] The overall verification value is pre-calculated and generated by the LED display system adapter board after the data preparation is completed.

[0042] Optionally, in the defect detection method, step S2, the row-by-row and column-by-column scanning includes:

[0043] Each row selection signal is activated sequentially, and status data of all column channels is acquired during the activation of that row;

[0044] By comparing the difference between the expected state and the actual feedback state, the row and column coordinates of the faulty LED are located.

[0045] Compared with the prior art, the present invention has the following beneficial effects:

[0046] 1. Completely eliminates the need for hardware modifications to the LED light board, achieving full compatibility.

[0047] Traditional dead pixel detection solutions require LED light boards to have additional data return channels and independent physical links, increasing the complexity of the light board design. This invention redefines some ports in the HUB75 standard interface as input ports, directly reusing the existing cascaded output ports of the light board as data return links. No additional return wiring or hardware modifications are required on the LED light board, and it is fully compatible with various conventional light boards on the market that conform to the HUB75 standard.

[0048] 2. Significantly reduce the cost of upgrading and retrofitting existing screens.

[0049] Since the light board requires no changes, upgrading the defect detection function of an existing outdoor LED display screen only requires replacing the adapter board to obtain complete defect detection capability, without the need to replace the light board simultaneously. Compared to the traditional approach that requires replacing both the light board and the adapter board, this invention significantly reduces material and on-site construction costs, resulting in outstanding economic efficiency.

[0050] 3. System-level functional upgrades can be achieved simply by modifying the adapter board design, and the scope of hardware modifications is controllable.

[0051] The innovative approach of this invention focuses on redefining the interface functions at the adapter board level—dividing the 2N HUB75 standard interfaces into two groups: the first N ports retain their original forward display data output function, while the latter N ports are converted to input mode to receive dead pixel status data transmitted back from the cascaded LED boards. The two groups of ports form a one-to-one pairing relationship according to their numbers (interface i corresponds to interface i+N), constituting N pairs of independent bidirectional data channels. The hardware modification only involves signal link direction adaptation and level compatibility processing on the adapter board side, making the design clear and easy to implement.

[0052] 4. A closed-loop data transmission and reception mechanism is established through port pairing, resulting in a simple and reliable signal link.

[0053] Each pair of channels physically shares the same cascaded link on the same LED board, and logically carries the forward display data stream and the reverse detection data stream respectively, achieving a complete data transmission and reception closed loop without adding extra physical connections. The return link path is: LED board output port → HUB75 flat cable → HUB75 return port on the adapter board → internal wiring → readback module on the adapter board. The topology is clear, and signal integrity is easily guaranteed.

[0054] 5. Level compatibility design is completed at the hardware level to ensure long-term system reliability.

[0055] For the signals on the input port side, this invention has carried out special level compatibility processing to ensure that the signal level of the cascaded lamp board output can be matched with the level of the I / O Bank of the adapter board through the 74HC245 equal level conversion device, effectively preventing device damage caused by level mismatch during long-term operation, and improving system stability and service life.

[0056] 6. The collaborative testing process between the host computer and the adapter board has a data integrity guarantee mechanism.

[0057] Before reading back the data, the adapter board sends a characteristic character code to verify the data cable connection. After the host computer reads the data, it performs a secondary verification (comparing the locally calculated verification value with the adapter board's pre-verification value). If the verification matches, the rendering stage begins; otherwise, a transmission error is reported and a re-verification is requested. This mechanism effectively avoids false detections and missed detections caused by link anomalies or data corruption, ensuring accurate and reliable dead pixel detection results.

[0058] 7. The test results are highly visualized, facilitating rapid on-site maintenance.

[0059] The host computer monitoring software renders the defective pixel data into a planar image with pixel-level precision, matching the physical resolution of the chassis. The location of the defective pixel is marked with its (X, Y) row and column coordinates, and the software supports real-time display of the detection progress and export / saving of the results file. Maintenance personnel can quickly locate the faulty LED, significantly improving on-site repair efficiency.

[0060] 8. The overall solution balances technological innovation with engineering scalability.

[0061] This invention solves the chain reaction of "special design of lamp board → special development of adapter board → high modification cost" in traditional dead pixel detection solutions from the system architecture level. It achieves a breakthrough in core functions with minimal hardware changes and has practical value for outdoor traffic guidance screens, large LED displays that operate 24 / 7, and other scenarios, and has good prospects for industrialization and promotion. Attached Figure Description

[0062] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort. Other features, objects, and advantages of the present invention will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0063] Figure 1 This is a system overall architecture diagram according to an embodiment of the present invention;

[0064] Figure 2 This is a flowchart of a defect detection process according to an embodiment of the present invention;

[0065] Figure 3 This is a schematic diagram of an adapter board interface pairing in an embodiment of the present invention;

[0066] Figure 4 This is a schematic diagram of a level conversion circuit in an embodiment of the present invention;

[0067] Figure 5 This is a flowchart illustrating the steps of a defect detection method for an LED display system according to an embodiment of the present invention. Detailed Implementation

[0068] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention. These all fall within the scope of protection of the present invention.

[0069] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0070] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0071] The present invention provides an LED display system adapter board, which aims to solve the problems existing in the prior art.

[0072] The technical solutions of the present invention and how they solve the above-mentioned technical problems will be described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of the present invention will now be described with reference to the accompanying drawings.

[0073] This invention provides a flexible and alternative solution that is compatible with existing display solutions. It can achieve efficient and reliable defect detection without modifying the LED light board hardware, thereby facilitating the maintenance of LED chassis and reducing the upgrade and transformation costs of existing screens. This solves the technical problems of high modification costs and the need for customized light boards for defect detection in existing technologies.

[0074] Example 1

[0075] like Figure 1 and Figure 3 As shown, the LED display system adapter board in this embodiment includes:

[0076] processor.

[0077] Specifically, the processor, as the core control component of the LED display system adapter board, is integrated on the adapter board circuit board and establishes electrical connections with the multiple HUB75 standard interfaces and level conversion circuits. It is configured to receive, decode, and forward display data, and control the acquisition, buffering, and readback of the reverse detection data stream during the dead pixel detection process. Under normal operating conditions, the processor parses the display data transmitted from the host computer via Ethernet through the transmitting box into a forward display data stream conforming to the HUB75 protocol format. It outputs the data frame by frame to the LED board through the corresponding forward port to complete the screen refresh. At the same time, after receiving the dead pixel detection command from the host computer, it switches to the detection mode and reads the LED status data transmitted back from the LED board through the cascaded link bit by bit through the reverse port. It performs integrity verification, buffer management, and forwarding of the readback data to the host computer, thereby achieving closed-loop detection of open circuit and short circuit faults of the entire box of LEDs without relying on hardware modifications to the LED board.

[0078] Multiple HUB75 standard interfaces are electrically connected to the processor.

[0079] Specifically, multiple HUB75 standard interfaces are arranged in an array of pin headers or female headers on the edge area of ​​the adapter board. Each interface includes RGB data lines, row select signal lines, clock signal lines, latch signal lines, and power / ground lines. The signal pins of each interface are electrically connected to the corresponding I / O pins of the processor and the input / output terminals of the level conversion circuit through internal traces, forming the physical connection hub between the adapter board and the LED light board. The multiple HUB75 standard interfaces are fully compatible with the industry-standard HUB75 interface specification in terms of electrical definition, enabling the adapter board to be directly plugged into commercially available conventional LED light boards via standard HUB75 flat cables without any adaptation modifications to the interface form or pin definition of the light board. This ensures the plug-and-play compatibility of this adapter board with existing light board hardware in existing LED displays.

[0080] The multiple HUB75 standard interfaces are divided into at least one forward port and at least one reverse port;

[0081] The forward port is configured in output mode to send a forward display data stream to the LED light panel.

[0082] Specifically, the forward port is a group of front-end ports (e.g., divided according to numbering order) from multiple HUB75 standard interfaces. In hardware design, it is configured as a unidirectional output mode, and its signal link direction is fixed from the processor to the interface pin. Each forward port is connected to the input terminal of an LED board through a standard HUB75 flat cable. It is used to output the forward display data stream after being decoded and processed by the processor—including RGB grayscale data, line scan strobe signal, shift clock and output latch signal—to the corresponding LED board in real time, driving the LED driver chip on the board to receive and display the image content.

[0083] The reverse port is configured in input mode to receive reverse detection data streams from the LED light board.

[0084] Specifically, the reverse port is a group of ports (e.g., numbered sequentially) divided from the multiple HUB75 standard interfaces. In hardware design, it is redefined as a unidirectional input mode. Its signal link direction is from the interface pin through the level conversion circuit to the input pin of the processor. Each reverse port is connected to the output or cascade output of the corresponding LED board through a standard HUB75 flat cable. It is used to receive the reverse detection data stream transmitted back from the LED board along the cascade link. The reverse detection data stream carries the open or short circuit status information of each LED on the board. During the detection process, the processor can obtain the health status of the LEDs on the entire board row by row and column by column by selecting each row of scan lines in sequence and simultaneously sampling and transmitting data from the reverse port. This port multiplexes the RGB data lines that are only used for output in the traditional HUB75 standard interface as input data lines, so that the cascade channel of the LED board has the full-duplex capability of forward display and reverse readback at the same time, without the need to lay out a dedicated data return line on the LED board.

[0085] The forward port and the reverse port form at least one bidirectional data channel according to a preset pairing mapping relationship.

[0086] Specifically, forward and reverse ports are paired according to a preset one-to-one mapping relationship to form at least one bidirectional data channel. For example, with 8 forward ports and 8 reverse ports, among the multiple HUB75 standard interfaces, the forward port numbered i and the reverse port numbered i+8 form a fixed pair. Each pair of ports physically shares the same LED light board and its cascaded links, and logically carries the forward display data stream and the reverse detection data stream, respectively. This pairing mapping relationship is fixedly defined in the processor firmware through a port address mapping table to ensure that the host computer can accurately know the physical light board position and row and column coordinates corresponding to the data read back from each reverse port when initiating bad pixel detection, thereby realizing pixel-level precise positioning and visualization rendering of the bad pixel detection results on the monitoring interface.

[0087] A level conversion circuit is disposed between the reverse port and the processor for level adaptation of the reverse detection data stream.

[0088] Specifically, such as Figure 4 As shown, a level conversion circuit is connected in series between each signal return line of the reverse port and the corresponding input pin of the processor. It consists of at least one buffer chip with bidirectional level conversion capability and its peripheral matching resistor. It is configured to perform level adaptation processing on the reverse detection data stream from the cascaded output of the LED board. Since the logic power supply level of the LED board is usually 4.2V or 5V, while the I / O Bank operating level of the processor is generally lower than this value, the level conversion circuit steps down the high-amplitude return signal at the reverse port and converts it into a safe level compatible with the processor input pin before sending it to the processor. This prevents the processor I / O pin from being damaged by breakdown or aging due to signal level mismatch during long-term operation. At the same time, the circuit provides appropriate drive capability and impedance matching in the signal transmission direction to ensure that the reverse detection data can still be accurately sampled by the processor after long-distance transmission through the HUB75 flat line, ensuring the integrity and reliability of the bad pixel status readback data.

[0089] In some embodiments, the number of multiple HUB75 standard interfaces is 2N;

[0090] The number of forward ports is N, which are the 1st to the Nth HUB75 standard interfaces;

[0091] The number of reverse ports is N, which are the N+1 to 2Nth HUB75 standard interfaces;

[0092] The preset pairing mapping relationship is as follows: the i-th forward port is paired with the (i+N)-th reverse port, where i is an integer from 1 to N.

[0093] Those skilled in the art will understand that N can be any positive integer, such as 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, or any other unlisted value. This embodiment uses N=8 as an example for illustration.

[0094] like Figure 1 and Figure 3 As shown, the adapter board includes a main control PCB board, which integrates an FPGA processing unit, 16 HUB75 standard interface sockets, and several level conversion circuit modules. The 16 HUB75 standard interfaces are arranged in two rows of 8 on the PCB board, with physical spacing conforming to standard rack mounting specifications. Among them, the 8 interfaces in the upper row (numbered 1-8) are defined as positive ports, and their internal circuit connections are completely consistent with those of traditional adapter boards: the output pins of the FPGA are connected to the corresponding pins of the HUB75 sockets after being driven by a 74HC245 buffer, and are used to send RGB display data such as R1 / R2 / G1 / G2 / B1 / B2 and control signals such as CLK, LAT, and OE to the LED light board.

[0095] The eight interfaces in the bottom row (numbered 9-16) are defined as reverse ports, and their internal circuitry has been innovatively redesigned: the RGB data pins of the HUB75 socket are no longer connected to the FPGA output, but instead connected to the FPGA input pins via another set of 74HC245 buffers. The direction control pin DIR of this 74HC245 is controlled by a GPIO of the FPGA. In detection mode, it is set high, allowing the signal to flow from the HUB75 socket to the FPGA; in normal display mode, it is set low, and its output enable pin OE is set high to a high-impedance state to avoid interference. Forward port 1 and reverse port 9 form the first pair of bidirectional data channels, forward port 2 and reverse port 10 form the second pair, and so on until forward port 8 and reverse port 16 form the eighth pair. This fixed pairing relationship is hard-coded in the FPGA firmware; during software addressing, only the forward port number is needed to calculate the corresponding reverse port number.

[0096] In this embodiment, the 74HC245 chip used in the level conversion circuit has a power supply voltage of 5V. However, its input terminal, through a network of series and pull-down resistors, ensures that even when the cascaded output of the LED board is 4.2V, it can still be correctly identified as a high level. Simultaneously, it limits the current flowing into the FPGA pins to prevent overcurrent damage. This adapter board can directly replace the original 16-port adapter board without changing any cable connections within the chassis (only the original cascaded output line needs to be reconnected to the reverse port). This embodiment achieves 100% compatibility with the standard HUB75 LED board with minimal hardware modifications, possessing extremely high market value.

[0097] In some embodiments, the number of bidirectional data channels is N;

[0098] Each of the bidirectional data channels physically shares the same cascaded link and logically carries the forward display data stream and the reverse detection data stream in a time-division manner.

[0099] Specifically, there are N bidirectional data channels, where N is a positive integer not less than 1. The specific number is determined by the number of pairing groups of the forward port and the reverse port. Each bidirectional data channel physically shares the same cascaded link, which sequentially connects a forward port of the adapter board, an LED board electrically connected to the forward port, and a reverse port correspondingly connected to the cascaded output of the LED board. This allows the forward display data stream and the reverse detection data stream to be transmitted on the same set of HUB75 physical signal lines. Logically, each bidirectional data channel... The forward display data stream and the reverse detection data stream are carried in a time-division multiplexing mechanism. During the display refresh phase, the forward port sends the forward display data stream to the LED light board via the cascaded link to drive the screen to display normally. During the dead pixel detection phase, the reverse port receives the reverse detection data stream from the LED light board via the same cascaded link to read back the LED status information. Thus, without the need for additional backhaul wiring, the same physical link is used to alternately complete data transmission and status acquisition in different timing windows, achieving non-interference and orderly switching between display and detection functions.

[0100] In some embodiments, the level shifting circuit includes a bidirectional buffer;

[0101] The direction control pin of the bidirectional buffer is connected to the processor and is used to switch the signal transmission direction according to the working state.

[0102] The input of the bidirectional buffer is connected to the inverting port, and the output is connected to the input pin of the processor.

[0103] Specifically, the level conversion circuit includes a bidirectional buffer. The direction control pin of the bidirectional buffer is electrically connected to the processor and is used to receive a direction switching signal issued by the processor according to the current working state, thereby dynamically switching the signal transmission direction. To avoid ambiguity, the terms "input terminal" and "output terminal" in this embodiment have the same meaning as in the aforementioned embodiments and do not change their meaning or indication due to the bidirectional buffer in this embodiment. The input terminal of the bidirectional buffer is connected to the signal pin of the reverse port, and the output terminal of the bidirectional buffer is connected to the input pin of the processor, thereby physically forming a level adaptation path from the reverse port to the processor. During normal system operation and bad pixel data readback, the processor configures the bidirectional buffer to be in the input direction from the reverse port to the processor through the direction control pin, so that the reverse detection data stream from the cascaded LED board is stably sent to the input pin of the processor after level step-down adaptation through the bidirectional buffer. During the link connectivity verification stage of the detection process, the processor temporarily configures the bidirectional buffer to be in the output direction from the processor to the reverse port by switching the level state of the direction control pin, so as to send feature character codes through the reverse port to verify the data line connection status. After verification, it is restored to the input direction for bit-by-bit data readback, thereby realizing controllable switching of signal transmission direction and reliable compatibility with multi-level systems on a single hardware circuit.

[0104] In some embodiments, the processor is an FPGA or an ARM chip;

[0105] The processor is equipped with a dead pixel detection module, which generates a detection excitation signal and sends it to the LED board through the forward port, and parses the LED status data received through the reverse port.

[0106] like Figure 1 As shown, the processor is an FPGA or ARM chip, serving as the core control and data processing unit of the adapter board. It contains a dead pixel detection module. This module is configured to generate a corresponding detection stimulus signal upon receiving a dead pixel detection command triggered by the host computer, and then send this signal to the LED board via the forward port to drive the LED driver chip on the board to output corresponding LED status data. Simultaneously, the module is also configured to parse the LED status data received via the reverse port from the LED board along the cascaded link, extracting open-circuit or short-circuit fault information for each LED. This information is then internally verified and processed before being temporarily stored, providing accurate basic data support for subsequent data reading, integrity verification, and pixel-level visualization rendering by the host computer.

[0107] In some embodiments, N=16. This embodiment is applicable to ultra-large LED display projects, where the adapter board interface density is higher. In this embodiment, the adapter board provides 32 HUB75 standard interfaces, divided into 16 forward ports and 16 reverse ports, forming 16 pairs of bidirectional data channels. Forward ports 1-16 are located on the left side of the PCB board, and reverse ports 17-32 are located on the right side. The pairing relationship still follows the rule of i corresponding to i+16. Due to the doubling of the number of interfaces, the FPGA is upgraded to a model with larger resources to support concurrent detection of more channels. The level conversion circuit adopts a partitioned power supply design, with each 4 pairs of channels sharing a set of power supply filter capacitors to reduce power supply noise when 32 signals are switched simultaneously. In addition, in addition to reusing the RGB data lines, the reverse ports in this embodiment also reuse the spare pin (if any) in the HUB75 standard interface as an auxiliary status feedback channel to transmit analog information such as LED board temperature and voltage, which is then sent to the FPGA after ADC conversion. Although the cost of individual hardware components increases in this embodiment, the overall system BOM cost decreases due to the reduced number of chassis, and the detection efficiency is doubled, making it particularly suitable for new large-scale projects or scenarios with extremely high requirements for detection speed. This embodiment also demonstrates the good scalability of the architecture of this invention.

[0108] like Figure 2 As shown, the defect detection process starts from "Start," with the host computer initiating a defect detection request; the processor ( Figure 2 (Illustrated by the "receiving card") After verifying the firmware, the system replies with the supported dead pixel detection types. The host computer then initiates the corresponding detection process, while the processor performs a light board scan detection (during which the host computer polls the progress and displays it in real time). After the detection is completed, the processor prepares to enter the dead pixel data readback process. The host computer reads the data group check value and receives the complete data, then calculates the local check value. Next, it checks whether the "check value comparison is consistent": if consistent, the host computer renders a chassis dead pixel image with XY row and column coordinates, which the user can view or export for download, and the process finally "ends"; if inconsistent, the system prompts an error and re-initiates the detection (the user can also manually re-initiate it), thus forming a closed-loop detection logic to ensure the accuracy and completeness of the dead pixel detection process.

[0109] Example 2

[0110] like Figure 1 As shown, an LED display system includes:

[0111] Host computer.

[0112] Specifically, the host computer is a computer device that runs LED display monitoring and management software. It establishes a communication connection with the transmitting box in the system through an Ethernet or wireless communication link. It is configured to send display screen data and system control commands to the transmitting box. In the defect detection process, it acts as the initiator of the detection process and the result presentation end. It sends defect detection commands to the LED display system adapter board, polls the detection progress, reads and verifies the returned defect data, and finally renders the detected LED bead fault information into a planar visual screen. The distribution of defective pixels is intuitively displayed on the monitoring interface in the form of highlighted marks and row and column coordinate labels, providing on-site maintenance personnel with a basis for quick location and troubleshooting.

[0113] The sending box is connected to the host computer for communication.

[0114] Specifically, the transmitting box is connected to the host computer and the LED display system adapter board via Ethernet or corresponding data interface. As an intermediate hub for data forwarding and protocol conversion, it is configured to receive display data streams and control commands sent by the host computer, encapsulate them into a communication protocol format adapted to the adapter board, and then forward them to the LED display system adapter board. At the same time, in the defect detection process, it transparently transmits detection trigger commands, progress query commands, and status readback data between the host computer and the adapter board, ensuring smooth two-way interaction of control signals and display data between various levels of the system. It does not participate in the specific execution of the defect detection algorithm, but only serves as a data channel to ensure reliable information transmission.

[0115] The LED display system adapter board is communicatively connected to the transmitting box.

[0116] Specifically, the description of the LED display system adapter board is the same as that in the foregoing embodiments, and will not be repeated here.

[0117] A standard LED light board is connected to the LED display system adapter board via a cascaded link.

[0118] The standard LED light board does not have a dedicated data feedback channel; its cascade output is directly connected to the reverse port of the LED display system adapter board.

[0119] Specifically, the standard LED light board is a conventional HUB75 standard interface LED display module using a row and column scanning drive architecture. It is connected to the forward and reverse ports of the LED display system adapter board via HUB75 flat cables to form a daisy-chain cascade topology. Its hardware circuit is designed entirely in accordance with the HUB75 standard interface specification, without any dedicated data return channels or additional return traces. During normal operation, it receives display data from the adapter board through the forward port and completes the screen refresh. In the dead pixel detection mode, it uses its existing cascaded output terminals to directly output the status data representing the open or short circuit status of each LED to the reverse port of the LED display system adapter board. Thus, without any hardware modification to the light board, it works with the adapter board to achieve closed-loop return of dead pixel detection data, fundamentally eliminating the limitation of the light board having to be specially designed for the return channel in traditional solutions.

[0120] Example 3

[0121] like Figure 5 As shown, a method for detecting defective pixels in an LED display system includes the following steps:

[0122] S1: The host computer sends a dead pixel detection command to the LED display system adapter board; the LED display system adapter board verifies its own firmware version and replies with a list of supported detection types; the host computer determines the detection strategy based on the list of detection types.

[0123] In this step, the host computer sends a dead pixel detection command to the LED display system adapter board via Ethernet and a transmitting box to initiate the pre-detection negotiation process. Upon receiving the request command, the processor within the adapter board verifies its firmware version to confirm whether the current firmware has dead pixel detection capabilities and compiles a list of dead pixel detection types supported by the current firmware. These detection types include, but are not limited to, open circuit detection, short circuit detection, and full-inspection mode. The processor then sends this list of detection types back to the host computer via the transmitting box. Based on the received list of detection types, and considering the actual configuration parameters of the target LED display screen and user requirements, the host computer selects the detection type and corresponding scanning parameters for this detection, thereby determining the final detection strategy and providing a configuration basis for the subsequent detection process.

[0124] S2: The host computer initiates a defect detection process of the corresponding type; the LED display system adapter board enters the detection state and scans the standard LED light boards within its jurisdiction row by row and column by column; the host computer polls the detection progress register at fixed time intervals and refreshes the display progress information.

[0125] In this step, the host computer initiates a corresponding type of dead pixel detection command to the LED display system adapter board according to the detection strategy determined in step S1. After receiving the start command, the processor of the adapter board switches to the dead pixel detection working state, generates a corresponding detection excitation signal through its internal dead pixel detection module, and sends the excitation signal row by row and column by column to each standard LED light board within its jurisdiction through the positive port configured as output mode, driving the LED driver chip on the light board to output a response signal representing the health status of the LED beads. During the entire detection process, the host computer periodically polls the detection progress register of the adapter board at a preset fixed time interval to obtain the number of scan lines completed or the overall progress percentage, and refreshes and displays the obtained real-time progress information in the progress bar or percentage display component of the host computer monitoring interface, so that the user can intuitively and in real time grasp the progress of the detection execution.

[0126] S3: After the test is completed, the LED display system adapter board reads the lamp bead status data returned by each standard LED board through the reverse port step by step, and temporarily stores it after internal processing.

[0127] In this step, after the adapter board completes the row-by-row, column-by-column scanning and inspection phase of all standard LED boards within its jurisdiction, the adapter board automatically enters the bad pixel data readback process. Before formally reading back the data, the adapter board first sends a characteristic character code to the LED board through the reverse port to verify whether the connection status of the current data line is normal. If the connection is abnormal, the corresponding channel data is filled with bad pixel data. After confirming that the connection is normal, the adapter board reads the LED status data returned by each standard LED board through the cascaded link through the HUB75 return port (i.e., the reverse port) which has been redefined as the input mode. This status data contains the open circuit or short circuit fault information of each LED. The original returned data read is processed, denoised, and formatted inside the adapter board and then temporarily stored in the adapter board's memory or data buffer, waiting for the host computer to read the data.

[0128] S4: The host computer reads the overall verification value and reads the complete bad pixel data and location mapping table in batches; the host computer executes a verification algorithm on the received data to obtain a local verification value and compares it with the overall verification value; if they match, the data is determined to be valid; otherwise, a re-detection is prompted.

[0129] In this step, after all the defective pixel data and the location mapping table are prepared on the adapter board, the host computer starts the data reading process. The location mapping table contains the correspondence between the row and column coordinates of the defective LED on the LED board and its physical location. First, the host computer requests and reads the overall verification value of the data group from the adapter board, and the adapter board returns the pre-calculated verification value. Then, the host computer reads the complete defective pixel data and the corresponding location mapping table from the memory of the adapter board in batches, in units of data blocks. After the data is received, the host computer performs the same verification algorithm as on the adapter board for the received complete data, calculates the local verification value, and compares it with the overall verification value obtained in step 1. If the two are consistent, the received defective pixel data is determined to be complete and valid, and the subsequent rendering stage is allowed. If the verification is inconsistent, an error is determined to have occurred during data transmission, the host computer reports the data transmission error and prompts the user to re-initiate the defective pixel detection process, thereby ensuring the accuracy and reliability of the final display result.

[0130] S5: After the verification is passed, the host computer generates a pixel grid canvas according to the chassis resolution, marks the bad points with a bright color and marks the row and column coordinates, and renders it as a visual image.

[0131] In this step, after the data verification is successful, the host computer begins to visualize and render the defective pixel detection results. The host computer first reads the verified defective pixel detection result file and, based on the width and resolution parameters of the target chassis configuration, generates a pixel grid canvas of the corresponding size in the monitoring interface. Subsequently, the host computer maps the location information of each detected defective pixel to the corresponding coordinates on the canvas, marking the specific location of the defective pixel with a highlighted color, and annotating the corresponding (X,Y) row and column coordinates next to each defective pixel marker. This transforms the abstract fault data into a planar visualization consistent with the physical resolution of the chassis. Finally, the user can intuitively view the rendered defective pixel distribution map in the host computer monitoring interface, quickly locate the physical location of the faulty LED, and perform on-site maintenance and replacement. If there are valid historical successful detection records, trend comparison and traceability analysis can also be performed.

[0132] In some embodiments, in step S3, before reading back the data, the LED display system adapter first sends a characteristic character code to verify the data line connection.

[0133] If a connection is determined to be faulty, the corresponding position will be filled with bad data.

[0134] Specifically, before formally reading the LED status data returned by each standard LED board, the processor of the LED display system adapter board first sends a preset feature character code to the corresponding cascaded link through its reverse port to verify whether the physical connection of the current data line is normal. Specifically, after sending the feature character code, the adapter board determines the connection status by detecting the link feedback signal or attempting to read back the character code. If it is determined that the data line is not properly connected, the status data of all LEDs on the LED board position governed by the channel corresponding to the data line is directly filled as bad pixel data. In the subsequent data processing and temporary storage process, the physical connection failure is accurately mapped to the LED failure record, ensuring the integrity of the data structure and the accuracy of the fault characterization of the final generated bad pixel data. This allows the host computer to accurately reflect various anomalies, including disconnection or poor contact, in the subsequent verification and rendering stages, providing accurate troubleshooting basis for on-site maintenance.

[0135] In some embodiments, in step S4, the verification algorithm is CRC32 or Checksum algorithm;

[0136] The overall verification value is pre-calculated and generated by the LED display system adapter board after the data preparation is completed.

[0137] Specifically, the verification algorithm used between the host computer and the LED display system adapter board is either the CRC32 algorithm or the Checksum algorithm. After all the bad pixel data and the location mapping table are prepared on the LED display system adapter board, the processor of the LED display system adapter board executes the CRC32 algorithm or the Checksum algorithm on the complete data group to pre-calculate and generate the corresponding overall check value, which is temporarily stored in the internal register. This pre-calculated overall check value serves as the benchmark certificate for data integrity and is requested and obtained first when the host computer starts the data reading process. Subsequently, the host computer reads the complete bad pixel data and location mapping table in batches by data block, and after all data is received, it uses the same CRC32 algorithm or Checksum algorithm to perform a second calculation on the local data to obtain the local check value. Finally, the local check value is compared with the overall check value. If the two are consistent, the data transmission is deemed valid; otherwise, a data transmission error is reported and a re-detection is prompted, thereby ensuring the accuracy and reliability of the bad pixel detection results.

[0138] In some embodiments, in step S2, the row-by-row and column-by-column scanning includes:

[0139] Each row selection signal is activated sequentially, and status data of all column channels is acquired during the activation of that row;

[0140] By comparing the difference between the expected state and the actual feedback state, the row and column coordinates of the faulty LED are located.

[0141] Specifically, scanning the standard LED light board within the jurisdiction row by row and column by column includes: In detection mode, the processor of the LED display system adapter board sequentially outputs row selection signals through its internal dead pixel detection module, activating each row of LED beads on the standard LED light board row by row; during the selection of each row, the processor sends a preset detection excitation signal to all column channels corresponding to that row via the forward port, and simultaneously collects the LED bead status data returned by each column channel via the reverse port, thereby obtaining the actual feedback status data of all column channels in that row; subsequently, the processor compares the collected actual feedback status data bit by bit with the preset expected status data, identifying column channels with abnormal responses by comparing the differences between the two, and then, combined with the currently activated row selection signal, accurately pinpointing the row and column coordinates of LED beads experiencing open-circuit or short-circuit faults. This row and column coordinate information will serve as a key basis for generating a position mapping table and subsequent upper-level computer visualization rendering.

[0142] The various embodiments described in this specification are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0143] The specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or variations within the scope of the claims, which do not affect the essence of the present invention.

Claims

1. An LED display system adapter board, characterized in that, include: processor; Multiple HUB75 standard interfaces are electrically connected to the processor; The multiple HUB75 standard interfaces are divided into at least one forward port and at least one reverse port; The forward port is configured in output mode to send a forward display data stream to the LED light panel; The reverse port is configured in input mode to receive the reverse detection data stream from the LED light board; The forward port and the reverse port form at least one bidirectional data channel according to a preset pairing mapping relationship. A level conversion circuit is disposed between the reverse port and the processor for level adaptation of the reverse detection data stream.

2. The LED display system adapter board according to claim 1, characterized in that, The number of the multiple HUB75 standard interfaces is 2N; N is a positive integer. The number of forward ports is N, which are the 1st to the Nth HUB75 standard interfaces; The number of reverse ports is N, which are the N+1 to 2Nth HUB75 standard interfaces; The preset pairing mapping relationship is as follows: the i-th forward port is paired with the (i+N)-th reverse port, where i is an integer from 1 to N.

3. The LED display system adapter board according to claim 2, characterized in that, The number of bidirectional data channels is N; Each of the bidirectional data channels physically shares the same cascaded link and logically carries the forward display data stream and the reverse detection data stream in a time-division manner.

4. The LED display system adapter board according to claim 1, characterized in that, The level conversion circuit includes a bidirectional buffer; The direction control pin of the bidirectional buffer is connected to the processor and is used to switch the signal transmission direction according to the working state. The input of the bidirectional buffer is connected to the inverting port, and the output is connected to the input pin of the processor.

5. The LED display system adapter board according to claim 1, characterized in that, The processor is an FPGA or ARM chip; The processor is equipped with a dead pixel detection module, which is used to generate a detection excitation signal and send it to the LED board through the forward port, and to parse the LED status data received through the reverse port.

6. An LED display system, characterized in that, include: Host computer; The sending box is communicatively connected to the host computer. The LED display system adapter board as described in any one of claims 1 to 5 is communicatively connected to the transmitting box; A standard LED light board is connected to the LED display system adapter board via a cascaded link; The standard LED light board does not have a dedicated data feedback channel; its cascade output is directly connected to the reverse port of the LED display system adapter board.

7. A method for detecting defective pixels in an LED display system, characterized in that, Includes the following steps: S1: The host computer sends a dead pixel detection command to the LED display system adapter board; the LED display system adapter board verifies its own firmware version and replies with a list of supported detection types; the host computer determines the detection strategy based on the list of detection types. S2: The host computer initiates a defect detection process of the corresponding type; the LED display system adapter board enters the detection state and scans the standard LED light boards within its jurisdiction row by row and column by column; the host computer polls the detection progress register at fixed time intervals and refreshes the display progress information; S3: After the test is completed, the LED display system adapter board reads the lamp bead status data returned by each standard LED board through the reverse port step by step, and temporarily stores it after internal processing; S4: The host computer reads the overall verification value and reads the complete bad pixel data and location mapping table in batches; the host computer executes a verification algorithm on the received data to obtain a local verification value and compares it with the overall verification value; if they match, the data is determined to be valid; otherwise, a re-detection is prompted. S5: After the verification is passed, the host computer generates a pixel grid canvas according to the chassis resolution, marks the bad points with a bright color and marks the row and column coordinates, and renders it as a visual image.

8. The defect detection method according to claim 7, characterized in that, In step S3, before reading back the data, the LED display system adapter first sends a characteristic character code to verify the data line connection. If a connection is determined to be faulty, the corresponding position will be filled with bad data.

9. The defect detection method according to claim 7, characterized in that, In step S4, the verification algorithm is either CRC32 or Checksum algorithm; The overall verification value is pre-calculated and generated by the LED display system adapter board after the data preparation is completed.

10. The defect detection method according to claim 7, characterized in that, In step S2, the row-by-row and column-by-column scanning includes: Each row selection signal is activated sequentially, and status data of all column channels is acquired during the activation of that row; By comparing the difference between the expected state and the actual feedback state, the row and column coordinates of the faulty LED are located.

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