Power supply circuit, power supply control method, and display device

Abstract

The present disclosure relates to the technical field of display, and discloses a power supply circuit, a power supply control method and a display device. The power supply circuit comprises: a switching converter, which outputs a first power supply voltage for powering pixel circuits of a display panel; a feedback control loop, which comprises a first compensation circuit and a second compensation circuit respectively provided with a sample-and-hold circuit, and which respectively stores loop state parameters of the feedback control loop in a non-emitting interval and an emitting interval corresponding to load states; a synchronization signal end, which receives a synchronization signal indicating an interval currently where the display panel is located; and a compensation switching circuit, which connects the first compensation circuit to the feedback control loop when the synchronization signal indicates the non-emitting interval, and connects the second compensation circuit to the feedback control loop when the synchronization signal indicates the emitting interval. The present disclosure can reduce the drop or overshoot of the output voltage, shorten the recovery time and improve the power supply stability when the load rapidly changes due to the switching between the non-emitting interval and the emitting interval.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to power supply circuits and power control technology for powering display panels. Background Technology

[0002] The descriptions in this section are intended to provide background information for the embodiments of this disclosure and should not be construed as an admission or implication that they constitute prior art.

[0003] OLED display panels are widely used in various display devices due to their advantages such as self-emissiveness and high contrast. Traditional OLED display panels typically use a progressive refresh method, where pixels in each row of a frame sequentially complete reset, compensation, and emission, keeping the entire frame in an luminous state. The load current changes continuously and slowly with each line refresh, placing lower demands on the transient performance of the power supply. To meet the high PPI requirements of near-eye display applications such as AR / VR, high-PPI OLED display panels have reduced the footprint of the pixel driving circuit. Their driving method has changed to include a non-emissive interval and an emissive interval within a frame. All pixels refresh data and do not emit light during the non-emissive interval, and emit light simultaneously upon entering the emissive interval. When switching between the non-emissive and emissive intervals, the load current undergoes a large jump in a very short time. Power supplies using traditional control methods have limited bandwidth, and the output voltage is prone to large drops or overshoots with long recovery times, leading to screen flickering or other display abnormalities. Summary of the Invention

[0004] This disclosure provides a power supply circuit, a power supply control method, and a display device. One of the technical problems it solves is how to ensure the stability of the output voltage of the power supply circuit that supplies power to the display panel when the load state changes rapidly due to the switching between the non-light-emitting and light-emitting zones of the display panel.

[0005] According to one aspect of this disclosure, a power supply circuit is provided for supplying power to a display panel, wherein a frame display time of the display panel includes a non-light-emitting interval and a light-emitting interval, the display panel does not emit light during the non-light-emitting interval and emits light during the light-emitting interval, the power supply circuit comprising: A switching converter for outputting a first power supply voltage to power the pixel circuitry of the display panel; A feedback control loop is used to adjust the output of the switching converter. The feedback control loop includes a first compensation circuit and a second compensation circuit. The first compensation circuit and the second compensation circuit are respectively provided with a sample-and-hold circuit. The first compensation circuit is used to store the loop state parameters of the feedback control loop under the load state corresponding to the non-light-emitting range through the sample-and-hold circuit of the first compensation circuit. The second compensation circuit is used to store the loop state parameters of the feedback control loop under the load state corresponding to the light-emitting range through the sample-and-hold circuit of the second compensation circuit. The synchronization signal terminal is used to receive a synchronization signal indicating that the display panel is currently in the non-light-emitting zone or the light-emitting zone; A compensation switching circuit, connected to the synchronization signal terminal, is used to connect the first compensation circuit to the feedback control loop when the synchronization signal indicates the non-light-emitting interval, and to connect the second compensation circuit to the feedback control loop when the synchronization signal indicates the light-emitting interval.

[0006] In a preferred embodiment, the first compensation circuit and the second compensation circuit each include a compensation capacitor, and the loop state parameters include the voltage across the compensation capacitor; The sample-and-hold circuit of the first compensation circuit is used to maintain the voltage across the compensation capacitor in the first compensation circuit when the first compensation circuit is not connected to the feedback control loop; The sample-and-hold circuit of the second compensation circuit is used to maintain the voltage across the compensation capacitor in the second compensation circuit when the second compensation circuit is not connected to the feedback control loop.

[0007] In a preferred embodiment, the switching converter has a pulse-skipping mode and a forced continuous conduction mode; The power supply circuit is used to control the switching converter to operate in the pulse skipping mode when the synchronization signal indicates the non-light-emitting interval, and to control the switching converter to operate in the forced continuous conduction mode when the synchronization signal indicates the light-emitting interval.

[0008] In a preferred embodiment, the switching converter is an inverting buck-boost converter, and the first power supply voltage is a negative voltage.

[0009] In a preferred embodiment, the power supply circuit further includes a voltage switching circuit, which includes a positive voltage terminal, a negative voltage terminal, and a switching output terminal. The positive voltage terminal is used to provide a positive voltage, and the negative voltage terminal is used to provide the first power supply voltage, wherein the first power supply voltage is a negative voltage. The switching output terminal is used to connect to the cathode of the light-emitting element in the display panel. The voltage switching circuit is connected to the synchronization signal terminal and is used to connect the switching output terminal to the positive voltage terminal when the synchronization signal indicates the non-light-emitting interval, and to connect the switching output terminal to the negative voltage terminal when the synchronization signal indicates the light-emitting interval.

[0010] In a preferred embodiment, the voltage switching circuit includes a P-type switch and an N-type switch, wherein the P-type switch is connected between the positive voltage terminal and the switching output terminal, and the N-type switch is connected between the negative voltage terminal and the switching output terminal; The P-type switch and the N-type switch are integrated within the chip containing the power supply circuit, or the P-type switch and the N-type switch are located outside the chip containing the power supply circuit and are driven by the drive signal output by the chip.

[0011] According to another aspect of this disclosure, a display device is provided, including a display panel, a timing controller, and a power supply circuit as described above. One frame of the display panel includes a non-light-emitting interval and a light-emitting interval. All pixels of the display panel are refreshed and do not emit light during the non-light-emitting interval, and emit light simultaneously during the light-emitting interval. The power supply circuit is used to supply power to the display panel; The timing controller is connected to the synchronization signal terminal of the power supply circuit and is used to output the synchronization signal to the power supply circuit.

[0012] In a preferred embodiment, the timing controller is used to adjust the time width of the non-emitting interval and the emitting interval according to the refresh rate and brightness of the display panel, and output the synchronization signal according to the adjusted time width.

[0013] According to another aspect of this disclosure, a power control method is provided, applied to a power supply circuit for powering a display panel, wherein a frame display time of the display panel includes a non-emitting interval and an emitting interval. The power supply circuit includes a switching converter and a feedback control loop for adjusting the output of the switching converter. The feedback control loop includes a first compensation circuit and a second compensation circuit. The first compensation circuit and the second compensation circuit are respectively provided with sample-and-hold circuits. The sample-and-hold circuit of the first compensation circuit is used to store loop state parameters of the feedback control loop under the load state corresponding to the non-emitting interval. The sample-and-hold circuit of the second compensation circuit is used to store loop state parameters of the feedback control loop under the load state corresponding to the emitting interval. The method includes: Receive a synchronization signal indicating that the display panel is currently in the non-emitting zone or the emitting zone; When the synchronization signal indicates the non-light-emitting zone, the first compensation circuit is connected to the feedback control loop, and the loop state parameters of the feedback control loop in the load state corresponding to the light-emitting zone are stored in the second compensation circuit. When the synchronization signal indicates the light-emitting interval, the second compensation circuit is connected to the feedback control loop, and the loop state parameters of the feedback control loop stored in the first compensation circuit under the load state corresponding to the non-light-emitting interval are maintained.

[0014] In a preferred embodiment, the method further includes: When the synchronization signal indicates the non-light-emitting interval, the switching converter is controlled to operate in pulse-skipping mode; When the synchronization signal indicates the light-emitting interval, the switching converter is controlled to operate in a forced continuous conduction mode.

[0015] In a preferred embodiment, the power supply circuit further includes a switching output for supplying power to the cathode of the light-emitting element in the display panel, and the method further includes: When the synchronization signal indicates the non-light-emitting zone, the switching output terminal is controlled to output a positive voltage; When the synchronization signal indicates the light-emitting interval, the switching output terminal is controlled to output a negative voltage.

[0016] In the embodiments of this disclosure, by setting a first compensation circuit and a second compensation circuit, each equipped with a sample-and-hold circuit, in the feedback control loop, the two sample-and-hold circuits store the loop state parameters of the feedback control loop under the load state corresponding to the non-light-emitting interval and the load state corresponding to the light-emitting interval, respectively. The compensation switching circuit connects the first compensation circuit to the feedback control loop in the non-light-emitting interval and the second compensation circuit to the feedback control loop in the light-emitting interval according to the synchronization signal. This allows the feedback control loop to directly switch to the loop state matching the current load state when the display panel switches between the non-light-emitting interval and the light-emitting interval and when the load current changes rapidly. This reduces the drop or overshoot of the first power supply voltage output by the switching converter, shortens the recovery time of the output voltage, improves the stability of the power supply to the pixel circuit of the display panel, avoids screen jitter or other display abnormalities caused by voltage fluctuations, and keeps the switching of the power supply circuit synchronized with the display timing of the display panel.

[0017] Furthermore, by using the voltage across the compensation capacitor as the loop state parameter and maintaining the voltage across the compensation capacitor while the compensation circuit is not connected to the feedback control loop, the loop state does not need to be re-established when the compensation circuit is reconnected to the feedback control loop, thus achieving a fast and smooth switching of the loop state.

[0018] Furthermore, by controlling the switching converter to operate in pulse skipping mode in the non-light-emitting range and in forced continuous conduction mode in the light-emitting range, power consumption can be reduced in the light-load non-light-emitting range, and power response bandwidth and load transient performance can be improved in the heavy-load light-emitting range.

[0019] Furthermore, by setting a voltage switching circuit that switches the cathode of the light-emitting element between a positive voltage and a negative first power supply voltage under the control of a synchronization signal, it is possible to ensure that the light-emitting element does not emit light and has no leakage current in the non-light-emitting range, and to ensure that the light-emitting element emits light normally in the light-emitting range.

[0020] Furthermore, voltage switching is achieved by using P-type and N-type switching transistors connected to the positive and negative voltage terminals respectively. The switching transistors can be integrated into the chip or placed outside the chip and driven by the chip. The switching scheme can be flexibly selected according to different power application scenarios, taking into account both integration and power adaptability.

[0021] Furthermore, by setting a timing controller connected to the synchronization signal terminal of the power supply circuit to output a synchronization signal to the power supply circuit, the state switching of the power supply circuit can be precisely synchronized with the non-light-emitting and light-emitting areas of the display panel.

[0022] Furthermore, by adjusting the time width of the non-emitting and emitting zones according to the refresh rate and brightness of the display panel by the timing controller and outputting a synchronization signal according to the adjusted time width, the power supply circuit can adapt to load changes under different refresh rates and brightness in real time and maintain stable power supply under various display conditions.

[0023] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Various aspects and embodiments of this disclosure can be combined in different ways. This part of the disclosure is not intended to identify key or essential features of the claimed subject matter, nor is it intended to aid in determining the scope of the claimed subject matter. Attached Figure Description

[0024] Figure 1 This is a schematic diagram showing the connection between a power supply circuit, a display panel, and a timing controller according to an embodiment of the present disclosure; Figure 2a This is a circuit diagram of a voltage switching circuit according to an embodiment of the present disclosure when a chip-embedded switching transistor is used; Figure 2b This is a circuit diagram of a voltage switching circuit according to an embodiment of the present disclosure when an external chip switching transistor is used; Figure 3 This is a control timing diagram of a voltage switching circuit according to an embodiment of the present disclosure; Figure 4 This is a schematic diagram of the structure of a switching converter, feedback control loop and compensation switching circuit according to an embodiment of the present disclosure; Figure 5 This is a control timing diagram of a compensation switching circuit according to an embodiment of the present disclosure; Figure 6 This is a control timing diagram for switching operating modes of a switching converter according to an embodiment of the present disclosure; Figure 7 This is a schematic diagram illustrating the coordination relationship between the power supply circuit and the light emission timing of the display panel according to an embodiment of the present disclosure; Figure 8a This is a schematic diagram of the load transient response waveform of the switching converter when the sample-and-hold circuit is not turned on; Figure 8b This is a schematic diagram of the load transient response waveform of a switching converter when the sample-and-hold circuit is turned on according to an embodiment of the present disclosure; Figure 9 This is a complete structural schematic diagram of a power supply circuit according to an embodiment of the present disclosure.

[0025] Figure reference numerals: 81 AVDD synchronous boost controller; 82 ELVDD synchronous boost controller; 83 control circuit; 84 ELVSSH synchronous boost controller; 85 ELVSSLA synchronous inverting controller; 86 ELVSSLB synchronous inverting controller; 87 ELVSS gate driver. Detailed Implementation

[0026] In the following description, numerous technical details are presented to enable the reader to better understand this disclosure. However, those skilled in the art will understand that the technical solutions claimed in this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0027] Example 1 This embodiment provides a power supply circuit for supplying power to a display panel. The display time of one frame for the display panel addressed in this embodiment includes a non-emitting interval and an emitting interval. The display panel does not emit light in the non-emitting interval and emits light in the emitting interval. A typical example of this type of display panel is a high-PPI OLED panel with a pixel density of over 1000 PPI, used for AR / VR near-eye displays. Traditional OLED panels mostly have a pixel density of less than 600 PPI. Their pixels are refreshed and emitted line by line, with each row of pixels' reset, compensation, and emission completed by its own independent driving circuit, resulting in a large footprint for the pixel driving circuit. To reduce the footprint of the pixel driving circuit, high-PPI OLED panels no longer use a line-by-line emission method. Instead, within a frame, they first enter a non-emitting interval, where all pixels are reset, compensated, and data written. During this period, all pixels do not emit light. Then, they enter the emitting interval, where all pixels emit light simultaneously. Taking a refresh rate of 60Hz as an example, one frame is 1 / 60s, where the non-emitting interval typically occupies most of the frame time, while the emitting interval accounts for a relatively small proportion.

[0028] Figure 7 This diagram illustrates the relationship between the power supply voltage and load current of this display panel over several frames. ELVDD represents the anode-side power supply of the pixel's light-emitting element, ELVSS represents the cathode-side power supply, ELVSSH and ELVSSL represent the positive and negative voltages generated internally by the power supply circuit, respectively, and IOUT represents the load current drawn by the pixel circuit from the power supply circuit. It can be seen that the load current IOUT is close to zero in the non-light-emitting zone, while in the light-emitting zone, all pixels emit light simultaneously, resulting in a relatively large and stable load current IOUT. The load current jumps at the boundary between the non-light-emitting and light-emitting zones, with the jump time typically within 1 μs. The same applies when transitioning from the light-emitting zone to the non-light-emitting zone. This regular and extremely fast load switching places high demands on the transient load performance of the power supply circuit. Excessive output voltage fluctuations or long recovery times can cause image jitter or other image abnormalities. The power supply circuit in this embodiment is designed specifically to address this characteristic.

[0029] Figure 1The connection relationship between the power supply circuit, display panel, and timing controller in this embodiment is illustrated. The power supply circuit can be implemented as a power management chip (PMIC), which outputs ELVDD and ELVSS power supplies to power the pixel circuits in the display panel, and AVDD power supply to power the driver chip. ELVDD and AVDD are boost power supplies, and ELVSS switches between ELVSSH and ELVSSL internally. A communication and control interface is provided between the power supply circuit and the timing controller (TCON), including an I2C interface, an EN pin, a FAULTB pin, and a DRV_IN pin. The I2C interface is used by the timing controller to read and write the configuration registers of the power supply circuit, such as setting the output voltage values ​​of each power supply, power-on / off timing, and other parameters. The EN pin is used by the timing controller to enable the power supply circuit. The FAULTB pin is used by the power supply circuit to report a fault to the timing controller. The DRV_IN pin is the synchronization signal terminal in this embodiment, used to receive a synchronization signal from the timing controller, which indicates whether the display panel is currently in a non-emitting or emitting range. In this embodiment, a high level of the synchronization signal indicates a non-light-emitting region, and a low level indicates a light-emitting region. Of course, the opposite polarity can also be used, as long as the power supply circuit and the timing controller agree on this convention.

[0030] Figure 4 The structure of the parts of the power supply circuit in this embodiment that are directly related to the transient response of the load is shown, including the switching converter, feedback control loop, synchronization signal terminal and compensation switching circuit, which will be described below.

[0031] The switching converter is used to output the first power supply voltage to power the pixel circuitry of the display panel. Figure 4 In this switching converter, the input terminal VIN receives the input voltage, and the output terminal VOUT outputs the first power supply voltage. The power stage of the switching converter includes an input capacitor CIN, a switching transistor Q3, an inductor L, a switching transistor Q4, and an output capacitor COUT. Switch Q3 is connected between the input terminal VIN and one end of the inductor L, and switch Q4 is connected between that end of the inductor L and the output terminal VOUT. The other end of the inductor L is grounded. The input capacitor CIN is connected between the input terminal VIN and ground, and the output capacitor COUT is connected between the output terminal VOUT and ground. Switches Q3 and Q4 are driven by gate drive signals GateDrive1 and GateDrive2, respectively. By controlling the alternating conduction of switches Q3 and Q4, the inductor L periodically stores and releases energy, thereby establishing the required first power supply voltage at the output terminal VOUT. Figure 4The power stage shown is a topology of an inverting buck-boost converter, but the specific topology of the switching converter is not limited to this. Depending on the polarity and amplitude requirements of the first power supply voltage, the switching converter can also be a boost converter, a buck converter, or other types of switching converters. For example, when the first power supply voltage is the anode-side power supply ELVDD of the pixel light-emitting element, the switching converter can be a boost converter. Switches Q3 and Q4 can be MOSFETs integrated inside the chip where the power supply circuit is located. In high-power applications, external MOSFETs can also be used and driven by the chip's output gate drive signal.

[0032] The feedback control loop is used to regulate the output of the switching converter. Figure 4 In this circuit, the feedback control loop includes a voltage divider network consisting of feedback resistors RFBH and RFBL, a transconductance amplifier Gm, a reference voltage source VREF, a comparator, logic control circuitry, and a driver stage that generates gate drive signals GateDrive1 and GateDrive2. Feedback resistors RFBH and RFBL are connected in series between the output terminal VOUT and the reference voltage source VREF. The connection point serves as the feedback node, connected to the non-inverting input of the transconductance amplifier Gm. The inverting input of the transconductance amplifier Gm is grounded. The target output voltage is determined by the voltage value of the reference voltage source VREF and the ratio of the feedback resistors RFBH and RFBL. The transconductance amplifier Gm compares the voltage at the feedback node with the ground potential and outputs a current proportional to the error. This current charges and discharges the compensation network connected to the output of the transconductance amplifier Gm, thereby forming the error amplification signal VCOMP at the output of the transconductance amplifier Gm. The error amplification signal VCOMP is input to one input of the comparator. The other input receives the superposition of the current detection signal and the slope compensation signal. The current detection signal reflects the rising segment of the current flowing through the switching transistor Q3, i.e., the inductor current. The slope compensation signal is used to suppress subharmonic oscillations when the duty cycle is large. The comparison result of the comparator is sent to the logic control circuit, which determines the turn-off time of the switching transistor Q3 in each switching cycle and generates gate drive signals GateDrive1 and GateDrive2. In this way, the feedback control loop forms a closed-loop system in peak current control mode. The error amplification signal VCOMP determines the peak inductor current in each switching cycle, thereby determining the energy transferred to the output. When the output voltage deviates from the target value, the error amplification signal VCOMP changes accordingly to bring the output voltage back to the target value. Of course, the feedback control loop can also adopt a voltage control mode, in which case the error amplification signal VCOMP is directly compared with a fixed slope signal to generate a pulse width modulation signal. This embodiment does not limit this.

[0033] In this embodiment, the compensation network of the feedback control loop is not a single set, but includes a first compensation circuit and a second compensation circuit. Figure 4 The first compensation circuit and the second compensation circuit are shown in two dashed boxes. The first compensation circuit includes a switch S1 and a compensation resistor RCOMP1 and a compensation capacitor CCOMP1 connected in series. The second compensation circuit includes a switch S2 and a compensation resistor RCOMP2 and a compensation capacitor CCOMP2 connected in series. The first compensation circuit is connected to the output of the transconductance amplifier Gm via switch S1, and the second compensation circuit is connected to the output of the transconductance amplifier Gm via switch S2. In this disclosure, "connecting" a compensation circuit to the feedback control loop means connecting the compensation circuit to the output of the transconductance amplifier Gm and participating in loop compensation by closing the switch corresponding to the compensation circuit. "Not connecting" a compensation circuit to the feedback control loop means that the switch corresponding to the compensation circuit is open, and the compensation circuit does not participate in loop compensation. The resistance and capacitance values ​​of the first and second compensation circuits can be designed separately to correspond to different loop bandwidths and phase margins. The first compensation circuit is designed for the load state corresponding to the non-light-emitting region, i.e., light load or no-load state, while the second compensation circuit is designed for the load state corresponding to the light-emitting region, i.e., heavy load state. The specific form of the compensation circuit is not limited to Figure 4 The resistor and capacitor shown in series can also be connected in parallel across the resistor-capacitor series branch, or other forms of compensation networks can be used. Those skilled in the art can select the appropriate network based on the power stage parameters of the switching converter.

[0034] The first and second compensation circuits are each equipped with a sample-and-hold circuit. The first compensation circuit stores the loop state parameters of the feedback control loop under the load state corresponding to the non-light-emitting range through its sample-and-hold circuit. The second compensation circuit stores the loop state parameters of the feedback control loop under the load state corresponding to the light-emitting range through its sample-and-hold circuit. Here, the loop state parameters refer to the internal quantities that determine the operating point of the switching converter when the feedback control loop reaches steady state. Figure 4 In the peak current control mode shown, the most direct loop state parameter is the error amplification signal VCOMP, which is reflected in the voltage across the compensation capacitor. Figure 4In this circuit, the sample-and-hold circuit of each compensation circuit consists of a compensation capacitor and a switch connected in series with it. Specifically, when switch S1 is closed, compensation capacitor CCOMP1 is connected to the output of transconductance amplifier Gm through compensation resistor RCOMP1. The voltage across CCOMP1 changes with the loop adjustment process and eventually stabilizes at a value corresponding to the current load state. This process is equivalent to sampling the loop state parameters. When switch S1 is open, the node containing compensation capacitor CCOMP1 becomes a high-impedance state, and the voltage across CCOMP1 is held. This process is equivalent to holding the loop state parameters. The coordination between switch S2 and compensation capacitor CCOMP2 in the second compensation circuit is the same. Since switches S1 and S2 can be MOS switches with very low leakage current, the voltage change held by the compensation capacitor within a non-light-emitting or light-emitting time scale is very small, which meets the requirements. As another implementation, the sample-and-hold circuit can also be composed of a separate holding capacitor and a buffer amplifier. During the period when the compensation circuit is connected to the feedback control loop, the error amplification signal VCOMP is continuously tracked and stored in the holding capacitor. When the compensation circuit is disconnected from the feedback control loop, the holding capacitor maintains the voltage at the time of disconnection. When the compensation circuit is reconnected to the feedback control loop, the voltage on the holding capacitor is preset onto the compensation capacitor through the buffer amplifier. Those skilled in the art can choose according to the chip area and accuracy requirements.

[0035] Synchronization signal terminal Figure 4 The DRV_IN pin is used to receive a synchronization signal indicating whether the display panel is currently in the non-illuminating or illuminating zone. This synchronization signal is generated by the timing controller. The synchronization signal terminal is connected to the logic control circuit, which detects the level of the synchronization signal.

[0036] The compensation switching circuit is connected to the synchronization signal terminal, used to connect the first compensation circuit to the feedback control loop when the synchronization signal indicates a non-light-emitting range, and to connect the second compensation circuit to the feedback control loop when the synchronization signal indicates a light-emitting range. Figure 4In the compensation switching circuit, the part of the logic control circuit that generates control signals for switches S1 and S2 based on the synchronization signal is included. The compensation switching circuit realizes the switching of the compensation circuit by controlling the on and off of switches S1 and S2. That is, switches S1 and S2 are both components of the sample-and-hold circuit of their respective compensation circuits and are used as switching elements under the control of the compensation switching circuit. Switches S1 and S2 can be analog switches composed of MOS transistors. The logic control circuit detects the synchronization signal. When the synchronization signal is high, it determines that the display panel is in the non-light-emitting zone, closes control switch S1 and opens switch S2. At this time, the first compensation circuit is connected to the feedback control loop, and the first compensation circuit controls the switching converter to work. The first compensation circuit is suitable for the switching converter to work in a light-load state, while the compensation capacitor CCOMP2 of the second compensation circuit keeps its voltage constant. When the synchronization signal is low, it determines that the display panel is in the light-emitting zone, closes control switch S2 and opens switch S1. At this time, the second compensation circuit is connected to the feedback control loop, and the second compensation circuit controls the switching converter to work. The second compensation circuit is suitable for the switching converter to work in a heavy-load state, while the compensation capacitor CCOMP1 of the first compensation circuit keeps its voltage constant. Figure 5 The diagram illustrates the correspondence between the synchronization signal DRV_IN and the states of switches S1 and S2. It shows that in each non-light-emitting zone, switch S1 is closed and switch S2 is open; in each light-emitting zone, switch S1 is open and switch S2 is closed. The state of switch S1 corresponds one-to-one with the high and low levels of the synchronization signal, and the state of switch S2 is complementary to that of switch S1. To avoid the two compensation capacitors being briefly connected in parallel and mutually charging and discharging during switching, the logic control circuit can use a "break-then-close" method to control switches S1 and S2. That is, first open the previously closed switch, then close the other switch, with the interval between the two being much shorter than the time width of the non-light-emitting and light-emitting zones.

[0037] The working principle of the power supply circuit in this embodiment is explained below. Since the load current of the display panel periodically switches between the non-emitting and emitting zones, and the load states corresponding to the non-emitting and emitting zones are basically the same in each frame, the steady-state loop parameters of the feedback control loop under these two load states are also basically fixed values. In the non-emitting zone, the first compensation circuit is connected to the feedback control loop. The feedback control loop operates under light load and reaches a steady state. The voltage across the compensation capacitor CCOMP1 is the value of the error amplification signal VCOMP under light load. Simultaneously, the compensation capacitor CCOMP2 maintains the voltage at the end of the previous emitting zone, i.e., the value of the error amplification signal VCOMP under heavy load. When the synchronization signal flips to indicate entry into the emitting zone, the compensation switching circuit opens switch S1 and closes switch S2. The error amplification signal VCOMP immediately jumps to the value maintained by the compensation capacitor CCOMP2 under heavy load. The switching converter does not need to undergo the process of slow charging of the compensation capacitor by the transconductance amplifier, but directly operates with a peak current matching the heavy load, thus providing energy matching the load to the output in the first switching cycle after the load current jump. Similarly, when the synchronization signal flips to indicate the entry into the non-light-emitting range, the compensation switching circuit disconnects switch S2 and closes switch S1. The error amplification signal VCOMP immediately returns to the value maintained by the compensation capacitor CCOMP1 under light load conditions. The switching converter immediately reduces the output energy to avoid output voltage overshoot when the load suddenly disappears. During the period when each compensation circuit is connected to the feedback control loop, the feedback control loop still normally performs closed-loop regulation of the output voltage. Therefore, even if there is a slight difference between the maintained voltage and the actual required value due to factors such as input voltage, temperature, or switch leakage, it will be automatically corrected by the feedback control loop after connection and will not accumulate.

[0038] Figure 8a and Figure 8b The comparison shows the load transient response with the sample-and-hold circuit off and on, where IOUT is the load current, VCOMP is the error amplification signal, and VOUT is the output voltage of the switching converter. Figure 8a In this case, the sample-and-hold circuit is not activated, meaning only one set of compensation circuitry is used to compensate the feedback control loop. When the load current IOUT suddenly increases upon entering the light-emitting region, the error amplification signal VCOMP needs to be charged by the transconductance amplifier Gm to gradually rise to the value corresponding to the heavy load. Due to the loop bandwidth limitation, this process takes a long time and is accompanied by overshoot, resulting in a significant deviation in the output voltage VOUT and a long recovery time. Similarly, when the load current IOUT suddenly decreases upon entering the non-light-emitting region, the error amplification signal VCOMP also needs to decrease slowly and is accompanied by undershoot, causing the output voltage VOUT to deviate significantly again. Figure 8bIn this circuit, the sample-and-hold circuit is activated, and the error amplification signal VCOMP jumps directly to the held target value at the moment of load switching. This significantly reduces the drop and overshoot of the output voltage VOUT, and significantly shortens the recovery time. Therefore, the power supply circuit in this embodiment can significantly improve the transient response to regular, rapid load switching without increasing the bandwidth of the feedback control loop, reducing output voltage drops or overshoots, and shortening the recovery time, thereby avoiding screen flickering or other display abnormalities caused by power supply voltage fluctuations.

[0039] The basic structure and working principle of the power supply circuit of this embodiment have been described above. Those skilled in the art can implement this power supply circuit based on the above description. Several optional improvements to this embodiment are described below.

[0040] In some optional implementations, the first compensation circuit and the second compensation circuit each include a compensation capacitor, and the loop state parameters include the voltage across the compensation capacitor. For example... Figure 4 As shown, the first compensation circuit includes a compensation capacitor CCOMP1, and the second compensation circuit includes a compensation capacitor CCOMP2. The sample-and-hold circuit of the first compensation circuit is used to hold the voltage across the compensation capacitor CCOMP1 when the first compensation circuit is not connected to the feedback control loop. The sample-and-hold circuit of the second compensation circuit is used to hold the voltage across the compensation capacitor CCOMP2 when the second compensation circuit is not connected to the feedback control loop. The advantage of using the voltage across the compensation capacitor as the loop state parameter is that the compensation capacitor itself is both a loop compensation element and a holding element, eliminating the need for additional storage elements and conversion circuits, simplifying implementation, and eliminating quantization errors during switching. It should be noted that the loop state parameter can also take other forms. For example, in a digitally controlled switching converter, the loop state parameter can be the integrator state quantity in the digital compensator. In this case, the sample-and-hold circuit can be implemented by a register, storing the integrator state quantities under two load states respectively and loading them into the digital compensator during switching.

[0041] As a preferred but not mandatory improvement, the switching converter can be an inverting buck-boost converter with a negative first supply voltage. As mentioned earlier, Figure 4 The power stage shown is an inverting buck-boost converter, whose output terminal VOUT outputs a negative voltage. This negative voltage can be used as the cathode-side power supply for the pixel light-emitting element. Figure 1In OLED panels, the cathode-side power supply typically requires a negative voltage between -1V and -16V, while the input voltage is usually the voltage of a single lithium-ion battery. An inverting buck-boost converter can directly generate the required negative voltage from a positive input voltage. Since all the luminous current from the pixel's light-emitting element flows through the cathode-side power supply, the load transitions on the cathode-side power supply are the most severe. Therefore, employing the switching scheme of the first and second compensation circuits described above in the inverting buck-boost converter that generates the cathode-side power supply yields a particularly significant improvement. Of course, the above scheme can also be applied to a boost converter that generates ELVDD, in which case the first power supply voltage is positive.

[0042] Based on the above scheme, the switching converter can be further equipped with Pulse Skipping Mode (PSM) and Forced Continuous Conduction Mode (FCCM). The power supply circuit controls the switching converter to operate in Pulse Skipping Mode when the synchronization signal indicates the non-light-emitting interval, and controls the switching converter to operate in Forced Continuous Conduction Mode when the synchronization signal indicates the light-emitting interval. Figure 6 The control logic for this operating mode switching is illustrated. The logic control circuit generates an internal mode selection signal EL_MOD_SEL based on the synchronization signal DRV_IN. When the synchronization signal is high, indicating a non-emitting region, the mode selection signal EL_MOD_SEL is low, and the switching converter operates in pulse-skipping mode. When the synchronization signal is low, indicating an emitting region, the mode selection signal EL_MOD_SEL is high, and the switching converter operates in forced continuous conduction mode. In pulse-skipping mode, when the load is very light, the logic control circuit skips some switching cycles, reducing the number of switching operations and thus reducing switching losses and static power consumption in the non-emitting region. In forced continuous conduction mode, the switching converter performs switching operations in every switching cycle and allows the inductor current to flow in reverse. There is no mode boundary between light and heavy loads in the loop, resulting in a higher response bandwidth, which is beneficial for further reducing voltage drops in the emitting region and shortening recovery time. Figure 6 In this context, PSM represents pulse skipping mode, and FCCM represents forced continuous conduction mode. Figure 6 The diagram also illustrates the switching of the operating modes of the ELVDD and ELVSSL power supplies according to the synchronization signal. This means that multiple switching converters supplying power to the pixel circuits in the power supply circuit can simultaneously switch operating modes under the control of the same synchronization signal. It should be noted that operating mode switching is not a necessary condition for implementing this embodiment. The switching converters can also always operate in a forced continuous conduction mode, in which case improved load transient performance can still be obtained through the switching between the first and second compensation circuits.

[0043] Example 2 This embodiment, based on Embodiment 1, further adds a voltage switching circuit to the power supply circuit, enabling the cathode-side power supply of the pixel light-emitting element to switch between positive and negative voltages depending on whether it is in the non-light-emitting or light-emitting zone. This ensures that the display panel does not emit light and has no leakage current in the non-light-emitting zone. In the power supply system of a traditional OLED panel, ELVDD is a fixed positive voltage and ELVSS can only be a negative voltage. If this is directly applied to a high PPI OLED panel where all pixels emit light simultaneously, it is difficult to guarantee that the pixel circuit does not emit light or has no leakage current in the non-light-emitting zone. The voltage switching circuit in this embodiment is used to solve this problem.

[0044] Specifically, the power supply circuit also includes a voltage switching circuit, which includes a positive voltage terminal, a negative voltage terminal, and a switching output terminal. The positive voltage terminal is used to provide a positive voltage, the negative voltage terminal is used to provide a first power supply voltage, which is a negative voltage, and the switching output terminal is used to connect to the cathode of the light-emitting element in the display panel. (Refer to...) Figure 1 The positive voltage terminal corresponds to the ELVSSH generated internally in the power supply circuit, the negative voltage terminal corresponds to the ELVSSL, and the switching output terminal corresponds to the ELVSS. The ELVSS is connected to the cathode of the light-emitting element in the display panel. The ELVSSH can be generated by a boost converter inside the power supply circuit, while the ELVSSL is generated by the inverting buck-boost converter in Embodiment 1. The voltage switching circuit is connected to the synchronization signal terminal and is used to turn on the switching output terminal with the positive voltage terminal when the synchronization signal indicates a non-light-emitting interval, and to turn on the switching output terminal with the negative voltage terminal when the synchronization signal indicates a light-emitting interval.

[0045] Figure 2a and Figure 2b Two specific implementations of the voltage switching circuit are shown. The voltage switching circuit includes a P-type switch Q1 and an N-type switch Q2. The P-type switch Q1 is connected between the positive voltage terminal ELVSSH and the switching output terminal ELVSS, and the N-type switch Q2 is connected between the negative voltage terminal ELVSSL and the switching output terminal ELVSS. The gates of the P-type switch Q1 and the N-type switch Q2 are driven by the drive signals DRV_ELVSSH and DRV_ELVSSL output from the ELVSS gate driver, respectively. The ELVSS gate driver internally has a push-pull drive stage for the P-type switch Q1, with its high-level power supply being ELVSSH and its low-level power supply being ground. For the N-type switch Q2, there is another push-pull drive stage, with its high-level power supply being the internal chip power supply VDD and its low-level power supply being ELVSSL. In this way, the drive signal DRV_ELVSSH swings between ELVSSH and ground, and the drive signal DRV_ELVSSL swings between VDD and ELVSSL, which can ensure that the two switches reliably turn on and off within their respective voltage domains.

[0046] exist Figure 2a In the implementation shown, the P-type switch Q1 and the N-type switch Q2 are integrated into the chip containing the power supply circuit. The ELVSS gate driver directly drives the internal switch. The DRV_ELVSSH and DRV_ELVSSL pins of the chip can be omitted. This method requires fewer external components and occupies less area, making it suitable for low- to medium-power applications. Figure 2b In the implementation shown, the P-type switch Q1 and the N-type switch Q2 are located outside the chip where the power supply circuit is located. They are driven by the drive signals output by the chip through the DRV_ELVSSH and DRV_ELVSSL pins. This method can select the appropriate external switch according to the actual light-emitting current, avoiding excessive power consumption and heat generation inside the chip. It is suitable for medium and high power applications. Figure 2b The internal switches of the chip, shown in gray, are not used in this implementation. Alternatively, as... Figure 2a and Figure 2b As shown, a set of switching transistors is integrated inside the chip, and a drive pin is brought out. Users can choose to use the chip's built-in switching transistors or external switching transistors according to the actual power scenario. When the application scenario has low power, the built-in switching transistors are used, and when the application scenario has high power, the external switching transistors are used.

[0047] Figure 3 The control timing of the voltage switching circuit in each frame is shown. When the power supply circuit detects that the synchronization signal DRV_IN is high, it indicates that the display panel is in the non-light-emitting zone. The ELVSS gate driver controls the drive signal DRV_ELVSSH to low, turning on the P-type switch Q1. At the same time, it controls the drive signal DRV_ELVSSL to low, turning off the N-type switch Q2. Thus, the output terminal ELVSS is switched to conduct with the positive voltage terminal ELVSSH, outputting a positive voltage. At this time, the voltage across the light-emitting element is the difference between ELVDD and ELVSSH. This difference is lower than the turn-on voltage of the light-emitting element, so the light-emitting element is in the off state and there is no leakage current. When the power supply circuit detects that the synchronization signal DRV_IN is low, it indicates that the display panel is in the light-emitting zone. The ELVSS gate driver controls the drive signal DRV_ELVSSL to be high, turning on the N-type switch Q2. Simultaneously, it controls the drive signal DRV_ELVSSH to be high, turning off the P-type switch Q1. This switches the output terminal ELVSS to the negative voltage terminal ELVSSL, outputting a negative voltage. At this time, the voltage across the light-emitting element is the difference between ELVDD and ELVSSL, and the light-emitting element conducts normally and emits light. To avoid a shoot-through current between ELVSSH and ELVSSL caused by the simultaneous conduction of the P-type switch Q1 and the N-type switch Q2, the ELVSS gate driver can set a dead time between the toggles of the two drive signals.

[0048] Since the voltage switching circuit and the compensation switching circuit in Embodiment 1 share the same synchronization signal terminal, the switching of the voltage switching circuit to the switching output terminal and the switching of the compensation switching circuit to the compensation circuit are performed synchronously. At the instant the switching output terminal switches from the positive voltage terminal to the negative voltage terminal, all pixels on the display panel simultaneously begin to emit light, and the load current jumps from approximately zero to the heavy load value. Simultaneously, the second compensation circuit is connected to the feedback control loop, and the inverting buck-boost converter generating the ELVSSL immediately operates at the operating point corresponding to the heavy load. The two work together to keep the ELVSSL stable during load transitions. At the instant the switching output terminal switches back from the negative voltage terminal to the positive voltage terminal, the load current disappears, and the first compensation circuit simultaneously connects to the feedback control loop to prevent ELVSSL overshoot.

[0049] It should be noted that the voltage switching circuit in this embodiment is not a necessary condition for implementing this disclosure. When the display panel itself can reliably cut off the current path of the light-emitting element in the non-light-emitting range through the light-emitting control transistor inside the pixel circuit, the cathode-side power supply can always be connected to a negative voltage. In this case, the solution of Embodiment 1 can also improve the load transient performance of the power supply circuit.

[0050] Example 3 This embodiment provides a display device, such as... Figure 1 As shown, the display device includes a display panel, a timing controller TCON, and the power supply circuit described in Embodiment 1 or Embodiment 2. One frame of display time for the display panel includes a non-illuminating interval and an illuminating interval. All pixels of the display panel refresh data and do not emit light during the non-illuminating interval, while illuminating light simultaneously during the illuminating interval. The display panel can be an OLED panel with a pixel density of 1000 PPI or higher, suitable for near-eye display applications such as AR / VR and wearable devices. Each pixel of the display panel receives display data through a driver chip, which is powered by AVDD output from the power supply circuit. The pixel circuits of the display panel are powered by ELVDD and ELVSS output from the power supply circuit, where ELVSS can be switched between ELVSSH and ELVSSL using the voltage switching circuit of Embodiment 2.

[0051] The power supply circuit supplies power to the display panel. Its structure and operating principle are as described in Embodiments 1 and 2, and will not be repeated here. The timing controller is connected to the synchronization signal terminal of the power supply circuit, namely the DRV_IN pin, and is used to output a synchronization signal to the power supply circuit. The timing controller is responsible for generating the scan timing and data timing of the display panel, and controls the display panel to switch between the non-emitting and emitting zones through the driver chip. Therefore, the timing controller accurately knows which zone in a frame it is currently in. When controlling the display panel to enter the non-emitting zone, the timing controller sets the synchronization signal to a high level; when controlling the display panel to enter the emitting zone, the timing signal sets the synchronization signal to a low level. This ensures that the switching of the compensation circuit, the switching of the operating mode, and the switching of the cathode-side power supply in the power supply circuit are strictly synchronized with the emitting timing of the display panel. In addition, the timing controller also configures the power supply circuit through the I2C interface, enables the power supply circuit through the EN pin, and receives fault reports from the power supply circuit through the FAULTB pin.

[0052] Figure 7 This illustration demonstrates the coordinated relationship between the power supply circuit and the display panel's light-emitting timing in this embodiment. The power supply circuit outputs stable DC voltages ELVDD, ELVSSH, and ELVSSL. ELVSS, under the control of the synchronization signal output by the timing controller, equals ELVSSH in the non-light-emitting zone and ELVSSL in the light-emitting zone, forming an AC output that switches between positive and negative voltages, synchronized with the frame timing. The load current IOUT exists only in the light-emitting zone and is close to zero in the non-light-emitting zone. Because the switching of ELVSS is synchronized with the pixel's light-emitting timing and the switching speed is fast, the display panel is reliably turned off in the non-light-emitting zone and emits light normally in the light-emitting zone. The power supply circuit, using the same synchronization signal, completes the switching of the compensation circuit simultaneously with the load current transition, keeping ELVSSL stable.

[0053] In some optional implementations, the timing controller adjusts the time width of the non-emitting and emitting zones according to the refresh rate and brightness of the display panel, and outputs a synchronization signal according to the adjusted time width. For a display panel where all pixels emit light simultaneously, the screen brightness can be controlled by adjusting the time width of the emitting zone within a frame; the longer the emitting zone, the brighter the screen. When the refresh rate changes, the total time of a frame changes accordingly, and the time width of the non-emitting and emitting zones also needs to be adjusted accordingly. After adjusting the time width, the timing controller outputs a synchronization signal according to the new time width. The power supply circuit does not need to be reconfigured through the I2C interface and can automatically follow the new timing to complete the switching of the compensation circuit, operating mode, and cathode-side power supply. In this way, the display device of this embodiment can adapt to different refresh rate and brightness settings. When the timing controller does not perform this dynamic adjustment, the time width of the non-emitting and emitting zones is fixed, and the display device can still work normally.

[0054] Figure 9 A complete example of the power supply circuit in this embodiment is shown. This power supply circuit is implemented with a single power management chip, including an AVDD synchronous boost controller 81, an ELVDD synchronous boost controller 82, a control circuit 83, an ELVSSH synchronous boost controller 84, an ELVSSLA synchronous inverting controller 85, an ELVSSLB synchronous inverting controller 86, and an ELVSS gate driver 87. The AVDD synchronous boost controller 81 drives a pair of power switches internally, and, in conjunction with an inductor connected between the VIN and LX_AVDD pins and an output capacitor on the AVDD pin, boosts the input voltage VIN to generate AVDD, which powers the driver chip. The ELVDD synchronous boost controller 82 similarly drives a pair of power switches internally, and, in conjunction with an inductor connected between the VIN and LX_ELVDD pins and an output capacitor on the ELVDD pin, generates ELVDD. The ELVSSH synchronous boost controller 84, in conjunction with an inductor connected between the LX_ELVSSH pin and VIN and an output capacitor on the ELVSSH pin, generates a positive voltage ELVSSH. The ELVSSLA synchronous inverting controller 85 and the ELVSSLB synchronous inverting controller 86 are two-channel inverting buck-boost converters. They are connected to external inductors via the LX_ELVSSLA and LX_ELVSSLB pins, respectively, and receive input voltage via the PVIN_ELVSSA and PVIN_ELVSSB pins. Their outputs, ELVSSLA and ELVSSLB, are connected in parallel outside the chip as a negative ELVSSL output. This parallel connection can share the large load current within the light-emitting range and reduce output ripple. Each inverting controller internally includes the first compensation circuit, second compensation circuit, and compensation switching circuit described in Embodiment 1. The ELVSS gate driver 87 corresponds to the ELVSS gate driver in Embodiment 2. It drives the internal P-type switch Q1 and N-type switch Q2, switching the ELVSSH or ELVSSL output to the ELVSS pin. Simultaneously, it outputs drive signals via the DRV_ELVSSH and DRV_ELVSSL pins to drive external switches when needed. The control circuit 83 is bidirectionally connected to each controller. The control circuit 83 receives the configuration of the timing controller through the I2C interface composed of the SDA pin and the SCL pin, receives the enable signal through the EN pin, reports the fault through the FAULTB pin, and receives the synchronization signal through the DRV_IN pin. Based on the synchronization signal, it uniformly controls the switching of the compensation circuit and the switching of the working mode of each controller, as well as the switching action of the ELVSS gate driver 87.

[0055] As an example, the system parameters of this power supply circuit can be set to an input voltage VIN of 3.7V, AVDD of 7.6V, ELVDD of 4.6V, ELVSSH of 4V, and ELVSSL of -10V. Under these parameters, the voltage across the light-emitting element in the non-emitting zone is the difference between ELVDD and ELVSSH, which is 0.6V, lower than the turn-on voltage of the OLED light-emitting element, ensuring reliable shutdown. In the emitting zone, the voltage across the light-emitting element is the difference between ELVDD and ELVSSL, which is 14.6V, meeting the requirements for normal operation of the pixel circuit and the light-emitting element. The above parameters are merely examples; the output voltage of each power supply can be configured by the timing controller via the I2C interface according to the actual needs of the display panel.

[0056] Example 4 This embodiment provides a power control method applied to a power supply circuit for powering a display panel. This power supply circuit can be any one of the power supply circuits described in Embodiments 1 to 3. One frame of display time for the display panel includes a non-emitting interval and an emitting interval. The power supply circuit includes a switching converter and a feedback control loop for adjusting the output of the switching converter. The feedback control loop includes a first compensation circuit and a second compensation circuit. Both the first and second compensation circuits are equipped with sample-and-hold circuits. The sample-and-hold circuit of the first compensation circuit stores the loop state parameters of the feedback control loop under the load state corresponding to the non-emitting interval. The sample-and-hold circuit of the second compensation circuit stores the loop state parameters of the feedback control loop under the load state corresponding to the emitting interval. The method includes steps 101 to 103, which are described below.

[0057] Step 101: Receive a synchronization signal indicating whether the display panel is currently in a non-illuminating or illuminating zone. The purpose of this step is to enable the power supply circuit to determine the illumination timing of the display panel. Specifically, the power supply circuit receives a synchronization signal from the timing controller via the synchronization signal terminal DRV_IN. The logic control circuit detects the level of the synchronization signal; when the synchronization signal is high, it determines that the display panel is currently in a non-illuminating zone; when the synchronization signal is low, it determines that the display panel is currently in an illuminating zone. The logic control circuit can perform debouncing processing on the synchronization signal or synchronize it to the internal clock to avoid erroneous switching caused by interference. The input to this step is the synchronization signal from the timing controller, and the output is the determination result of the current zone. Based on the determination result, either step 102 or step 103 is executed.

[0058] Step 102: When the synchronization signal indicates a non-light-emitting zone, the first compensation circuit is connected to the feedback control loop, and the loop state parameters of the feedback control loop stored in the second compensation circuit under the load state corresponding to the light-emitting zone are maintained. Specifically, refer to... Figure 4 and Figure 5The logic control circuit controls switch S1 to close and switch S2 to open. When switch S1 is closed, the first compensation circuit connects to the feedback control loop. At this time, the first compensation circuit compensates the feedback control loop. The feedback control loop performs closed-loop regulation of the switching converter under the light load state corresponding to the non-light-emitting interval. The voltage across compensation capacitor CCOMP1 follows the loop's regulation process and stabilizes at the value corresponding to the light load state. When switch S2 is opened, the second compensation circuit disconnects from the feedback control loop. The voltage across compensation capacitor CCOMP2, i.e., the value of the error amplification signal VCOMP at the end of the previous light-emitting interval, remains unchanged, awaiting use in the next light-emitting interval. This step continues throughout the entire non-light-emitting interval until the synchronization signal flips.

[0059] Step 103: When the synchronization signal indicates the light-emitting interval, the second compensation circuit is connected to the feedback control loop, and the loop state parameters of the feedback control loop stored in the first compensation circuit under the load state corresponding to the non-light-emitting interval are maintained. Specifically, the logic control circuit controls switch S2 to close and controls switch S1 to open. When switch S2 is closed, the second compensation circuit is connected to the feedback control loop, and the error amplification signal VCOMP immediately jumps to the value corresponding to the heavy load state held by the compensation capacitor CCOMP2. The switching converter directly operates at the operating point matching the heavy load. Subsequently, the feedback control loop continues to perform closed-loop regulation of the switching converter under the compensation of the second compensation circuit. When switch S1 is opened, the first compensation circuit is disconnected from the feedback control loop, and the voltage across the compensation capacitor CCOMP1, i.e., the value of the error amplification signal VCOMP corresponding to the light load state, remains unchanged, waiting for the next non-light-emitting interval. This step continues throughout the entire light-emitting interval until the synchronization signal flips. After that, the process returns to step 101, and the interval is re-determined based on the flipped synchronization signal.

[0060] Through the above steps, the power supply circuit alternates between the two compensation circuits in each frame as the synchronization signal flips. Each compensation circuit maintains its loop state parameters under its corresponding load condition when the feedback control loop is not connected, and immediately restores these parameters upon reconnection. This allows the switching converter to operate at the correct operating point the instant the load current changes rapidly, thereby reducing output voltage sags or overshoots and shortening recovery time. The effect is as follows: Figure 8b As shown.

[0061] Steps 101 to 103 above constitute the complete flow of the power control method of this embodiment. Those skilled in the art can implement the method by following the above steps. Optional improvements to the method are described below.

[0062] In some optional implementations, the method further includes: controlling the switching converter to operate in a pulse-skipping mode when the synchronization signal indicates a non-emitting interval; and controlling the switching converter to operate in a forced continuous conduction mode when the synchronization signal indicates an emitting interval. In other optional implementations, the power supply circuit further includes a switching output terminal for powering the cathode of the light-emitting element in the display panel, and the method further includes: controlling the switching output terminal to output a positive voltage when the synchronization signal indicates a non-emitting interval; and controlling the switching output terminal to output a negative voltage when the synchronization signal indicates an emitting interval. Specifically, refer to... Figure 6 The logic control circuit selects the EL_MOD_SEL signal based on the synchronization signal generation mode. In the non-light-emitting region, it operates the switching converter in a pulse-skipping mode to reduce power consumption; in the light-emitting region, it operates the switching converter in a forced continuous conduction mode to improve the response bandwidth. (Refer to...) Figure 2a , Figure 2b and Figure 3 The ELVSS gate driver generates drive signals DRV_ELVSSH and DRV_ELVSSL based on the synchronization signal. In the non-light-emitting region, it turns on the P-type switch Q1 and turns off the N-type switch Q2, switching the output terminal ELVSS to output a positive voltage ELVSSH, turning off the light-emitting element and eliminating leakage current. In the light-emitting region, it turns on the N-type switch Q2 and turns off the P-type switch Q1, switching the output terminal ELVSS to output a negative voltage ELVSSL, allowing the light-emitting element to emit light normally. The switching of the operating mode and the switching of the output terminal can be performed simultaneously with the switching of the compensation circuit in steps 102 and 103 under the control of the same synchronization signal, or only one of them can be performed as needed. It should be noted that the switching of the operating mode and the switching of the output terminal are not necessary conditions for implementing this method. Even without performing these two controls, steps 101 to 103 alone can improve the load transient performance of the power supply circuit.

[0063] It should be noted that in this disclosure, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. In this disclosure, reference to performing an action according to an element means performing the action at least according to that element, including two cases: performing the action only according to that element, and performing the action according to that element and other elements. Expressions such as "multiple," "repeatedly," and "various" include two, two times, two kinds, and more than two, more than two times, and more than two kinds.

[0064] This specification includes combinations of various embodiments described herein. Individual references to embodiments (e.g., “one embodiment”, “some embodiments”, or “preferred embodiments”) do not necessarily refer to the same embodiment; however, these embodiments are not mutually exclusive unless indicated to be mutually exclusive or are readily apparent to those skilled in the art. It should be noted that the word “or” is used in a non-exclusive sense throughout this specification unless the context explicitly indicates or requires it.

[0065] Furthermore, it should be understood that after reading the contents of this disclosure, those skilled in the art can make various alterations or modifications to this disclosure, and these equivalent forms also fall within the scope of protection claimed by this disclosure.

Claims

1. A power supply circuit for supplying power to a display panel, wherein a frame display time of the display panel includes a non-light-emitting interval and a light-emitting interval, the display panel does not emit light during the non-light-emitting interval and emits light during the light-emitting interval, characterized in that, The power supply circuit includes: A switching converter for outputting a first power supply voltage to power the pixel circuitry of the display panel; A feedback control loop is used to adjust the output of the switching converter. The feedback control loop includes a first compensation circuit and a second compensation circuit. The first compensation circuit and the second compensation circuit are respectively provided with a sample-and-hold circuit. The first compensation circuit is used to store the loop state parameters of the feedback control loop under the load state corresponding to the non-light-emitting range through the sample-and-hold circuit of the first compensation circuit. The second compensation circuit is used to store the loop state parameters of the feedback control loop under the load state corresponding to the light-emitting range through the sample-and-hold circuit of the second compensation circuit. The synchronization signal terminal is used to receive a synchronization signal indicating that the display panel is currently in the non-light-emitting zone or the light-emitting zone; A compensation switching circuit, connected to the synchronization signal terminal, is used to connect the first compensation circuit to the feedback control loop when the synchronization signal indicates the non-light-emitting interval, and to connect the second compensation circuit to the feedback control loop when the synchronization signal indicates the light-emitting interval.

2. The power supply circuit according to claim 1, characterized in that, The first compensation circuit and the second compensation circuit each include a compensation capacitor, and the loop state parameters include the voltage across the compensation capacitor; The sample-and-hold circuit of the first compensation circuit is used to maintain the voltage across the compensation capacitor in the first compensation circuit when the first compensation circuit is not connected to the feedback control loop; The sample-and-hold circuit of the second compensation circuit is used to maintain the voltage across the compensation capacitor in the second compensation circuit when the second compensation circuit is not connected to the feedback control loop.

3. The power supply circuit according to claim 1, characterized in that, The switching converter has a pulse skipping mode and a forced continuous conduction mode; The power supply circuit is used to control the switching converter to operate in the pulse skipping mode when the synchronization signal indicates the non-light-emitting interval, and to control the switching converter to operate in the forced continuous conduction mode when the synchronization signal indicates the light-emitting interval.

4. The power supply circuit according to claim 1, characterized in that, The switching converter is an inverting buck-boost converter, and the first power supply voltage is a negative voltage.

5. The power supply circuit according to claim 1, characterized in that, The power supply circuit further includes a voltage switching circuit, which includes a positive voltage terminal, a negative voltage terminal, and a switching output terminal. The positive voltage terminal is used to provide a positive voltage, and the negative voltage terminal is used to provide the first power supply voltage, which is a negative voltage. The switching output terminal is used to connect to the cathode of the light-emitting element in the display panel. The voltage switching circuit is connected to the synchronization signal terminal and is used to connect the switching output terminal to the positive voltage terminal when the synchronization signal indicates the non-light-emitting interval, and to connect the switching output terminal to the negative voltage terminal when the synchronization signal indicates the light-emitting interval.

6. The power supply circuit according to claim 5, characterized in that, The voltage switching circuit includes a P-type switch and an N-type switch. The P-type switch is connected between the positive voltage terminal and the switching output terminal, and the N-type switch is connected between the negative voltage terminal and the switching output terminal. The P-type switch and the N-type switch are integrated within the chip containing the power supply circuit, or the P-type switch and the N-type switch are located outside the chip containing the power supply circuit and are driven by the drive signal output by the chip.

7. A display device, characterized in that, Includes a display panel, a timing controller, and a power supply circuit as described in any one of claims 1 to 6; One frame of the display panel includes a non-light-emitting interval and a light-emitting interval. All pixels of the display panel are refreshed and do not emit light during the non-light-emitting interval, and emit light simultaneously during the light-emitting interval. The power supply circuit is used to supply power to the display panel; The timing controller is connected to the synchronization signal terminal of the power supply circuit and is used to output the synchronization signal to the power supply circuit.

8. The display device according to claim 7, characterized in that, The timing controller is used to adjust the time width of the non-emitting zone and the emitting zone according to the refresh rate and brightness of the display panel, and output the synchronization signal according to the adjusted time width.

9. A power control method applied to a power supply circuit for powering a display panel, wherein a frame display time of the display panel includes a non-emitting interval and an emitting interval, the power supply circuit includes a switching converter and a feedback control loop for adjusting the output of the switching converter, the feedback control loop including a first compensation circuit and a second compensation circuit, the first compensation circuit and the second compensation circuit respectively being provided with a sample-and-hold circuit, the sample-and-hold circuit of the first compensation circuit being used to store loop state parameters of the feedback control loop under the load state corresponding to the non-emitting interval, and the sample-and-hold circuit of the second compensation circuit being used to store loop state parameters of the feedback control loop under the load state corresponding to the emitting interval, characterized in that... The method includes: Receive a synchronization signal indicating that the display panel is currently in the non-emitting zone or the emitting zone; When the synchronization signal indicates the non-light-emitting zone, the first compensation circuit is connected to the feedback control loop, and the loop state parameters of the feedback control loop in the load state corresponding to the light-emitting zone are stored in the second compensation circuit. When the synchronization signal indicates the light-emitting range, the second compensation circuit is connected to the feedback control loop, and the loop state parameters of the feedback control loop stored in the first compensation circuit under the load state corresponding to the non-light-emitting range are maintained.

10. The power control method according to claim 9, characterized in that, The method further includes: When the synchronization signal indicates the non-light-emitting interval, the switching converter is controlled to operate in pulse-skipping mode; When the synchronization signal indicates the light-emitting interval, the switching converter is controlled to operate in a forced continuous conduction mode.

11. The power control method according to claim 9 or 10, characterized in that, The power supply circuit further includes a switching output terminal for supplying power to the cathode of the light-emitting element in the display panel, and the method further includes: When the synchronization signal indicates the non-light-emitting zone, the switching output terminal is controlled to output a positive voltage; When the synchronization signal indicates the light-emitting interval, the switching output terminal is controlled to output a negative voltage.

Images