Display driving circuit, system, display control chip and data checking method

Abstract

The application discloses a display driving circuit, a system, a display control chip and a data checking method, wherein a checking calculation interface control module determines the spatial address of to-be-calculated data according to a checking calculation command, and clears a calculation state flag bit and a calculation result buffer; a storage control module reads the to-be-calculated data from a first storage module according to the spatial address of the to-be-calculated data; a checking calculation module performs data checking calculation on the to-be-calculated data to obtain a calculation result, and transmits the calculation result to the calculation result buffer for storage, and sets the calculation state flag bit to a completion state after the checking calculation is completed; the display data at any spatial address in the first storage module can be checked and calculated through the display driving circuit, the calculation amount of the checking calculation can be reduced, and the calculation speed of the checking calculation is improved. Meanwhile, the calculation state flag bit is set to mark whether the checking calculation is completed, and the accuracy and reliability of data checking are improved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display driving circuit, system, display control chip, and data verification method. Background Technology

[0002] In a display device, the display control chip contains a memory, such as random access memory (RAM). The correctness of the data stored in the memory affects the display effect of the display device.

[0003] Therefore, it is essential to verify the correctness of the data stored in the memory. Summary of the Invention

[0004] This invention provides a display driving circuit, system, display control chip, and data verification method to verify the data stored in the first storage module, which helps to ensure the display effect.

[0005] According to one aspect of the present invention, a display driving circuit is provided, including a first storage module, a verification calculation interface control module, a storage control module, and a verification calculation module;

[0006] The verification calculation interface control module is connected to the storage control module. It is used to determine the spatial address of the data to be calculated according to the verification calculation command, and to clear the calculation status flag and the calculation result buffer. The calculation status flag is used to indicate whether the verification calculation is complete.

[0007] The storage control module is connected to the first storage module and is used to read the data to be calculated from the first storage module according to the spatial address of the data to be calculated;

[0008] The verification calculation module is connected to the storage control module and the verification calculation interface control module respectively. It is used to perform data verification calculation on the data to be calculated, obtain the calculation result, transmit the calculation result to the calculation result buffer for storage, and set the calculation status flag to the completion status after the verification calculation is completed.

[0009] Optionally, the display driver circuit also includes a second storage module, which is connected to the storage control module and the verification calculation module respectively;

[0010] The storage control module is used to read the data to be calculated according to the spatial address of the data to be calculated, and to transfer the data to be calculated to the second storage module; the second storage module is used to store the data to be calculated.

[0011] The verification calculation module is used to perform data verification calculations on the data to be calculated in the second storage module to obtain the calculation results, and then transmit the calculation results to the calculation result buffer for storage.

[0012] Optionally, the first storage module includes random access memory, and / or the second storage module includes first-in-first-out memory;

[0013] Optionally, the first-in-first-out (FIFO) memory can be an asynchronous FIFO memory.

[0014] Optionally, the calculation result buffer is included in the verification calculation interface control module.

[0015] According to another aspect of the present invention, a display control chip is provided, including a display driving circuit according to any embodiment of the present invention.

[0016] According to another aspect of the present invention, a display driving system is provided, including a host and a display driving circuit according to any embodiment of the present invention. The host is connected to a verification calculation interface control module and is used to send verification calculation commands and verification result reading instructions to the verification calculation interface control module.

[0017] The verification calculation interface control module is also used to return result information containing at least the calculation result to the host based on the verification result reading instruction.

[0018] According to another aspect of the present invention, a data verification method is provided, applied to a display driving circuit in any embodiment of the present invention. The data verification method includes:

[0019] The verification calculation interface control module determines the spatial address of the data to be calculated based on the verification calculation command, and clears the calculation status flag and the calculation result buffer; the calculation status flag is used to indicate whether the verification calculation is complete.

[0020] The storage control module reads the data to be calculated from the first storage module according to the spatial address of the data to be calculated;

[0021] The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation results, transmits the calculation results to the calculation result buffer for storage, and sets the calculation status flag to the completed state after the verification calculation is completed.

[0022] Optionally, data validation methods may also include:

[0023] The verification calculation interface control module returns result information, containing at least the calculation result, to the host based on the verification result reading instruction.

[0024] Optionally, the result information may also include status information indicating whether the calculation is complete; the data verification method may also include: the verification calculation module determining the target number of calculations to be performed on the data to be calculated based on the spatial address corresponding to the data to be calculated;

[0025] The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation results, and transmits the calculation results to the calculation result buffer for storage. After the verification calculation is completed, it sets the calculation status flag to the completion status, including:

[0026] The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation results, and transmits the calculation results to the calculation result buffer for storage. When the number of verification calculations reaches the target number, the calculation is determined to be complete, and the calculation status flag is set to the completion status; the status information corresponds to the status of the calculation status flag.

[0027] Data validation methods also include:

[0028] The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation results, and transmits the calculation results to the calculation result buffer for storage. If the number of verification calculations does not reach the target number, it determines that the calculation is not completed and keeps the state of the calculation status flag unchanged.

[0029] Optionally, the verification calculation command includes the calculation command value, the starting address of the data to be calculated, the ending address of the data to be calculated, and the start calculation flag;

[0030] The verification calculation interface control module determines the spatial address of the data to be calculated based on the verification calculation command, and clears the calculation status flag and the calculation result buffer, including:

[0031] When the calculation command value is a preset command value and the calculation start flag is valid, the spatial address of the data to be calculated is determined according to the start address and end address, and the calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command, and clears the calculation status flag and the calculation result buffer.

[0032] Optionally, the verification calculation command includes multiple bytes, with the calculation command value, start address, end address, and start calculation flag located in different bytes.

[0033] According to another aspect of the present invention, a data verification method is provided, applied to a host, comprising:

[0034] Send a verification calculation command to the display driver circuit so that the display driver circuit can perform data verification calculation on the data to be calculated;

[0035] Send a verification result read command to the display driver circuit; the command values ​​for the verification result read command and the verification calculation command are different.

[0036] The system receives the result information returned by the display driver circuit and determines whether the data to be calculated is correct based on the result information; the result information shall at least include the calculation result of the data verification calculation.

[0037] The technical solution of this invention includes a display driving circuit comprising a first storage module, a verification calculation interface control module, a storage control module, and a verification calculation module. The verification calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command and clears the calculation status flag and the calculation result buffer. The storage control module reads the data to be calculated from the first storage module according to the spatial address of the data to be calculated. The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation result, and transmits the calculation result to the calculation result buffer for storage. After the verification calculation is completed, the calculation status flag is set to the completion state. This allows the display driving circuit to perform verification calculations on display data at any spatial address in the internal first storage module. Without needing to verify all display data in the first storage module, the computational load of the verification calculation can be reduced, the calculation speed can be improved, and the space occupied by the calculation result buffer can be reduced. Furthermore, by setting the calculation status flag to indicate whether the verification calculation is complete, misjudgments caused by the host using intermediate results when reading the calculation result can be avoided, thus improving the accuracy and reliability of data verification of the data to be calculated.

[0038] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of the structure of a display driving circuit provided in an embodiment of the present invention;

[0041] Figure 2 This is a schematic diagram of another display driving circuit provided in an embodiment of the present invention;

[0042] Figure 3 This is a schematic diagram of the structure of a display driving system provided in an embodiment of the present invention;

[0043] Figure 4 This is a flowchart of a data verification method provided in an embodiment of the present invention;

[0044] Figure 5This is a flowchart of another data verification method provided in an embodiment of the present invention;

[0045] Figure 6 This is a flowchart of another data verification method provided in an embodiment of the present invention;

[0046] Figure 7 This is a flowchart of another data verification method provided in an embodiment of the present invention. Detailed Implementation

[0047] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0048] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0049] As described in the background section, the display control chip contains a memory that receives and stores display data. However, due to unstable data transmission, errors may occur during the transmission process. Furthermore, defects in the memory itself, voltage fluctuations, or temperature changes can also cause errors in the stored display data. During the operation of the display control chip, the memory is used for data caching and relay. If the data stored in the memory is inconsistent with expectations, it may cause errors in the corresponding processes, such as programming failures or screen distortion after Demura (eliminating display unevenness), ultimately affecting the display effect of the display device. Therefore, it is essential to verify the data in the memory to determine its accuracy.

[0050] For the reasons stated above, embodiments of the present invention provide a display driving circuit. Figure 1This is a schematic diagram of a display driving circuit provided in an embodiment of the present invention, for reference. Figure 1 The display driving circuit includes a first storage module 110, a verification calculation interface control module 120, a storage control module 130, and a verification calculation module 140. The verification calculation interface control module 120 is connected to the storage control module 130 and is used to determine the spatial address of the data to be calculated according to the verification calculation command, and clear the calculation status flag and the calculation result buffer. The calculation status flag is used to indicate whether the verification calculation is completed. The storage control module 130 is connected to the first storage module 110 and is used to read the data to be calculated from the first storage module 110 according to the spatial address of the data to be calculated. The verification calculation module 140 is connected to the storage control module 130 and the verification calculation interface control module 120 respectively. It is used to perform data verification calculation on the data to be calculated to obtain the calculation result, transmit the calculation result to the calculation result buffer for storage, and set the calculation status flag to the completed state after the verification calculation is completed.

[0051] The first storage module 110 may include a memory, such as RAM. Data in the RAM is stored in binary form. Each data bit is stored in a specific address space in the RAM, which is typically defined by a 16-bit or 32-bit address bus. Reading and writing RAM data can be accomplished by the storage control module 130. The first storage module 110 can be used to store display data, with different display data corresponding to different address spaces in the first storage module 110. The verification calculation interface control module 120, the storage control module 130, and the verification calculation module 140 can be implemented using logic circuits.

[0052] In the display driver circuit, the verification calculation interface control module 120 can communicate with external modules. For example, the display driver circuit can communicate with the host in the display device. The host can send a verification calculation command to the display driver circuit. After receiving the verification calculation command, the verification calculation interface control module 120 can parse the command to obtain the spatial address of the data to be calculated. The data to be calculated includes display data corresponding to at least a portion of the spatial addresses in the first storage module 110. The verification calculation interface control module 120 also clears the calculation status flag and the calculation result buffer according to the verification calculation command. The calculation status flag is used to indicate whether the verification calculation is complete. After clearing the calculation status flag, the status of the calculation status flag is in the state of incomplete verification calculation. For example, the value of the calculation status flag can be 0 or 1. A value of 0 indicates that the verification calculation is incomplete; a value of 1 indicates that the verification calculation is complete. The calculation result buffer can be used to store the result of the verification calculation of the data to be calculated. During the verification calculation process, the result can be continuously updated until the verification calculation is complete. That is, intermediate results obtained during the verification calculation are also stored in the calculation result buffer. After the verification calculation is completed, the intermediate results are overwritten by the final result obtained after verification. In some embodiments, the calculation result buffer is included in the verification calculation interface control module 120, which can improve the integration of the display driver circuit. In other embodiments, the calculation result buffer can also be set separately in the display driver circuit.

[0053] The storage control module 130 is connected to the verification calculation interface control module 120 and the first storage module 110 respectively. The storage control module 130 receives the space address of the data to be calculated and reads the data to be calculated from the first storage module 110 according to the space address of the data to be calculated.

[0054] The verification calculation module 140 is connected to the storage control module 130, and this connection can be direct or indirect. When the verification calculation module 140 and storage control module 130 are directly connected, the verification calculation module 140 can directly receive the data to be calculated from the storage control module 130. When the verification calculation module 140 and storage control module 130 are indirectly connected, other circuit modules can be connected between them, allowing the verification calculation module 140 to receive the data to be calculated from these other circuit modules. The verification calculation module 140 can perform data verification on the data to be calculated and obtain the calculation result. This calculation result includes intermediate results during the verification calculation process and the final result obtained after the verification calculation is completed. The data verification can employ a Cyclic Redundancy Check (CRC) method. CRC is a data transmission error detection function that performs polynomial calculations on the data and appends the result to the end of the frame. The receiving device also executes a similar algorithm to ensure the correctness and integrity of the data transmission. CRC calculation methods typically include CRC8, CRC16, CRC32, and CRC64. The most important difference between these methods lies in their reliability (different collision probabilities) when dealing with large amounts of data. Using 18MB of random data for testing, CRC32 resulted in approximately 4800 collisions, while CRC64 resulted in approximately 0 collisions. In some embodiments, the verification calculation module 140 uses CRC64 for data verification.

[0055] The verification calculation module 140 is also connected to the verification calculation interface control module 120. The verification calculation module 140 transmits the verification result obtained from the verification calculation to the calculation result buffer for storage. After the verification calculation is completed, the calculation status flag is set to the completion status. Thus, the host can also send a calculation result read command to the verification calculation interface control module 120, and the verification calculation interface control module 120 can return the calculation result to the host. When the calculation status flag is in the completion status, the host can determine whether the data to be calculated has a storage error based on the result stored in the calculation result buffer. For example, when the host sends a verification calculation command, it calculates a verification value for the data to be calculated corresponding to the verification calculation command, which is used as the first verification value. The host can use the calculation result read from the calculation result buffer as the second verification value, and determine whether the data to be calculated is erroneous by comparing whether the first verification value and the second verification value are the same. For example, if the first verification value and the second verification value are the same, the data to be calculated is determined to be error-free; if the first verification value and the second verification value are not equal, the data to be calculated is determined to be erroneous.

[0056] In some embodiments, the host can send a verification calculation command to the verification calculation interface control module 120 at set intervals, so that the display driver circuit performs data verification calculations at set intervals, in order to avoid the situation where storage errors occur in the first storage module after working for a long time and cannot be detected in time.

[0057] In other embodiments, the host can send a verification calculation command to the verification calculation interface control module 120 each time it is powered on, so that the display driver circuit performs data verification calculations at set intervals. This allows any errors in the data stored in the first storage module to be detected in time when the device is powered on, which helps to ensure the accuracy of the subsequent display screen.

[0058] In other embodiments, if the change in the operating temperature of the display driving circuit exceeds a set temperature threshold within a first preset time interval, the host sends a verification calculation command to the verification calculation interface control module 120 to ensure that errors in the data stored in the first storage module 110 due to temperature changes can be detected in a timely manner. In this case, the display driving circuit also includes a temperature detection module connected to the host, which can obtain the operating temperature of the display driving circuit from the temperature detection module.

[0059] In other embodiments, if the operating voltage of the first storage module 110 exceeds a set voltage threshold within a second preset time interval, the host sends a verification calculation command to the verification calculation interface control module 120 to ensure that errors in the stored data in the first storage module 110 due to changes in operating voltage can be detected in a timely manner. In this case, the host also connects to the first storage module 110 to obtain the operating voltage of the first storage module 110.

[0060] The display driver circuit of this embodiment includes a first storage module, a verification calculation interface control module, a storage control module, and a verification calculation module. The verification calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command and clears the calculation status flag and the calculation result buffer. The storage control module reads the data to be calculated from the first storage module according to the spatial address of the data to be calculated. The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation result, and transmits the calculation result to the calculation result buffer for storage. After the verification calculation is completed, the calculation status flag is set to the completion state. This allows the display driver circuit to perform verification calculations on display data at any spatial address in the internal first storage module. Without needing to verify all display data in the first storage module, the computational load of the verification calculation can be reduced, the calculation speed can be improved, and the space occupied by the calculation result buffer can be reduced. Furthermore, by setting the calculation status flag to indicate whether the verification calculation is complete, misjudgments caused by the host using intermediate results when reading the calculation result can be avoided, thus improving the accuracy and reliability of data verification of the data to be calculated.

[0061] Figure 2 This is a schematic diagram of another display driving circuit provided in an embodiment of the present invention, for reference. Figure 2 Optionally, the display driver circuit further includes a second storage module 150, which is connected to the storage control module 130 and the verification calculation module 140 respectively. The storage control module 130 is used to read the data to be calculated according to the spatial address of the data to be calculated, and transmit the data to be calculated to the second storage module 150. The second storage module 150 is used to store the data to be calculated. The verification calculation module 140 is used to perform data verification calculation on the data to be calculated in the second storage module 150 to obtain the calculation result, and transmit the calculation result to the calculation result buffer for storage.

[0062] Specifically, when the display driver circuit also includes a second storage module 150, the verification calculation module 140 is indirectly connected to the storage control module 130. By setting the second storage module 150 as a buffer between the verification calculation module 140 and the storage control module 130, data verification calculation can be performed after the storage control module 130 stores all the data to be calculated in the second storage module 150. This eliminates the need for the storage control module 130 to perform a calculation every time it reads data from a spatial address, thus avoiding high-frequency data operations. Furthermore, when the first storage module 110 is used for caching, relaying, or other functions, the data in the first storage module 110 may change. If the data to be calculated is not read out in a timely manner, it may cause errors in reading the data to be calculated after changes in the data in the first storage module 110, affecting the final verification calculation result. In this embodiment, by setting the second storage module 150 as a buffer between the storage control module 130 and the verification calculation module 140, the data to be calculated in the first storage module 110 can be read into the second storage module 150 for storage in a timely manner, which helps improve the accuracy of the verification result.

[0063] Optionally, the second storage module 150 includes a first-in-first-out (FIFO) memory; in some embodiments, the FIFO memory is an asynchronous FIFO memory.

[0064] First-In-First-Out (FIFO) memory differs from ordinary memory in that it does not have external read / write address lines. Data is written and read out sequentially, and the data address is automatically incremented by the internal read / write pointer.

[0065] This invention also provides a display control chip, which includes the display driving circuit of any of the above embodiments of this invention and possesses the beneficial effects of the display driving circuit of any of the above embodiments of this invention. For example, the display driving chip may be a timing controller (TCON) or a display driver integrated circuit (DDIC) of a display device.

[0066] This invention also provides a display driving system. Figure 3 This is a schematic diagram of a display driving system provided in an embodiment of the present invention, for reference. Figure 3The display driving system includes a host 200 and a display driving circuit 100 in any of the above embodiments of the present invention. The host 200 is connected to the verification calculation interface control module 120 and is used to send verification calculation commands and verification result reading instructions to the verification calculation interface control module 120. The verification calculation interface control module 120 is also used to return result information containing at least the calculation results to the host 200 according to the verification result reading instructions.

[0067] The display driving system can be applied in a display device, which can be a mobile phone or any electronic product with display function, including but not limited to the following categories: display panels in products such as televisions, laptops, desktop monitors, tablets, digital cameras, smart bracelets, smart glasses, in-vehicle displays, medical devices, industrial control equipment, and touch interactive terminals. This embodiment of the invention does not impose any special limitations on this.

[0068] The host 200 can be the central processing unit in the display device, such as the motherboard in a mobile phone. The host 200 sends a verification calculation command to the verification calculation interface control module 120 of the display driver circuit. The verification calculation interface control module 120 determines the spatial address of the data to be calculated based on the verification calculation command and clears the calculation status flag and the calculation result buffer. The storage control module 130 reads the data to be calculated from the first storage module 110 based on the spatial address of the data to be calculated. The verification calculation module 140 performs data verification calculation on the data to be calculated to obtain the calculation result, transmits the calculation result to the calculation result buffer for storage, and sets the calculation status flag to the completion state after the verification calculation is completed. The host 200 can also send a verification result read command to the verification calculation interface control module 120 of the display driver circuit. The verification calculation interface control module 120 returns result information containing at least the calculation result to the host 200 based on the verification result read command. The host 200 can determine the verification result of the data to be calculated based on the result information, and thus determine whether the data to be calculated stored in the first storage module 110 is erroneous.

[0069] In some embodiments, the result information also includes status information indicating whether the calculation is complete. This status information can correspond to the value of a calculation status flag. When the value of the calculation status flag corresponds to a completed calculation status, the status information is also the status information indicating that the verification calculation is complete. When the value of the calculation status flag corresponds to an incomplete calculation status, the status information is also the status information indicating that the verification calculation is incomplete. When the host 200 sends a verification calculation command, it calculates a verification value for the data to be calculated corresponding to the verification calculation command, which is used as the first verification value. The host 200 can use the calculation result read from the calculation result buffer as the second verification value. If the status information indicates that the verification calculation is complete, the host 200 can determine whether the data to be calculated is erroneous by comparing whether the first verification value and the second verification value are the same.

[0070] The display driving system in this embodiment sends a verification calculation command to the display driving circuit via the host, causing the display driving circuit to perform verification calculations on the data to be calculated at the corresponding spatial address to obtain a verification result. The host then sends a verification result read command to the display driving circuit, causing the display driving circuit to return result information to the host. The host can use this result information to determine the verification result of the data to be calculated, and thus determine whether the data to be calculated stored in the first storage module is erroneous. This enables data verification at any spatial address in the first storage module, allowing for timely detection of errors in the stored data, facilitating subsequent processing of erroneous data, and ultimately ensuring optimal display quality.

[0071] This invention also provides a data verification method, which is applied to the display driving circuit of any of the above embodiments of this invention. Figure 4 This is a flowchart of a data verification method provided in an embodiment of the present invention, see reference. Figure 4 Data validation methods include:

[0072] S310, the verification calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command, and clears the calculation status flag and the calculation result buffer.

[0073] The calculation status flag is used to indicate whether the calculation is complete.

[0074] S320: The storage control module reads the data to be calculated from the first storage module according to the spatial address of the data to be calculated.

[0075] S330, the verification calculation module performs data verification calculation on the data to be calculated, obtains the calculation result, transmits the calculation result to the calculation result buffer for storage, and sets the calculation status flag to the completed state after the verification calculation is completed.

[0076] The data verification method of this embodiment is applied to the display driving circuit of any of the above embodiments of the present invention, and has the beneficial effects of the display driving circuit of any of the above embodiments of the present invention.

[0077] Figure 5 This is a flowchart of another data verification method provided in an embodiment of the present invention, see reference. Figure 5 Data validation methods include:

[0078] S410, the verification calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command, and clears the calculation status flag and the calculation result buffer.

[0079] The calculation status flag is used to indicate whether the calculation is complete.

[0080] S420: The storage control module reads the data to be calculated from the first storage module according to the spatial address of the data to be calculated.

[0081] S430, the verification calculation module performs data verification calculation on the data to be calculated, obtains the calculation result, transmits the calculation result to the calculation result buffer for storage, and sets the calculation status flag to the completed state after the verification calculation is completed.

[0082] S440, the verification calculation interface control module returns result information containing at least the calculation result to the host according to the verification result reading instruction.

[0083] The command values ​​for the verification result reading command and the verification calculation command are different. For example, the command value for the verification calculation command is 0x61, and the command value for the verification result reading command is 0x62. This allows the display driver circuit to operate in half-duplex mode, reducing hardware coupling and simplifying the hardware circuit structure. The verification calculation interface control module returns the calculation result to the host based on the verification result reading command, enabling the host to determine whether the data to be calculated is correct. Optionally, when the verification calculation is incomplete, the returned calculation result is an intermediate result; when the verification calculation is complete, the returned result is the final result. Judging the correctness of the data to be calculated based on the returned intermediate result would lead to an error. Therefore, in some embodiments, the result information also includes status information indicating whether the calculation is complete. The host determines whether the data to be calculated is correct based on the calculation result corresponding to the status information indicating completion, ensuring the accuracy of the judgment result.

[0084] Optionally, the result information includes multiple bytes, with the calculation result and status information in different bytes. For example, the result information includes 5 bytes B4 B3 B2 B1 B0. Assuming the calculation result is 0xacdd7835, then B4 = 0xAC, B3 = 0xDD, B2 = 0x78, and B1 = 0x35. Additionally, B0 = 0x01 indicates the status information that the calculation is complete, while B0 = 0x00 indicates the status information that the calculation is incomplete.

[0085] Optionally, after S410, the data verification method further includes: the verification calculation module determines the target number of calculations to be performed on the data to be calculated based on the spatial address corresponding to the data to be calculated.

[0086] Specifically, once the spatial address corresponding to the data to be calculated is determined, the amount of data to be calculated can be determined. The larger the amount of data to be calculated, the more target times are required.

[0087] Optionally, the above S430 includes: the verification calculation module performs data verification calculation on the data to be calculated to obtain the calculation result, and transmits the calculation result to the calculation result buffer for storage; when the number of verification calculations reaches the target number, the calculation is determined to be completed, and the calculation status flag is set to the completed state; the status information corresponds to the state of the calculation status flag.

[0088] Specifically, during the calculation process, the verification calculation module can determine whether the target number of calculations has been reached based on the real-time calculation count. If the target number of calculations has been reached, the calculation is considered complete, and the status flag is set to complete. Correspondingly, the status information returned by the verification calculation interface control module to the host will also show the corresponding completion status.

[0089] Optionally, data validation methods may also include:

[0090] The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation results, and transmits the calculation results to the calculation result buffer for storage. If the number of verification calculations does not reach the target number, it determines that the calculation is not completed and keeps the state of the calculation status flag unchanged.

[0091] Specifically, after receiving the verification calculation command, the verification calculation interface control module clears the calculation status flag, which corresponds to the state of incomplete calculation. If the number of verification calculations has not reached the target number, the calculation is determined to be incomplete, and therefore the calculation status flag can be kept at the previous state of incomplete calculation.

[0092] Optionally, the verification calculation command includes a calculation command value, the start address of the data to be calculated, the end address of the data to be calculated, and a calculation start flag. In some embodiments, the verification calculation command includes multiple bytes, with the calculation command value, start address, end address, and calculation start flag located in different bytes.

[0093] For example, the verification calculation command is 0x61 B3 B2 B1 B0 E3 E2 E1 E0 0x01. The specifications for this verification calculation command are as follows:

[0094] 0x61: Verify the command value of the calculation command.

[0095] B3 to B0 are the starting addresses of the RAM space. Assuming the starting address is 0x12345678, then B3 = 0x12, B2 = 0x34, B1 = 0x56, and B0 = 0x78. E3 to E0 are the ending addresses of the RAM space. Assuming the ending address is 0x01ABCDEF, then E3 = 0x01, E2 = 0xAB, E1 = 0xCD, and E0 = 0xEF.

[0096] The 10th byte, 0x01, is the start-up computing flag.

[0097] Optionally, in the above embodiments, S310 and S410 include:

[0098] When the calculation command value is a preset command value and the calculation start flag is valid, the spatial address of the data to be calculated is determined according to the start address and end address, and the calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command, and clears the calculation status flag and the calculation result buffer.

[0099] Specifically, the calculation command value of the verification calculation command can be preset, and whether to start the verification calculation can be determined by whether the start calculation flag in the verification calculation command is valid. When the verification command value is the preset command value and the start calculation status flag is valid, the verification calculation is started to avoid the power waste caused by verification calculation under incorrect verification calculation command instructions.

[0100] This invention also provides a data verification method applied to a host computer. Figure 6 This is a flowchart of another data verification method provided in an embodiment of the present invention, see reference. Figure 6 The data verification method includes:

[0101] S510: Send a verification calculation command to the display driver circuit so that the display driver circuit can perform data verification calculation on the data to be calculated.

[0102] The process of data verification calculation by the display driver circuit can be found in [reference needed]. Figure 3 or Figure 4 The process is shown below.

[0103] S520: Send a verification result read command to the display driver circuit; wherein, the command value of the verification result read command is different from that of the verification calculation command.

[0104] S530: Receive the result information returned by the display driver circuit, and determine whether the data to be calculated is correct based on the result information.

[0105] The result information includes at least the calculation result of the data verification calculation. In some embodiments, the result information also includes status information indicating whether the calculation is complete. The process for determining whether the data to be calculated is correct based on the result information can be found in the above embodiments of the present invention, and will not be repeated here.

[0106] Figure 7 This is a flowchart of another data verification method provided in an embodiment of the present invention. Figure 7 This illustrates the interaction between the display driver circuit and the host computer. (Refer to...) Figure 7 The data verification method includes:

[0107] The host sends a verification calculation command to the display driver circuit, so that the display driver circuit can perform data verification calculation on the data to be calculated.

[0108] The verification calculation interface control module determines the spatial address of the data to be calculated based on the verification calculation command, and clears the calculation status flag and the calculation result buffer; the calculation status flag is used to indicate whether the verification calculation is complete.

[0109] The storage control module reads the data to be calculated from the first storage module based on the spatial address of the data to be calculated.

[0110] The verification calculation module performs data verification calculations on the data to be calculated, obtains the calculation results, transmits the calculation results to the calculation result buffer for storage, and sets the calculation status flag to the completed state after the verification calculation is completed.

[0111] The host sends a verification result read command to the display driver circuit; the command values ​​for the verification result read command and the verification calculation command are different.

[0112] The verification calculation interface control module returns the result information to the host.

[0113] The host receives the result information returned by the display driver circuit and determines whether the data to be calculated is correct based on the result information.

[0114] The data verification method of this invention can perform verification calculations on display data at any address in the internal first storage module through the display driver circuit. This reduces the computational load and speed of verification calculations, and also reduces the space occupied by the calculation result buffer, without requiring verification of all display data in the first storage module. Furthermore, by setting a calculation status flag to indicate whether the verification calculation is complete, misjudgments caused by the host using intermediate results when reading the calculation results can be avoided, thus improving the accuracy and reliability of data verification.

[0115] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0116] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A display driving circuit, characterized in that, It includes a first storage module, a verification calculation interface control module, a storage control module, and a verification calculation module; The verification calculation interface control module is connected to the storage control module and is used to determine the spatial address of the data to be calculated according to the verification calculation command, and clear the calculation status flag and the calculation result buffer; the calculation status flag is used to indicate whether the verification calculation is completed. The storage control module is connected to the first storage module and is used to read the data to be calculated from the first storage module according to the spatial address of the data to be calculated; The verification calculation module is connected to the storage control module and the verification calculation interface control module, respectively. It is used to perform data verification calculation on the data to be calculated to obtain the calculation result, transmit the calculation result to the calculation result buffer for storage, and set the calculation status flag to the completion status after the verification calculation is completed.

2. The display driving circuit according to claim 1, characterized in that, It also includes a second storage module, which is connected to the storage control module and the verification calculation module respectively; The storage control module is used to read the data to be calculated according to the spatial address of the data to be calculated, and to transfer the data to be calculated to the second storage module; The second storage module is used to store the data to be calculated; The verification calculation module is used to perform data verification calculation on the data to be calculated in the second storage module to obtain the calculation result, and transmit the calculation result to the calculation result buffer for storage.

3. The display driving circuit according to claim 2, characterized in that, The first storage module includes random access memory, and / or the second storage module includes first-in-first-out memory; Preferably, the first-in-first-out (FIFO) memory is an asynchronous FIFO memory.

4. The display driving circuit according to claim 1, characterized in that, The calculation result buffer is included in the verification calculation interface control module.

5. A display control chip, characterized in that, Includes the display driving circuit according to any one of claims 1-4.

6. A display driving system, characterized in that, Includes a host and the display driving circuit according to any one of claims 1-4, wherein the host is connected to the verification calculation interface control module and is used to send the verification calculation command and the verification result reading instruction to the verification calculation interface control module; The verification calculation interface control module is also used to return result information containing at least the calculation result to the host according to the verification result reading instruction.

7. A data verification method, characterized in that, The data verification method, applied to the display driving circuit according to any one of claims 1-4, comprises: The verification calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command, and clears the calculation status flag and the calculation result buffer; the calculation status flag is used to indicate whether the verification calculation is complete. The storage control module reads the data to be calculated from the first storage module according to the spatial address of the data to be calculated; The verification calculation module performs data verification calculation on the data to be calculated to obtain the calculation result, transmits the calculation result to the calculation result buffer for storage, and sets the calculation status flag to the completion status after the verification calculation is completed.

8. The data verification method according to claim 7, characterized in that, Also includes: The verification calculation interface control module returns result information containing at least the calculation result to the host according to the verification result reading instruction; Preferably, the result information also includes status information indicating whether the calculation has been completed; The data verification method further includes: the verification calculation module determines the target number of times to perform calculations on the data to be calculated based on the spatial address corresponding to the data to be calculated; The verification calculation module performs data verification calculations on the data to be calculated to obtain the calculation result, transmits the calculation result to the calculation result buffer for storage, and sets the calculation status flag to the completion status after the verification calculation is completed, including: The verification calculation module performs data verification calculations on the data to be calculated to obtain the calculation result, and transmits the calculation result to the calculation result buffer for storage. When the number of verification calculations reaches the target number, the calculation is determined to be completed, and the calculation status flag is set to the completed state; the status information corresponds to the state of the calculation status flag. The data verification method further includes: The verification calculation module performs data verification calculation on the data to be calculated to obtain the calculation result, and transmits the calculation result to the calculation result buffer for storage. If the number of verification calculations does not reach the target number, it is determined that the calculation is not completed, and the state of the calculation status flag remains unchanged.

9. The data verification method according to claim 7, characterized in that, The verification calculation command includes a calculation command value, the starting address of the data to be calculated, the ending address of the data to be calculated, and a calculation start flag; The verification calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command, and clears the calculation status flag and the calculation result buffer, including: When the calculation command value is a preset command value and the start calculation flag is valid, the spatial address of the data to be calculated is determined according to the start address and the end address, and the verification calculation interface control module determines the spatial address of the data to be calculated according to the verification calculation command, and clears the calculation status flag and the calculation result buffer. Preferably, the verification calculation command includes multiple bytes, and the calculation command value, the start address, the end address, and the start calculation flag are located in different bytes.

10. A data verification method, characterized in that, Applied to the host, including: Send a verification calculation command to the display driver circuit so that the display driver circuit performs data verification calculation on the data to be calculated; A verification result reading command is sent to the display driver circuit; wherein the command value of the verification result reading command is different from that of the verification calculation command; The system receives the result information returned by the display driver circuit and determines whether the data to be calculated is correct based on the result information; the result information includes at least the calculation result of the data verification calculation.

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