An adjustment method, device, storage medium, electronic device and chip

Abstract

The application discloses an adjustment method and device, a storage medium, an electronic device and a chip, and relates to the technical field of intelligent terminals, and comprises the following steps: in response to a frame rate switching instruction, reading the value of at least one group of target registers, the at least one group of target registers being used for controlling at least one touch and display driving integration (TDDI) control signal; and adjusting the at least one TDDI control signal according to the value of the at least one group of target registers. Compared with the related art, the application can read the value of at least one target register in response to a frame rate switching instruction, wherein the target register can control the TDDI control signal, and the value of the target register can be used to adjust the TDDI control signal, thereby improving the characteristics and parameters of thin film transistors (TFTs) in the frame rate switching process, ensuring that the luminance and chrominance can smoothly transition during the frame rate switching process, avoiding the appearance of a flashing screen, and improving the user experience.

Description

Technical Field

[0001] This application relates to the field of smart terminal technology, and in particular to an adjustment method, apparatus, storage medium, electronic device and chip. Background Technology

[0002] Variable Refresh Rate (VRR) is a technology that enables a monitor to dynamically adjust its refresh rate based on the frame rate of the input signal.

[0003] Currently, during the refresh rate adjustment process, there is a flickering issue caused by changes in brightness and color, which affects the user experience. Summary of the Invention

[0004] In view of this, this application provides an adjustment method, apparatus, storage medium, electronic device and chip, the main purpose of which is to improve the technical problem of screen flickering caused by changes in brightness and color during the refresh rate adjustment process in the current related technology, which affects the user experience.

[0005] Firstly, this application provides an adjustment method, including:

[0006] In response to a frame rate switching command, the values ​​of at least one set of target registers are read, the at least one set of target registers being used to control at least one Touch and Display Driver Integration (TDDI) control signal;

[0007] The at least one TDDI control signal is adjusted according to the values ​​of the at least one set of target registers.

[0008] Optionally, a set of destination registers includes at least one of the following:

[0009] The main register, the value of which is used to determine the adjustment information and adjustment enable of the at least one TDDI control signal;

[0010] At least one sub-register, the values ​​of which are used to determine the adjustment information of the at least one TDDI control signal.

[0011] Optionally, the adjustment information includes at least one or more of the following: adjustment start position, adjustment duration, and adjustment voltage amplitude.

[0012] Optionally, adjusting the at least one TDDI control signal according to the values ​​of the at least one set of target registers includes:

[0013] If adjustment enable is enabled in the values ​​of the at least one set of target registers, then the at least one TDDI control signal is adjusted according to the adjustment information.

[0014] Optionally, adjusting the at least one TDDI control signal according to the adjustment information includes:

[0015] Adjustments to at least one TDDI control signal are initiated based on the stated debugging start position; and / or,

[0016] Adjust the at least one TDDI control signal based on the end of the adjustment duration; and / or adjust the voltage amplitude of the at least one TDDI control signal based on the adjustment voltage amplitude.

[0017] Optionally, the step of reading the values ​​of at least one set of target registers in response to a frame rate switching instruction includes:

[0018] In response to receiving the frame rate switching instruction sent by the application processor platform, the controller reads the values ​​of the at least one set of target registers.

[0019] Secondly, this application provides an adjustment method, including:

[0020] The reading module is configured to read the values ​​of at least one set of target registers in response to a frame rate switching instruction, the at least one set of target registers being used to control at least one Touch and Display Driver Integrated TDDI control signal;

[0021] The adjustment device is configured to adjust the at least one TDDI control signal according to the values ​​of the at least one set of target registers.

[0022] Thirdly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the adjustment method as described in the first aspect.

[0023] Fourthly, this application provides an electronic device including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that the processor, when executing the computer program, implements the adjustment method as described in the first aspect.

[0024] Fifthly, this application provides a chip including one or more interface circuits and one or more processors; the interface circuits are configured to receive signals from the memory of an electronic device and send the signals to the processors, the signals including computer instructions stored in the memory; when the processor executes the computer instructions, the electronic device implements the adjustment method as described in the first aspect.

[0025] By means of the above technical solutions, the adjustment method, device, storage medium, electronic device and chip provided in this application, compared with the related technology, can read the value of at least one target register in response to the frame rate switching command. The target register can control the TDDI control signal. By adjusting the value of the target register, the characteristics and parameters of the thin film transistor (TFT) during the frame rate switching process can be improved, ensuring that the brightness and color can transition smoothly during the frame rate switching process, avoiding screen flickering and improving the user experience.

[0026] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0028] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 A flowchart illustrating an adjustment method provided in an embodiment of this application is shown;

[0030] Figure 2 A flowchart illustrating an adjustment method provided in an embodiment of this application is shown;

[0031] Figure 3 A schematic diagram illustrating an example provided in an embodiment of this application is shown;

[0032] Figure 4 A schematic diagram illustrating an example provided in an embodiment of this application is shown;

[0033] Figure 5 A schematic diagram illustrating an example provided in an embodiment of this application is shown;

[0034] Figure 6 A schematic diagram illustrating an example provided in an embodiment of this application is shown;

[0035] Figure 7 A schematic diagram illustrating an example provided in an embodiment of this application is shown;

[0036] Figure 8 A schematic diagram illustrating an example provided in an embodiment of this application is shown;

[0037] Figure 9 A schematic diagram illustrating an example provided in an embodiment of this application is shown;

[0038] Figure 10 A schematic diagram of an apparatus for an adjustment method provided in an embodiment of this application is shown. Detailed Implementation

[0039] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. It should be noted that, unless otherwise specified, the embodiments and features described herein can be combined with each other.

[0040] To address the technical issue of screen flickering caused by brightness and color changes during refresh rate adjustment in current technologies, which negatively impacts user experience, this embodiment provides an adjustment method, such as... Figure 1 As shown, the method includes:

[0041] Step 101: In response to the frame rate switching instruction, read the values ​​of at least one set of target registers.

[0042] Among them, at least one set of target registers is used to control at least one TDDI control signal.

[0043] It should be noted that the execution subject of the embodiments of this application can be a chip, specifically a chip in a smart terminal, such as a chip in a mobile phone, a chip in a tablet computer, etc.

[0044] In some examples, a frame rate switching instruction can refer to a command or operation used to change the display refresh rate. Dynamically adjusting the frame rate (e.g., via VRR) can significantly improve the user experience, especially in video games and high-performance graphics applications.

[0045] In this embodiment, at least one set of target registers can be registers used to control at least one TDDI control signal. Specifically, each target register can control one TDDI control signal.

[0046] Step 102: Adjust at least one TDDI control signal according to the values ​​of at least one set of target registers.

[0047] In the embodiments of this application, the value of the target register may correspond to the adjustment information of the TDDI control signal, etc. Therefore, at least one TDDI control signal can be adjusted based on the values ​​of at least one set of target registers.

[0048] Compared with related technologies, this embodiment can read the value of at least one target register in response to the frame rate switching command. The target register can control the TDDI control signal. By adjusting the value of the target register, the characteristics and parameters of the thin-film transistor (TFT) during the frame rate switching process can be improved, ensuring that the brightness and color can transition smoothly during the frame rate switching process, avoiding screen flickering, and improving the user experience.

[0049] Furthermore, to illustrate the specific implementation process of the method in this embodiment, this embodiment provides the following: Figure 2 The specific method shown includes:

[0050] Step 201: In response to the frame rate switching instruction, read the values ​​of at least one set of target registers.

[0051] Among them, at least one set of target registers is used to control at least one TDDI control signal.

[0052] Optionally, a set of target registers in the embodiments of this application includes at least one of the following: a main register, the value of which is used to determine the adjustment information and adjustment enable of at least one TDDI control signal; and at least one sub-register, the values ​​of which are respectively used to determine the adjustment information of at least one TDDI control signal.

[0053] In this embodiment, Adjustment Enable is a control mechanism used to determine whether modification of specific hardware registers is permitted. This mechanism is widely used in embedded systems, chip design, and device drivers to improve system security, stability, and flexibility. By enabling or disabling the Adjustment Enable bit, access permissions to critical parameters can be controlled, preventing accidental or unauthorized changes.

[0054] In some examples, the adjustment enable can be a specific bit (e.g., a bit in one of at least one set of registers) used to control whether modifications to other registers are allowed.

[0055] Optionally, the adjustment information may include at least one or more of the following: adjustment start position, adjustment duration, and adjustment voltage magnitude.

[0056] For example, if this application is configured with two sets of registers, respectively used to control TDDI control signal 1 (signalcontrol1) and TDDI control signal 2 (signal control2), specifically, TDDI control signal 1 (signalcontrol1) and TDDI control signal 2 (signal control2) can characterize the control signals of the relevant control panel (pane) 1 and TDDI (Touch and Display Driver Integration) that affect the display effect. Among them, TDDI control signal 1 (signalcontrol1) is the anode reset voltage of the OLED light-emitting device, and TDDI control signal 2 (signal control2) is the reset voltage of the OLED (Organic Light Emitting Diode) driving TFT (Thin Film Transistor).

[0057] It should be noted that, as Figure 3 As shown, in conventional designs, TDDI control signal 1 and DDI control signal 2 are both fixed timing control signals that do not change in amplitude and phase with changes in frame rate.

[0058] For example, such as Figure 4 As shown, register setting 1 sets the main register 1 in the first group of registers to an 8-bit register. Here, bit D0 indicates debug enable; setting it to 1 changes the control state of TDDI control signal 1. Bit D1 indicates the adjustment start position, bit D2 indicates the adjustment duration (based on 1 frame), and bit D3 indicates the adjusted voltage amplitude (based on 0.1V, the unit can be designed according to the actual control signal voltage amplitude). When bit D3 is 1, it indicates positive voltage adjustment; when bit D3 is 0, it indicates negative voltage adjustment. Once the corresponding bit is enabled, register setting 1-1, register setting 1-2, and register setting 1-3 can be configured to actually adjust sub-registers 1-1, 1-2, and 1-3, thereby adjusting the adjustment information corresponding to each sub-register.

[0059] For example, such as Figure 5As shown, register setting 2 (register1) can set the main register 2 in the second group of registers as an 8-bit register. Here, bit D0 indicates debug enable; setting it to 1 changes the control state of TDDI control signal 2 (signal control 2). Bit D1 indicates the starting position of the adjustment, bit D2 indicates the duration of the adjustment (based on 1 frame), and bit D3 indicates the voltage amplitude of the adjustment (based on 0.1V, the unit can be designed according to the actual voltage amplitude of the control signal). When bit D3 is 1, it indicates positive voltage adjustment; when bit D3 is 0, it indicates negative voltage adjustment. After the corresponding bit is enabled, register setting 2-1 (register2-1), register setting 2-2 (register2-2), and register setting 2-3 (register2-3) can be specifically configured to actually adjust sub-registers 2-1, 2-2, and 2-3, thereby adjusting the adjustment information corresponding to each sub-register.

[0060] Optionally, step 201 may specifically include: in response to receiving a frame rate switching instruction sent by the application processor platform, reading the values ​​of at least one set of target registers through the controller.

[0061] In this application embodiment, the application processor platform refers to a complete hardware and software solution built around an application processor (AP). Such platforms are typically used in smartphones, tablets, smart TVs, wearable devices, and other embedded systems that require complex computing tasks. It includes not only the core application processor chip itself but also various components and technologies that support the processor's operation.

[0062] It should be noted that, in this embodiment of the application, after receiving the frame rate switching instruction sent by the application processing platform, the TDDI microcontroller (MCU) mainly controls the process autonomously, without requiring the application processor platform to send separate operation instructions to control the TDDI control signal for adjustment.

[0063] For example, the specific process of a chip receiving a frame rate switching instruction sent by an application processor platform may include, but is not limited to: 1. Application processor generates instructions: The application processor (AP) generates frame rate switching instructions based on the current application scenario (such as games, video playback, static interfaces, etc.). The instructions may include a target refresh rate value (such as 60Hz, 90Hz, 120Hz) and related configuration parameters. 2. Instruction transmission via interface: The application processor sends the frame rate switching instructions to the target chip (such as a display driver chip or TDDI chip) through a standard communication interface (such as I2C, SPI, MIPIDSI / DCS). 3. Chip parses instructions: After receiving the instructions, the target chip parses the target refresh rate and other parameters. 4. Executes frame rate switching: The chip's internal logic adjusts the clock divider, synchronization signal, and other related parameters of the display module according to the instructions to complete the refresh rate switching. 5. Feedback status information: After the switching is completed, the chip may feed back the switching result to the application processor through an interrupt or status register.

[0064] Step 202: If adjustment enable is enabled in at least one set of target register values, then adjust at least one TDDI control signal according to the adjustment information.

[0065] Optionally, step 202 may specifically include: adjusting at least one TDDI control signal based on the debugging start position; and / or adjusting at least one TDDI control signal based on the end of the adjustment duration; and / or adjusting the voltage amplitude of at least one TDDI control signal based on the adjustment voltage amplitude.

[0066] For example, based on step 201 Figure 4 and Figure 5 The configured registers, if the brightness curve changes during VRR switching, are as follows: Figure 6 As shown, when the AP platform sends the VRR control command (i.e., the frame rate switching command in this embodiment), the TDDI enters the frame rate switching sequence and enables TDDI MCU control, as follows. Figure 7 As shown, register 1 (i.e., the main register in the first group of registers):

[0067] When D0 bit is 1, TDDI control signal 1 tuning is enabled (D0 bit = 1, signal control 1 tuned).

[0068] When D1 bit is 1, TDDI control signal 1 tuning starts (D1 bit = 1, signal control 1 tunestart enable);

[0069] When D2 bit is 1, TDDI control signal 1 tunenumber is enabled.

[0070] When D3 bit is 0, TDDI control signal 1 adjusts to negative voltage (D3 bit = 0, signal control 1 control voltage change);

[0071] The value of register 1-1 (i.e., sub-register 1-1 in the first group of registers) is 0000 0000 (register1-1 = 0000 0000). The TDDI control signal 1 (signal control 1) references the VRR control command (i.e., the frame rate switching instruction in the embodiment of this application) and is not delayed.

[0072] The value of register 1-2 (i.e., sub-register 1-2 in the first group of registers) is 0000 0010 (register1-2=0000 0010), and the duration of TDDI control signal 1 is adjusted to 2 frames.

[0073] The value of register 1-3 (i.e., sub-register 1-3 in the first group of registers) is 0000 0001 (register1-3=0000 0001), and the TDDI control signal 1 is adjusted to negative voltage by 0.1V;

[0074] The final adjustment effect is as follows Figure 7 The TDDI control signal 1 is shown in the figure.

[0075] Correspondingly, register 2 (i.e., the main register in the second set of registers):

[0076] When D0 bit is 1, TDDI control signal 2 tuning is enabled (D0 bit = 1, signal control 2 tuned).

[0077] When D1 bit is 1, TDDI control signal 2 tuning starts (D1 bit = 1, signal control 2 tunestart enable);

[0078] When D2 bit is 1, TDDI control signal 2 tunenumber is enabled.

[0079] When D3 bit is 1, the TDDI control signal 2 is adjusted to positive voltage (D3 bit = 0, signal control 2 control voltage change).

[0080] The value of register 2-1 (i.e., sub-register 2-1 in the second group of registers) is 0000 0000 (register2-1=0000 0000). The TDDI control signal 2 (signal control 2) references the VRR control command (i.e. the frame rate switching instruction in the embodiment of this application) and is not delayed.

[0081] The value of register 2-2 (i.e., sub-register 2-2 in the second group of registers) is 0000 0010 (register2-2=0000 0010), and the duration of TDDI control signal 2 is adjusted to 2 frames;

[0082] The value of register 2-3 (i.e., sub-register 2-3 in the second group of registers) is 0000 0001 (register2-3=0000 0001), and the TDDI control signal 2 is adjusted to positive voltage by 0.1V;

[0083] The final adjustment effect is as follows Figure 7 The TDDI control signal 2 is shown in the figure.

[0084] For example, based on step 201 Figure 4 and Figure 5 The configured registers, if the brightness curve changes during VRR switching, are as follows: Figure 8 As shown, when the AP platform sends the VRR control command (i.e., the frame rate switching command in this embodiment), the TDDI enters the frame rate switching sequence and enables TDDI MCU control, as follows. Figure 9 As shown, register 1 (i.e., the main register in the first group of registers):

[0085] When D0 bit is 1, TDDI control signal 1 tuning is enabled (D0 bit = 1, signal control 1 tuned).

[0086] When D1 bit is 1, TDDI control signal 1 tuning starts (D1 bit = 1, signal control 1 tunestart enable);

[0087] When D2 bit is 1, TDDI control signal 1 tunenumber is enabled.

[0088] When D3 bit is 0, TDDI control signal 1 adjusts to negative voltage (D3 bit = 0, signal control 1 control voltage change);

[0089] The value of register 1-1 (i.e., sub-register 1-1 in the first group of registers) is 0000 0001 (register1-1=0000 0001), and the TDDI control signal 1 (signal control 1) references the VRR control command (i.e. the frame rate switching instruction in the embodiment of this application) and is delayed by 1 frame.

[0090] The value of register 1-2 (i.e., sub-register 1-2 in the first group of registers) is 0000 0001 (register1-2=0000 0001), and the duration of TDDI control signal 1 is adjusted to 1 frame;

[0091] The value of register 1-3 (i.e., sub-register 1-3 in the first group of registers) is 0000 0001 (register1-3=0000 0001), and the TDDI control signal 1 is adjusted to negative voltage by 0.1V;

[0092] The final adjustment effect is as follows Figure 9 The TDDI control signal 1 is shown in the figure.

[0093] Correspondingly, register 2 (i.e., the main register in the second set of registers):

[0094] When D0 bit is 1, TDDI control signal 2 tuning is enabled (D0 bit = 1, signal control 2 tuned).

[0095] When D1 bit is 1, TDDI control signal 2 tuning starts (D1 bit = 1, signal control 2 tunestart enable);

[0096] When D2 bit is 1, TDDI control signal 2 tunenumber is enabled.

[0097] When D3 bit is 1, the TDDI control signal 2 is adjusted to positive voltage (D3 bit = 0, signal control 2 control voltage change).

[0098] The value of register 2-1 (i.e., sub-register 2-1 in the second group of registers) is 0000 0001 (register2-1=0000 0001), and the TDDI control signal 2 (signal control 2) references the VRR control command (i.e. the frame rate switching instruction in the embodiment of this application) and is delayed by 1 frame.

[0099] The value of register 2-2 (i.e., sub-register 2-2 in the second group of registers) is 0000 0001 (register2-2=0000 0001), and the duration of TDDI control signal 2 is adjusted to 1 frame;

[0100] The value of register 2-3 (i.e., sub-register 2-3 in the second group of registers) is 0000 0001 (register2-3=0000 0001), and the TDDI control signal 2 is adjusted to positive voltage by 0.1V;

[0101] The final adjustment effect is as follows Figure 9 The TDDI control signal 2 is shown in the figure.

[0102] It's important to note that Variable Refresh Rate (VRR) technology is a technique that allows the monitor's refresh rate to be dynamically adjusted automatically based on the frame rate of the input signal. Compared to traditional fixed refresh rate (VRR) technology, VRR offers advantages in terms of smoothness, input latency, and energy efficiency, but it also has drawbacks in terms of technical complexity and mode switching. Implementing VRR technology involves complex communication and collaboration between the monitor, graphics card, and related software. In some cases, technical malfunctions or instability may occur, such as untimely refresh rate adjustments or screen flickering. This presents a greater challenge for technical debugging. With the development of Organic Light Emitting Diode (OLED) screen driver chip technology, OLED TDDI has begun to be applied in practical projects. Based on the OLED TDDI MCU, hardware support is also provided for the processing and application of different algorithms.

[0103] In related technologies, smartphone screens typically support N frame rates. Depending on the screen's characteristics and the driver chip's capabilities, a limited number of frame rates are usually supported between 1Hz and 144Hz. To ensure display quality, different frame rates often include specific gamma parameters, timing configurations, and voltage configurations. Therefore, during VRR switching, it's inevitable that parameters from different frame rates will be invoked, causing changes in brightness and color. In actual projects, with frame rate changes, the display effect often exhibits brightness and color variations due to the characteristics of OLED (Organic Light Emitting Diode) devices or adjustments made during effect testing, leading to screen flickering, such as... Figure 6 and Figure 8 As shown, within the first few frames after a frame rate switch, the brightness will change significantly. This change, compared to the steady-state brightness, may increase or decrease. This change is easily detected by the human eye at the moment of frame rate switching, especially under certain ambient light conditions and in operation scenarios with frequent VRR switching.

[0104] It should be noted that VRR technology is widely used in smartphones, and the problems encountered during variable refresh rate switching are often mainly screen flickering and display artifacts. To address these issues, this application uses OLED TDDI technology as its foundation. Addressing the visual effects problems caused by VRR refresh rate switching in smartphones, it dynamically controls the panel and screen TDDI control signals during VRR switching to improve TFT characteristics and parameters during frame rate switching, ensuring a smooth transition in display brightness. Furthermore, this application can adjust the activation time of the dynamic control signals according to the actual effect to adapt to different panel characteristics. This application can also effectively resolve visual differences caused by brightness and color changes during frame rate switching, effectively solve the screen flickering problem, and improve user experience and technological competitiveness.

[0105] Compared with related technologies, this embodiment can read the value of at least one target register in response to the frame rate switching command. The target register can control the TDDI control signal. By adjusting the value of the target register, the characteristics and parameters of the thin-film transistor (TFT) during the frame rate switching process can be improved, ensuring that the brightness and color can transition smoothly during the frame rate switching process, avoiding screen flickering, and improving the user experience.

[0106] Furthermore, as Figure 1 and Figure 2 To specifically implement the method shown, this embodiment provides an adjustment device, such as... Figure 10 As shown, the device includes: a reading module 31 and an adjustment module 32.

[0107] Reading module 31 is configured to read the values ​​of at least one set of target registers in response to a frame rate switching instruction, the at least one set of target registers being used to control at least one TDDI control signal;

[0108] The adjustment device 32 is configured to adjust the at least one TDDI control signal according to the values ​​of the at least one set of target registers.

[0109] In some examples of this embodiment, a set of target registers includes at least one of the following: a main register, the value of which is used to determine the adjustment information and adjustment enable of the at least one TDDI control signal; and at least one sub-register, the values ​​of which are respectively used to determine the adjustment information of the at least one TDDI control signal.

[0110] In some examples of this embodiment, the adjustment information includes at least one or more of the following: adjustment start position, adjustment duration, and adjustment voltage amplitude.

[0111] In some examples of this embodiment, the adjustment module 32 is specifically configured to adjust the at least one TDDI control signal according to the adjustment information if the adjustment enable is enabled in the values ​​of the at least one set of target registers.

[0112] In some examples of this embodiment, the adjustment module 32 is further configured to adjust the at least one TDDI control signal based on the debugging start position; and / or to adjust the at least one TDDI control signal based on the end of the adjustment duration; and / or to adjust the voltage amplitude of the at least one TDDI control signal based on the adjustment voltage amplitude.

[0113] In some examples of this embodiment, the reading module 31 is specifically configured to read the values ​​of the at least one set of target registers through the controller in response to receiving the frame rate switching instruction sent by the application processor platform.

[0114] It should be noted that other corresponding descriptions of the functional units involved in the adjustment device provided in this embodiment can be found in [reference needed]. Figure 1 and Figure 2 The corresponding description in [the document] will not be repeated here.

[0115] Based on the above, Figure 1 and Figure 2 Accordingly, this embodiment also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the above-described method. Figure 1 and Figure 2 The method shown.

[0116] Based on this understanding, the technical solution of this application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as CD-ROM, USB flash drive, mobile hard drive, etc.) and includes several instructions to cause a computer device (such as personal computer, server, or network device, etc.) to execute the methods of various implementation scenarios of this application.

[0117] Based on the above, Figure 1 and Figure 2 The method shown, and Figure 10 To achieve the above objectives, the present application also provides an electronic device comprising a storage medium and a processor, as shown in the virtual device embodiment; the storage medium for storing a computer program; and the processor for executing the computer program to implement the above-described virtual device embodiment. Figure 1 and Figure 2 The method shown.

[0118] Optionally, the aforementioned physical devices may also include a user interface, a network interface, a camera, radio frequency (RF) circuitry, sensors, audio circuitry, a Wi-Fi module, etc. The user interface may include a display screen, input units such as a keyboard, etc., and optional user interfaces may also include USB interfaces, card reader interfaces, etc. The network interface may optionally include standard wired interfaces, wireless interfaces (such as Wi-Fi interfaces), etc.

[0119] Those skilled in the art will understand that the physical device structure provided in this embodiment does not constitute a limitation on the physical device, and may include more or fewer components, or combine certain components, or have different component arrangements.

[0120] The storage medium may also include an operating system and a network communication module. The operating system is a program that manages the hardware and software resources of the aforementioned physical device, supporting the operation of information processing programs and other software and / or programs. The network communication module is used to enable communication between the various components within the storage medium, as well as communication with other hardware and software in the information processing physical device.

[0121] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware platforms, or it can be implemented by hardware. By applying the solution of this embodiment, compared with related technologies, this embodiment can read the value of at least one target register in response to the frame rate switching command. The target register can control the TDDI control signal. By adjusting the value of the target register, the TDDI control signal can be adjusted, thereby improving the characteristics and parameters of the thin-film transistor (TFT) during the frame rate switching process, ensuring that brightness and color can transition smoothly during the frame rate switching process, avoiding screen flickering, and improving the user experience.

[0122] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0123] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. An adjustment method, characterized in that, include: In response to a frame rate switching command, the values ​​of at least one set of target registers are read, the at least one set of target registers being used to control at least one Touch and Display Driver Integrated TDDI control signal; The at least one TDDI control signal is adjusted according to the values ​​of the at least one set of target registers.

2. The method according to claim 1, characterized in that, A set of destination registers includes at least one of the following: The main register, the value of which is used to determine the adjustment information and adjustment enable of the at least one TDDI control signal; At least one sub-register, the values ​​of which are used to determine the adjustment information of the at least one TDDI control signal.

3. The method according to claim 2, characterized in that, The adjustment information includes at least one or more of the following: adjustment start position, adjustment duration, and adjustment voltage amplitude.

4. The method according to claim 3, characterized in that, Adjusting the at least one TDDI control signal according to the values ​​of the at least one set of target registers includes: If adjustment enable is enabled in the values ​​of the at least one set of target registers, then the at least one TDDI control signal is adjusted according to the adjustment information.

5. The method according to claim 4, characterized in that, The adjustment of the at least one TDDI control signal according to the adjustment information includes: Adjustments to at least one TDDI control signal are initiated based on the stated debugging start position; and / or, The adjustment of at least one TDDI control signal ends based on the adjustment duration; and / or... The voltage amplitude of the at least one TDDI control signal is adjusted based on the adjusted voltage amplitude.

6. The method according to claim 1, characterized in that, The step of reading at least one set of target register values ​​in response to a frame rate switching instruction includes: In response to receiving the frame rate switching instruction sent by the application processor platform, the controller reads the values ​​of the at least one set of target registers.

7. An adjustment device, characterized in that, include: The read module is configured to read the values ​​of at least one set of target registers in response to a frame rate switching instruction, the at least one set of target registers being used to control at least one TDDI control signal; The adjustment device is configured to adjust the at least one TDDI control signal according to the values ​​of the at least one set of target registers.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 6.

9. An electronic device, comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method of any one of claims 1 to 6.

10. A chip, characterized in that, The device includes one or more interface circuits and one or more processors; the interface circuits are configured to receive signals from the memory of the electronic device and send the signals to the processors, the signals including computer instructions stored in the memory; when the processor executes the computer instructions, the electronic device performs the method of any one of claims 1 to 6.

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