A resistor having a filled densified electrode layer and method thereof

CN122991785APending Publication Date: 2026-10-27GUANGDONG SENYUAN TECH IND CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202610912604.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-24
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

[0003]然而,在宽温域工作环境及频繁冷热交替条件下,传统热敏电阻的结构可靠性面临严峻挑战

Benefits of technology

[0021]1、该填充致密化电极层的电阻,利用热敏电阻基体上的多梯度孔隙(锚固孔/过渡孔/缓冲孔)与电性层发生深度联动,电性层材料在毛细作用下深入孔隙,形成根须状立体互锁,并大幅提升热敏电阻电极层的填充致密化程度;同时,电性层的材料与热敏电阻基体发生界面反应,冷却后形成陶瓷-金属互穿网络,这种结合方式使得电性层不再是单纯地贴合在基体上,而是像植物根系一样“长”在基体中,实现了微观层面的冶金结合,有效提升了热敏电阻的抗剪切力和抗疲劳性能。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122991785A_ABST
    Figure CN122991785A_ABST
Patent Text Reader

Abstract

The application discloses a resistance with a filled and densified electrode layer and a method thereof, and relates to the field of thermistors, which comprises an inner core layer of a thermistor, wherein a semiconductor ceramic material is adopted, and the component and the weight percentage range are as follows: Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 0.5-15%, and CuO 3.5-15%. The application utilizes the deep linkage between the multiple gradient pores (anchoring holes / transition holes / buffer holes) on the thermistor substrate and the electrical layer, the electrical layer material is deeply penetrated into the pores under the capillary action, the root-like three-dimensional interlocking is formed, and the filling and densification degree of the electrode layer of the thermistor is greatly improved. Meanwhile, the material of the electrical layer and the thermistor substrate have an interface reaction, and a ceramic-metal interpenetrating network is formed after cooling. Through the synergistic effect of the mechanical anchoring part and the pure copper functional layer, the pure copper functional layer is firmly locked with the electrical layer, and thus the shear resistance and fatigue resistance of the thermistor are effectively improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention belongs to the field of thermistor technology, and more specifically, relates to a resistor having a densely packed electrode layer. Background Technology

[0002] NTC thermistors, a key type of semiconductor ceramic component, exhibit an exponential decrease in resistance with increasing temperature, stemming from the dynamic change in carrier concentration within the material. During electronic circuit operation, the instantaneous capacitor charging and inductor excitation effects upon power-on can trigger surge currents far exceeding normal operating currents. These transient currents can cause irreversible damage to downstream components or circuits. Power-type NTC thermistors, through their negative temperature coefficient, achieve surge suppression, becoming a core component for circuit protection. These components are typically made from transition metal oxides such as manganese, cobalt, and nickel, through mixing, molding, and high-temperature sintering processes. Their electrical properties are significantly influenced by material ratios, sintering conditions, and microstructure, leading to their widespread application in temperature sensing, surge suppression, and other scenarios.

[0003] However, the structural reliability of traditional thermistors faces severe challenges in wide-temperature operating environments and frequent temperature fluctuations. In existing technologies, the electrode layer is generally formed using silver-based paste through screen printing or vacuum sputtering. This approach has several inherent drawbacks: the precious metal nature of silver leads to high material costs, making it difficult to meet the economic requirements of large-scale industrial production; the significant difference in thermal expansion coefficients between metallic silver and the ceramic substrate continuously generates interfacial shear stress during temperature cycling, inducing electrode layer warping, microcrack propagation, and even overall peeling under long-term effects, ultimately leading to electrical performance failure; furthermore, traditional planar electrode structures rely solely on physical bonding to achieve interfacial adhesion, which is prone to insufficient bonding strength, limiting the device's power handling capacity and lifespan.

[0004] To address these shortcomings, the industry has attempted to reduce costs by lowering the silver content or using base metals such as copper as alternatives. However, copper has poor interfacial compatibility with the ceramic substrate, making it difficult to form a stable bond. Some technologies introduce a single transition layer to alleviate thermal expansion mismatch; however, the performance gradient between the transition layer and the substrate and conductive layer is discontinuous, resulting in limited stress dispersion and failing to fundamentally solve the interfacial peeling problem. Summary of the Invention

[0005] The purpose of this invention is to provide a resistor with a densely packed electrode layer to solve the problems mentioned in the background art.

[0006] To solve the above-mentioned technical problems, the basic concept of the technical solution adopted by the present invention is as follows: a resistor with a densely packed electrode layer, comprising: an inner core layer of a thermistor, wherein the inner core layer is made of a semiconductor ceramic material, and the composition and weight percentage range are: Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 0.5-15%, CuO 3.5-15%; a multi-gradient porous mesh disposed on both sides of the thermistor; an electrical layer disposed on both sides of the thermistor; wherein the electrical layer penetrates into the multi-gradient porous mesh and forms a three-dimensional interlocking system; a pure copper functional layer disposed on the electrical layer; and a mechanical anchoring part formed on the electrical layer for anchoring the pure copper functional layer on the electrical layer.

[0007] Preferably, the composition and weight percentage range of the inner core layer are: Mn3O4 47%, NiO 16.2%, Co3O4 16.8%, Fe2O3 10.5%, CuO 7.5%.

[0008] Furthermore, the multi-gradient porous mesh includes, in sequence from the surface of the thermistor inward, anchor holes, transition holes, and buffer holes, with the diameters of the anchor holes, transition holes, and buffer holes decreasing sequentially.

[0009] Furthermore, the depth ratio of the anchoring hole, transition hole, and buffer hole is 6:3:2.

[0010] Preferably, the electrical layer is composed of multiple components selected from Ag, Ti, Si, Al, Ni, Zn, B, and Bi.

[0011] Preferably, the mechanical anchoring part includes an inverted trapezoidal part disposed on the electrical layer, the inverted trapezoidal part being wide at the upper end and narrow at the lower end; wherein, the inverted trapezoidal part includes sidewalls symmetrically formed in the electrical layer and a bottom wall connected to the sidewalls.

[0012] Preferably, the mechanical anchoring part includes a spiral part disposed on the electrical layer; wherein the spiral part is raised or recessed on the electrical layer, and at least one spiral part is disposed on the electrical layer.

[0013] Preferably, the mechanical anchoring part includes a tiled part, which includes continuously formed inclined walls, horizontal walls, vertical walls, and transverse walls, and a sloping recessed area is formed between the inclined walls, transverse walls, and vertical walls.

[0014] A method for fabricating a resistor with a densely packed electrode layer includes the following steps:

[0015] S1. Prepare the inner core layer of the thermistor to obtain the resistor substrate;

[0016] S2. Construct a multi-gradient porous mesh on the surface of the resistor substrate;

[0017] S3. An electrical layer is formed by infiltration and deposition on the resistive substrate;

[0018] S4. Then, a mechanical anchoring part is formed on the surface of the electrical layer;

[0019] S5. Finally, a pure copper functional layer is deposited on the mechanical anchor portion of the electrical layer to obtain a thermistor.

[0020] By adopting the above technical solution, the present invention has the following beneficial effects compared with the prior art:

[0021] 1. The resistance of this densely packed electrode layer utilizes the multi-gradient pores (anchoring holes / transition holes / buffer holes) on the thermistor substrate to deeply interact with the electrical layer. Under capillary action, the electrical layer material penetrates deep into the pores, forming a root-like three-dimensional interlocking structure, and significantly improving the density of the thermistor electrode layer. At the same time, the material of the electrical layer undergoes an interfacial reaction with the thermistor substrate, forming a ceramic-metal interpenetrating network after cooling. This bonding method means that the electrical layer is no longer simply attached to the substrate, but "grows" in the substrate like plant roots, achieving metallurgical bonding at the microscopic level, and effectively improving the thermistor's shear resistance and fatigue resistance.

[0022] 2. The resistance of the densely packed electrode layer is achieved through the design of a mechanical anchoring part (inverted trapezoidal / spiral / shingled structure) that works synergistically with the pure copper functional layer, firmly locking the pure copper functional layer to the electrical layer. In particular, the structural design of the spiral part allows stress to be more evenly distributed across the entire spiral interface, reducing local stress concentration and greatly enhancing the long-term reliability and service life of the electrical layer and the pure copper functional layer. Furthermore, the spiral structure can convert horizontal shear stress into rotational compressive stress. When thermal expansion occurs, the stress is "guided" and released along the spiral line, rather than directly impacting the interface.

[0023] 3. The resistor with the dense electrode layer has a pure copper functional layer built on top of the electrical layer. The pure copper functional layer not only significantly reduces the material cost (replacing the precious metal silver), but also covers the surface of the thermistor due to its high thermal conductivity, thus creating an efficient three-dimensional heat dissipation channel. This not only reduces the contact thermal resistance, but also significantly improves the power tolerance and long-term working life of the resistor. Attached Figure Description

[0024] In the attached diagram:

[0025] Figure 1 This is a schematic diagram of a resistor with a densely packed electrode layer proposed in this invention;

[0026] Figure 2This is a schematic diagram of a multi-gradient porous mesh structure with a filled and densified electrode layer proposed in this invention;

[0027] Figure 3 This is a schematic diagram of the structure of an electrical layer with a resistive filling and densified electrode layer and a pure copper functional layer proposed in this invention.

[0028] Figure 4 This is a schematic diagram of an inverted trapezoidal portion of a resistor having a densely packed electrode layer, as proposed in this invention.

[0029] Figure 5 This is a schematic diagram of the structure of a spiral portion of a resistor having a densely packed electrode layer, as proposed in this invention.

[0030] Figure 6 This is a schematic diagram of a shingled portion of a resistor having a densely packed electrode layer, as proposed in this invention.

[0031] In the figure: 1. Thermistor; 10. Multi-gradient porous mesh; 101. Anchor hole; 102. Transition hole; 103. Buffer hole; 11. Electrical layer; 111. Inverted trapezoidal part; 1110. Side wall; 1111. Bottom wall;

[0032] 112. Spiral section;

[0033] 113. Overlapping tile section; 1131. Sloping wall; 1132. Horizontal wall; 1133. Vertical wall; 1134. Transverse wall; 1135. Sloping concave area;

[0034] 12. Pure copper functional layer. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments will be clearly and completely described below with reference to the accompanying drawings. The following embodiments are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0036] Example 1: Refer to Figures 1-6A resistor having a densely packed electrode layer includes: an inner core layer of a thermistor 1, the inner core layer being made of a semiconductor ceramic material with the following composition and weight percentage range: Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 0.5-15%, CuO 3.5-15%; a multi-gradient porous mesh 10 disposed on both sides of the thermistor 1; an electrical layer 11 disposed on both sides of the thermistor 1; wherein the electrical layer 11 penetrates into the multi-gradient porous mesh 10 and forms a three-dimensional interlocking system; a pure copper functional layer 12 disposed on the electrical layer 11; a mechanical anchoring part is formed on the electrical layer 11 for anchoring the pure copper functional layer 12 onto the electrical layer 11; wherein the pure copper functional layer 12 covers the entire surface of the thermistor 1, which is beneficial for heat dissipation of the thermistor 1;

[0037] Among them, the inner core layer of the thermistor 1 refers to the core functional part of the resistor. Its material properties determine the temperature sensitivity of the resistor. It is usually made of semiconductor ceramic material and is used to realize the characteristic that the resistance value changes with temperature.

[0038] Semiconductor ceramic materials are characterized by good thermal sensitivity and chemical stability.

[0039] Multi-gradient porous mesh 10 refers to a microporous structure with different pore sizes and / or pore depths formed on the surface of a material. Its gradient characteristics help to achieve gradual transition of material properties and enhance mechanical interlocking.

[0040] The electrical layer 11 forms a low-resistance conductive path on both sides of the thermistor 1, which outputs the resistance signal inside the thermistor 1 that changes with temperature. Another feature is that it can penetrate into the multi-gradient porous mesh 10 structure on the surface of the thermistor 1 substrate, forming a tight physical and chemical bond.

[0041] The pure copper functional layer 12, located on the outermost layer of the electrical layer 11, is mainly composed of pure copper and is used to provide excellent conductivity, external connection function and heat dissipation function.

[0042] A three-dimensional interlocking system refers to a three-dimensional interwoven and interlocking structure formed at the microscopic level through the penetration and filling of materials, which can significantly enhance the mechanical bonding strength of the interface.

[0043] Mechanical anchoring refers to a structure with a specific geometric shape formed on the surface or between layers of a material. Through physical interlocking, it firmly fixes adjacent layers together to resist external forces.

[0044] Specifically, the resistor includes the inner core layer of thermistor 1. This inner core layer is the core functional part of the resistor, responsible for providing thermistor characteristics.

[0045] The inner core layer is prepared using a spinel-type semiconductor ceramic material. As one implementation, the composition and weight percentage range of this material can be: Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 0.5-15%, and CuO 3.5-15%. These oxides are precisely proportioned and processed through mixing, molding, and sintering to form a semiconductor ceramic with specific resistivity and B-value characteristics. For example, the oxide powder can be ball-milled, then pressed and sintered at high temperature to obtain a dense inner core layer structure.

[0046] Furthermore, a multi-gradient porous mesh 10 is disposed on the surface of the thermistor 1. This multi-gradient porous mesh 10 is a surface-modified layer with a microporous structure, where the pore distribution exhibits a gradient change. For example, a series of micron- or submicron-sized pores can be formed on the outer surface of the interface transition layer through processes such as chemical etching, laser drilling, or template methods. The size and depth of these pores can be designed as needed to provide a basis for subsequent electrode layer penetration and anchoring.

[0047] Based on this, the electrical layer 11 penetrates into the multi-gradient porous mesh 10 and forms a three-dimensional interlocking system. The material selection and deposition process of the electrical layer 11 enable it to penetrate deep into the interior of the multi-gradient porous mesh 10, fill the pores, and form a tight physical and chemical bond with the thermistor 1. For example, electrochemical deposition, chemical vapor deposition, printing, or plasma spraying can be used to deposit the material into the pores, thereby forming a three-dimensional interlocking structure similar to "rivets" or "tree roots," which significantly improves the interfacial bonding force.

[0048] Mechanical anchoring portions are formed on the electrical layer 11 to anchor the pure copper functional layer 12 onto the electrical layer 11. The mechanical anchoring portions are a special structure on the surface of the electrical layer 11 designed to provide additional mechanical fixation for the pure copper functional layer 12. For example, a series of microscopic protrusions, depressions, or irregular shapes can be formed on the surface of the electrical layer 11 through methods such as die imprinting, etching, or deposition growth. These structures can physically interlock with the subsequently deposited pure copper functional layer 12, thereby enhancing the adhesion of the pure copper functional layer 12 and preventing it from peeling off under thermal or mechanical stress.

[0049] Finally, the pure copper functional layer 12 is anchored onto the electrical layer 11. This pure copper functional layer 12 serves as the outermost conductive electrode, providing low-resistance electrical contact. For example, pure copper material can be deposited on the surface of the electrical layer 11 with mechanical anchoring portions through processes such as electroplating, sputtering, vacuum evaporation, or arc spraying. The copper material fills and covers the mechanical anchoring portions, forming a strong mechanical bond, ensuring the conductivity and long-term stability of the electrode layer.

[0050] Therefore, this technical solution optimizes the combination of the inner core layer and the electrical layer 11, and constructs a multi-gradient porous mesh 10 on the surface of the thermistor 1. The electrical layer 11 and the multi-gradient porous mesh 10 form a three-dimensional interlocking system, and a mechanical anchoring part is provided on the electrical layer 11 to anchor the pure copper functional layer 12. This effectively solves the problems of high cost, weak interfacial bonding, easy peeling, and single heat dissipation path of traditional thermistor electrode layers, significantly improving the structural stability, interfacial bonding strength, and power tolerance of the resistor under wide temperature range and frequent thermal shocks, while reducing material costs.

[0051] In one embodiment, the composition and weight percentage range of the inner core layer are: Mn3O4 47%, NiO 16.2%, Co3O4 16.8%, Fe2O3 10.5%, and CuO 7.5%. This weight percentage is chosen to ensure that the inner core layer of the thermistor 1 forms a stable spinel crystal phase structure during sintering and achieves specific semiconductor properties. Specifically, Mn3O4, as the main component, plays a dominant role in the negative temperature coefficient characteristic of the resistor, and its content directly affects the resistivity and B-value. The introduction of NiO and Co3O4 helps to adjust the resistivity, improve the sintering performance of the material, and enhance grain growth. Fe2O3 can further optimize the electrical properties and chemical stability of the material and improve its oxidation resistance. CuO can contribute to low-temperature sintering densification, significantly reduce resistivity, finely adjust the B-value, and fill spinel A-sites to perfect the crystal phase. Therefore, by precisely controlling the content of these components, the resistivity, B-value (material constant), and thermistor response characteristics of the inner core layer can be effectively controlled to meet the application requirements of high-precision thermistors.

[0052] Reference Figure 2 , Figure 3 The multi-gradient porous mesh 10 includes, from the surface of the thermistor 1 inward, anchor holes 101, transition holes 102, and buffer holes 103, with the diameters of the anchor holes 101, transition holes 102, and buffer holes 103 decreasing sequentially; wherein, the depth ratio of the anchor holes 101, transition holes 102, and buffer holes 103 is 6:3:2.

[0053] Specifically, the mesh is not a single, uniform porous structure, but rather composed of three different types of pores arranged sequentially from the outside in. Anchor holes 101 are located in the outermost layer, directly contacting the electrical layer 11, and their main function is to provide initial mechanical gripping force. Transition holes 102 are located in the middle layer, connecting the anchor holes 101 and buffer holes 103, which helps with stress dispersion and the continuity of the electrical layer 11. Buffer holes 103 are located in the innermost layer, close to the thermistor 1 substrate, and are mainly used to alleviate stress concentration and protect the substrate. This layered design aims to optimize the bonding interface between the electrical layer 11 and the thermistor 1, enabling it to perform different functions at different depths, thereby improving the overall bonding strength and stability. This layered structure can be achieved in various ways, such as using multi-step photolithography and etching processes, or by precisely controlling the parameters of laser drilling to form pores with different morphologies at different depths.

[0054] Furthermore, this technical solution defines the geometric dimensions of the aforementioned layered pores, namely, the diameters of the anchoring hole 101, transition hole 102, and buffer hole 103 decrease sequentially. This means that the anchoring hole 101 has the largest diameter, followed by the transition hole 102, and the buffer hole 103 has the smallest diameter. This gradient aperture design has multiple advantages: First, the larger anchoring hole 101 facilitates the rapid entry and initial filling of the electrical layer 11, forming a strong mechanical anchoring point; second, the gradually decreasing aperture helps guide the electrical layer 11 material to penetrate deeper into the interior, ensuring uniformity and density of penetration; third, the gradient change in aperture helps alleviate interfacial stress, avoiding stress concentration caused by material shrinkage or thermal expansion mismatch, thereby improving the fatigue resistance of the interface. Achieving the sequential reduction in aperture can be accomplished by precisely controlling processing parameters, such as gradually reducing the mask opening size during etching, or gradually reducing the laser energy or changing the focal point position during laser drilling.

[0055] Furthermore, this technical solution quantifies the distribution ratio of different types of pores along the depth direction of the entire multi-gradient porous mesh 10, namely, the depth ratio of anchor holes 101, transition holes 102, and buffer holes 103 is 6:3:2. This specific depth ratio is the result of optimized design, aiming to balance the needs of different functional areas. The larger depth ratio of anchor holes 101 ensures sufficient mechanical anchor volume, providing a solid adhesion foundation for the electrical layer 11; the depth ratio of transition holes 102 ensures a smooth transition of the electrical layer 11 from the anchoring area to the buffer zone, contributing to uniform stress distribution; although the depth ratio of buffer holes 103 is the smallest, its proximity to the substrate effectively buffers stress and prevents cracks from propagating into the substrate. This specific depth ratio can be achieved by precisely controlling the processing time, material removal rate, or deposition thickness.

[0056] Through the above technical solution, the multi-gradient porous mesh 10 is refined into anchoring holes 101, transition holes 102, and buffer holes 103 arranged sequentially from the surface of the thermistor 1 inwards. The decreasing hole diameters and depth ratios are precisely controlled to be 6:3:2, thus significantly optimizing the bonding interface between the electrical layer 11 and the thermistor 1. Specifically, the anchoring holes 101 provide strong mechanical anchoring force, ensuring the initial firm adhesion of the electrical layer 11; the transition holes 102 achieve a smooth transition and stress dispersion of the electrical layer 11, avoiding stress concentration; and the buffer holes 103 effectively alleviate interface stress and protect the thermistor 1 substrate. This refined gradient porous structure design allows the electrical layer 11 to penetrate more uniformly and densely into the thermistor 1, forming a more stable and robust three-dimensional interlocking system. Compared to porous meshes with simple structures or unclear gradients, this technical solution can significantly improve the bonding strength and adhesion between the electrical layer 11 and the resistor substrate, effectively suppressing the problems of electrode layer delamination, cracking or detachment that may occur under harsh working environments such as thermal cycling and mechanical shock, thereby significantly improving the long-term reliability and service life of the resistor.

[0057] In one embodiment, the electrical layer 11 is composed of multiple components selected from Ag, Ti, Si, Al, Ni, Zn, B, and Bi.

[0058] The electrical layer 11 is composed of one or more of Ag, Ti, Si, Al, Ni, Zn, B, and Bi. Preferably, Ni-Zn-Al-Si is used, which utilizes the low melting point of Zn (420°C) and the eutectic properties of Al-Si, allowing it to be semi-liquid at <600°C. This allows it to penetrate deeply into the tertiary pores of the substrate through capillary action, forming a "root-like" metallurgical bond. This makes the composition of the electrical layer 11 firmly anchored in the resistive substrate like an "inverted pyramid," meaning the electrical layer 11 is no longer adhered to the resistive substrate but rather "grown" within it, effectively enhancing shear resistance. Furthermore, it shortens and stabilizes the current transmission path, significantly reducing contact resistance.

[0059] Therefore, the grouping selection of the electrical layer 11 can better integrate with the thermistor 1 and improve the performance of the thermistor 1.

[0060] Ag is the metal with the best conductivity at room temperature. A small amount of doping can significantly improve the overall conductivity of the electrical layer 11, shorten the electron transport path, and ensure the long-term stability of the thermistor resistance and B value, without drift in measurement accuracy. Ti is an excellent active metal that can form stable compounds with elements in the ceramic matrix, significantly improving the bonding strength between the thermistor 1 and the electrical layer 11, and serving as a good bonding layer for the pure copper functional layer 12. When Si is incorporated, it forms an Al-Si low-melting-point eutectic with Al, forming a stable semi-liquid state below 600℃. Combined with the low-melting-point liquid phase of Zn, it significantly improves the capillary penetration ability of the slurry into the three-level micropores of the ceramic matrix, generating a deeper and denser "root-like" metallurgical interlocking structure, improving the electrode's resistance to shearing and thermal shock peeling. In addition, the coefficient of thermal expansion of Si is between that of the metal layer and Mn-based spinel ceramic, acting as a stress buffer layer, absorbing interfacial thermal stress during temperature rise and fall, and preventing the electrical layer 11 from peeling, cracking, and falling off. When boron (B) is incorporated, it preferentially oxidizes at around 300℃ to form low-melting-point boron trioxide (B₂O₃). B₂O₃ is a low-temperature glass material, which combines with SiO₂ (Si) to form a composite borosilicate glass phase. This phase penetrates into the ceramic micropores and solidifies upon cooling, acting like countless miniature "rivets" to strengthen the bond between the root structure and the matrix, significantly improving resistance to thermal cycling. When bicarbonate (Bi) is incorporated, its melting point is around 271℃. It melts into a liquid state first during the initial sintering stage, synergistically with the Ni-Zn-Al-Si eutectic liquid phase to further reduce the overall melting temperature. Sufficient capillary penetration can be achieved below 500℃, effectively reducing the damage to the spinel crystal phase of the thermistor ceramic at high temperatures. The addition of Ni enhances the hardness, wear resistance, and corrosion resistance of the electrical layer 11, improving its overall mechanical properties. This allows it to better support and anchor the pure copper functional layer 12, and effectively inhibits the inward diffusion of copper atoms, preventing interface degradation. The synergistic effect of these components enables the electrical layer 11 to provide a stable, highly conductive, and mechanically strong intermediate layer, laying the foundation for the firm adhesion of the pure copper functional layer 12.

[0061] Through the compositional design of the electrical layer 11 described above, this technical solution can significantly improve the performance of the thermistor 1. Specifically, the optimized ratio of Ni, Zn, Al, and Si in the electrical layer 11 allows it to more effectively penetrate and fill the multi-gradient porous network 10 during deposition, forming a denser and more robust three-dimensional interlocking system. This not only enhances the mechanical bonding strength between the electrical layer 11 and the resistor substrate, effectively resisting delamination caused by external factors such as thermal and mechanical stress, but also optimizes the electrical contact performance at the interface, reduces contact resistance, and ensures the stability and efficiency of current transmission.

[0062] In one embodiment, the electrical layer 11 is composed of multiple components selected from Ag, Ti, Si, Al, Ni, Zn, B, and Bi; based on the total weight of the electrical layer 11 as 100%, the weight percentages of each component are: Ag 0-15%, Ti 0-8%, Si 0-18%, Al 0-25%, Ni 0-35%, Zn 0-30%, B 0-6%, and Bi 0-12%.

[0063] Preferably, the electrical layer 11 simultaneously contains eight components: Ag, Ti, Si, Al, Ni, Zn, B, and Bi.

[0064] Example 1: Ag 4.5%, Ti 3.2%, Si 12.0%, Al 18.0%, Ni 32.0%, Zn 26.0%, B 3.0%, Bi 1.3%;

[0065] Example 2: Ag 2.0%, Ti 4.0%, Si 10.0%, Al 16.0%, Ni 28.0%, Zn 24.0%, B 4.5%, Bi 11.5%.

[0066] Preferably, based on 100% of the total mass of the electrical layer 11: Ni 25-38%, Zn 20-30%, Al 15-25%, Si 8-18%, and the remaining Ag, Ti, B, and Bi contents are all 0%.

[0067] Preferably, the composition is Ni-Zn-Al-Si+Ag, with the following composition based on 100% of the total mass of the electrical layer 11: Ni 23-37%, Zn 18-28%, Al 15-23%, Si 8-17%, and Ag 5-8%.

[0068] Preferably, the composition is Ni-Zn-Al-Si+B, with the following proportions based on the total mass of the electrical layer 11: Ni 23-37%, Zn 18-28%, Al 15-23%, Si 8-17%, and B 5-8%.

[0069] Preferably, the composition is Ni-Zn-Al-Si+Bi, with the following composition based on 100% of the total mass of the electrical layer 11: Ni 21-37%, Zn 15-28%, Al 15-23%, Si 8-17%, and Bi 2-8%.

[0070] In one implementation, reference is made to Figure 4 The mechanical anchoring part includes an inverted trapezoidal part 111 disposed on the electrical layer 11. The inverted trapezoidal part 111 is wide at the top and narrow at the bottom. The inverted trapezoidal part 111 includes sidewalls 1110 symmetrically disposed in the electrical layer 11 and a bottom wall 1111 connected to the sidewalls 1110.

[0071] Specifically, the inverted trapezoidal portion 111 is a structure with a specific geometric shape, characterized by a wider opening at the top and a narrower bottom. This shape is often used in engineering to achieve mechanical interlocking. When the upper material (pure copper functional layer 12) is filled into the inverted trapezoidal structure and cured, due to its shape, the pure copper functional layer 12 is firmly locked in the horizontal direction of the electrical layer 11, thus forming a strong mechanical bond. The inverted trapezoidal portion 111 can be formed on the electrical layer 11 in various ways. For example, during the deposition of the electrical layer 11, it can be formed using masking technology, laser etching, chemical etching, printing, or mold imprinting. When printing is used, the printing thickness and the pre-designed template shape and thickness are controlled; when pulsed magnetron arc spraying is used, the spraying path and thickness are controlled.

[0072] When the pure copper functional layer 12 is deposited, its material fills these inverted trapezoidal structures and, after curing, forms protrusions or depressions complementary to the shape of the inverted trapezoidal structures, thereby achieving mechanical anchoring. The core function of the inverted trapezoidal portion 111 is to provide a "locking" effect, significantly enhancing the interfacial bonding strength between the pure copper functional layer 12 and the electrical layer 11, effectively resisting tensile or shear forces horizontal to the interface, and preventing the electrode layer from delaminating due to stress concentration during operation.

[0073] In one implementation, reference is made to Figure 5 The mechanical anchoring part includes a spiral part 112 disposed on the electrical layer 11; wherein the spiral part 112 is raised or recessed on the electrical layer 11, and at least one spiral part 112 is disposed on the electrical layer 11.

[0074] The spiral portion 112 refers to a structure with a continuous spiral shape that extends along the surface of the electrical layer 11, forming a multi-directional, multi-layered mechanical interlocking interface. This spiral shape can be a single continuous helix or multiple interconnected or independent spiral units. Its design aims to provide stronger three-dimensional constraints and a more uniform stress distribution than simple convex-concave structures. The spiral portion 112 is constructed directly on the surface of the electrical layer 11 using a specific molding process. This can be achieved by using masking technology, laser etching, chemical etching, printing, or mold imprinting to form a predetermined spiral shape on the surface. For example, in printing, this can be achieved by controlling the printing thickness and pre-designing the stencil shape and thickness; in pulsed magnetron arc spraying layer deposition processes, it can be achieved by adjusting the spraying path, spraying angle, or using a mask with a spiral pattern.

[0075] The spiral portion 112 is either raised or recessed on the electrical layer 11. When raised, the spiral portion 112 exhibits an upward spiral structure protruding from the surface of the electrical layer 11. During deposition, the pure copper functional layer 12 covers and fills these protrusions, forming a tight mechanical interlock. When recessed, the spiral portion 112 exhibits a downward spiral groove on the surface of the electrical layer 11. The pure copper functional layer 12 fills these grooves, similarly achieving mechanical anchoring. Both forms effectively increase the contact area and provide mechanical resistance.

[0076] By employing the aforementioned technical solution, the mechanical anchoring part is specifically designed as a spiral section 112, which significantly enhances the bonding strength and stability between the pure copper functional layer 12 and the electrical layer 11. The continuous spiral shape of the spiral section 112, whether convex or concave, provides the pure copper functional layer 12 with multi-directional mechanical constraints and a longer bonding path. When the pure copper functional layer 12 is deposited and fills or covers these spiral structures, a more complex and compact three-dimensional interlock is formed, effectively resisting shear forces caused by differences in thermal expansion coefficients, external mechanical stress, or vibration, thereby preventing delamination or peeling of the electrode layer. This structural design allows stress to be more evenly distributed across the entire spiral interface, reducing local stress concentration and greatly enhancing the long-term reliability and service life of the electrode layer. Furthermore, the spiral structure can convert horizontal shear stress into rotational compressive stress. When thermal expansion occurs, the stress is "guided" and released along the spiral line, rather than directly impacting the interface.

[0077] In one implementation, reference is made to Figure 6 The mechanical anchoring part includes a tiled part 113, which includes a continuously formed inclined wall 1131, a horizontal wall 1132, a vertical wall 1133, and a transverse wall 1134, and a sloping recessed area 1135 is formed between the inclined wall 1131, the transverse wall 1134, and the vertical wall 1133.

[0078] The shingled portion 113 is designed to significantly increase the contact area and mechanical engagement points between the pure copper functional layer 12 and the electrical layer 11 by forming a series of stepped surfaces. This structure can provide multi-directional anchoring force, effectively resisting various forces such as vertical tension, horizontal shear, and torsion, thereby greatly improving the bonding strength and stability of the electrode layer.

[0079] The inclined surface of the inclined wall 1131 can guide the material of the pure copper functional layer 12 to fill smoothly into the anchoring structure during the deposition process, and provide a gradual stress transition area, which helps to disperse stress concentration and avoid excessive local stress.

[0080] The vertical wall 1133 forms a robust lateral barrier that directly resists the lateral movement of the pure copper functional layer 12, providing strong shear resistance.

[0081] Furthermore, the shingled portion 113 also includes a crucial sloping recess 1135, which is a specific recessed area formed between the sloping wall 1131, the transverse wall 1134, and the vertical wall 1133. This recess acts like a miniature trap, allowing the material of the pure copper functional layer 12 to fully flow in and solidify, forming a tight mechanical interlock. Its sloping characteristics facilitate material filling and solidification, while the recess provides a strong riveting effect, firmly "riveting" the pure copper functional layer 12 to the electrical layer 11, greatly enhancing its resistance to pull-out and shearing.

[0082] A method for fabricating a resistor with a densely packed electrode layer includes the following steps:

[0083] First, step S1 is performed to prepare the inner core layer of thermistor 1, thus obtaining the resistor substrate. The inner core layer is made of spinel-type semiconductor ceramic material, and its composition and weight percentage range can be Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 0.5-15%, CuO 3.5-15%, for example, specifically Mn3O4 47%, NiO 16.2%, Co3O4 16.8%, Fe2O3 10.5%, CuO 7.5%.

[0084] Next, step S2 is performed to construct a multi-gradient porous mesh 10 on the surface of the resistor substrate. The multi-gradient porous mesh 10 includes anchor holes 101, transition holes 102, and buffer holes 103 sequentially from the surface of the thermistor 1 inward. The pore diameters of the anchor holes 101, transition holes 102, and buffer holes 103 decrease sequentially, and their pore depth ratio can be 6:3:2. This multi-gradient porous structure can provide ideal microscopic channels and a larger contact area for the subsequent penetration of the electrical layer 11 material, thereby enhancing the bonding force between the electrode layer and the resistor substrate.

[0085] In step S3, an electrical layer 11 is formed by infiltration deposition on the resistive substrate. This layered deposition process can be carried out by printing, mold imprinting, or pulsed magnetron arc spraying. Among them, when pulsed magnetron arc spraying technology is used, it is particularly suitable for precise layered deposition on complex microstructures because it can achieve high density and high adhesion coating deposition and can effectively control the energy input during the deposition process, thereby avoiding damage to the substrate material.

[0086] In step S4, mechanical anchors are deposited on the surface of the electrical layer 11. The mechanical anchors may include inverted trapezoidal portions 111, spiral portions 112, or shingled portions 113. These mechanical anchors form a unique geometry on the surface of the electrical layer 11, which is designed to provide additional physical gripping force for the final pure copper functional layer 12 and further enhance interlayer bonding.

[0087] Finally, in step S5, a pure copper functional layer 12 is deposited on the mechanical anchor portion of the electrical layer 11 to obtain the thermistor 1. The pure copper functional layer 12 is chosen as the outermost electrode due to its excellent conductivity. By tightly bonding with the mechanical anchor portion on the electrical layer 11, the overall conductivity and mechanical stability of the electrode layer are ensured. Simultaneously, by covering a large area of ​​the pure copper functional layer 12 on the resistor substrate, the area for soldering to the pins is increased, and the heat dissipation area of ​​the thermistor 1 is also increased.

[0088] Among them, the pulsed magnetron arc spraying method can further penetrate the components of the pure copper functional layer 12 into the resistor substrate by spraying, which further improves the adhesion between the gradient deposited electrode layer 2 and the resistor substrate. Secondly, the deposition of the pure copper functional layer 12 can also be achieved by printing.

[0089] Example 2: A resistor with a densely packed electrode layer includes a thermistor 1 inner core layer and an interface transition outer layer symmetrically covering the two surfaces of the inner core layer. The inner core layer is made of spinel-type semiconductor ceramic material, and the composition and weight percentage range are: Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 5-15%, CuO 3.5-15%.

[0090] The outer interfacial transition layer is made of high-temperature resistant conductive ceramic composite material, with the following composition and weight percentage range: 60-85% La(Ca)CrO3-based conductive ceramic phase, 10-25% interfacial active modified phase, and 3-10% sintering aid; wherein, the substitution amount of Ca for La in the La(Ca)CrO3-based conductive ceramic phase is 10mol%-30mol%;

[0091] The interfacial active modifying phase is at least one of Ag or Cu;

[0092] A multi-gradient porous mesh 10 is disposed on two surfaces of the thermistor 1;

[0093] A gradient-deposited electrode layer is disposed on the outer interface transition layer. The gradient-deposited electrode layer includes a permeation layer, a transition layer, and a pure copper functional layer 12. The permeation layer permeates into the multi-gradient porous mesh on the outer interface transition layer and forms a three-dimensional interlocking system. A mechanical anchoring part is formed on the transition layer to anchor the pure copper functional layer 12 to the transition layer. The pure copper functional layer 12 covers the surface of the thermistor 1, which is beneficial for the heat dissipation of the thermistor 1.

[0094] Among them, La(Ca)CrO3-based conductive ceramic phase refers to conductive ceramic material with calcium-doped lanthanum chromate as the main component. It adjusts the electrical conductivity and thermal expansion coefficient by replacing lanthanum ions with calcium ions to adapt to the matching with the inner core layer.

[0095] Interfacially active modified phases refer to components added to composite materials that can enhance interfacial bonding, improve wettability, or promote reactions, such as silver or copper, which help form a dense interfacial structure.

[0096] Gradient deposition electrode layers refer to three-layer electrode systems with different compositions and / or microstructures formed on the surface of a thermistor substrate through a layered deposition process. The gradient design aims to optimize the bonding strength, conductivity, and stress distribution between the electrode and the substrate.

[0097] The penetrating layer is the layer closest to the resistive substrate in the gradient deposition electrode layer. Its characteristic is that it can penetrate into the pore structure of the substrate surface and form a tight physical and chemical bond.

[0098] The transition layer is an intermediate layer located between the permeation layer and the pure copper functional layer 12. Its function is to provide a performance gradient transition, alleviate stress concentration between different materials, and provide an anchoring foundation for the pure copper functional layer 12.

[0099] Specifically, the resistor includes a thermistor 1 inner core layer and an interface transition outer layer symmetrically covering the two surfaces of the inner core layer; the inner core layer is the core functional part of the resistor, responsible for providing thermistor characteristics; the interface transition outer layer serves as a bridge between the inner core layer and the outer electrode layer, used to improve interface compatibility.

[0100] The inner core layer is prepared using a spinel-type semiconductor ceramic material. As one implementation, the composition and weight percentage range of this material can be: Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 5-15%, and CuO 3.5-15%. These oxides are precisely proportioned and processed through mixing, molding, and sintering to form a semiconductor ceramic with specific resistivity and B-value characteristics. For example, the oxide powder can be ball-milled, then pressed and sintered at high temperature to obtain a dense inner core layer structure.

[0101] The interface transition outer layer is made of a high-temperature resistant conductive ceramic composite material. As one embodiment, the composition and weight percentage range of this composite material can be: 60-85% La(Ca)CrO3-based conductive ceramic phase, 10-25% interfacial active modified phase, and 3-10% sintering aid. The substitution amount of Ca for La in the La(Ca)CrO3-based conductive ceramic phase can be 10 mol%-30 mol%. This substitution amount helps to adjust the thermal expansion coefficient and electrical conductivity of the conductive ceramic phase, allowing for better matching with the inner core layer and subsequent electrode layers. The interfacial active modified phase can be at least one of Ag or Cu, and its function is to enhance interfacial wettability and adhesion. For example, these components can be mixed in proportion and uniformly coated onto the surface of the inner core layer by slurry coating or spraying, followed by sintering to form a dense interface transition outer layer.

[0102] Furthermore, a multi-gradient porous mesh 10 is disposed on the surface of the thermistor 1. This multi-gradient porous mesh 10 is a surface-modified layer with a microporous structure, where the pore distribution exhibits a gradient change. For example, a series of micron- or submicron-sized pores can be formed on the outer surface of the interface transition layer through processes such as chemical etching, laser drilling, or template methods. The size and depth of these pores can be designed as needed to provide a basis for subsequent electrode layer penetration and anchoring.

[0103] Based on this, a gradient-deposited electrode layer is disposed on the outer transition layer of the interface. This gradient-deposited electrode layer includes a penetration layer, a transition layer, and a pure copper functional layer 12. This layered structure aims to achieve a smooth transition of properties between the electrode layer and the substrate, and to enhance the overall bonding strength.

[0104] The permeation layer penetrates into the multi-gradient porous mesh 10 on the outer interface transition layer, forming a three-dimensional interlocking system. The material selection and deposition process of the permeation layer enable it to penetrate deep into the interior of the multi-gradient porous mesh 10, filling the pores and forming a tight physical and chemical bond with the outer interface transition layer. For example, electrochemical deposition, chemical vapor deposition, or plasma spraying can be used to deposit materials with good wettability and permeability into the pores, thereby forming a three-dimensional interlocking structure similar to "rivets" or "tree roots," significantly improving the interfacial bonding force.

[0105] Mechanical anchoring portions are formed on the transition layer to anchor the pure copper functional layer 12 to it. These mechanical anchoring portions are a special structure on the surface of the transition layer designed to provide additional mechanical fixation for the pure copper functional layer 12. For example, a series of microscopic protrusions, depressions, or irregular shapes can be formed on the surface of the transition layer through methods such as die-stamping, etching, or deposition growth. These structures can physically interlock with the subsequently deposited pure copper functional layer 12, thereby enhancing the adhesion of the pure copper functional layer 12 and preventing it from peeling off under thermal or mechanical stress.

[0106] In one embodiment, the La(Ca)CrO3-based conductive ceramic phase comprises 70%-80% by weight, the interfacial active modified phase comprises 15%-20% by weight, and the sintering aid is Bi2O3, comprising 5%-10% by weight. This La(Ca)CrO3-based conductive ceramic phase is the core component for achieving good conductivity in the interfacial transition outer layer. La(Ca)CrO3, as a perovskite oxide, is renowned for its excellent high-temperature stability and electrical conductivity. Precisely limiting its weight percentage to 70%-80% aims to ensure sufficient conductive pathways in the interfacial transition outer layer, thereby effectively reducing interfacial resistance and improving the overall electrical performance. During the preparation process, this ratio can be strictly controlled by precisely weighing the pre-synthesized La(Ca)CrO3 powder and mixing it with other components.

[0107] The interfacial active modifying phase, typically at least one of Ag or Cu, primarily functions to enhance interfacial adhesion and promote material densification. Optimizing the weight percentage of this phase to 15%-20% allows it to exert its optimal activity at the interface, forming stronger bonds and significantly improving the mechanical bonding strength between the outer interfacial layer and the inner core layer, as well as subsequent electrode layers, effectively suppressing delamination. Simultaneously, an appropriate amount of active modifying phase also helps improve the wettability of the material, promoting mass transport during sintering and further enhancing the degree of interfacial densification. In practice, Ag or Cu powder in fine particle form is typically added to the ceramic composite slurry, and its uniform dispersion is ensured through high-energy ball milling or planetary stirring.

[0108] Bi₂O₃, as an effective sintering aid, primarily promotes densification of ceramic materials at lower sintering temperatures. By introducing Bi₂O₃ into the interfacial transition outer layer and controlling its weight percentage within the range of 5%-10%, the liquid phase formed by Bi₂O₃ during sintering can accelerate particle rearrangement and material diffusion, thereby reducing sintering temperature or shortening sintering time while maintaining material properties. This not only helps obtain an interfacial transition outer layer with lower porosity and a denser structure but also effectively reduces production energy consumption and improves production efficiency. During preparation, Bi₂O₃ powder needs to be thoroughly mixed with other components to ensure its uniform distribution throughout the composite material, thus achieving the best sintering aid effect.

[0109] By precisely limiting the weight percentages of the La(Ca)CrO3-based conductive ceramic phase, the interfacially active modified phase, and the Bi2O3 sintering aid within a specific range using the above technical solution, the optimized configuration of the interfacial transition outer layer material composition was achieved. Specifically, 70%-80% of the La(Ca)CrO3-based conductive ceramic phase ensures excellent electrical conductivity; 15%-20% of the interfacially active modified phase significantly enhances the interfacial bonding strength and material densification; and 5%-10% of the Bi2O3 sintering aid effectively promotes the sintering densification of the interfacial layer, resulting in a uniform structure with low porosity. This precise composition control ensures that the interfacial transition outer layer not only possesses stable high electrical conductivity but also significantly improves its mechanical bonding force with the inner core layer and electrode layer, effectively solving the performance instability problem that may be caused by a wide composition range, thereby ensuring the reliability and excellent performance of the resistor under long-term operating conditions.

[0110] The interface transition outer layer also includes 0.5%-2% SiO2, or silicon dioxide, a widely used additive in ceramic materials. In high-temperature conductive ceramic composites, an appropriate amount of SiO2 can act as an effective sintering aid, significantly reducing the sintering temperature or increasing the densification of the material at a given temperature by forming a low-melting-point eutectic phase or promoting liquid-phase sintering. Furthermore, the introduction of SiO2 helps improve the microstructure of the material, enhancing its mechanical strength, hardness, and thermal shock resistance. At high temperatures, SiO2 can enhance the chemical stability of the interface transition outer layer, reducing performance degradation under long-term operating conditions. The 0.5%-2% addition aims to maximize its role as a sintering aid and performance improver without significantly affecting the conductivity of the interface transition outer layer. Specifically, SiO2 can be uniformly mixed with La(Ca)CrO3-based conductive ceramic phase, interface-active modified phase, and sintering aids in the form of fine powder during the preparation of the interface transition outer layer material, and plays its role in the subsequent high-temperature sintering process.

[0111] By introducing 0.5%-2% SiO2 into the interface transition outer layer, the densification process of this layer can be significantly promoted, resulting in lower porosity and higher density. This densification not only improves the mechanical strength and thermal stability of the interface transition outer layer itself, making it less prone to deformation or cracking under high-temperature operating conditions, but also enhances its bonding strength with the inner core layer of the thermistor 1 and subsequent gradient-deposited electrode layers (including the penetration layer, transition layer, and pure copper functional layer 12). The dense interface transition outer layer provides a more stable physical and chemical interface, effectively suppressing stress concentration and defect propagation at the interface, thereby avoiding resistance performance degradation or failure due to poor interface bonding. Therefore, this technical solution effectively solves the problems of insufficient densification of the interface transition outer layer, poor thermal stability, and the need to improve interface bonding strength, thus ensuring the long-term stability and reliability of the resistor under harsh operating conditions.

[0112] The preferred composition of the penetration layer is Ni-Zn-Al-Si. This composition leverages the low melting point of Zn (420°C) and the eutectic properties of Al-Si, remaining semi-liquid at temperatures below 600°C. Through capillary action, it penetrates deeply into the tertiary pores of the substrate, forming a root-like metallurgical bond. Furthermore, Ni-Zn-Al-Si reacts with the La(Ca)CrO3 layer at the interface transition, forming a ceramic-metal interpenetrating network upon cooling, further enhancing the adhesion between the resistor and the electrode layer. The components of the penetration layer are firmly anchored in the resistor substrate like an inverted pyramid, meaning the electrode layer is no longer attached to the substrate but rather "grown" within it, effectively enhancing shear resistance. In addition, the metallurgical bond and interpenetrating network result in a shorter and more stable current transmission path, significantly reducing contact resistance.

[0113] Therefore, the grouping selection of the outer layer of the interface transition can be better integrated with the composition of the permeation layer, thereby improving the performance of thermistor 1.

[0114] Furthermore, the preferred interfacial active modifying phase is Cu, which significantly reduces costs compared to silver. Additionally, Cu exhibits good compatibility with Ni-Zn-Al-Si: according to materials science principles, Cu can form good intermetallic compounds with both Zn and Al. When the external Ni-Zn-Al-Si permeation layer (liquid) comes into contact with the outer layer containing Cu particles, Cu will dissolve in trace amounts in the liquid alloy, forming a (Cu,Zn,Al) solid solution or intermetallic compound. This "metallurgical bond" is stronger than simple physical filling. Therefore, this facilitates better bonding of the permeation layer components with the resistive matrix.

[0115] Therefore, the present invention achieves a bonding force far exceeding that of traditional silver paste sintering through a three-dimensional interlocking mechanism of macroscopic anchors, microscopic roots, and chemical bonding.

[0116] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-described technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A resistor having a densely packed electrode layer, characterized in that, include: The inner core layer of the thermistor (1) is made of semiconductor ceramic material, and the composition and weight percentage range are: Mn3O4 30-65%, NiO 15-25%, Co3O4 10-20%, Fe2O3 0.5-15%, CuO 3.5-15%; Multi-gradient porous mesh (10) is disposed on both sides of the thermistor (1); An electrical layer (11) is disposed on both sides of the thermistor (1); The electrical layer (11) penetrates into the multi-gradient porous mesh (10) and forms a three-dimensional interlocking system. A pure copper functional layer (12) is disposed on the electrical layer (11); A mechanical anchoring part is formed on the electrical layer (11) for anchoring the pure copper functional layer (12) on the electrical layer (11).

2. A resistor having a densely packed electrode layer according to claim 1, characterized in that, The composition and weight percentage range of the inner core layer are: Mn3O4 47%, NiO 16.2%, Co3O4 16.8%, Fe2O3 10.5%, CuO 7.5%.

3. A resistor having a densely packed electrode layer according to claim 1, characterized in that, The multi-gradient porous mesh (10) includes, from the surface of the thermistor (1) inward, anchor holes (101), transition holes (102) and buffer holes (103), with the apertures of the anchor holes (101), transition holes (102) and buffer holes (103) decreasing sequentially.

4. A resistor having a densely packed electrode layer according to claim 3, characterized in that, The depth ratio of the anchor hole (101), transition hole (102), and buffer hole (103) is 6:3:

2.

5. A resistor having a densely packed electrode layer according to claim 1, characterized in that, The electrical layer (11) is composed of multiple components of Ag, Ti, Si, Al, Ni, Zn, B, and Bi.

6. A resistor having a densely packed electrode layer according to claim 1, characterized in that, The mechanical anchoring part includes an inverted trapezoidal part (111) disposed on the electrical layer (11), the inverted trapezoidal part (111) being wide at the top and narrow at the bottom; The inverted trapezoidal portion (111) includes sidewalls (1110) symmetrically formed in the electrical layer (11) and a bottom wall (1111) connected to the sidewalls (1110).

7. A resistor having a densely packed electrode layer according to claim 1, characterized in that, The mechanical anchoring part includes a spiral part (112) disposed on the electrical layer (11). The spiral portion (112) is raised or recessed on the electrical layer (11), and at least one spiral portion (112) is provided on the electrical layer (11).

8. A resistor having a densely packed electrode layer according to claim 1, characterized in that, The mechanical anchoring part includes a tiled part (113), which includes a continuously formed inclined wall (1131), a horizontal wall (1132), a vertical wall (1133), and a transverse wall (1134), and a sloping recessed area (1135) is formed between the inclined wall (1131), the transverse wall (1134), and the vertical wall (1133).

9. A method for preparing a resistor having a densely packed electrode layer, characterized in that, Using a resistor with a densely packed electrode layer as described in any one of claims 1-8, the method includes the following steps: S1. Prepare the inner core layer of the thermistor (1) to obtain the resistor substrate; S2. Construct a multi-gradient porous mesh (10) on the surface of the resistor substrate. S3. An electrical layer (11) is formed by infiltration and deposition on the resistive substrate. S4. Then, a mechanical anchoring part is formed on the surface of the electrical layer (11); S5. Finally, a pure copper functional layer (12) is deposited on the mechanical anchor portion of the electrical layer (11) to obtain the thermistor (1).