Wafer centering method and apparatus, charged particle beam device

Abstract

The application discloses a wafer centering method and device and a charged particle beam device. The wafer centering method is used for centering a wafer placed on a wafer support disc, the wafer support disc is fixedly arranged on a sample table, and a ring electrode is arranged around the wafer support disc. The wafer centering method comprises the following steps: detecting an actual position of the wafer before the wafer reaches above the wafer support disc or when the wafer is located above the wafer support disc; obtaining a planned position corresponding to the actual position; calculating a position deviation between the actual position and the planned position; adjusting a transmission path of the wafer and / or a position of the sample table according to the position deviation, so that when a relative displacement of the wafer and the sample table in a horizontal direction stops changing, a theoretical deviation between a center of the wafer and a center of the ring electrode is within a preset range; and moving the wafer downward to place the wafer on the wafer support disc. The application greatly improves machine throughput and wafer observation efficiency.

Description

Technical Field

[0001] This invention relates to the field of semiconductor observation, and more particularly to a wafer alignment method and apparatus, and a charged particle beam device. Background Technology

[0002] With the continuous miniaturization of semiconductor devices, semiconductor devices in the tens of nanometers range have become mainstream in recent years. In the production process of these semiconductor devices with fine structures, scanning electron microscopy (SEM) is widely used for defect detection of semiconductor devices due to its high resolution and ability to provide detailed images of the surface morphology of samples (e.g., wafers).

[0003] The working principle of scanning electron microscopy is based on the interaction between an electron beam and a wafer to generate signals, such as secondary electrons (SE) and backscattering electrons (BSE). These signals are collected by a detector and converted into images to reveal the microstructure and defects on the wafer surface.

[0004] The wafer is placed on a wafer carrier pad on the sample stage. The wafer carrier pad contains electrostatic electrodes. By applying a DC power supply to the electrostatic electrodes, opposite charges (i.e., opposite charges) are generated on the back of the wafer and the carrier surface of the wafer carrier. The wafer is attracted to the wafer carrier pad by the mutual attraction between these opposite charges. The strong electric field formed between the wafer and the wafer carrier pad interferes with the potential distribution around the wafer. Therefore, when observing the edge region of the wafer, the electron beam is easily deflected, making it impossible to accurately illuminate the observation location at the wafer edge.

[0005] To address this issue, a ring electrode is typically placed around the wafer, and a calibration voltage is applied to the ring electrode to ensure the electron beam strikes the wafer surface directly without deflection. However, in existing technologies, the gap between the wafer edge and the ring electrode is often quite uneven. When observing different locations within the wafer edge region, significant adjustments to the calibration voltage applied to the ring electrode are required, which affects measurement accuracy. Furthermore, the gap value between the wafer edge and the ring electrode needs to be measured in a dedicated step before performing SEM observation, reducing the overall efficiency of the measurement process. Summary of the Invention

[0006] The purpose of this invention is to provide a wafer alignment method and apparatus, and a charged particle beam device, which can fully utilize the wafer transport time, detect wafer position deviation during wafer transport, and quickly adjust the wafer transport path and / or move the sample stage position based on the detection results, so that the wafer is accurately aligned with the ring electrode when placed on the wafer carrier disk. Through this invention, when observing different positions in the wafer edge region, only fine-tuning or no adjustment of the correction voltage applied to the ring electrode is required, thereby improving the wafer measurement accuracy and the efficiency of the overall measurement process, significantly increasing the throughput of the equipment, and enhancing the wafer observation efficiency.

[0007] To achieve the above objectives, the present invention provides a wafer alignment method for placing a wafer on a wafer carrier disk, the wafer carrier disk being fixedly disposed on a sample stage, and having an annular electrode disposed around the wafer carrier disk. The wafer alignment method includes:

[0008] The actual position of the wafer is detected before it reaches above the wafer carrier disk, or when the wafer is above the wafer carrier disk.

[0009] Obtain the planned location corresponding to the actual location;

[0010] Calculate the positional deviation between the actual position and the planned position;

[0011] Adjust the transport path of the wafer and / or move the position of the sample stage according to the position deviation, so that when the relative displacement between the wafer and the sample stage in the horizontal direction stops changing, the theoretical deviation between the center of the wafer and the center of the annular electrode is within a preset range.

[0012] Move the wafer downwards to place it on the wafer carrier disk.

[0013] Optionally, after placing the wafer on the wafer carrier disk, the method further includes:

[0014] The actual deviation between the center of the wafer and the center of the annular electrode is detected.

[0015] When transferring the next wafer, the transfer path of the next wafer and / or the position of the sample stage are adjusted based on the positional deviation and the actual deviation, so that when the next wafer is placed on the wafer carrier, the actual deviation between the center of the next wafer and the center of the annular electrode is within a preset range.

[0016] Optionally, detecting the actual position of the wafer includes:

[0017] Obtain a partial edge contour image of the wafer;

[0018] The complete edge contour image of the wafer is obtained by fitting the partial edge contour image;

[0019] Based on the coordinates of the center of the complete edge contour image in the image coordinate system, the actual coordinates of the center of the wafer in the world coordinate system are calculated.

[0020] Optionally, a scanning device is provided above the transmission path, and acquiring the edge contour image of the wafer includes:

[0021] The robotic arm is controlled to carry the wafer past the scanner from below;

[0022] The scanning instrument is controlled to scan a portion of the edge contour of the wafer, and an image of the portion of the edge contour is obtained based on the scanning results.

[0023] Optionally, the scanning instrument includes a line scan camera or a line scan sensor.

[0024] Optionally, an imaging device is provided above the transmission path, and acquiring the edge contour image of the wafer includes:

[0025] The robotic arm is controlled to carry the wafer to a position below the imaging instrument and remain there for a first preset time.

[0026] The camera is controlled to capture a portion of the edge contour of the wafer to obtain an image of the edge contour.

[0027] Optionally, the photographing instrument may include an optical microscope or a camera.

[0028] Optionally, a photodetector is provided above the transmission path, the photodetector including a light emitting element and a light receiving element; acquiring the edge contour image of the wafer includes:

[0029] The robotic arm is controlled to carry the wafer past the optical detection instrument from below;

[0030] The light emitting element is controlled to emit a light beam toward the wafer, such that a portion of the wafer's edge contour falls within the irradiation range of the light beam;

[0031] The light receiving element receives the reflected light from the wafer and generates a corresponding electrical signal, which is used to generate the edge contour image.

[0032] Optionally, the sample stage loads the wafer at the wafer loading position; a camera is provided above the wafer loading position, the camera employing a zoom lens or a telecentric lens; the camera captures a portion of the edge contour of the wafer to obtain an edge contour image of the wafer.

[0033] Optionally, the wafer's transport path is stored in a database, and the transport path includes any planned position of the wafer during transport; obtaining the planned position corresponding to the actual position includes:

[0034] Query the database to obtain the planned location corresponding to the actual location.

[0035] The present invention also provides a wafer alignment device, comprising:

[0036] A sample stage is capable of moving along a trajectory from a wafer loading position to a wafer observation position; the wafer loading position and the wafer observation position are located in the main chamber; a wafer carrier disk is provided on the sample stage, and an annular electrode is arranged around the wafer carrier disk;

[0037] A transport mechanism for transporting a wafer along a transport path to the wafer loading position in the main chamber;

[0038] A first inspection instrument is positioned above or to the side of the wafer's transport path, or above or to the side of the wafer's loading position; before the wafer reaches above the wafer carrier disk, or when the wafer is above the wafer carrier disk, the first inspection instrument acquires an edge contour image of the wafer.

[0039] A processor is connected to the first detection instrument, the transmission mechanism, and the sample stage; the processor calculates the actual position of the wafer based on the edge contour image, and calculates the positional deviation between the actual position and the corresponding planned position;

[0040] The processor adjusts the transport path of the wafer and / or moves the position of the sample stage according to the position deviation, so that when the relative displacement between the wafer and the sample stage in the horizontal direction stops changing, the theoretical deviation between the center of the wafer and the center of the annular electrode is within a preset range.

[0041] Optionally, the number of the first detection instruments is one or more.

[0042] Optionally, the first detection instrument may be located in the airlock chamber, the first detection instrument may be located in the transmission chamber, or the first detection instrument may be located in the main chamber.

[0043] Optionally, the wafer alignment device further includes:

[0044] The second inspection instrument is located in the main chamber above or to the side of the wafer loading position and is connected to the processor; after the wafer is placed on the wafer carrier, the edge contour image of the wafer is acquired by the second inspection instrument.

[0045] Optionally, the first detection instrument is located in the main chamber, and the first detection instrument includes a camera, which includes a zoom lens or a telecentric lens; wherein, after the wafer is placed on the wafer carrier disk, the edge contour image of the wafer is also acquired by the first detection instrument.

[0046] Optionally, the first detection instrument is located in the main chamber and is connected to the drive mechanism. After the wafer is placed on the wafer carrier, the first detection instrument is moved by the drive mechanism so that the first detection instrument can acquire the edge contour image of the wafer.

[0047] Optionally, the processor detects the actual deviation between the center of the wafer and the center of the annular electrode based on the edge contour image obtained after the wafer is placed on the wafer carrier disk;

[0048] When transferring the next wafer, the transfer path of the next wafer and / or the position of the sample stage are adjusted based on the positional deviation and the actual deviation, so that when the next wafer is placed on the wafer carrier, the actual deviation between the center of the next wafer and the center of the annular electrode is within a preset range.

[0049] Optionally, the first detection instrument includes at least one of a line scan camera, a line scan sensor, an optical microscope, a camera, and a light detection instrument.

[0050] The present invention also provides a charged particle beam device, comprising:

[0051] The main chamber includes a wafer loading position and a wafer observation position;

[0052] The particle beam irradiation device is located in the main chamber and above the wafer observation position;

[0053] The wafer alignment device as described in this invention;

[0054] The sample stage, the wafer carrier disk, and the annular electrode are located in the main chamber.

[0055] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0056] 1) The wafer alignment method provided by this invention can fully utilize the wafer transport time, detect the positional deviation between the actual and planned positions of the wafer during the wafer transport process, and adjust the wafer transport path and / or move the sample stage position according to the positional deviation to achieve wafer alignment and placement on the wafer carrier disk. When observing different positions in the wafer edge region, this invention only requires fine-tuning or eliminates the need to adjust the correction voltage applied to the ring electrode, thereby shortening the overall process time and greatly improving the throughput of the equipment and the wafer observation efficiency.

[0057] 2) This invention detects the actual deviation between the wafer and the ring electrode pair after the wafer is placed on the wafer carrier tray. During the transfer of the next wafer, this actual deviation is used to adjust the transfer path of the wafer and / or move the position of the sample stage. This further improves the alignment accuracy between the wafer and the ring electrode when the next wafer is placed on the wafer carrier tray, thereby further improving the measurement accuracy of the wafer.

[0058] 3) In this invention, a first detection instrument can be installed in the main chamber. The first detection instrument can be a camera with a zoom lens or a telecentric lens to obtain a wider field of view. Alternatively, the first detection instrument can be connected to a drive mechanism, allowing it to acquire wafer edge contour images at different positions within the main chamber. Before the wafer is placed on the wafer carrier, the positional deviation between the actual and planned positions of the wafer can be obtained based on the edge contour images acquired by the first detection instrument. After the wafer is placed on the wafer carrier, the actual deviation between the wafer and the annular electrode pair can be detected based on the edge contour images acquired by the first detection instrument. Since no additional detection instrument is needed to acquire wafer edge images, significant cost savings are achieved.

[0059] 4) In this invention, a first detection instrument may also be set in the airlock chamber or the transmission chamber. The type of the first detection instrument (including at least one of a line scan camera, a line scan sensor, an optical microscope, a camera, and a light detection instrument) and its setting position can be selected according to actual needs so as to observe a wider range on the wafer as much as possible. Attached Figure Description

[0060] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the description will be briefly introduced below. Obviously, the accompanying drawings described below are one embodiment of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort:

[0061] Figure 1 This is a schematic diagram of wafer transfer in a semiconductor processing machine.

[0062] Figure 2A schematic diagram showing the wafer carrier disk and ring electrode set on the sample stage;

[0063] Figure 3 This is a schematic diagram showing the relative positions of the first detection instrument and the sample stage in one embodiment of the present invention;

[0064] Figure 4 This is a flowchart of a wafer alignment method according to one embodiment of the present invention;

[0065] Figure 5 This is a schematic diagram of a first detection instrument installed in an airlock chamber according to one embodiment of the present invention;

[0066] Figure 6 This is a schematic diagram of a first detection instrument installed in a transmission chamber according to one embodiment of the present invention;

[0067] Figure 7 This is a schematic diagram showing the first detection instrument installed in the main chamber according to one embodiment of the present invention;

[0068] Figure 8 This is a flowchart of a wafer alignment method in another embodiment of the present invention. Detailed Implementation

[0069] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0070] It should be understood that, when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0071] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0072] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0073] As used in this specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrases "if determined" or "if [described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [described condition or event] is detected," or "in response to detection of [described condition or event]."

[0074] Furthermore, in the description of this invention, the terms "first," "second," "third," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0075] Figure 1 A semiconductor process equipment 1 is shown, comprising: an Equipment Front-End Module 110, a Loadlock Chamber 120, a Transfer Chamber 130, and a Main Chamber 160.

[0076] The front-end module 110 is in an atmospheric environment and includes multiple front-opening wafer transfer boxes 111 (FOUP). In order to maintain the main chamber 160 and the transfer chamber 130 in a stable vacuum state, the airlock chamber 120 performs pressure conversion between vacuum and atmospheric pressure to prevent the wafer W from being damaged by suddenly entering the atmospheric pressure environment in the vacuum environment.

[0077] The front-end module 110 and the transfer chamber 130 are equipped with a first robotic arm (not shown in the figure) and a second robotic arm (not shown in the figure), respectively. The first robotic arm is used to transfer the wafer W between the front-opening wafer transfer box 111 and the gas-locked chamber 120, and the second robotic arm is used to transfer the wafer W between the gas-locked chamber 120 and the transfer chamber 130, and between the transfer chamber 130 and the main chamber 160.

[0078] like Figure 1 As shown, the main chamber 160 includes a wafer loading position 161 and a wafer observation position 162. A sample stage 181 is located within the main chamber 160, and a wafer carrier disk for carrying the wafer W is fixedly mounted on it. Figure 1 (Not shown in the image). When the sample stage 181 is in the wafer loading position 161, the wafer W is sequentially transferred to the wafer carrier disk of the sample stage 181 via the gas lock chamber 120 and the transfer chamber 130. Subsequently, the sample stage 181 carries the wafer W along a predetermined trajectory from the wafer loading position 161 to the wafer observation position 162. The particle beam irradiation device 171 is located above the wafer observation position 162 and is used to emit an electron beam onto the surface of the wafer W to observe the microstructure and defects on the surface of the wafer W.

[0079] The wafer carrier can be an electrostatic chuck, which uses electrostatic electrodes (not shown in the figure) to generate electrostatic attraction to hold and fix the wafer W. The wafer W includes a central region and an edge region surrounded by the central region. During observation, a holding voltage is applied to the electrostatic electrodes to create an electric field near the wafer W, located in the space between the wafer W and the electromagnetic lens (an element of the particle beam irradiation device 171 used to focus the electron beam). When observing the central region of the wafer, the electric field near the observation position is symmetrically distributed about the central axis of the electron beam. The electron beam reaches the wafer W along an equipotential surface perpendicular to the electric field, without deflection.

[0080] When there are no components around wafer W, the equipotential surface of the electric field near the wafer edge collapses. The electron beam's trajectory bends due to this collapse, causing the observation position of the electron beam in the wafer edge region to deviate from the desired position. When the deviation is large, the desired pattern cannot be acquired.

[0081] like Figure 2 As shown, to improve the observation effect and accuracy of the wafer edge region, a ring electrode 182 concentric with the wafer carrier 183 can be set on the outer periphery of the wafer carrier 183. Ideally, the wafer W is placed centered on the wafer carrier 183. By applying a correction voltage to the ring electrode 182, the electric field distribution near the wafer edge region can be made uniform, so that the electron beam can be directly shone on the wafer edge region without deflection.

[0082] However, due to mechanical errors, wafer W may experience slight positional shifts and rotations during transport, making it difficult to ensure that wafer W is always precisely centered on the wafer carrier 183. The gap between the edge of wafer W and the annular electrode 182 is often quite uneven. In traditional solutions, when observing different positions on the wafer edge, the correction voltage applied to the annular electrode 182 needs to be adjusted according to the gap value at each position. When the unevenness of the gap value is significant, the adjustment range of the correction voltage is also large, which affects measurement accuracy and reduces the overall efficiency of the measurement process.

[0083] To address this technical problem, embodiments of the present invention provide a wafer alignment method for aligning wafer W onto wafer carrier disk 283. For example... Figure 3 As shown, a wafer carrier 283 is fixedly mounted on a sample stage 281, and an annular electrode 282 is arranged around the wafer carrier 283. Since the wafer carrier 283 and the annular electrode 282 are concentrically arranged, when the wafer W is centered on the wafer carrier 283, the deviation between the center of the wafer W and the center of the annular electrode 282 is within a preset range. As an example, the wafer carrier 283 can be an electrostatic chuck.

[0084] like Figure 4 As shown, the wafer alignment method includes:

[0085] S10. Before the wafer W reaches above the wafer carrier disk 283, or when the wafer W is above the wafer carrier disk 283, detect the actual position of the wafer W.

[0086] S20. Obtain the planned location corresponding to the actual location;

[0087] S30. Calculate the positional deviation between the actual position and the planned position;

[0088] S40. Adjust the transport path of wafer W and / or move the position of sample stage 281 according to the position deviation, so that when the relative displacement between wafer W and sample stage 281 in the horizontal direction stops changing, the theoretical deviation between the center of wafer W and the center of ring electrode 282 is within a preset range.

[0089] S50. Move wafer W downwards to place wafer W on wafer carrier disk 283.

[0090] The wafer alignment method provided in this embodiment only requires performing steps such as wafer position detection, position deviation calculation, wafer transport path adjustment, and sample stage 281 position adjustment during wafer W transport to achieve wafer W alignment and placement on the wafer carrier disk 283. This embodiment makes full use of the wafer W transport time and does not add extra time to the measurement process, thereby shortening the overall process time and greatly improving the throughput of the semiconductor process equipment 2. This embodiment improves the alignment accuracy of wafer W, so when observing different positions in the wafer edge region, only fine-tuning or no adjustment of the correction voltage applied to the ring electrode 282 is needed, which helps to improve the measurement accuracy of wafer W and the efficiency of the overall measurement process.

[0091] Specifically, in step S10, detecting the actual position of wafer W includes:

[0092] S11. Obtain a partial edge contour image of wafer W;

[0093] S12. Obtain the complete edge contour image of wafer W based on partial edge contour image fitting;

[0094] S13. Based on the coordinates of the center of the complete edge contour image in the image coordinate system, calculate the actual coordinates of the center of the wafer W in the world coordinate system (the transformation relationship between the image coordinate system and the world coordinate system has been pre-calibrated).

[0095] like Figure 3 , Figure 5 , Figure 6 , Figure 7As shown, in step S11, a first detection instrument 291 can be positioned above or to the side of the wafer transport path, or above or to the side of the wafer loading position 261, to acquire a partial edge contour image of the wafer W. It should be noted that the terms "above" and "below" here are not limited to strictly above or below, but also include diagonally above and diagonally below, as long as the first detection instrument 291 can acquire a partial edge contour image of the wafer W. This invention does not impose any limitations on this.

[0096] like Figure 5 , Figure 6 , Figure 7 As shown, the sample stage 281 is located inside the main chamber 260. When the main chamber 260 loads the wafer W, the sample stage 281 will first move to the wafer loading position 261 of the main chamber 260, and then the wafer W will pass through the gas lock chamber 220 and the transfer chamber 230 in sequence, and finally be transferred to the wafer carrier disk 283 of the sample stage 281.

[0097] In one embodiment, such as Figure 5 As shown, the first detection instrument 291 is installed in the airlock chamber 220, and the first detection instrument 291 is a scanning instrument. The scanning instrument includes a line scan camera or a line scan sensor. Step S11 involves acquiring a partial edge contour image of the wafer W, specifically including the following steps:

[0098] The robotic arm is controlled to carry wafer W past the scanner from below.

[0099] The scanning instrument is controlled to scan a portion of the edge contour of wafer W, and an image of the portion of the edge contour of wafer W is obtained based on the scanning results.

[0100] In one embodiment, such as Figure 6 As shown, the first detection instrument 291 is installed in the transmission chamber 230, and the first detection instrument 291 is an optical detection instrument. The optical detection instrument includes a light emitting element and a light receiving element. Step S11 involves acquiring a partial edge contour image of the wafer W, specifically including the following steps:

[0101] The robotic arm is controlled to carry wafer W past the optical inspection instrument from below;

[0102] The light emitting element is controlled to emit a light beam toward the wafer W so that a portion of the edge contour of the wafer W falls within the irradiation range of the light beam;

[0103] The light receiving element receives the reflected light from the wafer W and generates a corresponding electrical signal, which is used to generate an edge contour image.

[0104] Figure 6 In this example, there are three optical inspection instruments (the number of optical inspection instruments is only for illustrative purposes), which can increase the illumination range of the light beam and increase the probability of obtaining wafer edge contour images.

[0105] In some embodiments, such as Figure 7 As shown, the first detection instrument 291 is disposed in the main chamber 260. The first detection instrument 291 can be a photographic instrument, including an optical microscope or a camera. In a preferred embodiment, the photographic instrument is a camera with a telecentric lens or a zoom lens, which can increase the imaging range and improve the imaging quality.

[0106] Step S11 involves obtaining a partial edge contour image of wafer W, specifically including the following steps:

[0107] Control the robotic arm to carry the wafer W to below the camera and stay there for a first preset time (it doesn't need to be very long, just enough for the camera to take a picture, for example, 0.1 seconds);

[0108] The camera is controlled to capture a portion of the edge contour of wafer W to obtain an edge contour image.

[0109] Specifically, step S12 includes:

[0110] Select any three points from the partial edge contour image, and fit the complete edge contour image of wafer W according to the coordinates of the three points in the image coordinate system and the standard equation of a circle.

[0111] In this embodiment, the transmission path of wafer W is stored in the database of processor 251. This transmission path includes any planned position of wafer W during transmission. Step S20, obtaining the planned position corresponding to the actual position, includes:

[0112] Processor 251 queries its internal database to obtain the planned position corresponding to the actual position of wafer W.

[0113] Specifically, step S30 includes:

[0114] The processor 251 calculates the positional deviation between the actual position and the corresponding planned position of the wafer W based on the actual coordinates and planned coordinates (the coordinates of the planned position, which are known quantities) of the wafer center in the world coordinate system.

[0115] In step S40, if the positional deviation between the actual position of the wafer W and the corresponding planned position is greater than a preset threshold, the processor 251 generates a first adjustment instruction and / or a second adjustment instruction according to the internally stored algorithm to adjust the transmission path of the wafer W and / or the position of the sample stage 281.

[0116] Processor 251 can generate both the first and second adjustment instructions simultaneously, or it can generate only one of the first and second adjustment instructions. For example, processor 251 generates only the first adjustment instruction to adjust the wafer transport path. The transport path of wafer W can be divided into two segments: before processor 251 generates the first adjustment instruction, it is transported along the originally set wafer transport path; after processor 251 generates the first adjustment instruction, it is transported along the adjusted wafer transport path. For example, processor 251 generates only the second adjustment instruction, and wafer W moves along the originally set transport path to wafer loading position 261. Sample stage 281 adjusts its position according to the second adjustment instruction.

[0117] The algorithm is configured such that when the relative displacement of the wafer W and the sample stage 281 in the horizontal direction stops changing (at this time, the wafer W is still above the wafer carrier disk 283, and both the wafer W and the sample stage 281 stop moving horizontally), the theoretical deviation between the center of the wafer W and the center of the annular electrode 282 (obtained by calculation, not by measurement) is within a preset range.

[0118] Since the movement of the sample stage 281 is controlled by the processor 251, its position is known. The relative positional relationship between the annular electrode 282 and the sample stage 281 can be obtained through measurement, thus the position of the annular electrode 282 is also known. The processor 251 can obtain the coordinates A of the sample stage 281 in the world coordinate system after adjusting its position, and thus obtain the coordinates B of the center of the annular electrode 282 in the world coordinate system. Furthermore, the transport of the wafer W is also controlled by the processor 251, and given the known wafer transport path, the planned position of the wafer W is also known. Therefore, the processor 251 can determine the coordinates C of the center of the wafer W in the world coordinate system when the wafer W reaches the end of the transport path (at which point the wafer W has stopped horizontal movement and is located above the wafer carrier disk 283) under the adjusted wafer transport path. The processor 251 calculates the aforementioned theoretical deviation based on coordinates B and C.

[0119] In another embodiment, such as Figure 8 As shown, after placing the wafer W on the wafer carrier disk 283, the following steps are also included:

[0120] S60. Detect the actual deviation between the center of wafer W and the center of ring electrode 282;

[0121] In one embodiment, when the first detection instrument 291 is installed in the airlock chamber 220 or the transmission chamber 230, such as Figure 5 , Figure 6As shown, a second inspection instrument 292 (e.g., a camera, optical microscope) can be positioned above or to the side of the wafer loading position 261. After the wafer W is placed on the wafer carrier 283, the second inspection instrument 292 acquires an edge contour image of the wafer W. Knowing the coordinates of the ring electrode 282 in the world coordinate system, the processor 251 only needs to obtain the coordinates of the center of the wafer W in the world coordinate system based on the edge contour image provided by the second inspection instrument 292 to calculate the aforementioned actual deviation. Optionally, after the wafer W is placed on the wafer carrier 283, the second inspection instrument 292 can simultaneously acquire the edge contour image of the wafer W and the edge contour image of the ring electrode 282, and the processor 251 can calculate the actual deviation between the center of the wafer W and the center of the ring electrode 282 based on this.

[0122] In another embodiment, a first detection instrument 291 is disposed within the main chamber 260 and connected to a drive mechanism (not shown). Before the wafer W is placed on the wafer carrier 283, the first detection instrument 291 is driven to a suitable position to acquire an edge contour image of the wafer W to detect the positional deviation between the actual position of the wafer W and the corresponding planned position. After the wafer W is placed on the wafer carrier 283, the first detection instrument 291 is driven to another suitable position to acquire an edge contour image of the wafer W to detect the actual deviation between the center of the wafer W and the center of the annular electrode 282. Since no additional detection instrument is required to acquire the wafer edge image, significant cost savings are achieved. It should be noted that the "suitable position" referred to here means that the edge of the wafer W is within the depth of field of the first detection instrument 291. Because the height of the wafer W differs before and after being placed on the wafer carrier 283, the drive mechanism can drive the first detection instrument 291 to move in the height direction to ensure that the edge of the wafer W is within the depth of field of the first detection instrument 291 when acquiring the edge contour image.

[0123] S70. When transferring the next wafer W, adjust the transfer path of the next wafer W and / or the position of the sample stage 281 based on the position deviation and the actual deviation, so that when the next wafer W is placed on the wafer carrier disk 283, the actual deviation between the center of the next wafer W and the center of the ring electrode 282 is within a preset range.

[0124] In this embodiment, the algorithm is optimized based on the positional deviation and actual deviation of the wafer W that has been transferred, and the transfer path of the next wafer W and / or the position of the moving sample stage 281 are adjusted to further improve the alignment accuracy of the next wafer W with the ring electrode 282.

[0125] As a second aspect of the invention, a wafer alignment device is also disclosed.

[0126] In some embodiments, please refer to Figure 3 , Figure 5 , Figure 6 , Figure 7 The wafer alignment device includes: a sample stage 281, a transfer mechanism, a first detection instrument 291, and a processor 251.

[0127] The sample stage 281 is located in the main chamber 260 and can move along a trajectory from the wafer loading position 261 to the wafer observation position 262. Both the wafer loading position 261 and the wafer observation position 262 are located in the main chamber 260. The sample stage 281 is provided with a wafer carrier disk 283 for carrying the wafer W, and an annular electrode 282 is provided around the wafer carrier disk 283.

[0128] The transfer mechanism is used to transfer wafer W along a transfer path to wafer loading position 261 in main chamber 260. The transfer mechanism includes a robotic arm located in front-end module 210, airlock chamber 220 and / or transfer chamber 230.

[0129] The first inspection instrument 291 is positioned above or to the side of the transport path of the wafer W, or above or to the side of the wafer loading position 261. Before the wafer W reaches the top of the wafer carrier 283, or when the wafer W is above the wafer carrier 283, the first inspection instrument 291 acquires an edge contour image of the wafer W.

[0130] The first detection instrument 291 includes at least one of the following: a line scan camera, a line scan sensor, an optical microscope, a camera, and a light detection instrument. The number of the first detection instrument 291 can be one or more. For example... Figure 5 , Figure 6 , Figure 7 As shown, the first detection instrument 291 can be located in the airlock chamber 220, the transfer chamber 230, or the main chamber 260 of the semiconductor process equipment 2.

[0131] The processor 251 is connected to the first detection instrument 291, the transfer mechanism, and the sample stage 281. The processor 251 calculates the actual position of the wafer W based on the edge contour image provided by the first detection instrument 291, and calculates the positional deviation between the actual position and the corresponding planned position.

[0132] The processor 251 also adjusts the transport path of the wafer W and / or moves the position of the sample stage 281 according to the position deviation, so that when the relative displacement between the wafer W and the sample stage 281 in the horizontal direction stops changing, the theoretical deviation between the center of the wafer W and the center of the ring electrode 282 is within a preset range.

[0133] The wafer alignment device of the present invention can optimize existing process steps, so that the wafer W and the ring electrode 282 have high alignment accuracy. When observing different positions of the wafer edge region, it is not necessary to frequently and significantly adjust the correction voltage, which greatly improves the throughput of the semiconductor process equipment 2.

[0134] In some embodiments, after the wafer W is placed on the wafer carrier 283, an edge contour image of the wafer W is also acquired. Based on the edge contour image acquired after the wafer W is placed on the wafer carrier 283, the processor 251 detects the actual deviation between the center of the wafer W and the center of the annular electrode 282.

[0135] When transferring the next wafer W, the processor 251 adjusts the transfer path of the next wafer W and / or the position of the sample stage 281 based on the positional deviation and the actual deviation, so as to further improve the alignment accuracy between the next wafer W and the ring electrode 282 when the next wafer W is placed on the wafer carrier disk 283.

[0136] In some embodiments, such as Figure 5 , Figure 6 As shown, the first inspection instrument 291 is disposed in the airlock chamber 220 or the transfer chamber 230. The wafer W alignment device also includes a second inspection instrument 292 (e.g., an optical microscope or camera), which is disposed above the wafer loading position 261 and connected to the processor 251. After the wafer W is placed on the wafer carrier 283, the edge contour image of the wafer W is acquired by the second inspection instrument 292.

[0137] In another embodiment, such as Figure 7 As shown, the first inspection instrument 291 is located inside the main chamber 260 and connected to the drive mechanism (not shown). By moving the first inspection instrument 291 via the drive mechanism, the first inspection instrument 291 can acquire edge contour images of the wafer W both before and after it is placed on the wafer carrier 283. Since no additional inspection instruments are required, significant cost savings are achieved.

[0138] As a third aspect of the present invention, a charged particle beam device is also disclosed, comprising: a main chamber 260, the main chamber 260 including a wafer loading position 261 and a wafer observation position 262; a particle beam irradiation device 271, located in the main chamber 260 and above the wafer observation position 262; a wafer alignment device as described in the present invention; wherein, a sample stage 281, a wafer carrier disk 283, and a ring electrode 282 are located in the main chamber 260.

[0139] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0140] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A wafer alignment method for aligning and placing a wafer on a wafer carrier disk, the wafer carrier disk being fixedly disposed on a sample stage, and having an annular electrode disposed around the wafer carrier disk, characterized in that, The wafer alignment method includes: The actual position of the wafer is detected before it reaches above the wafer carrier disk, or when the wafer is above the wafer carrier disk. Obtain the planned location corresponding to the actual location; Calculate the positional deviation between the actual position and the planned position; Adjust the transport path of the wafer and / or move the position of the sample stage according to the position deviation, so that when the relative displacement between the wafer and the sample stage in the horizontal direction stops changing, the theoretical deviation between the center of the wafer and the center of the annular electrode is within a preset range. Move the wafer downwards to place it on the wafer carrier disk.

2. The wafer alignment method as described in claim 1, characterized in that, After placing the wafer on the wafer carrier disk, the process further includes: The actual deviation between the center of the wafer and the center of the annular electrode is detected. When transferring the next wafer, the transfer path of the next wafer and / or the position of the sample stage are adjusted based on the positional deviation and the actual deviation, so that when the next wafer is placed on the wafer carrier, the actual deviation between the center of the next wafer and the center of the annular electrode is within a preset range.

3. The wafer alignment method as described in claim 1, characterized in that, The detection of the actual position of the wafer includes: Obtain a partial edge contour image of the wafer; The complete edge contour image of the wafer is obtained by fitting the partial edge contour image; Based on the coordinates of the center of the complete edge contour image in the image coordinate system, the actual coordinates of the center of the wafer in the world coordinate system are calculated.

4. The wafer alignment method as described in claim 3, characterized in that, A scanning device is positioned above the transmission path, and acquiring the edge contour image of the wafer includes: The robotic arm is controlled to carry the wafer past the scanner from below; The scanning instrument is controlled to scan a portion of the edge contour of the wafer, and an image of the portion of the edge contour is obtained based on the scanning results.

5. The wafer alignment method as described in claim 4, characterized in that, The scanning instrument includes a line scan camera or a line scan sensor.

6. The wafer alignment method as described in claim 3, characterized in that, An imaging device is positioned above the transmission path, and acquiring the edge contour image of the wafer includes: The robotic arm is controlled to carry the wafer to a position below the imaging instrument and remain there for a first preset time. The camera is controlled to capture a portion of the edge contour of the wafer to obtain an image of the edge contour.

7. The wafer alignment method as described in claim 6, characterized in that, The photographing instrument includes an optical microscope or a camera.

8. The wafer alignment method as described in claim 3, characterized in that, A photodetector is positioned above the transmission path, the photodetector comprising a light emitting element and a light receiving element; acquiring the edge contour image of the wafer includes: The robotic arm is controlled to carry the wafer past the optical detection instrument from below; The light emitting element is controlled to emit a light beam toward the wafer, such that a portion of the wafer's edge contour falls within the irradiation range of the light beam; The light receiving element receives the reflected light from the wafer and generates a corresponding electrical signal, which is used to generate the edge contour image.

9. The wafer alignment method as described in claim 2, characterized in that, The sample stage loads the wafer at the wafer loading position; a camera is provided above the wafer loading position, the camera employing a zoom lens or a telecentric lens; the camera captures a portion of the edge contour of the wafer to obtain an image of the wafer's edge contour.

10. The wafer alignment method as described in claim 1, characterized in that, The transmission path of the wafer is stored in a database, and the transmission path includes any planned position of the wafer during the transmission process; The process of obtaining the planned location corresponding to the actual location includes: Query the database to obtain the planned location corresponding to the actual location.

11. A wafer alignment device, characterized in that, include: A sample stage that can move along a trajectory from the wafer loading position to the wafer observation position; The wafer loading position and the wafer observation position are located in the main chamber; a wafer carrier disk is provided on the sample stage, and an annular electrode is arranged around the wafer carrier disk; A transport mechanism for transporting a wafer along a transport path to the wafer loading position in the main chamber; A first inspection instrument is positioned above or to the side of the wafer's transport path, or above or to the side of the wafer's loading position; before the wafer reaches above the wafer carrier disk, or when the wafer is above the wafer carrier disk, the first inspection instrument acquires an edge contour image of the wafer. A processor is connected to the first detection instrument, the transmission mechanism, and the sample stage; the processor calculates the actual position of the wafer based on the edge contour image, and calculates the positional deviation between the actual position and the corresponding planned position; The processor adjusts the transport path of the wafer and / or moves the position of the sample stage according to the position deviation, so that when the relative displacement between the wafer and the sample stage in the horizontal direction stops changing, the theoretical deviation between the center of the wafer and the center of the annular electrode is within a preset range.

12. The wafer alignment apparatus as described in claim 11, characterized in that, The number of the first detection instruments is one or more.

13. The wafer alignment apparatus as described in claim 11, characterized in that, The first detection instrument is located in the airlock chamber, or the first detection instrument is located in the transmission chamber, or the first detection instrument is located in the main chamber.

14. The wafer alignment apparatus as described in claim 13, characterized in that, The wafer alignment device further includes: The second inspection instrument is located in the main chamber above or to the side of the wafer loading position and is connected to the processor; after the wafer is placed on the wafer carrier, the edge contour image of the wafer is acquired by the second inspection instrument.

15. The wafer alignment apparatus as described in claim 13, characterized in that, The first detection instrument is located in the main chamber and includes a camera, which includes a zoom lens or a telecentric lens; wherein, after the wafer is placed on the wafer carrier disk, the first detection instrument also acquires an image of the edge contour of the wafer.

16. The wafer alignment apparatus as described in claim 13, characterized in that, The first detection instrument is located in the main chamber and is connected to the drive mechanism. After the wafer is placed on the wafer carrier, the first detection instrument is moved by the drive mechanism so that the first detection instrument can acquire the edge contour image of the wafer.

17. The wafer alignment apparatus according to any one of claims 14-16, characterized in that, The processor detects the actual deviation between the center of the wafer and the center of the annular electrode based on the edge contour image obtained after the wafer is placed on the wafer carrier disk. When transferring the next wafer, the transfer path of the next wafer and / or the position of the sample stage are adjusted based on the positional deviation and the actual deviation, so that when the next wafer is placed on the wafer carrier, the actual deviation between the center of the next wafer and the center of the annular electrode is within a preset range.

18. The wafer alignment apparatus as claimed in claim 11, characterized in that, The first detection instrument includes at least one of the following: a line scan camera, a line scan sensor, an optical microscope, a camera, and a light detection instrument.

19. A charged particle beam device, characterized in that, include: The main chamber includes a wafer loading position and a wafer observation position; The particle beam irradiation device is located in the main chamber and above the wafer observation position; The wafer alignment apparatus as described in any one of claims 11-18; The sample stage, the wafer carrier disk, and the annular electrode are located in the main chamber.

Images