Vcsel chip-level wavelength stabilization system and method with electrical parameter feedback

Abstract

The application relates to the technical field of semiconductors and control, in particular to a VCSEL chip-level wavelength stabilizing system and method with electrical parameter feedback, which comprises a VCSEL chip integrated with a heater, and a detection module, a control module and a driving module connected in sequence; the driving module is connected with the VCSEL chip and the heater; the VCSEL chip comprises an emission period and a standby period; the control module is configured to set a time gate window in the emission period, capture the peak junction voltage of the VCSEL chip through the detection module, instruct the driving module to inject a probe current lower than a preset lasing threshold to the VCSEL chip in the standby period, and extract the differential resistance of the VCSEL chip through the detection module; after determining that the device is aged, an aging voltage offset is added to a preset target wavelength reference voltage threshold to update the heater. The application can utilize time gating and double-parameter verification, overcome high-frequency pulse sampling failure, accurately strip aging misjudgment, and realize high-reliability wavelength locking.

Description

Technical Field

[0001] This application relates to the fields of semiconductor and control technology, and in particular to a VCSEL chip-level wavelength stabilization system and method with electrical parameter feedback. Background Technology

[0002] In applications such as high-precision time-of-flight lidar and space sensing, the receiver is typically equipped with a bandpass filter with an extremely narrow transmission window to suppress ambient background light interference. This requires the lasing wavelength of the vertical-cavity surface-emitting laser (VCSEL) to be extremely stable and precisely aligned with the center wavelength of the filter. In practical applications, lidar systems require the laser to operate in an extremely high-frequency, narrow-pulse state during ranging, i.e., alternating between nanosecond-level on-time and microsecond-level off-time. If, during this drastic transient switching process, the laser's active region junction temperature changes due to its own transient heating or external environmental fluctuations, its lasing wavelength will drift significantly. This will prevent the emitted light from effectively penetrating the narrow-band filter, severely weakening the system's detection signal-to-noise ratio and ranging accuracy.

[0003] To overcome the wavelength drift problem of lasers, various wavelength locking and stabilization schemes have been proposed in the prior art. For example, Chinese invention patent application CN115548875A, entitled "VCSEL Wavelength Automatic Locking Control Device," discloses a control device that uses an external optical feedback mechanism to achieve wavelength locking. This prior art sequentially arranges a converging lens, a circular polarizer, a cesium atom working gas cell with a non-magnetic heating device, and a photodetector at the laser output end. Its control logic mainly involves acquiring the light signal transmitted through the atom gas cell via the photodetector, extracting the DC component of the light signal, and combining it with the actual temperature signal of the laser. A fuzzy algorithm and a closed-loop control model are then used to adjust the laser's driving current and temperature in real time. This feedback mechanism based on atomic absorption spectroscopy can provide long-term stable laser wavelength locking for miniaturized atomic sensors in continuous or quasi-continuous emission modes.

[0004] However, directly applying existing technologies relying on continuous sampling to the specific application scenario of high-frequency narrow-pulse lidar exposes extremely serious control failure defects. In actual lidar ranging operations, the laser spends most of its time in a microsecond-level pulse-intermittent standby period, during which it does not emit light. During this off-peak period, the existing closed-loop control system continuously acquires a large number of invalid zero-value signals, causing the control loop to misinterpret these zero values ​​as a severe shift in the reference standard. This leads to the controller outputting extreme compensation adjustment commands, ultimately causing the entire feedback loop to diverge and completely collapse. Simultaneously, under long-term operation throughout its entire lifecycle, repeated impacts from high-frequency, high-current pulses inevitably cause aging of the laser's ohmic contact layer and a slow increase in its intrinsic series resistance. Existing technologies rely entirely on external optical parameters or a single temperature parameter for feedback, lacking the ability to discern the evolution of the device's intrinsic state. This makes it highly susceptible to misinterpreting the external manifestation of increased resistance due to aging as a decrease in internal junction temperature, thus incorrectly driving the control system to continuously increase temperature for compensation. This not only fails to stabilize the wavelength but can also cause severe wavelength redshift or even lead to physical failure due to thermal overload. Therefore, the core technical problem faced by the existing technology is: how to effectively maintain the continuous stability of the feedback control loop under the harsh operating conditions of intermittent emission of ultra-high frequency pulses to avoid system collapse due to sampling interruption, and on this basis, accurately identify and eliminate non-temperature parameter interference caused by long-term aging of devices to prevent the system from generating fatal thermal misjudgments and reverse compensation. Summary of the Invention

[0005] To overcome high-frequency pulse sampling failure and accurately eliminate aging misjudgments by utilizing time gating and dual-parameter verification, and to achieve highly reliable wavelength locking, this application provides a VCSEL chip-level wavelength stabilization system and method with electrical parameter feedback.

[0006] In a first aspect, the VCSEL chip-level wavelength stabilization system with electrical parameter feedback provided in this application adopts the following technical solution: the VCSEL chip-level wavelength stabilization system with electrical parameter feedback includes a VCSEL chip with an integrated heater, and a detection module, a control module, and a drive module connected in sequence; the drive module is connected to the VCSEL chip and the heater respectively; the VCSEL chip includes an emission period and a standby period; The control module is configured as follows: During the emission period, a time-gated window is set, and the peak junction voltage of the VCSEL chip is captured by the detection module. During the standby period, the driving module is instructed to inject a probe current lower than the preset lasing threshold into the VCSEL chip, and the differential resistance of the VCSEL chip is extracted by the detection module. Track the average value of the peak junction voltage and the average value of the differential resistance; when the average value of the differential resistance fluctuates less than a preset stability threshold and the average value of the peak junction voltage rises above a preset aging threshold, device aging is determined to have occurred and the aging voltage offset is obtained. Once device aging is determined, the heating of the heater is prevented from being controlled by the drive module based on the average value of the peak junction voltage. Instead, the aging voltage offset is superimposed on the preset target wavelength reference voltage threshold for updating, thereby controlling the heater.

[0007] Optionally, the control module is further configured as follows: During the transmission period, the detection module is restricted to capturing the peak junction voltage only within the time-gated window, and sampling signal input outside the time-gated window is blocked. Extract the peak junction voltage captured during the current emission period to generate a transient self-heating error signal; The transient self-heating error signal is used as a reserved compensation parameter. In the subsequent standby period, the differential resistor is combined with the preset basic heat preservation power of the heater to perform cross-cycle heat compensation.

[0008] Optionally, the control module, in conjunction with the detection module, is further configured as follows: During the emission period, a gating pulse is generated according to the system emission timing to define the time gating window and trigger synchronous latching of the peak junction voltage; During the standby period, the probe current is configured to include a DC bias signal and a modulation signal, and the sum of the amplitudes of the DC bias signal and the modulation signal is constrained to be lower than the preset lasing threshold. The driving module is instructed to inject the constrained probe current into the VCSEL chip, and the detection module extracts the captured voltage response synchronized with the modulation signal to calculate the differential resistance.

[0009] Optionally, the control module is further configured as follows: Configure the preset target wavelength reference voltage threshold or the updated target wavelength reference voltage threshold as a dynamic reference reference. The deviation between the peak junction voltage latched within the time-gated window and the dynamic reference is calculated, and a drive signal for controlling the heater is generated based on the deviation. When the average fluctuation of the tracked differential resistance and the average fluctuation of the peak junction voltage exceed their respective preset temperature change thresholds, it is determined that an ambient temperature change has occurred, and the drive signal is authorized to be sent to the drive module.

[0010] Optionally, the VCSEL chip includes an active region, and the heater is integrated in situ inside the VCSEL chip, establishing a local heat conduction path with the active region; The control module, in conjunction with the drive module, is further configured as follows: Analyze the drive signal and extract the power adjustment parameters corresponding to the deviation. According to the power adjustment parameters, the drive module drives the heater, so that the heater directly performs local heat injection on the active area through the local heat conduction path, so as to complete in-situ heat compensation in sync with the deviation.

[0011] Optionally, the control module, in conjunction with the drive module, is further configured as follows: Based on the fact that the physical thermal response time of the local heat conduction path is greater than the duration of the time-gated window, the extracted power adjustment parameters are configured as cross-cycle preheating parameters. When the current launch period ends and the standby period begins, the drive module is instructed to drive the heater according to the cross-cycle preheating parameters. Before the next launch period is triggered, the localized heat injection of the active region is completed so that the active region is pre-fitted to the dynamic reference reference.

[0012] Optionally, the control module is further configured as follows: Construct a historical observation pool to store the average value of the peak junction voltage and the average value of the differential resistance tracked in time series. When it is determined that the device has aged, the difference between the average value of the current peak junction voltage in the historical observation pool and the average value of the earliest stored peak junction voltage is calculated. The difference is identified as the aging voltage offset to trigger an update to the dynamic reference base; The cross-cycle preheating parameters are adjusted in conjunction with the updated dynamic reference benchmark to regulate the local heat injection performed into the active region.

[0013] Optionally, the control module is further configured as follows: Extract the first change in the mean of the peak junction voltage and the second change in the mean of the differential resistance in the historical observation pool, respectively. When the first change and the second change exceed their respective preset temperature change thresholds and thus the change in ambient temperature is determined to have occurred, the direction of change of the first change and the second change is used to determine whether the ambient cold shift or the ambient heat shift has occurred. When the environmental cold offset is determined to occur, the current dynamic reference benchmark is maintained without being updated, and the authorized release drive signal is established as the control basis for driving the heater to heat up, so as to control the heater to perform real-time thermal compensation to the active area.

[0014] Optionally, the control module is further configured as follows: During the process of controlling the heater to perform the real-time thermal compensation, the average value of the differential resistance is tracked simultaneously; When the average fluctuation of the differential resistor recovers to less than the preset stable threshold, and the average value of the current peak junction voltage deviates from the dynamic reference, the deviation is identified as a concurrent aging voltage offset. The concurrent aging voltage offsets are superimposed on the dynamic reference base to perform the update; Based on the updated dynamic reference benchmark, the drive module is instructed to dynamically adjust the heater to perform closed-loop correction.

[0015] Secondly, the VCSEL chip-level wavelength stabilization method based on electrical parameter feedback provided in this application adopts the following technical solution: The VCSEL chip-level wavelength stabilization method based on electrical parameter feedback includes the following steps: During the emission period, a time-gated window is set, and the peak junction voltage of the VCSEL chip is captured by the detection module. During the standby period, the driving module is instructed to inject a probe current lower than the preset lasing threshold into the VCSEL chip, and the differential resistance of the VCSEL chip is extracted by the detection module. Track the average value of the peak junction voltage and the average value of the differential resistance; when the average value of the differential resistance fluctuates less than a preset stability threshold and the average value of the peak junction voltage rises above a preset aging threshold, device aging is determined to have occurred and the aging voltage offset is obtained. Once device aging is determined, the heating of the heater is prevented from being controlled by the drive module based on the average value of the peak junction voltage. Instead, the aging voltage offset is superimposed on the preset target wavelength reference voltage threshold for updating, thereby controlling the heater.

[0016] In summary, this application includes the following beneficial technical effects: 1. By dividing the working cycle of the VCSEL chip into an emission period and a standby period, and setting a time-gated window that matches the flat-top region of the emission pulse during the emission period to capture the peak junction voltage, and injecting a probe current below the lasing threshold during the standby period to extract the differential resistance, the time gating is used to block invalid zero-value signal input outside the emission period. At the same time, the differential resistance is used as a verification parameter to remove aging interference, so that the control loop can maintain continuous stability under high-frequency narrow pulse intermittent conditions, avoiding closed-loop divergence caused by sampling interruption, and effectively distinguishing whether the junction voltage rise is due to device aging or junction temperature change, thereby preventing erroneous thermal compensation caused by aging misjudgment.

[0017] 2. By constructing a historical observation pool to store the average value of peak junction voltage and the average value of differential resistance in time series, and tracking the long-term change trend of the two parameters based on the sliding window mechanism, when device aging is detected, the aging voltage offset is superimposed on the target wavelength reference voltage threshold to update the dynamic reference. At the same time, when the ambient temperature changes, the cold offset or hot offset is determined according to the change direction of the two parameters and the drive signal is released. This realizes independent identification and classification of device aging and ambient temperature changes, reduces parameter coupling error in wavelength stability control, and improves the system's environmental adaptability throughout its entire life cycle.

[0018] 3. By integrating the heater in situ inside the VCSEL chip and establishing a local heat conduction path with the active region, and configuring the power adjustment parameters generated based on the deviation as cross-cycle preheating parameters, the heater is driven according to the cross-cycle preheating parameters after the emission period ends to complete the local heat injection of the active region before the next emission period is triggered. This allows the active region to be pre-fitted to the dynamic reference reference. The physical thermal response delay of the local heat conduction path is compensated by the standby period, realizing the effective execution of thermal compensation operation in the high-frequency pulse gap and improving the real-time performance and accuracy of wavelength locking. Attached Figure Description

[0019] Figure 1 A flowchart of a VCSEL chip-level wavelength stabilization method based on electrical parameter feedback provided in an embodiment of this application; Figure 2 This is a block diagram of the internal structure of the detection module and control module provided in the embodiments of this application. Detailed Implementation

[0020] The following combination Figures 1-2 This application will be described in further detail.

[0021] This application relates to the fields of semiconductor and control technology, and more particularly to a VCSEL chip-level wavelength stabilization system and method with electrical parameter feedback. In high-precision time-of-flight lidar and space sensing applications, the receiver is typically equipped with a bandpass filter with an extremely narrow transmission window to suppress ambient background light interference. This application scenario requires the lasing wavelength of the vertical-cavity surface-emitting laser (VCSEL) source to be highly stable and precisely aligned with the center wavelength of the filter.

[0022] In existing technologies, control schemes for VCSEL wavelength drift mainly fall into two categories. The first category is based on external temperature control, using an external thermoelectric cooler to control the overall temperature of the VCSEL. This type of scheme suffers from inherent drawbacks such as large size, high power consumption, and slow thermal response, making it unsuitable for the miniaturization and low power consumption requirements of portable LiDAR devices. Some schemes use external thermistors at the chip level to acquire temperature. However, thermistors can only sense the ambient temperature of the local chip area and cannot directly obtain the core junction temperature of the VCSEL's active region, resulting in significant thermal conduction delays and spatial temperature gradients, thus failing to achieve accurate and rapid lasing wavelength locking. The second category is based on external optical feedback, such as constructing a wavelength reference using alkali metal atomic absorption spectroscopy and achieving closed-loop control by acquiring optical signals through a photodetector. This type of scheme relies on complex external optical components, has low system integration, and is only suitable for continuous or quasi-continuous emission conditions.

[0023] Existing technologies for lidar suffer from two unresolved core control defects in typical application scenarios. The first is the sampling failure defect under high-frequency pulse conditions. During lidar ranging, the VCSEL operates in a high-frequency narrow pulse mode with nanosecond-level turn-on and microsecond-level turn-off, spending most of its time in a standby state without emission. Closed-loop control schemes relying on continuous sampling will collect a large number of invalid zero-value signals during standby, causing the control loop to misjudge a severe shift in the reference standard, outputting extreme compensation commands, ultimately leading to divergence in the entire feedback loop and collapse of the control system. The second is the aging misjudgment defect throughout its entire lifecycle. Under repeated impacts from long-term high-frequency, high-current pulses, the ohmic contact layer of the VCSEL ages, causing a slow increase in its intrinsic series resistance. The forward junction voltage of the VCSEL has a negative temperature coefficient. Existing single-parameter feedback schemes cannot distinguish whether the increase in junction voltage originates from device aging or a decrease in junction temperature, easily misjudging the aging-induced junction voltage increase as a decrease in junction temperature, thus incorrectly driving continuous temperature compensation, causing a severe redshift of the lasing wavelength, or even causing physical failure due to thermal overload.

[0024] This application systematically addresses the aforementioned shortcomings of existing technologies by employing a chip-level in-situ integrated hardware architecture, combined with dual-modal timing control and dual-parameter cross-validation control logic, to achieve highly reliable VCSEL wavelength locking under high-frequency pulse conditions throughout its entire lifecycle. The technical solution of this application is clearly and completely illustrated below through two progressive embodiments. Embodiment 1 is a basic hardware architecture implementation for chip-level wavelength stabilization, providing a hardware foundation for wavelength control under all operating conditions; Embodiment 2 is adapted for high-frequency pulse conditions in lidar.

[0025] Example 1

[0026] This embodiment provides a VCSEL chip-level wavelength stabilization system with electrical parameter feedback. It constructs an integrated hardware architecture of chip-level in-situ electrical feedback and in-situ thermal compensation, breaking through the limitations of existing technologies that rely on external temperature control devices and optical feedback components. It directly uses the intrinsic electrical parameters of the VCSEL itself, which are strongly correlated with the lasing wavelength, as the basis for closed-loop feedback. It realizes direct sensing and precise control of the core junction temperature of the active region from the hardware level, solving the core defects of existing solutions such as large size, high power consumption, large thermal response delay, and spatial temperature gradient between the junction temperature sensing and the actual lasing region. At the same time, it provides a complete and feasible hardware foundation for full-condition adaptive wavelength stabilization control.

[0027] This system comprises a VCSEL chip with an integrated heater, a detection module, a control module, and a drive module. The input of the detection module is electrically connected to the VCSEL chip, the input of the control module is connected to the output of the detection module, and the input of the drive module is connected to the output of the control module. The output of the drive module is connected to both the VCSEL chip and the heater. The VCSEL chip integrates the active region and the heater. The detection module acquires the peak junction voltage and differential resistance in real time and feeds them back to the control module. The control module extracts the valid signal through a time-gated window and generates a heating control command. The drive module receives the command and outputs a probe current to the VCSEL chip and a matching drive current to the heater. This application eliminates the need for external temperature sensors or optical feedback components, constructing a complete wavelength-stable physical closed loop solely through chip-level electrical parameter feedback, demonstrating the high integration and feasibility of the solution. All modules of this system can be integrated into a single package or monolithically integrated on the same substrate, achieving a minimalist and miniaturized system design.

[0028] The VCSEL chip features an active region, which is the core area for electro-optical conversion and laser emission. The junction temperature of the active region has a linear relationship with the lasing wavelength of the VCSEL, and the junction temperature directly determines the accuracy and stability of the lasing wavelength. The heater is integrated in-situ within the VCSEL chip, adjacent to the active region. Specifically, it can be arranged in a ring around the active region or a polygonal planar layout covering it. This establishes a short local heat conduction path with the active region, resulting in lower heat loss and a much faster thermal response speed than external thermoelectric coolers. It can directly and uniformly inject local heat into the active region, avoiding the spatial temperature gradient between external temperature control devices and the active region, ensuring that temperature control operations directly act on the core region that determines the lasing wavelength. The heater uses a thin-film resistor structure fabricated within the n-type distributed Bragg reflector layer of the VCSEL chip, or it can be fabricated in the VCSEL chip substrate. Its power consumption is maintained at tens of kilometres per second. The power consumption is on the order of magnitude, requiring only compensation for minor temperature fluctuations during VCSEL operation, far lower than the watt-level power consumption of external thermoelectric coolers, making it suitable for the low power consumption requirements of portable devices.

[0029] The detection module is electrically connected to the VCSEL chip and can directly extract the intrinsic electrical parameters that are strongly correlated with the lasing wavelength during the operation of the VCSEL, generate the corresponding detection signal, and transmit it to the control module. The junction voltage and differential resistance of the VCSEL have a definite correspondence with the active region junction temperature, and the junction temperature directly determines the lasing wavelength. Therefore, there is no need for additional optical or temperature sensors; the accurate sensing of the wavelength state can be achieved directly through the chip's own electrical parameters.

[0030] The detection module is configured with two detection architectures that can operate independently or in tandem. One is a DC detection architecture that measures the forward voltage across the VCSEL under a constant drive current, extracting the intrinsic electrical parameter as the junction voltage of the VCSEL. It incorporates a high-speed sample-and-hold circuit and a high-precision analog-to-digital converter, enabling nanosecond-level transient voltage signal capture and latching, adapting to the rapid signal acquisition requirements of pulse operation mode. The other is an AC high-frequency modulation architecture, including a programmable constant current source and a high-precision signal demodulation unit. The programmable constant current source provides the VCSEL with a drive current superimposed with a high-frequency, small-amplitude modulated signal. The signal demodulation unit extracts the differential resistance of the VCSEL through lock-in amplification technology. The physical essence of the differential resistance is the VCSEL's resistance under forward bias. Its value is highly sensitive to changes in junction temperature in the active region of VCSEL.

[0031] Since the probe current injected during standby is extremely small and far below the lasing threshold, the extracted differential resistance is mainly dominated by the large dynamic junction resistance of the PN junction. The absolute increase in the tiny intrinsic series resistance caused by the aging of the device's ohmic contact is negligible compared to the dynamic junction resistance at this time. Therefore, the extracted differential resistance under this condition is almost unaffected by the aging of the VCSEL's ohmic contact and can be used as a pure characterization parameter reflecting the junction temperature state of the active region, providing a reliable data basis for subsequent operating condition identification and closed-loop control.

[0032] The input terminal of the control module is connected to the output terminal of the detection module. Internally, it is equipped with a PID controller, a precision reference voltage source, a digital-to-analog converter, and a storage unit. The storage unit is used to pre-store calibration parameters, preset thresholds, and sampling data during operation. Figure 2 As shown, at the signal flow topology level, the high-speed sample-and-hold circuit in the DC detection architecture unidirectionally feeds the signal to the high-precision analog-to-digital converter to output the peak junction voltage, which is dedicated to the input storage unit. The signal demodulation unit in the AC high-frequency modulation architecture outputs a differential resistor, which is processed by two-way current splitting and synchronously input to the storage unit and the PID controller in parallel. The built-in data in the storage unit is unidirectionally transmitted to the PID controller, which finally summarizes and outputs the heating control signal. The control module receives the detection signal transmitted by the detection module, analyzes it to obtain the real-time value of the intrinsic electrical parameters, and simultaneously retrieves the reference signal pre-stored in the storage unit. The reference signal is the VCSEL intrinsic electrical parameter reference value obtained in advance through device calibration at the corresponding target lasing wavelength. The control module compares the real-time value of the intrinsic electrical parameters with the pre-stored reference signal, generates a wavelength error signal based on the comparison result, and then calculates the matching heating control signal through the PID control algorithm. The heating control signal is then transmitted to the drive module. The entire closed-loop link does not require additional signal conversion, has a fast response speed, and high control accuracy.

[0033] The input terminal of the drive module is connected to the output terminal of the control module, and the output terminal is connected to the VCSEL chip and the heater respectively. The drive module receives the heating control signal transmitted by the control module, parses it to obtain the corresponding power adjustment parameters, and outputs a matching drive current to the heater according to the power adjustment parameters. This drives the heater to complete the temperature adjustment of the active region, and works with the control module to achieve closed-loop stable control of the VCSEL lasing wavelength.

[0034] This embodiment also provides a VCSEL chip-level wavelength stabilization method with electrical parameter feedback, which is applied to the wavelength stabilization system described above in this embodiment. It is suitable for wavelength stabilization control under continuous or quasi-continuous emission conditions of VCSEL. The specific implementation process is as follows.

[0035] The control module outputs drive commands to the laser drive link of the VCSEL chip, driving the VCSEL chip to complete continuous laser lasing. Simultaneously, it sends sampling commands to the detection module, which in turn activates the corresponding detection architecture to collect the intrinsic electrical parameters of the VCSEL in real time.

[0036] The detection module receives the sampling command issued by the control module, starts the DC detection architecture or AC high-frequency modulation architecture, collects the electrical signal of the VCSEL chip, extracts the corresponding junction voltage or differential resistance as intrinsic electrical parameters, generates a detection signal that matches the intrinsic electrical parameters, and transmits the detection signal to the control module.

[0037] The control module receives the detection signal transmitted by the detection module, analyzes it to obtain the real-time values ​​of the intrinsic electrical parameters, and retrieves the pre-stored reference values ​​in the storage unit. These reference values ​​are the calibration benchmark values ​​of the intrinsic electrical parameters corresponding to the target lasing wavelength. The control module compares the real-time values ​​of the intrinsic electrical parameters with the pre-stored reference values ​​and calculates the wavelength error signal based on the comparison results.

[0038] The control module inputs the generated wavelength error signal into the built-in PID controller, which calculates a heating control signal that matches the wavelength error signal using a PID control algorithm. This heating control signal is then output to the drive module. The PID controller can employ an incremental PID algorithm to adapt to the slow response characteristics of the temperature control system and avoid integral saturation problems. Specific control parameters can be tuned by those skilled in the art based on the thermal response characteristics of the VCSEL and the heater.

[0039] The drive module receives the heating control signal output by the control module, parses the heating control signal to obtain the corresponding power adjustment parameters, generates a matching drive current based on the power adjustment parameters, and outputs the drive current to the heater integrated in the VCSEL chip.

[0040] The heater receives the drive current output by the drive module and generates corresponding Joule heat. Through the local heat conduction path established with the active region, it directly performs local heat injection on the active region, adjusts the junction temperature of the active region, reduces the deviation between the actual junction temperature and the target junction temperature, and counteracts the junction temperature change that causes wavelength drift.

[0041] The control module continuously collects the intrinsic electrical parameters of the VCSEL through the detection module, updates the wavelength error signal in real time, and dynamically adjusts the heating control command to form a continuous closed-loop control. This dynamically locks the intrinsic electrical parameters of the VCSEL near the pre-stored reference value, thereby achieving long-term stable control of the VCSEL lasing wavelength.

[0042] Example 2

[0043] This embodiment, based on the VCSEL chip-level wavelength stabilization system hardware architecture with electrical parameter feedback described in Embodiment 1, provides a VCSEL chip-level wavelength stabilization system with electrical parameter feedback that is adaptable to high-frequency narrow pulse operating scenarios and has full-lifecycle aging protection against false judgments. It also provides a corresponding implementation method for VCSEL chip-level wavelength stabilization with electrical parameter feedback. This embodiment requires no new hardware entities, fully reusing the VCSEL chip with integrated heater, detection module, control module, and drive module described in Embodiment 1. Through timing configuration and logic nesting of the control module, it specifically addresses the sampling failure defects in high-frequency pulse conditions and the thermal false judgment defects caused by long-term device aging in existing technologies, further improving the dynamic response capability and full-lifecycle operational reliability of the wavelength stabilization system.

[0044] The VCSEL chip's operating cycle is divided into an emission period and a standby period. The emission period is the time when the VCSEL receives ranging trigger commands and outputs high-frequency narrow-pulse laser light, lasting for a duration of [duration missing]. to The nanosecond-level emission speed matches the narrow pulse emission requirements of lidar ranging. The standby period is the interval between two adjacent emission periods, the time during which the VCSEL stops high-power laser emission, lasting for [duration missing]. to The microsecond level covers most of the working time under lidar ranging conditions.

[0045] The control module and detection module are configured in tandem to accurately capture the peak junction voltage during the emission phase. The control module receives the global ranging trigger signal from the lidar system, which is strictly synchronized with the laser drive pulse of the VCSEL. Based on this synchronized emission timing, the control module generates a gating pulse to define the opening and closing times of the time-gated window, while simultaneously triggering the high-speed sample-and-hold circuit within the detection module to synchronously latch the peak junction voltage. The width of the time-gated window is precisely matched to the width of the flat-top region of the emission pulse, and the opening time of the window is set relative to the rising edge of the emission pulse. to The fixed delay can be determined through pre-calibration before leaving the factory. During the calibration process, the emission pulse waveform and junction voltage waveform of the VCSEL are monitored synchronously, and the delay is adjusted to ensure that the window effectively covers the flat-top phase of the emission pulse, effectively avoiding the overshoot signal of the rising edge and the attenuation signal of the falling edge.

[0046] During the transmission period, the control module uses a gating pulse to restrict the detection module to perform sampling operations only within a time-gated window, blocking all sampling signal inputs outside the time-gated window. Specifically, the gating pulse is controlled to enable the sample-and-hold circuit and analog-to-digital converter within the detection module only when it is high. Sampling and conversion operations are prohibited outside the window, preventing invalid zero-value signals from entering the control loop during the pulse turn-off phase and solving the problems of continuous sampling failure and closed-loop divergence under high-frequency pulse conditions. Within the time-gated window, the detection module synchronously latches the peak junction voltage of the VCSEL under high-current drive using its built-in DC detection architecture and transmits the captured peak junction voltage signal to the control module.

[0047] The control module extracts the peak junction voltage captured during the current emission period and compares it with a preset target wavelength reference voltage threshold to generate a transient self-heating error signal. This signal reflects the junction temperature rise and corresponding wavelength drift in the VCSEL active region caused by transient self-heating under high-current pulse drive. The control module uses this transient self-heating error signal as a reserved compensation parameter to provide data support for thermal compensation in the subsequent standby period. In the subsequent standby period, combined with the synchronously extracted differential resistance, the module dynamically adjusts the heater's base insulation power to perform cross-cycle thermal compensation, eliminating the impact of the transient self-heating accumulation effect caused by the high-current pulse on the wavelength stability of subsequent emission cycles. Specifically, the control module can superimpose a corresponding compensation power component onto the base insulation power during the standby period based on the magnitude of the transient self-heating error signal. If the transient self-heating error indicates a high junction temperature, the base insulation power is appropriately reduced to prevent continuous accumulation of junction temperature; if the junction temperature is low, the insulation power is appropriately increased to ensure that the active region junction temperature stabilizes within the target range before the next emission period.

[0048] The control module and detection module work together to accurately extract the differential resistance during standby. During standby, the control module sends a probe current configuration command to the drive module, configuring the probe current to include a DC bias signal and a high-frequency, small-amplitude modulation signal, constraining the sum of the amplitudes of the DC bias signal and the modulation signal to be lower than a preset lasing threshold. The preset lasing threshold is the value of the VCSEL chip at... to The minimum driving current required to generate laser lasing across the entire operating temperature range is determined through temperature cycling calibration before device shipment. The lasing threshold current of the VCSEL increases with increasing ambient temperature; therefore, the minimum lasing threshold across the entire temperature range occurs at low temperatures. Constraining the probe current amplitude below this minimum ensures that the probe current will not trigger the VCSEL to generate laser lasing across the entire operating temperature range, avoiding noise interference to the lidar receiver. In this embodiment, the sum of the amplitudes of the DC bias signal and the modulation signal is set to 0.1 times the preset lasing threshold, with the DC bias signal accounting for 90% of the total amplitude and the modulation signal accounting for 10%. This parameter setting ensures that the probe current is below the lasing threshold while providing sufficient signal amplitude to guarantee the signal-to-noise ratio and accuracy of the differential resistance detection. The frequency of the modulation signal is set to... to The high-frequency signal ensures that multiple cycles of modulation and demodulation can be completed within a microsecond-level standby period, guaranteeing detection accuracy. The control module instructs the drive module to inject constrained probe current into the VCSEL chip, extracts the voltage response captured by the detection module that is synchronized with the modulation signal, and extracts the AC voltage response component with the same frequency as the modulation signal through lock-in amplification technology. Based on the ratio of the AC voltage response amplitude to the AC current amplitude of the modulation signal, the differential resistance of the VCSEL chip is calculated.

[0049] The control module constructs a historical observation pool to store the average peak junction voltage and the average differential resistance as time series data. The historical observation pool uses a sliding window covering a long-term aging timescale of the matched devices for data updates. The time span of the sliding window is set to hundreds to thousands of hours, employing a first-in-first-out (FIFO) rolling update mechanism. During operation, the control module periodically acquires the peak junction voltage captured during the emission period and the differential resistance extracted during the standby period within a specific phase through a downsampling mechanism. The average values ​​of these parameters are obtained periodically and stored in the historical observation pool as a time series. This ensures that the long-term, slow aging trend of the parameters is captured without causing excessive system computational load due to the large amount of periodic data. Based on the stored data in the historical observation pool, the control module continuously updates the sliding average of the peak junction voltage and the sliding average of the differential resistance, and performs operational status determination based on the changing patterns of these two parameters.

[0050] The control module performs device aging determination based on the tracked average values ​​of the two parameters. When the average fluctuation of the differential resistance is less than a preset stability threshold, and the average rise of the peak junction voltage exceeds a preset aging threshold, the control module determines that device aging has occurred. The preset stability threshold is used to determine the long-term stability of the differential resistance. It is set based on the calibration correspondence between the VCSEL active region junction temperature and the differential resistance. The temperature coefficient of the VCSEL differential resistance is obtained through pre-shipment temperature cycling calibration, and then calculated based on the allowable junction temperature fluctuation range. In this embodiment, the preset stability threshold is specifically set to correspond to a junction temperature fluctuation range not exceeding... The change in differential resistance is considered. When the average fluctuation of the differential resistance is less than this threshold, it can be assumed that the core junction temperature of the VCSEL remains stable and there is no significant change in ambient temperature. A preset aging threshold is used to determine whether a long-term increase in junction voltage is caused by device aging. Its setting is based on the typical aging pattern of VCSEL ohmic contacts and the accuracy requirements of wavelength locking in lidar systems. For commonly used lidar... The temperature coefficient of the lasing wavelength of a band VCSEL is approximately The temperature coefficient of the junction voltage is a pre-calibrated negative fixed value. In this embodiment, the preset aging threshold is specifically set to correspond to a lasing wavelength drift that does not exceed a certain value. The change in junction voltage, when the average junction voltage rises above this threshold, has an observable impact on wavelength locking accuracy, and corresponding correction operations need to be performed.

[0051] When the control module determines that device aging has occurred, it calculates the difference between the current average peak junction voltage in the historical observation pool and the earliest stored average peak junction voltage. This difference is identified as the aging voltage offset, triggering an update to the dynamic reference base. After determining that device aging has occurred, the control module prohibits controlling the heater temperature via the drive module based on the increase in the average peak junction voltage. This mechanism specifically prevents the system from misinterpreting the increase in junction voltage caused by aging as a decrease in junction temperature and attempting to send erroneous thermal compensation commands, thus preventing thermal overload and wavelength redshift problems at the source, while retaining normal closed-loop adjustment commands generated based on actual junction temperature changes. The control module adds the aging voltage offset to a preset target wavelength reference voltage threshold for updating, achieving adaptive correction of aging drift.

[0052] The control module configures the preset target wavelength reference voltage threshold or the updated target wavelength reference voltage threshold as the dynamic reference, calculates the deviation between the peak junction voltage latched within each time-gated window and the dynamic reference, and generates the drive signal to control the heater based on this deviation. This logic refactoring completely decouples the deviation calculation and drive signal generation from the occasional aging determination branch, allowing them to run as a globally parallel, normalized basic action. This eliminates the timing deadlock caused by "release before generation" during normal service before aging, ensuring that the authorized release action of the drive signal has a coherent and legitimate physical input source when the ambient temperature changes.

[0053] The control module performs ambient temperature change determination based on the tracked average values ​​of the two parameters. It extracts a first change and a second change, where the first change is the magnitude of the change in the current average peak junction voltage relative to the initial calibration reference value, and the second change is the magnitude of the change in the current average differential resistance relative to the initial calibration reference value. When the first and second changes exceed their respective preset temperature change thresholds, an ambient temperature change is determined, and a drive signal is authorized to be sent to the drive module. Simultaneously, based on the direction of the first and second changes, it is determined whether an ambient cold offset or an ambient hot offset has occurred. In this embodiment, the respective preset temperature change thresholds are independently set according to the different physical dimensions of the peak junction voltage and differential resistance, and are all set to the threshold value when the corresponding junction temperature change exceeds... The electrical parameters of each parameter change at different times. When the fluctuation of the two parameters exceeds their respective preset temperature change thresholds, it can be determined that the junction temperature of the VCSEL has undergone a real environmental temperature change, rather than device aging or random noise.

[0054] When an ambient cold offset is detected (i.e., a decrease in ambient temperature leading to a drop in the junction temperature of the VCSEL's active region, resulting in a blue shift in the lasing wavelength), the control module maintains the current dynamic reference without updating and establishes the authorized drive signal as the basis for controlling the heater to heat up, thereby controlling the heater to perform real-time thermal compensation on the active region to offset the blue shift caused by the decrease in ambient temperature. When an ambient thermal offset is detected (i.e., an increase in ambient temperature leading to an increase in the junction temperature of the active region), the control module similarly maintains the dynamic reference without updating and establishes the authorized drive signal as a power reduction command, reducing the heater's output power to offset the red shift caused by the increase in junction temperature, achieving closed-loop temperature control across the entire temperature range.

[0055] The control module, in conjunction with the drive module, analyzes the authorized release drive signal and extracts the power adjustment parameters corresponding to the deviation. Specifically, the control module is configured with a preset electrothermal mapping rule, which establishes a conversion relationship between the voltage deviation amplitude and the drive current pulse width modulation duty cycle. The specific engineering calibration mechanism is as follows: under benchmark test conditions, the pulse width modulation duty cycle of the heater is gradually adjusted, and heat is injected into the active region through a local heat conduction path. The change amplitude of the peak junction voltage under different duty cycles is recorded simultaneously. The ratio of the adjustment increment of the pulse width modulation duty cycle to the corresponding change amplitude of the peak junction voltage is established as a preset proportional gain coefficient. The control module uses the extracted deviation amplitude as an input variable, performs a direct proportional mapping conversion based on the preset proportional gain coefficient, calculates the corresponding target pulse width modulation duty cycle value, and confirms this target pulse width modulation duty cycle value as the power adjustment parameter. By employing the aforementioned parameterization mechanism based on direct mapping of actual physical conduction efficiency, complex nonlinear floating-point algebraic operations within microsecond-level high-frequency operating cycles are completely avoided, reducing the logic operation load of the control module. This ensures that wavelength compensation control commands under high-frequency narrow-pulse conditions can be issued in real time without delay. Subsequently, the control module drives the heater according to the power adjustment parameter command, enabling the heater to directly perform local heat injection into the active region via a local heat conduction path, thereby synchronously completing in-situ thermal compensation in coordination with the deviation.

[0056] The control module, in conjunction with the drive module, performs cross-cycle preheating control based on the physical thermal response characteristics of the local heat conduction path between the heater and the active region. The physical thermal response time for the heater to inject heat into the active region through the local heat conduction path is typically within [timeframe missing]. to The magnitude is far greater than that of a time-gated window. to The duration of the two differs by more than three orders of magnitude, making transient thermal compensation impossible within a single launch period. Based on this physical characteristic, the control module configures the extracted power adjustment parameters as cross-cycle preheating parameters. At the underlying physical control level, the cross-cycle preheating parameters are explicitly defined as two core constraint variables for injecting preheating energy into the heater: the duration of preheating effectiveness and the aforementioned target pulse width modulation duty cycle value. The engineering calibration principle is to configure the preheating effectiveness duration to precisely cover the available duration of the current standby period, and to use the target pulse width modulation duty cycle value as the core driving control variable. Clearly defining the physical basis and calibration principles of this cross-cycle preheating parameter allows the heating module to overcome the physical thermal conduction delay barrier by smoothly controlling the average heat injection energy during the standby period without changing the VCSEL chip's safe drive peak voltage. This prevents active region thermal breakdown physical failure caused by applying extreme drive voltages for extremely short periods from an engineering perspective. When the current launch period ends and the standby period begins, the command drive module drives the heater according to the cross-cycle preheating parameters to complete the local heat injection of the active region before the next launch period is triggered, so that the active region is pre-fitted to the dynamic reference reference.

[0057] The control module adjusts the cross-cycle preheating parameters based on the updated dynamic reference. The specific logic for this adjustment is as follows: the control module calculates the difference between the updated dynamic reference and the old reference before the update, and identifies this difference as the increase in purely resistive voltage drop caused by device aging (i.e., aging voltage offset). To avoid power dimension conversion errors caused by missing real-time current parameters, the control module is configured with a preset duty cycle compensation mapping coefficient. The engineering calibration of this mapping coefficient is based on: recording the parasitic temperature rise in the active region caused by a unit aging voltage increment under factory constant current test conditions, and simultaneously extracting the heater pulse width modulation duty cycle value that needs to be reduced to offset this temperature rise. The ratio of this reduced duty cycle value to the aging voltage increment is established as the preset duty cycle compensation mapping coefficient.

[0058] In actual operation, the control module directly multiplies the acquired pure resistive voltage drop increment with the preset duty cycle compensation mapping coefficient. Through a dimensionally consistent proportional mapping, the target duty cycle reduction is calculated, and then directly subtracted from the pulse width modulation duty cycle value corresponding to the current cross-cycle preheating parameters. Through this linkage reduction mechanism based on direct parameterized mapping, the system avoids indirect parameter calculation gaps and physical dimension conflicts caused by unknown currents. It accurately isolates non-temperature-related parasitic thermal interference caused by long-term device aging from the engineering level, effectively preventing the control loop from blindly adding ineffective preheating and effectively mitigating the risk of thermal overload physical failure in the core active area at the end of the entire lifecycle.

[0059] During the real-time thermal compensation process of the heater, the control module simultaneously tracks the average value of the differential resistance. When the fluctuation of the average differential resistance recovers to less than the preset stability threshold, it is confirmed that the junction temperature of the active region has stabilized to the target range, the junction temperature fluctuation caused by the change in ambient temperature has been fully compensated, and the average value of the current peak junction voltage still has a fixed deviation from the dynamic reference reference. The control module then identifies this deviation as a concurrent aging voltage offset. The concurrent aging voltage offset is superimposed on the dynamic reference reference to perform an update. Based on the updated dynamic reference reference, the control module is instructed to dynamically adjust the heater to perform closed-loop correction, ensuring that when ambient temperature change and device aging occur simultaneously, the system can still isolate the two influencing factors and maintain the accuracy and stability of wavelength locking.

[0060] This embodiment also provides a VCSEL chip-level wavelength stabilization method with electrical parameter feedback. This method is applied to the wavelength stabilization system described above in this embodiment. It completes the closed-loop stabilization control of the VCSEL wavelength based on the system's hardware architecture and logic configuration. The specific implementation process is as follows.

[0061] The control module listens to the global emission timing signal of the lidar system in real time to determine the current working period of the VCSEL chip, which includes the emission period and the standby period.

[0062] When the control module determines that it is currently in the emission phase, it generates a gating pulse based on the system's emission timing, sets a time-gated window aligned with the flat-top region of the emission pulse, and sends a gating sampling command to the detection module. The detection module receives the gating sampling command, performs sampling only within the time-gated window, blocks sampling signal input outside the time-gated window, captures the peak junction voltage of the VCSEL chip under high-current drive, completes synchronous latching, and transmits the peak junction voltage signal to the control module. The control module receives the peak junction voltage signal, extracts the peak junction voltage captured during the current emission phase, generates a transient self-heating error signal, and stores it in the control module's storage unit, providing a data basis for subsequent cross-cycle heat compensation.

[0063] When the control module determines that it is in standby mode, it sends a probe current configuration command to the drive module to configure the DC bias signal and modulation signal parameters of the probe current, constraining the sum of the amplitudes of the DC bias signal and the modulation signal to be lower than a preset lasing threshold. The drive module receives the probe current configuration command and injects the constrained probe current into the VCSEL chip. The detection module captures the voltage response of the VCSEL chip synchronized with the modulation signal and transmits the voltage response signal to the control module. The control module receives the voltage response signal and, based on the correspondence between the amplitude of the modulation signal and the voltage response amplitude of the probe current, calculates the differential resistance of the VCSEL chip and stores it in the control module's storage unit, providing a data basis for junction temperature monitoring and operating condition determination.

[0064] The control module constructs a historical observation pool, storing the average peak junction voltage and average differential resistance obtained periodically through a downsampling mechanism in a time-series format. It updates the data in the historical observation pool based on a sliding window mechanism covering long-term aging timescales, continuously tracking and updating the average peak junction voltage and average differential resistance. Combined with... Figure 1 As shown, the control module retrieves the updated average peak junction voltage and average differential resistance, compares them with preset threshold parameters, and performs a condition status determination. In the determination process, the system first checks whether the fluctuation of the average differential resistance is less than the stability threshold, and if the condition is met, triggers a secondary check to determine whether the rise of the average peak junction voltage exceeds the aging threshold. If the preconditions are not met or the aging determination is not triggered, the system proceeds to the verification branch to check whether the fluctuations of the peak junction voltage and the differential resistance both exceed their respective temperature change thresholds. When all branch conditions are mismatched, the logic link forces a return to the initial step of obtaining the peak junction voltage and differential resistance. When the control module determines that the fluctuation of the average differential resistance is less than the preset stability threshold and the rise of the average peak junction voltage exceeds the preset aging threshold, it confirms that device aging has occurred, calculates the difference between the current average peak junction voltage in the historical observation pool and the earliest stored average peak junction voltage, and confirms it as the aging voltage offset. The control module prohibits the heater from being heated by the drive module based on the average value of the peak junction voltage. Instead, it updates the aging voltage offset by adding it to the preset target wavelength reference voltage threshold and stores it in the storage unit.

[0065] The control module configures a preset target wavelength reference voltage threshold or an updated target wavelength reference voltage threshold as a dynamic reference. It calculates the deviation between the peak junction voltage latched within each time-gated window and the dynamic reference, and generates a drive signal to control the heater based on this deviation. This logic eliminates the risk of deadlock caused by the lack of an aging trigger signal under normal operating conditions, ensuring the continuity of the control command release process and the availability of the real physical input source when the ambient temperature changes.

[0066] When the control module determines that the average fluctuation of the peak junction voltage and the average fluctuation of the differential resistance exceed their respective preset temperature change thresholds, it confirms an ambient temperature change, authorizes the release of the drive signal to the drive module, and extracts the first and second changes. Based on the direction of the average fluctuation change, it determines whether an ambient cold offset or an ambient hot offset has occurred. The current dynamic reference benchmark is maintained without updating. When an ambient cold offset occurs, the authorized release of the drive signal is established as the control basis for driving the heater to heat up.

[0067] The control module, in conjunction with the drive module, analyzes the drive signal and extracts the power adjustment parameters corresponding to the deviation. Specifically, based on a preset electrothermal mapping rule, the magnitude of the deviation is directly proportionally mapped and converted using a preset proportional gain coefficient to obtain the target pulse width modulation duty cycle value, which is then confirmed as the power adjustment parameter. Considering the heater's thermal response characteristics, the power adjustment parameter is configured as a cross-cycle preheating parameter constrained by both the preheating duration and the target pulse width modulation duty cycle value. Based on the cross-cycle preheating parameter, the drive module outputs a matching drive current to the heater during the current standby period, driving the heater to perform localized heat injection into the active region of the VCSEL chip. Before triggering the next emitter cycle, thermal compensation is completed, ensuring the active region junction temperature is pre-fitted to the dynamic reference.

[0068] Meanwhile, the control module adjusts the cross-cycle preheating parameters in conjunction with the updated dynamic reference benchmark. This involves directly multiplying the difference in the dynamic reference benchmark by the preset duty cycle compensation mapping coefficient, obtaining the target duty cycle reduction amount through dimensional self-consistent conversion, and then directly deducting it from the pulse width modulation duty cycle value corresponding to the cross-cycle preheating parameters.

[0069] During ambient temperature compensation, the control module synchronously tracks the average change of the differential resistance, compares it with the preset stability threshold, and confirms the stable state of the junction temperature. When the control module determines that the average fluctuation of the differential resistance has recovered to below the preset stability threshold, and that the average value of the current peak junction voltage deviates from the dynamic reference, this deviation is identified as a concurrent aging voltage offset. The control module adds the concurrent aging voltage offset to the dynamic reference, completing the reference update. Based on the updated dynamic reference, the control module dynamically adjusts the heater's output power, performs closed-loop correction, and achieves stable VCSEL wavelength control across all operating conditions and the entire lifespan.

[0070] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A VCSEL chip-level wavelength stabilization system with electrical parameter feedback, characterized in that, The device includes a VCSEL chip with an integrated heater, and a detection module, a control module, and a drive module connected in sequence; the drive module is connected to the VCSEL chip and the heater respectively; the VCSEL chip includes an emission period and a standby period; The control module is configured as follows: During the emission period, a time-gated window is set, and the peak junction voltage of the VCSEL chip is captured by the detection module. During the standby period, the driving module is instructed to inject a probe current lower than the preset lasing threshold into the VCSEL chip, and the differential resistance of the VCSEL chip is extracted by the detection module. Track the average value of the peak junction voltage and the average value of the differential resistance; when the average value of the differential resistance fluctuates less than a preset stability threshold and the average value of the peak junction voltage rises above a preset aging threshold, device aging is determined to have occurred and the aging voltage offset is obtained. Once device aging is determined, the heating of the heater is prevented from being controlled by the drive module based on the average value of the peak junction voltage. Instead, the aging voltage offset is superimposed on the preset target wavelength reference voltage threshold for updating, thereby controlling the heater.

2. The system according to claim 1, characterized in that, The control module is further configured as follows: During the transmission period, the detection module is restricted to capturing the peak junction voltage only within the time-gated window, and sampling signal input outside the time-gated window is blocked. Extract the peak junction voltage captured during the current emission period to generate a transient self-heating error signal; The transient self-heating error signal is used as a reserved compensation parameter. In the subsequent standby period, the differential resistor is combined with the preset basic heat preservation power of the heater to perform cross-cycle heat compensation.

3. The system according to claim 2, characterized in that, The control module, in conjunction with the detection module, is further configured as follows: During the emission period, a gating pulse is generated according to the system emission timing to define the time gating window and trigger synchronous latching of the peak junction voltage; During the standby period, the probe current is configured to include a DC bias signal and a modulation signal, and the sum of the amplitudes of the DC bias signal and the modulation signal is constrained to be lower than the preset lasing threshold. The driving module is instructed to inject the constrained probe current into the VCSEL chip, and the detection module extracts the captured voltage response synchronized with the modulation signal to calculate the differential resistance.

4. The system according to claim 3, characterized in that, The control module is further configured as follows: Configure the preset target wavelength reference voltage threshold or the updated target wavelength reference voltage threshold as a dynamic reference reference. The deviation between the peak junction voltage latched within the time-gated window and the dynamic reference is calculated, and a drive signal for controlling the heater is generated based on the deviation. When the average fluctuation of the tracked differential resistance and the average fluctuation of the peak junction voltage exceed their respective preset temperature change thresholds, it is determined that an ambient temperature change has occurred, and the drive signal is authorized to be sent to the drive module.

5. The system according to claim 4, characterized in that, The VCSEL chip includes an active region, and the heater is integrated in situ inside the VCSEL chip, establishing a local heat conduction path with the active region; The control module, in conjunction with the drive module, is further configured as follows: Analyze the drive signal and extract the power adjustment parameters corresponding to the deviation. According to the power adjustment parameters, the drive module drives the heater, so that the heater directly performs local heat injection on the active area through the local heat conduction path, so as to complete in-situ heat compensation in sync with the deviation.

6. The system according to claim 5, characterized in that, The control module, in conjunction with the drive module, is further configured as follows: Based on the fact that the physical thermal response time of the local heat conduction path is greater than the duration of the time-gated window, the extracted power adjustment parameters are configured as cross-cycle preheating parameters. When the current launch period ends and the standby period begins, the drive module is instructed to drive the heater according to the cross-cycle preheating parameters. Before the next launch period is triggered, the localized heat injection of the active region is completed so that the active region is pre-fitted to the dynamic reference reference.

7. The system according to claim 6, characterized in that, The control module is further configured as follows: Construct a historical observation pool to store the average value of the peak junction voltage and the average value of the differential resistance tracked in time series. When it is determined that the device has aged, the difference between the average value of the current peak junction voltage in the historical observation pool and the average value of the earliest stored peak junction voltage is calculated. The difference is identified as the aging voltage offset to trigger an update to the dynamic reference base; The cross-cycle preheating parameters are adjusted in conjunction with the updated dynamic reference benchmark to regulate the local heat injection performed into the active region.

8. The system according to claim 7, characterized in that, The control module is further configured as follows: Extract the first change in the mean of the peak junction voltage and the second change in the mean of the differential resistance in the historical observation pool, respectively. When the first change and the second change exceed their respective preset temperature change thresholds and thus the change in ambient temperature is determined to have occurred, the direction of change of the first change and the second change is used to determine whether the ambient cold shift or the ambient heat shift has occurred. When the environmental cold offset is determined to occur, the current dynamic reference benchmark is maintained without being updated, and the authorized release drive signal is established as the control basis for driving the heater to heat up, so as to control the heater to perform real-time thermal compensation to the active area.

9. The system according to claim 8, characterized in that, The control module is further configured as follows: During the process of controlling the heater to perform the real-time thermal compensation, the average value of the differential resistance is tracked simultaneously; When the average fluctuation of the differential resistor recovers to less than the preset stable threshold, and the average value of the current peak junction voltage deviates from the dynamic reference, the deviation is identified as a concurrent aging voltage offset. The concurrent aging voltage offsets are superimposed on the dynamic reference base to perform the update; Based on the updated dynamic reference benchmark, the drive module is instructed to dynamically adjust the heater to perform closed-loop correction.

10. A VCSEL chip-level wavelength stabilization method based on electrical parameter feedback, characterized in that, Applied to the system according to any one of claims 1 to 9, the method comprises the following steps: During the emission period, a time-gated window is set, and the peak junction voltage of the VCSEL chip is captured by the detection module. During the standby period, the driving module is instructed to inject a probe current lower than the preset lasing threshold into the VCSEL chip, and the differential resistance of the VCSEL chip is extracted by the detection module. Track the average value of the peak junction voltage and the average value of the differential resistance; when the average value of the differential resistance fluctuates less than a preset stability threshold and the average value of the peak junction voltage rises above a preset aging threshold, device aging is determined to have occurred and the aging voltage offset is obtained. Once device aging is determined, the heating of the heater is prevented from being controlled by the drive module based on the average value of the peak junction voltage. Instead, the aging voltage offset is superimposed on the preset target wavelength reference voltage threshold for updating, thereby controlling the heater.

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