Buried heterostructure laser epitaxial wafer, method for manufacturing the same and laser

Abstract

The application relates to the field of semiconductor lasers, in particular to a buried heterojunction laser epitaxial wafer and a preparation method and a laser thereof. The buried heterojunction laser epitaxial wafer comprises a substrate, a first conductive layer, an active layer, a first barrier layer, a potential barrier layer, a second barrier layer and a second conductive layer. The first conductive layer is centrally raised on the substrate, and the active layer covered on the top of the first conductive layer forms a boss structure together with the first conductive layer, and groove walls are formed on both sides. The groove walls on both sides cover a P-type semiconductor to form the first barrier layer, and the outer side of the first barrier layer is sequentially covered with a potential barrier layer of a non-intended or light N-type doped semiconductor material with a wider band gap and a second barrier layer of an N-type semiconductor material. The P-type semiconductor covers the surfaces of the active layer and the second barrier layer away from the substrate to form the second conductive layer. The width of the depletion region of the second barrier layer is increased through the potential barrier layer, so that the risk of electric leakage is reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor lasers, and particularly to a buried heterojunction laser epitaxial wafer, its fabrication method, and the laser itself. Background Technology

[0002] Please see Figure 1 Buried heterojunction lasers are a commonly used laser structure. Their active layers are vertically connected to both P-type and N-type semiconductors, with forward-biased PN junctions reducing carrier losses. Simultaneously, reverse-biased PN junctions are placed on both sides of the active layer to limit lateral current, thus strictly confining carriers within the active layer and achieving low threshold current and stable fundamental mode output. However, with increasing injection current, these lasers are highly susceptible to current blocking breakdown, manifesting as a sudden drop in output power, abrupt changes in operating voltage, and severe degradation of device performance.

[0003] Research and analysis revealed that this failure primarily stems from a so-called "diode leakage path." In buried heterojunction lasers, the possible current paths mainly include L1, L2, and L3. L1 passes through the active layer and is the operating path. L3 passes through the reverse-biased PN junction and is strictly restricted, making current flow difficult. L2, the diode leakage path, relies mainly on the depletion region of the reverse-biased PN junction for blocking. As shown in the diagram, the physical channel of this path is located in the connection region between the lateral and vertical P-type semiconductor layers. With the width of the connection region defined as W, under normal operating conditions, the depletion region of the reverse-biased PN junction is larger than W. The connection region is completely covered by the depletion region of the lateral reverse-biased PN junction, exhibiting near-insulation, effectively preventing leakage. However, when the forward bias voltage of the device increases with the injection current, the depletion region of the aforementioned reverse bias PN junction will shrink due to the influence of the adjacent forward bias PN junction. When its width shrinks to less than W and the connection region cannot be blocked, the lateral P-type semiconductor layer and the vertical P-type semiconductor layer become electrically connected, the diode leakage path is opened, and a large number of charge carriers bypass the active region and flow directly to the substrate, resulting in severe leakage of the device.

[0004] Traditional methods to suppress leakage current include reducing the width of the interconnect region or lowering the doping concentration of the lateral N-type semiconductor layer. However, due to limitations in photolithography and etching processes, it is difficult to significantly reduce the width of the interconnect region, while excessively low doping concentrations increase series resistance, affecting the high-speed characteristics and power efficiency of the device. Therefore, a new solution is needed that can effectively suppress leakage current without significantly increasing process complexity or sacrificing other performance aspects. Summary of the Invention

[0005] The purpose of this invention is to provide a buried heterojunction laser epitaxial wafer capable of suppressing leakage current problems, its preparation method, and the laser itself.

[0006] To achieve the above objectives, the present invention provides the following technical solution: A buried heterojunction laser epitaxial wafer includes: Substrate; A first conductive layer is formed protruding on the surface of the substrate, and the position of its end face away from the substrate corresponds to the middle of the substrate along a first direction. The composition of the first conductive layer is an N-type semiconductor. An active layer is formed on the end face of the first conductive layer, and together with the first conductive layer, forms a boss structure. A first barrier layer is formed on two sides of the boss structure along the first direction, and the composition of the first barrier layer is a P-type semiconductor. The second barrier layer is formed on the side of the first barrier layer away from the first conductive layer and is separated from the substrate and the first conductive layer. The two ends of the second barrier layer and the first barrier layer are at the same position in the first direction. The composition of the second barrier layer is an N-type semiconductor. A barrier layer is formed between the first barrier layer and the second barrier layer, and the end of the barrier layer near the active layer is close to the end of the first barrier layer near the active layer in the first direction. The barrier layer is composed of unintentionally doped or lightly N-type doped semiconductor material, and its band gap is greater than the band gap of the first barrier layer and greater than the band gap of the second barrier layer. A second conductive layer covers the surface of the active layer and the second barrier layer away from the substrate, and the second conductive layer is composed of a P-type semiconductor.

[0007] Optionally, the first barrier layer is composed of P-InP, the second barrier layer is composed of N-InP, and the barrier layer is composed of one or more of InAIAs semiconductor, InGaP semiconductor, and AlAs semiconductor.

[0008] Optionally, the composition of the barrier layer is In 0.52 Al 0.48 As.

[0009] Optionally, the thickness of the first barrier layer is any value between 0.4 μm and 1 μm, and the doping concentration is approximately 0.1 × 10⁻⁶. 18 atoms / cm 3 ~2×10 18 atoms / cm 3The thickness of the second barrier layer is any value between 0.8 μm and 1.5 μm, and the doping concentration is approximately 0.3 × 10⁻⁶. 18 atoms / cm 3 ~3×10 18 atoms / cm 3 Any value in the range.

[0010] Optionally, the thickness of the barrier layer is any value between 10 nm and 100 nm, and the doping concentration of the barrier layer is less than or equal to 1 × 10⁻⁶. 17 atoms / cm 3 .

[0011] Optionally, the width of the active layer in the first direction is any value between 1 μm and 3 μm.

[0012] Optionally, the first conductive layer is composed of N-InP, with a thickness of any value between 0.5 μm and 3 μm, and a doping concentration of approximately 0.5 × 10⁻⁶. 18 atoms / cm 3 ~2×10 18 atoms / cm 3 The second conductive layer has a composition of P-InP, a thickness of 0.5 μm to 3 μm, and a doping concentration of approximately 1 × 10⁻⁶. 18 atoms / cm 3 ~3×10 18 atoms / cm 3 Any value in the range.

[0013] Optionally, the barrier layer completely covers the surface of the first barrier layer away from the first conductive layer.

[0014] Secondly, the present invention also provides a method for preparing the above-mentioned buried heterojunction laser epitaxial wafer, comprising: Prepare the substrate; A buffer layer is deposited on the surface of the substrate; A quantum well layer is deposited on the surface of the buffer layer away from the substrate; A pre-deposited layer is deposited on the surface of the quantum well layer away from the substrate; The active region of the pre-deposited layer away from the substrate is covered by a mask and etched. The active region corresponds to the middle region of the substrate along the first direction. After etching, the buffer layer is transformed into the first conductive layer, the quantum well layer is transformed into the active layer, and the pre-deposited layer is transformed into a transition layer. While maintaining the position of the mask, the first barrier layer is deposited on both sides of the active region to form the first barrier layer; While maintaining the position of the mask, the barrier layer is deposited on the surface of the first barrier layer to form the potential barrier layer; While maintaining the position of the mask, a second barrier layer is deposited to form covering the barrier layer; The mask is removed, and a cladding layer is deposited to cover the transition layer and the second barrier layer. The cladding layer and the transition layer together form the second conductive layer.

[0015] Thirdly, the present invention also provides a laser, characterized in that it includes the above-mentioned buried heterojunction laser epitaxial wafer.

[0016] The beneficial effects of this invention are as follows: A wide bandgap barrier layer is set between the first and second barrier layers, simultaneously forming a PN junction with adjacent P-type and N-type semiconductors. Due to the wide bandgap of the barrier layer and its undoped or very lightly N-type doping, its intrinsic carrier concentration is extremely low, resulting in a significant increase in the local built-in potential. With the increase in built-in potential and the decrease in carrier concentration, the width of the depletion region increases substantially after the introduction of the barrier layer. Furthermore, due to the increased built-in potential, even if the injection current increases, leading to an increase in local bias, the net difference between the two remains large, preventing the depletion region from shrinking and ensuring coverage of the connection region. The high barrier layer further hinders the flow of carriers from the first barrier layer to the second barrier layer via the interface. Moreover, the intrinsic carrier concentration of the wide bandgap material is less affected by temperature, resulting in slower barrier degradation at high temperatures and improved high-temperature operational reliability. The buried heterojunction laser epitaxial wafer in this invention represents a relatively minor improvement over existing commonly used structures, requiring no significant changes to process parameters and fabrication methods, and exhibits good process compatibility. Since the barrier layer is located at the barrier of the reverse bias PN junction and is very thin, its impact on the device's forward operating voltage and modulation bandwidth is negligible, which helps to ensure the device's performance.

[0017] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of a buried heterojunction laser epitaxial wafer in the prior art. Figure 2 This is a flowchart illustrating the fabrication method of a buried heterojunction laser epitaxial wafer according to Embodiment 1 of the present invention. Figure 3 This is a schematic diagram of the structure of the buried heterojunction laser epitaxial wafer shown in Embodiment 1 of the present invention; Figure 4 This is a performance testing diagram of the laser shown in Embodiment 1 of the present invention; Figure 5 This is a schematic diagram of the structure of the buried heterojunction laser epitaxial wafer shown in Embodiment 2 of the present invention; Figure 6 This is a performance testing diagram of the laser shown in Comparative Example 1 of the present invention.

[0019] Legend: 1-Substrate, 2-First conductive layer, 3-Active layer, 4-First barrier layer, 5-Barrier layer, 6-Second barrier layer, 7-Second conductive layer, 71-Transition layer, 72-Clad layer, 8-Contact layer. Detailed Implementation

[0020] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0022] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0023] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0024] The buried heterojunction laser epitaxial wafer protected by this invention includes a substrate 1, a first conductive layer 2, an active layer 3, a first barrier layer 4, a barrier layer 5, a second barrier layer 6, and a second conductive layer 7. A first direction, a second direction, and a third direction are mutually perpendicular, and the substrate 1 is disposed parallel to the first and second directions. The first conductive layer 2 protrudes from the surface of the substrate 1, and an end face is formed at its end away from the substrate 1. The end face corresponds to the middle position of the substrate 1 in the first direction. The first conductive layer 2 is composed of an N-type semiconductor. The active layer 3 is formed on the end face of the first conductive layer 2, forming a boss structure together with the first conductive layer 2. The boss structure has two side faces along both sides of the first direction, and two first barrier layers 4 are respectively formed on the two side faces of the boss structure. The first barrier layers 4 are composed of a P-type semiconductor, and extend along both sides of the first direction to the active layer 3 and the edge of the substrate 1 in the first direction, respectively. The second barrier layer 6, composed of an N-type semiconductor, is formed on the side of the first barrier layer 4 away from the first conductive layer 2, and its two edges along the first direction correspond to each other, thus separating it from the substrate 1 and the first conductive layer 2. A barrier layer 5 is formed between the first barrier layer 4 and the second barrier layer 6, with its end near the active layer 3 positioned close to the ends of the first barrier layer 4 and the second barrier layer 6 near the active layer 3 in the first direction. The barrier layer 5 is composed of an unintentionally doped or lightly n-type doped semiconductor material, and its bandgap is greater than that of the first barrier layer 4 and also greater than that of the second barrier layer 6. The second conductive layer 7 covers the surfaces of the active layer 3 and the second barrier layer 6 away from the substrate 1, and the second conductive layer 7 is composed of a P-type semiconductor.

[0025] A wide bandgap barrier layer 5 is disposed between the first barrier layer 4 and the second barrier layer 6, forming a PN junction with adjacent P-type and N-type semiconductors. Due to the wide bandgap of barrier layer 5 and its undoped or very lightly N-type doping, its intrinsic carrier concentration is extremely low, resulting in a significant increase in the local built-in potential. The increase in built-in potential and decrease in carrier concentration lead to a substantial increase in the width of the depletion region after the introduction of barrier layer 5. Furthermore, due to the increased built-in potential, even if the injection current increases, leading to a rise in local bias, the net difference between the two remains large, preventing the depletion region from shrinking and ensuring coverage of the connection region. The high barrier of barrier layer 5 further hinders carrier flow from the first barrier layer 4 to the second barrier layer 6 via the interface. Moreover, the intrinsic carrier concentration of the wide bandgap material is less affected by temperature, resulting in slower barrier degradation at high temperatures and improved high-temperature operational reliability. The buried heterojunction laser epitaxial wafer in this invention represents a relatively minor improvement over existing commonly used structures, requiring no significant changes to process parameters and fabrication methods, and exhibits good process compatibility. Since the barrier layer 5 is located at the barrier of the reverse-biased PN junction and is very thin, its impact on the device's forward operating voltage and modulation bandwidth is negligible, helping to ensure device performance.

[0026] In some embodiments, the first barrier layer 4 is composed of P-InP, the second barrier layer 6 is composed of N-InP, and the barrier layer 5 is composed of one or more of InAlAs, InGaP, and AlAs semiconductors. InP is a commonly used semiconductor material in lasers. InAlAs, InGaP, and AlAs semiconductors all have high lattice compatibility with InP. Using InAlAs as the barrier layer 5 grown on the surface of the N-InP second barrier layer 6 helps reduce lattice defects. In addition, since the conduction and valence band levels of InAlAs are compatible with InP, it can form an effective barrier against electrons and holes in InP, which helps to improve the obstruction of lateral carrier flow. Therefore, the material of the barrier layer 5 is preferably InAlAs.

[0027] In some embodiments, the composition of barrier layer 5 is In 0.52 Al 0.48 As further improves its lattice compatibility with InP, making it easier to form a high-quality barrier layer 5.

[0028] In some embodiments, the thickness of the first barrier layer 4 is any value between 0.4 μm and 1 μm, for example, any value among 0.4 μm, 0.6 μm, 0.8 μm, and 1 μm, and the doping concentration is approximately 0.1 × 10⁻⁶. 18 atoms / cm 3 ~2×10 18 atoms / cm 3 Any value in it, for example, can be 0.1 × 10 18 atoms / cm 3 0.5×10 18 atoms / cm 3 1×10 18 atoms / cm 3 1.5×10 18 atoms / cm 3 and 2×10 18 atoms / cm 3 The thickness of the second barrier layer 6 is any value from 0.8 μm to 1.5 μm, for example, any value from 0.8 μm, 1 μm, 1.2 μm, 1.4 μm, and 1.5 μm, with a doping concentration of approximately 0.3 × 10⁻⁶. 18 atoms / cm 3 ~3×10 18 atoms / cm 3 Any value in it, for example, can be 0.3 × 10 18 atoms / cm 3 0.9×10 18atoms / cm 3 1.5×10 18 atoms / cm 3 2×10 18 atoms / cm 3 and 3×10 18 atoms / cm 3 Any value in the range.

[0029] In some embodiments, the thickness of the barrier layer 5 is any value from 10 nm to 100 nm, for example, any value from 10 nm, 30 nm, 50 nm, and 100 nm, and the doping concentration of the barrier layer 5 is less than or equal to 1 × 10⁻⁶. 17 atoms / cm 3 For example, it can be 5×10 15 atoms / cm 3 1×10 16 atoms / cm 3 5×10 16 atoms / cm 3 and 1×10 17 atoms / cm 3 Any value in the range.

[0030] In some embodiments, the width of the active layer 3 in the first direction is any value between 1 μm and 3 μm, for example, any value among 1 μm, 1.5 μm, 2 μm, 2.5 μm and 3 μm.

[0031] In some embodiments, the first conductive layer 2 is composed of N-InP, and its thickness is any value from 0.5 μm to 3 μm, for example, any value among 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, and 3 μm, with a doping concentration of approximately 0.5 × 10⁻⁶. 18 atoms / cm 3 ~2×10 18 atoms / cm 3 Any value in it, for example, can be 0.5 × 10 18 atoms / cm 3 1×10 18 atoms / cm 3 1.5×10 18 atoms / cm 3 and 2×10 18 atoms / cm 3 The composition of the second conductive layer 7 is P-InP, and the thickness is any value from 0.5 μm to 3 μm, for example, any value from 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, and 3 μm, with a doping concentration of approximately 1 × 10⁻⁶.18 atoms / cm 3 ~3×10 18 atoms / cm 3 Any value in, for example, can be 1×10 18 atoms / cm 3 1.5×10 18 atoms / cm 3 2×10 18 atoms / cm 3 2.5×10 18 atoms / cm 3 and 3×10 18 atoms / cm 3 Any value in the range.

[0032] In some embodiments, the barrier layer 5 completely covers the surface of the first blocking layer 4 away from the first conductive layer 2, which is relatively simple in process and has a good lateral current blocking effect and depletion region expansion effect.

[0033] Secondly, the present invention also provides a method for preparing the above-mentioned buried heterojunction laser epitaxial wafer, comprising: S1. Prepare substrate 1.

[0034] S2. A buffer layer is deposited on the surface of substrate 1 to form a buffer layer.

[0035] S3. A quantum well layer is deposited on the surface of the buffer layer away from the substrate 1.

[0036] S4. A pre-deposited layer is formed on the surface of the quantum well layer away from the substrate 1.

[0037] S5. Cover the active region of the pre-deposited layer away from the substrate 1 with a mask and etch it. The active region corresponds to the middle region of the substrate 1 along the first direction. After etching, the buffer layer is transformed into the first conductive layer 2, the quantum well layer is transformed into the active layer 3, and the pre-deposited layer is transformed into the transition layer 71.

[0038] S6. Maintain the position of the mask and deposit the first barrier layer 4 on both sides of the active region.

[0039] S7. Maintaining the position of the mask, deposit a barrier layer 5 on the surface of the first barrier layer 4.

[0040] S8. Maintain the position of the mask and deposit a second barrier layer 6 to cover the barrier layer 5.

[0041] S9. Remove the mask and deposit a cladding 72 covering the transition layer 71 and the second barrier layer 6. The cladding 72 and the transition layer 71 together form the second conductive layer 7.

[0042] Improving the performance of buried heterojunction laser epitaxial wafers with relatively minor process modifications requires no significant adjustments to the fabrication process, making it highly practical.

[0043] Thirdly, the present invention also provides a laser, characterized in that it includes the above-mentioned buried heterojunction laser epitaxial wafer.

[0044] Lasers fabricated based on the epitaxial wafers of this invention can significantly increase the width of the depletion region, enabling the device to operate stably at higher injection currents, eliminating the phenomenon of sudden drops in optical power, and also helping to improve the device's high-temperature tolerance.

[0045] Example 1: Please see Figure 2 and Figure 3 The method for fabricating a buried heterojunction laser epitaxial wafer according to a preferred embodiment of this application includes: S1. Prepare substrate 1.

[0046] S2. A buffer layer is deposited on the surface of substrate 1 to form a buffer layer.

[0047] S3. A quantum well layer is deposited on the surface of the buffer layer away from the substrate 1.

[0048] S4. A pre-deposited layer is formed on the surface of the quantum well layer away from the substrate 1.

[0049] S5. Cover the active region of the pre-deposited layer away from the substrate 1 with a mask and etch it. The active region corresponds to the middle region of the substrate 1 along the first direction. After etching, the buffer layer is transformed into the first conductive layer 2, the quantum well layer is transformed into the active layer 3, and the pre-deposited layer is transformed into the transition layer 71.

[0050] S6. Maintain the position of the mask and deposit the first barrier layer 4 on both sides of the active region.

[0051] S7. Maintaining the position of the mask, deposit a barrier layer 5 on the surface of the first barrier layer 4.

[0052] S8. Maintain the position of the mask and deposit a second barrier layer 6 to cover the barrier layer 5.

[0053] S9. Remove the mask and deposit a cladding 72 covering the transition layer 71 and the second barrier layer 6. The cladding 72 and the transition layer 71 together form the second conductive layer 7.

[0054] In step S1, an N-type doped InP substrate 1 is selected and its surface is treated. The substrate 1 is placed parallel to a first and a second direction that are perpendicular to each other, and perpendicular to a third direction.

[0055] In step S2, an N-InP buffer layer is grown on the surface of substrate 1, with a deposition thickness of 2 μm and a doping concentration of 1 × 10⁻⁶. 18 atoms / cm 3 .

[0056] In step S3, a quantum well layer is grown on the surface of the buffer layer. The quantum well layer comprises multiple stacked InGaAsP well layers and InGaAsP barrier layers.

[0057] In step S4, a pre-deposited P-InP layer is grown on the surface of the quantum well layer. This facilitates the subsequent deposition of the cladding layer 72 and helps ensure that the first barrier layer 4 completely covers the sides of the active layer 3, while also preventing the quantum well layer from being exposed. The deposition thickness is set to 0.2 μm, and the doping concentration is 2 × 10⁻⁶. 18 atoms / cm 3 .

[0058] Step S5 includes: S511. A hard silicon dioxide film with a thickness of about 0.5 μm is deposited on the surface of the pre-deposited layer by plasma-enhanced chemical vapor deposition (PECVD).

[0059] S512. Spin-coat photoresist onto the silicon dioxide film surface and pre-bake to remove the solvent. Then remove excess photoresist by ultraviolet lithography, exposure, and development, retaining only the portion corresponding to the active region. The active region corresponds to the middle position of substrate 1 along the first direction and extends to the edge of substrate 1 along the second direction. The length of the active region in the first direction is 2 μm.

[0060] S513. Remove the photoresist-free area of ​​the silicon dioxide film by plasma dry etching, and remove the remaining photoresist by wet photoresist removal to obtain a mask corresponding to the active area.

[0061] S521. Rapidly etch the pre-deposited layer to the position adjacent to the quantum well layer using plasma dry etching.

[0062] S522. Each layer is selectively etched using a highly selective etching solution to ultimately form a mesa trench structure, exposing part of the upper surface of substrate 1.

[0063] S523. The sidewalls of the mesa trench structure are modified using a non-selective wet process to obtain smooth mesa sidewalls. At this time, the buffer layer is transformed into the first conductive layer 2, the quantum well layer is transformed into the active layer 3, and the pre-deposited layer is transformed into the transition layer 71.

[0064] In step S6, a first barrier layer 4 of P-InP material is deposited on the smooth mesa sidewall surface by metal-organic chemical vapor deposition (MOCVD), with a deposition thickness of 0.8 μm and a doping concentration of 0.7 × 10⁻⁶.18 atoms / cm 3 The outer edge of the first barrier layer 4 extends to the edge of the substrate 1 in the first direction, thereby ensuring that the subsequently deposited second barrier layer 6 is completely separated from the substrate 1 and the first conductive layer 2.

[0065] In step S7, unintentionally doped In is deposited on the surface of the first barrier layer 4 by metal-organic chemical vapor deposition (MOCVD). 0.52 Al 0.48 The barrier layer 5 is made of As semiconductor material. The thickness of barrier layer 5 is 20 nm, and its doping concentration is 5 × 10⁻⁶, as determined by electrochemical capacitance-voltage (ECV) method. 16 atoms / cm 3 The barrier layer 5 completely covers the surface of the first barrier layer 4. At this time, the end of the barrier layer 5 near the active layer 3 is attached to the end of the first barrier layer 4 near the active layer 3, resulting in the edge of the connection area between the first barrier layer 4 and the transition layer 71 being attached to the barrier layer 5. This ensures that the effect of the barrier layer 5 in increasing and stabilizing the depletion region is accurately applied to the connection area, thereby reducing the risk of leakage caused by electrical connection between the first barrier layer 4 and the second conductive layer 7 through the connection area.

[0066] In step S8, a second N-InP barrier layer 6 is deposited on the surface of the barrier layer 5 by metal-organic chemical vapor deposition (MOCVD), with a deposition thickness of 1.2 μm and a doping concentration of 1.5 × 10⁻⁶. 18 atoms / cm 3 The second barrier layer 6 completely covers the surface of the barrier layer 5, completely separating it from the subsequently deposited cladding layer 72, thereby ensuring that the first barrier layer 4 and the second conductive layer 7 are physically connected only through the connection region and separated from each other at the positions corresponding to the two sides of the substrate 1 along the first direction.

[0067] In step S9, after wet immersion mask removal, cleaning, and drying, a cladding layer 72 is deposited by metal-organic chemical vapor deposition (MOCVD) to cover the transition layer 71 and the second barrier layer 6, and is attached to the first barrier layer 4 and the barrier layer 5. The cladding layer 72 is made of the same material as the transition layer 71 and is integrated with the transition layer 71 after deposition to form the second conductive layer 7. The second conductive layer 7, together with the first conductive layer 2, the first barrier layer 4, the barrier layer 5, and the second barrier layer 6, encapsulates the active layer 3. The thickness of the second conductive layer 7 from the active layer 3 to the end away from the substrate 1 is 2 μm, similar to that of the first conductive layer 2.

[0068] In this embodiment, after the deposition of the second conductive layer 7 is completed, a contact layer 8 made of InGaAs is also deposited on its surface away from the substrate 1 to obtain a buried heterojunction laser epitaxial wafer.

[0069] The buried heterojunction laser epitaxial wafer obtained is used to fabricate a laser using chip technology. Chip technology includes passivation layer etching and windowing, P-electrode evaporation and lift-off annealing, N-face grinding and thinning, N-metal evaporation and annealing, bar cleavage, end face optical coating, cavity surface cleavage, etc., which will not be elaborated here.

[0070] Adjust the injection current and measure the laser's forward voltage and output laser power to assess its performance. See the test results below. Figure 4 It can be seen that the laser in this embodiment can withstand a high forward voltage.

[0071] Example 2: Please see Figure 3 and Figure 5 The only difference between this embodiment and Embodiment 1 is that the barrier layer 5 in this embodiment is prepared by selective region epitaxy and only covers the end of the first barrier layer 4 near the active layer 3. The second barrier layer 6 is grown on the surface of the barrier layer 5 and part of the surface of the first barrier layer 4.

[0072] Comparative Example 1: The only difference between this comparative example and Example 1 is that the barrier layer 5 is not provided, and the second barrier layer 6 is grown on the surface of the first barrier layer 4.

[0073] The performance of the laser obtained in this comparative example was tested. Please refer to the test results for details. Figure 6 .contrast Figure 4 and Figure 6 It can be seen that setting barrier layer 5 can effectively improve the extreme value of the tolerable forward voltage, suppress leakage current problems, and has little impact on the forward operating voltage and modulation bandwidth of the laser.

[0074] The beneficial effects of this invention are as follows: it improves the tolerance of buried heterojunction lasers to higher forward bias voltages using simple processes and readily available materials, thereby suppressing leakage current problems. The high-temperature resistance of the laser is improved by adding a barrier layer. The fabrication process is easy to optimize and has almost no impact on the laser's forward operating voltage and modulation bandwidth, making it highly practical.

[0075] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0076] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A buried heterojunction laser epitaxial wafer, characterized in that, include: Substrate (1); A first conductive layer (2) is formed protruding on the surface of the substrate (1), and the position of its end face away from the substrate (1) corresponds to the middle part of the substrate (1) along the first direction. The composition of the first conductive layer (2) is N-type semiconductor. An active layer (3) is formed on the end face of the first conductive layer (2) and together with the first conductive layer (2) forms a boss structure; The first barrier layer (4) is formed on two sides of the boss structure along the first direction, and the composition of the first barrier layer (4) is a P-type semiconductor. The second barrier layer (6) is formed on the side of the first barrier layer (4) away from the first conductive layer (2) and is separated from the substrate (1) and the first conductive layer (2). The two ends of the second barrier layer (6) and the first barrier layer (4) are in the same position in the first direction. The composition of the second barrier layer (6) is an N-type semiconductor. A barrier layer (5) is formed between the first barrier layer (4) and the second barrier layer (6), and its end near the active layer (3) is close to the end of the first barrier layer (4) near the active layer (3) in the first direction. The barrier layer (5) is composed of unintentionally doped or lightly N-type doped semiconductor material, and its band gap is greater than the band gap of the first barrier layer (4) and greater than the band gap of the second barrier layer (6). The second conductive layer (7) covers the surface of the active layer (3) and the second barrier layer (6) away from the substrate (1), and the composition of the second conductive layer (7) is a P-type semiconductor.

2. The buried heterojunction laser epitaxial wafer as described in claim 1, characterized in that, The first barrier layer (4) is composed of P-InP, the second barrier layer (6) is composed of N-InP, and the barrier layer (5) is composed of one or more of InAIAs semiconductor, InGaP semiconductor and AlAs semiconductor.

3. The buried heterojunction laser epitaxial wafer as described in claim 2, characterized in that, The barrier layer (5) is composed of In 0.52 Al 0.48 As.

4. The buried heterojunction laser epitaxial wafer as described in claim 2, characterized in that, The thickness of the first barrier layer (4) is any value between 0.4 μm and 1 μm, and the doping concentration is approximately 0.1 × 10⁻⁶. 18 atoms / cm 3 ~2×10 18 atoms / cm 3 The thickness of the second barrier layer (6) is any value between 0.8 μm and 1.5 μm, and the doping concentration is approximately 0.3 × 10⁻⁶. 18 atoms / cm 3 ~3×10 18 atoms / cm 3 Any value in the range.

5. The buried heterojunction laser epitaxial wafer as described in claim 4, characterized in that, The thickness of the barrier layer (5) is any value between 10 nm and 100 nm, and the doping concentration of the barrier layer (5) is less than or equal to 1 × 10⁻⁶. 17 atoms / cm 3 .

6. The buried heterojunction laser epitaxial wafer as described in claim 2, characterized in that, The width of the active layer (3) in the first direction is any value between 1 μm and 3 μm.

7. The buried heterojunction laser epitaxial wafer as described in claim 2, characterized in that, The first conductive layer (2) is composed of N-InP, with a thickness of any value between 0.5 μm and 3 μm, and a doping concentration of approximately 0.5 × 10⁻⁶. 18 atoms / cm 3 ~2×10 18 atoms / cm 3 The composition of the second conductive layer (7) is P-InP, the thickness is any value between 0.5 μm and 3 μm, and the doping concentration is approximately 1 × 10⁻⁶. 18 atoms / cm 3 ~3×10 18 atoms / cm 3 Any value in the range.

8. The buried heterojunction laser epitaxial wafer as described in claim 1, characterized in that, The barrier layer (5) completely covers the surface of the first barrier layer (4) away from the first conductive layer (2).

9. The method for fabricating a buried heterojunction laser epitaxial wafer as described in any one of claims 1 to 8, characterized in that, include: Prepare the substrate (1); A buffer layer is deposited on the surface of the substrate (1); A quantum well layer is deposited on the surface of the buffer layer away from the substrate (1); A pre-deposited layer is deposited on the surface of the quantum well layer away from the substrate (1); The active region of the pre-deposited layer away from the substrate (1) is covered by a mask and etched. The active region corresponds to the middle region of the substrate (1) along the first direction. After etching, the buffer layer is transformed into the first conductive layer (2), the quantum well layer is transformed into the active layer (3), and the pre-deposited layer is transformed into the transition layer (71). While maintaining the position of the mask, the first barrier layer (4) is deposited on both sides of the active region. While maintaining the position of the mask, the barrier layer (5) is deposited on the surface of the first barrier layer (4) to form the barrier layer (5). While maintaining the position of the mask, a second barrier layer (6) is deposited to cover the barrier layer (5). Remove the mask and deposit a cladding (72) covering the transition layer (71) and the second barrier layer (6), the cladding (72) and the transition layer (71) together forming the second conductive layer (7).

10. A laser, characterized in that, Includes the buried heterojunction laser epitaxial wafer as described in any one of claims 1 to 8.

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