Circuit breaker control method and system based on modular design

Abstract

The application relates to the technical field of circuit breaker control, and discloses a circuit breaker control method and system based on modular design, which comprises the following steps: continuously sampling a main loop transient current to locate a fundamental wave peak value moment, controlling a flying cross isolation array to extract a main contact micro area voltage drop value, calculating an equivalent heating resistance, substituting the equivalent heating resistance and a current effective value into a thermodynamic discrete model to generate a heat volume integral, sending a message to an external inverter to obtain a communication time delay parameter, calculating a dynamic degradation coefficient based on the heat volume integral and the communication time delay parameter, generating a dynamic overload threshold, executing inverse time limit tripping to realize flexible control when the dynamic overload threshold is exceeded, and directly triggering rigid tripping by using an analog comparator when a transient current exceeds a short circuit threshold. The application fuses internal contact wear heating and external communication states, realizes dynamic down-regulation of a protection threshold, takes into account regulation and control of a slow heating working condition and rapid response of short circuit, and avoids equipment thermal runaway.

Description

Technical Field

[0001] This invention relates to the field of circuit breaker control technology, specifically to a circuit breaker control method and system based on modular design. Background Technology

[0002] With the development of distributed photovoltaic grid-connected technology, the demand for intelligent photovoltaic circuit breakers with observable, measurable, adjustable, and controllable characteristics is increasing. Existing photovoltaic circuit breakers typically employ a simplified solution of stacking voltage sampling and control modules externally to traditional circuit breakers. This results in a fixed physical structure, making it difficult to modify the control methods and communication functions after shipment, leading to low scalability. Furthermore, limited internal space and simplistic calculation models cause existing miniature circuit breakers to experience severe overheating in complex grid-connected environments, exhibiting poor temperature rise performance. When the main contacts experience increased contact resistance due to wear, the system maintains a fixed theoretical thermodynamic model, easily triggering thermal runaway.

[0003] In the control methods for distributed photovoltaic (PV) grid connection, existing circuit breakers generally employ fixed protection logic with a single function. When an overload or reverse power transmission condition is detected, the system can only rely on a single threshold for a crude physical disconnection. This approach lacks the ability to dynamically track heating parameters and communication status, and cannot achieve flexible control of distributed PV nodes, thus affecting the local energy consumption rate. When the communication network between the circuit breaker and the external PV inverter becomes congested, the coordinated action relying on external dispatch commands is prone to lag, failing to isolate faults in a timely manner.

[0004] Furthermore, for sudden severe short-circuit faults, most existing devices rely on microprocessors to execute digital algorithms to determine tripping. This digital pipeline-based processing method introduces sampling cycle and algorithm iteration time overhead, slowing down the overall breaking speed of the circuit breaker under extreme operating conditions. Current circuit breaker control technology lacks a collaborative protection architecture that integrates dynamic flexible control with underlying rigid disconnection. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a circuit breaker control method and system based on modular design, which solves the problems of low scalability of existing smart circuit breakers and delayed protection actions and thermal runaway of equipment under complex operating conditions due to the inability to detect the physical aging state of contacts and external communication delays.

[0006] To achieve the above objectives, the present invention provides the following technical solution: The first aspect of this invention provides a circuit breaker control method based on modular design, comprising the following steps: The transient current is obtained by continuously sampling the current of the main circuit. The fundamental period of the transient current is extracted to locate the fundamental peak time of the transient current. At the fundamental peak time, the flying isolation array is controlled to obtain the micro-region voltage drop value at both ends of the main contact. The effective value of the main circuit current is calculated based on the transient current, the equivalent heating resistance is calculated using the micro-region voltage drop value, and the equivalent heating resistance and the effective value of the current are substituted into the thermodynamic discrete model to calculate the heat capacity integral. Monitor the status of the communication link and obtain communication delay parameters; When the transient current exceeds the short-circuit threshold, the tripping mechanism is triggered to cut off the main circuit; The dynamic degradation coefficient is calculated based on the thermal capacity integral and communication delay parameters. The dynamic overload threshold is generated using the dynamic degradation coefficient. When the effective value of the current exceeds the dynamic overload threshold and meets the preset inverse time delay condition, the tripping mechanism is triggered to cut off the main circuit.

[0007] Furthermore, locating the fundamental peak time of the transient current includes the following steps: The transient current is discretely sampled to generate a transient current sampling sequence; The zero-crossing point is determined by comparing the polarity jump of adjacent data points in the transient current sampling sequence, and the fundamental period is calculated based on the difference in timestamps of two adjacent zero-crossing points in the same direction. The predicted fundamental peak time is calculated by adding the most recently determined zero-crossing timestamp to a quarter of the fundamental frequency period, and then loading the fundamental peak time into a timer as a trigger reference.

[0008] Furthermore, controlling the flying isolation array to obtain the micro-area voltage drop value across the main contact includes the following steps: The first control pulse is output to the isolation array to close the high-voltage side switch group, and the sampling capacitor is charged by the voltage drop across the main contacts; The first control pulse is canceled to disconnect the high-voltage side switch group, and the physical isolation dead time is entered. During the physical isolation dead time, the sampling capacitor is in a floating isolation state. After the physical isolation dead time, the second control pulse is output to close the low-voltage side switch group, and the static voltage of the sampling capacitor is read as the micro-area voltage drop value.

[0009] Furthermore, the equivalent heating resistance is calculated using the micro-region voltage drop value, including the following steps: Obtain the peak value of the transient current corresponding to the peak value of the fundamental frequency; Calculate the ratio of the absolute value of the micro-area voltage drop to the absolute value of the transient current peak value to obtain the single contact resistance; A moving average filtering algorithm is applied to the single contact resistance of multiple consecutive cycles to generate dynamic contact resistance. The dynamic contact resistance is added to the inherent loop resistance parameter to reconstruct the equivalent heating resistance.

[0010] Furthermore, the equivalent heating resistance and the effective value of the current are substituted into the thermodynamic discrete model to calculate the heat capacity integral, including the following steps: Obtain the preset equivalent heat dissipation coefficient and use the heat capacity integral generated in the previous calculation cycle as the historical value of the heat capacity integral. The real-time heating power is obtained by multiplying the square of the effective value of the current by the equivalent heating resistance. Calculate the product of the equivalent heat dissipation coefficient, the historical value of the integral of heat capacity, and the fundamental period; The heat capacity integral is generated by adding the historical value of the heat capacity integral to the real-time heating power and subtracting the product.

[0011] Further, obtaining communication delay parameters includes the following steps: Send a probe message carrying a transmission timestamp to an external photovoltaic inverter; Receive the response message returned by the external photovoltaic inverter and obtain the receiving timestamp; Calculate the difference between the received timestamp and the sent timestamp to obtain the round-trip delay. The communication delay parameter is generated by weighted summing the single round-trip delay with the historical communication delay value saved in the previous cycle, and then written into the shared memory space.

[0012] Furthermore, when the transient current exceeds the short-circuit threshold, the tripping mechanism is triggered to disconnect the main circuit, including the following steps: The short-circuit threshold is converted into a DC reference voltage, which is then applied to the inverting input of the analog comparator. The main circuit current is sensed by a current transformer to obtain an analog signal reflecting the transient current. The analog signal is then subjected to absolute value detection to obtain a unipolar signal, which is then connected to the non-inverting input of an analog comparator. The level of the unipolar signal at the non-inverting input is compared with the DC reference voltage at the inverting input. When the level of the unipolar signal exceeds the DC reference voltage, the output of the analog comparator flips to generate a hardware trigger pulse. The hardware trigger pulse is transmitted to the drive circuit of the tripping mechanism to trigger the tripping mechanism to cut off the main circuit.

[0013] Furthermore, the dynamic degradation coefficient is calculated based on the thermal capacity integral and communication delay parameters, including the following steps: Obtain the preset maximum heat capacity integral safety threshold and heat capacity state weighting factor, calculate the ratio of heat capacity integral to the maximum heat capacity integral safety threshold, and multiply the ratio by the heat capacity state weighting factor to obtain the heat capacity loss term. Obtain the preset communication network congestion warning threshold and communication status weight factor, calculate the difference between the communication delay parameter and the communication network congestion warning threshold, and use the communication status weight factor as a communication penalty term when the difference is greater than or equal to 0, and the communication penalty term is 0 when the difference is less than 0. Subtracting the heat capacity loss term and the communication penalty term from 1 yields the dynamic degradation coefficient.

[0014] Furthermore, a dynamic overload threshold is generated using a dynamic degradation coefficient, including the following steps: Obtain the preset lower threshold constant and upper limit value. When the dynamic degradation coefficient is lower than the lower threshold constant, limit the dynamic degradation coefficient to the lower threshold constant. When the dynamic degradation coefficient is greater than the upper limit, the dynamic degradation coefficient is truncated to the upper limit. Obtain the rated current reference value, multiply the rated current reference value by the dynamic degradation coefficient, and generate the dynamic overload threshold.

[0015] A second aspect of the present invention provides a circuit breaker control system based on modular design, applied to the circuit breaker control method provided in the first aspect above, comprising: The base unit contains a main contact, a tripping mechanism, a current transformer, a flying isolation array, an absolute detection circuit, and an analog comparator. The flying isolation array includes a sampling capacitor, a high-voltage side switch group, and a low-voltage side switch group. The input of the high-voltage side switch group is connected to the input and output of the main contact, and the output of the high-voltage side switch group is connected to the two ends of the sampling capacitor. The input of the low-voltage side switch group is connected to the two ends of the sampling capacitor. The input of the absolute detection circuit is connected to the current transformer, and the output of the absolute detection circuit is connected to the non-inverting input of the analog comparator. The output of the analog comparator is connected to the drive circuit of the tripping mechanism. The measurement and control unit contains a microprocessor and a digital-to-analog converter. The control pins of the measurement and control unit are connected to the flying isolation array. The input of the microprocessor is connected to the output of the low-voltage side switch group. The output of the digital-to-analog converter is connected to the inverting input of the analog comparator. The communication unit includes a transceiver and a communication processor. The communication unit is connected to an external photovoltaic inverter through the transceiver.

[0016] This invention provides a circuit breaker control method and system based on modular design. It has the following advantages: 1. This invention improves the independence and interchangeability of each unit by decoupling the underlying execution, algorithm measurement and external communication. It overcomes the problem of poor scalability caused by the simple function stacking of traditional photovoltaic circuit breakers, and makes it easy to flexibly configure communication and control functions according to different distributed photovoltaic application scenarios.

[0017] 2. This invention obtains communication delay parameters by sending probe messages to an external photovoltaic inverter, and combines this with the thermal capacity integral calculated from the equivalent heating resistance to generate a dynamic degradation coefficient to adjust the overload threshold. This allows the circuit breaker to dynamically tighten the protection threshold when its own temperature rises and deteriorates or when external communication becomes congested, avoiding the abrupt disconnection caused by a single fixed threshold, and optimizing local absorption capacity while ensuring safety.

[0018] 3. This invention controls the flying isolation array at the fundamental peak value to obtain the micro-region voltage drop value at both ends of the main contact, and converts it into an equivalent heating resistance, which is then substituted into the thermodynamic discrete model. The real-time physical wear state of the main contact is introduced as a feedforward variable into the calculation, correcting the error caused by the traditional estimation using fixed resistance parameters, improving the equipment's perception accuracy of the actual heating conditions, and solving the problem of poor temperature rise performance conformity in existing products.

[0019] 4. This invention addresses sudden severe short circuits or extreme reverse power conditions by sending a detector signal reflecting transient current to an analog comparator, which compares it with a DC reference voltage. When the voltage exceeds the limit, the hardware circuit directly triggers the tripping mechanism. The underlying rigid control link avoids the analog-to-digital conversion and computational overhead of the microprocessor, improving the breaking timeliness and instantaneous reliability under extreme fault conditions. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the system architecture of the present invention; Figure 2 This is a schematic diagram of the method flow of the present invention; Figure 3 The following is a timing verification diagram of the micro-area voltage drop sampling of the present invention, wherein (a) is a timing diagram of fundamental current sampling and peak prediction, and (b) is a timing diagram of the operation of the flying isolation array and the voltage drop following curve. Figure 4 This is a comparison diagram of the equivalent thermal resistance evolution and equipment temperature rise of the present invention.

[0021] The components include: 1. Main contacts; 2. Arc-extinguishing chamber; 3. Tripping mechanism; 4. Current transformer; 5. Flying isolation array; 6. Microprocessor; 7. Digital-to-analog converter; 8. Transceiver; 9. Communication processor; and 10. External photovoltaic inverter. Detailed Implementation

[0022] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] See attached document Figure 1The present invention provides a circuit breaker control system based on modular design, including: a base unit, a measurement and control unit, and a communication unit.

[0024] The base unit, measurement and control unit, and communication unit are physically independent. The three units exchange data via an internal communication bus.

[0025] The base unit internally includes a main contact 1, an arc-extinguishing chamber 2, a tripping mechanism 3, and a current transformer 4. The base unit also houses a flying isolation array 5, which includes a sampling capacitor, a high-voltage side switch group, and a low-voltage side switch group. The input of the high-voltage side switch group is connected to the input and output terminals of the main contact 1, and its output is connected to both ends of the sampling capacitor. The input of the low-voltage side switch group is connected to both ends of the sampling capacitor, and its output is connected to the reading terminal of the measurement and control unit. The base unit also includes an absolute value detector circuit and an analog comparator. The input of the absolute value detector circuit is connected to the current transformer 4, and its output is connected to the non-inverting input of the analog comparator. The output of the analog comparator is connected to the drive circuit of the tripping mechanism 3.

[0026] The measurement and control unit internally houses a microprocessor 6 and a digital-to-analog converter 7. The control pins of the measurement and control unit are connected to the flying isolation array 5. The measurement and control unit outputs control pulses to the high-voltage side switch group and the low-voltage side switch group. The input terminal of the microprocessor 6 is connected to the output terminal of the low-voltage side switch group. The output terminal of the digital-to-analog converter 7 is connected to the inverting input terminal of the analog comparator to provide a DC reference voltage.

[0027] The communication unit includes a transceiver 8 and a communication processor 9. The communication unit is connected to an external photovoltaic inverter 10 through the transceiver 8 and writes the generated communication status parameters into the shared memory space.

[0028] See attached document Figure 2 This invention provides a circuit breaker control method based on modular design, comprising the following steps: S100: Locate the fundamental peak value and perform timing sampling. The measurement and control unit continuously samples the main circuit current to locate the fundamental peak value. Near the fundamental peak value, the measurement and control unit outputs a control pulse to the flying isolation array 5. The high-voltage side switch group closes, and after a set dead time, it opens, and the sampling capacitor obtains the micro-voltage drop across the main contact 1. The low-voltage side switch group then closes, and the measurement and control unit reads the voltage signal of the sampling capacitor as the micro-voltage drop value.

[0029] S200 calculates contact resistance and assesses the thermodynamic state. The measurement and control unit calculates the dynamic contact resistance using the micro-area voltage drop and transient current peak value. The measurement and control unit calculates the RMS current value for the current fundamental cycle and adds the dynamic contact resistance to the inherent loop resistance to obtain the equivalent heating resistance. The measurement and control unit substitutes the RMS current value and the equivalent heating resistance into the thermodynamic discrete model to calculate the current accumulated heat capacity integral.

[0030] S300 monitors the communication link status and maps parameters. The communication unit sends probe messages to the external photovoltaic inverter 10. The communication unit records the time difference between message transmission and reception, generating communication delay parameters. The communication unit writes the communication delay parameters into the shared memory space.

[0031] S400 determines the operating boundary and executes control commands. When the transient current exceeds the short-circuit threshold, the analog comparator triggers trip mechanism 3 to execute the underlying hardware-level transient protection. For conventional overload conditions, the measurement and control unit jointly solves the dynamic degradation coefficient based on the calculated thermal integral and communication delay parameters. The measurement and control unit uses this dynamic degradation coefficient to correct the basic digital overload protection boundary and generate a dynamic overload threshold. When the effective value of the current in the main circuit exceeds this dynamic overload threshold and the duration meets the inverse time delay condition, the measurement and control unit triggers trip mechanism 3 to disconnect the main circuit, thereby realizing flexible and rigid coordinated degradation control that adapts to the aging state of the equipment and the external communication environment.

[0032] In this embodiment, the process of locating the fundamental peak value and performing timing sampling specifically includes a main circuit current sampling and fundamental peak value prediction mechanism. This mechanism aims to pre-determine the moment when the absolute value of the current is maximum, thereby providing a precise time reference for subsequently extracting the micro-area voltage drop when the contact is under the most severe heating condition. This is specifically achieved through the following steps: S101, acquire the transient current sampling sequence of the main circuit. The current transformer 4 inside the base unit senses the AC current of the main circuit in real time and outputs a stepped-down analog current signal. In order to convert this continuously changing physical quantity into discrete data that can be processed by the microprocessor 6, the microprocessor 6 inside the measurement and control unit uses its built-in independent analog-to-digital conversion peripheral module to perform sampling according to the set discrete sampling step size. A continuous analog-to-digital conversion is performed on the analog current signal to generate a transient current sampling sequence containing timing information in the digital domain. As a preferred method, a discrete sampling step size... The value is determined based on the rated operating frequency of the power grid and the waveform restoration accuracy requirements, and is typically configured to uniformly collect 128 or 256 points within one power frequency cycle. The measurement control unit acquires the first... The transient current value at each sampling point is ,in It is a sequence index of positive integers that increments with the sampling cycle.

[0033] S102, lock the fundamental phase and calculate the fundamental period. Based on the established sampling sequence, the measurement and control unit continuously compares the polarity of adjacent data points in the transient current sampling sequence point by point. When the measurement and control unit detects the transient current value of the current sampling point... Transient current value compared to the previous sampling point When a polarity transition occurs, the measurement and control unit determines that the sampling moment is the initial zero-crossing point of the main circuit current. For high-frequency harmonic filtering and anti-interference phase locking during the zero-crossing detection process, those skilled in the art can use a low-pass digital filter in conjunction with a software phase-locked loop program. The specific algorithm and software configuration are well-known technologies in the field and will not be elaborated here. After signal conditioning, the measurement and control unit extracts the timestamps of two adjacent zero-crossing points in the same direction on the time axis and calculates the difference between them. This difference is recorded as the fundamental period of the current main circuit AC current, denoted as . .

[0034] S103 predicts the fundamental peak time and loads the timing reference. The measurement and control unit operates based on the measured fundamental period. Based on the most recent zero-crossing time reference, the precise time point at which the absolute value of the current reaches its peak in the next half-wave of the power frequency is calculated. Typically, in the fundamental sinusoidal AC characteristic after filtering out high-frequency interference, the extreme point usually appears at a quarter-cycle position after the zero-crossing. Based on this waveform evolution pattern, the measurement and control unit, according to the time offset rule, directly adds the most recently effectively locked zero-crossing timestamp to a quarter-cycle of the fundamental frequency to calculate the predicted time of the next fundamental peak. After obtaining this fundamental peak time, the measurement and control unit converts the value into the corresponding number of processor clock ticks and writes it into the hardware timer register inside the microprocessor 6. The hardware timer uses this number of clock ticks as the overflow matching target for the countdown, triggering subsequent external hardware isolation sampling actions at a precise physical time point.

[0035] In this embodiment, the measurement and control unit controls the flying isolation array 5 through timing logic to extract the small differential mode voltage drop characterizing the contact state of the contacts without introducing a high common-mode voltage in the main circuit. The specific process of this timing isolation action and voltage drop reading is implemented through the following steps: S104: The high-voltage side channel is opened and differential mode following charging is performed. When the hardware timer count value inside the microprocessor 6 matches the predicted fundamental peak value, the measurement control unit triggers a hardware interrupt and outputs the first control pulse to the flying isolation array 5. This control pulse drives the high-voltage side switch group to close. At this time, the low-voltage side switch group remains open due to logic interlocking, and the sampling capacitor and the main contact 1 form a parallel circuit. Considering the characteristic that the main circuit is usually accompanied by a high common-mode voltage in photovoltaic operation, this technical solution utilizes the topological characteristics of the flying capacitor. During the closing of the high-voltage side switch group, the overall potential of the sampling capacitor fluctuates with the potential of the main circuit line. Since it is not connected to the reference ground of the low-voltage measurement system, it will not conduct high common-mode voltage to the low-voltage side. In this parallel circuit, the differential mode voltage drop generated by the peak current flowing through the contact resistance charges the sampling capacitor across the main contact 1. The potential difference across the sampling capacitor gradually increases and tends to the actual physical voltage drop of the main contact 1. To ensure that the voltage of the sampling capacitor effectively follows the contact voltage drop, the closing holding time of the high-voltage side switch group is set to be greater than the inherent RC time constant of the local sampling circuit. As a preferred approach, this closing holding time is configured to be 3 to 5 times the inherent RC time constant to ensure that the capacitor charging process reaches a steady state.

[0036] S105, disconnect the high-voltage side channel and establish a physical isolation dead zone. After the charging follow-up process ends, the measurement and control unit cancels the first control pulse, and the high-voltage side switch group is disconnected. During this period, the low-voltage side switch group remains in the open state, and the fly-through isolation array 5 enters the dead time stage. During the dead time, the sampling capacitor has no electrical connection with the main circuit of the base unit and the reading circuit of the measurement and control unit, and is in a floating isolation state. The setting of this dead time stage is used to suppress the tailing effect of semiconductor switching devices during state switching and to prevent high-voltage common-mode signals from entering the low-voltage circuit through the incompletely turned-off high-voltage side channel. The dead time length configured in the measurement and control unit is set to be greater than the nominal turn-off delay time of the solid-state switching devices used in the high-voltage side switch group, thereby achieving reliable isolation between the high-voltage side and the low-voltage side in the time dimension.

[0037] S106: The low-voltage side channel is opened and the micro-area voltage drop value is read. After the physical isolation dead time, the measurement control unit outputs a second control pulse to the flying isolation array 5, driving the low-voltage side switch group to close. The sampling capacitor, which is in a floating state and carries differential mode voltage drop charge, is connected between the analog-to-digital conversion reading terminal of the measurement control unit and the internal reference ground. The microprocessor 6 synchronously starts the analog-to-digital conversion operation and reads the static voltage of the sampling capacitor. Based on the principle of charge conservation, this static voltage characterizes the contact voltage drop of the main contact 1 at the peak of the fundamental current, while avoiding the influence of the common-mode voltage of the main circuit on the low-voltage measurement node. The measurement control unit records the read static voltage as the micro-area voltage drop value in memory for later retrieval. After the data reading is completed, the measurement control unit disconnects the low-voltage side switch group and releases the residual charge on the sampling capacitor through the discharge resistor circuit integrated in the underlying hardware, so that the flying isolation array 5 returns to the standby state and prepares to execute the action trigger of the next AC fundamental cycle.

[0038] In this embodiment, an equivalent heating resistance reconstruction mechanism based on real-time micro-region voltage drop is established during the calculation of contact resistance and evaluation of thermodynamic state. Mechanical wear and arc erosion during equipment operation cause changes in the microstructure of the contact surface, resulting in a dynamic evolution of contact resistance. Relying solely on fixed resistance parameters to evaluate heating is insufficient to characterize the true thermodynamic state of the equipment. Therefore, this technical solution constructs an equivalent heating resistance reconstruction mechanism to provide a dynamically following physical impedance reference for subsequent thermodynamic evaluation. This process is specifically implemented through the following steps: S201, extract the peak value of the synchronous transient current and calculate the single contact resistance. After acquiring the micro-area voltage drop value returned by the flying isolation array 5, the measurement and control unit extracts the transient current data corresponding to the fundamental peak moment from the transient current sampling sequence of the main circuit, based on the time reference. At this peak moment, the absolute value of the main circuit current reaches a local maximum, and the corresponding micro-area voltage drop signal amplitude is the highest. The resistance value calculated at this time has a higher signal-to-noise ratio, which can effectively reduce the conversion error at the low-voltage measurement end. Based on Ohm's law, the measurement and control unit obtains the single contact resistance under the current AC half-wave cycle by calculating the ratio of the current micro-area voltage drop value to the absolute value of the synchronous transient current peak. The corresponding calculation formula is: ; In the formula, Indicates the first The single contact resistance in each calculation cycle, where It is a positive integer index that increases with the fundamental frequency period; This indicates the micro-area voltage drop value read within this cycle; This represents the peak value of the transient current extracted synchronously with the voltage drop reading.

[0039] S202, a moving average filter is executed to generate the dynamic contact resistance. Because the small voltage drop signal is susceptible to external electromagnetic interference during the low-level hardware acquisition stage, the contact resistance value calculated in a single operation is prone to discrete fluctuations. To extract steady-state characteristics that reflect the physical aging trend of the contacts, the measurement and control unit applies a moving average filter algorithm to the single contact resistance sequence of multiple consecutive cycles to smooth the output of the dynamic contact resistance. As a preferred method, the measurement and control unit internally maintains a length of... A first-in, first-out (FIFO) data queue. In the initial phase of device power-on operation, if the amount of valid data accumulated in the queue is insufficient... The measurement and control unit performs an average calculation on all acquired single contact resistances; when the data volume reaches the window length... Afterwards, the measurement and control unit continuously updates the latest data in the queue. Sum the individual contact resistances and divide by . This outputs the smoothed dynamic contact resistance. Considering the time-sensitive response of the photovoltaic system and the computational load on the processor, the window length... The value range is set to an integer between 10 and 20. For the specific array storage and pointer shifting operations of the digital filter, those skilled in the art can conventionally configure it based on the memory management mechanism of the microprocessor 6. Its software implementation is well-known in the field and will not be elaborated upon here.

[0040] S203, Reconstructing the Equivalent Heating Resistance by Superimposing the Inherent Loop Resistance. Besides the contact points of the moving and stationary contacts, the main circuit of the circuit breaker also includes physical structures with relatively constant resistance, such as copper busbars and terminals. The measurement and control unit retrieves the inherent loop resistance parameter pre-stored in its internal non-volatile memory. This fixed parameter is typically obtained from the DC voltage drop test calibration at the time of equipment shipment. Subsequently, the measurement and control unit directly adds the dynamic contact resistance output by filtering to this inherent loop resistance parameter arithmetically, thereby reconstructing the equivalent heating resistance characterizing the overall conductivity state of the current equipment. The reconstructed equivalent heating resistance is then used as a boundary parameter in the internal thermodynamic discrete model, providing a real-time physical impedance reference for the dynamic calculation of the heat capacity integral.

[0041] In this embodiment, the dynamic thermal capacity integral calculation based on feedforward physical wear aims to introduce the equivalent heating resistance, which characterizes the real-time electrical contact state of the contacts, as a feedforward variable into the thermal model. In this way, different load conditions and hardware degradation levels are considered when evaluating the actual temperature rise trend of the circuit breaker. This calculation process is specifically implemented through the following steps: S204 calculates the RMS current value for the fundamental period and obtains the real-time heating power. The measurement and control unit uses the high-frequency transient current sampling sequence acquired within the current fundamental period to perform root mean square (RMS) calculation to extract the RMS current value. Considering that the calculation of AC RMS value is a conventional method in the field of digital signal processing, the measurement and control unit directly performs square summation, average value, and square root processing on the discrete transient current data within a single period to output the RMS current value for the current fundamental period. After obtaining this RMS value, the measurement and control unit multiplies the square of the RMS current value by the equivalent heating resistance obtained in the previous step, according to Joule's law, to obtain the real-time heating power for the current period. Compared with the traditional heating estimation method based on fixed theoretical resistance, the calculation logic of introducing equivalent heating resistance takes into account the physical wear of the contacts and the degree of arc erosion, aiming to characterize the actual heating level of the equipment under long-term operation.

[0042] S205 executes a thermodynamic discrete model to calculate the cumulative heat capacity integral. The operation of the device's main circuit involves continuous heat generation, while the casing continuously dissipates heat to the external environment. To simulate this continuous thermodynamic process within the microprocessor 6, this technical solution constructs a first-order linear thermal balance difference equation. This equation is based on the principle of energy conservation, assuming that the heat dissipation rate from the device's interior to the external environment is positively correlated with the current cumulative heat capacity of the system. The measurement and control unit substitutes the real-time heat generation power into this time-discrete thermodynamic model and performs iterative calculations of the heat capacity integral. Its corresponding core formula configuration is as follows: ; In the formula, Indicates the current number The cumulative heat capacity integral at the end of each calculation cycle; This represents the historical value of the heat capacity integral carried over from the previous calculation period; This represents the effective value of the current during the current fundamental cycle. This represents the equivalent heating resistance generated by the reconstruction; This represents the equivalent heat dissipation coefficient of the equipment; This indicates the fundamental period of the main circuit AC current recorded.

[0043] Regarding the parameter establishment mechanism in this discrete model, the equivalent heat dissipation coefficient The specific value depends on the internal thermal resistance of the circuit breaker, the specific heat capacity of the casing material, and the surface heat dissipation area. As a preferred method, this coefficient is calibrated offline through a standard thermal balance temperature rise test during the equipment development phase and is burned into the non-volatile memory of the measurement and control unit as a fixed parameter at the factory. Furthermore, to ensure the completeness of the algorithm logic and avoid thermal assessment deviations caused by cold starts or short restarts, this embodiment uses an initial value for the heat capacity integral. The establishment mechanism has been specifically configured. During the initialization process of the measurement and control unit upon initial power-on or after a prolonged power outage and restart, it is assumed that the device and environment have reached thermal equilibrium, and the initial values ​​are set accordingly. The value is set to zero. When the device experiences a short power outage and a rapid restart, since the internal residual heat has not been completely dissipated, the measurement and control unit retrieves the last thermal capacity integral record stored in the non-volatile memory before the power outage, and performs exponential decay calculation based on the actual power outage duration and the equivalent heat dissipation coefficient. The calculated value is then used as the initial value for the current power-on operation. This mechanism effectively avoids blind spots in safety monitoring caused by direct zeroing. As the system clock advances, the measurement and control unit continuously performs iterative calculations, outputting dynamically evolving thermal capacity integral data over time, which is then used as a parameter to determine the safety boundaries of system operation.

[0044] In this embodiment, the process of monitoring the communication link status and mapping parameters is used to evaluate the data connectivity between the circuit breaker node and the external photovoltaic inverter 10. This evaluation mechanism uses the data transmission delay of the external network as a boundary variable for the internal control logic, providing a basis for decision-making regarding degraded protection of the device under network congestion or offline conditions. This process is specifically implemented through the following steps: S301, construct and send a timestamp probe message. The communication unit periodically generates probe messages according to a set heartbeat cycle. During the message assembly stage, the communication unit reads its internal real-time clock and embeds the timestamp of the current request into the payload area of ​​the probe message. After assembly, the communication unit sends the probe message to the external photovoltaic inverter 10 through the communication interface. The configuration and message encapsulation process of the network communication underlying protocol stack can be conventionally implemented by those skilled in the art based on the standard transmission control protocol suite. The specific implementation method is well-known in the field and will not be elaborated here.

[0045] S302, Receive Response Message and Calculate Dynamic Communication Delay. After receiving the probe message, the external photovoltaic inverter 10 parses it and returns a corresponding response message to the device. Upon successfully receiving the response message, the communication unit reads the real-time clock again to obtain the received timestamp. The communication unit calculates the difference between the received timestamp and the sending timestamp carried in the message to obtain the round-trip delay for the current heartbeat cycle. Considering that message jitter and random packet loss often occur in industrial field networks, relying solely on the single-round-trip delay value as an evaluation standard can easily lead to misjudgment of the status. Therefore, this technical solution applies an exponential smoothing algorithm to the continuously acquired delay sequence. The communication unit performs a weighted summation of the currently calculated single-round-trip delay and the historical communication delay value saved in the previous cycle according to a preset smoothing coefficient, thereby outputting the filtered dynamic communication delay. As a preferred approach, this smoothing coefficient is configured between 0.1 and 0.3 to achieve a balance between response sensitivity and jitter resistance. To ensure the integrity of the algorithm logic, when the device is first powered on or the network module is reset, and the first valid round-trip delay is obtained, the communication unit directly records it as a historical value, avoiding computational dead zones caused by missing historical data. Furthermore, if the communication unit does not receive a response message within the set timeout threshold, it assigns the current period's round-trip delay a maximum constant representing a link disconnection. This timeout threshold is typically set based on the retransmission cycle of the external PV inverter's 10 protocol, while the maximum constant is configured as the upper limit threshold supported by the system's delay variable data type, preventing the algorithm task from getting stuck in an infinite wait due to continuous suspension.

[0046] S303, perform cross-layer state mapping and parameter sharing. The communication unit and the measurement and control unit have different task scheduling priorities. To ensure that the measurement and control unit can acquire network latency data without blocking, this embodiment constructs a cross-layer state mapping mechanism based on shared memory space. After updating the dynamic communication latency, the communication unit writes the value into a specific address segment of the shared dual-port random access memory. During data interaction, the system adopts a double-buffered alternating refresh logic to prevent memory pointer conflicts caused by asynchronous read and write operations. When the measurement and control unit performs its own thermodynamic evaluation and boundary determination tasks, it directly retrieves the latest dynamic communication latency parameters from the effective buffer of the shared memory. This cross-layer mapping mechanism helps to stably transmit network state parameters to the underlying protection logic, reducing the time overhead caused by cross-task process communication.

[0047] In this embodiment, to address the high-speed interruption requirement in the event of a sudden severe short-circuit fault in the system, a hardware-level transient protection link based on an analog comparator is constructed within the measurement and control unit. This link is independent of the conventional software calculation cycle of the microprocessor 6, aiming to avoid the time delay caused by the analog-to-digital conversion process and digital algorithm iteration, thereby providing a low-level fast response channel for the rapidly increasing short-circuit current. The specific process of this hardware-level transient protection is implemented through the following steps: S401 sets the DC reference voltage for transient protection. Microprocessor 6, in conjunction with the circuit breaker's frame rating and rated operating parameters, configures the current threshold for transient short-circuit protection. Preferably, this current threshold is set to 8 to 12 times the rated operating current, depending on the equipment's safety isolation performance. To convert the digital current threshold into a physical parameter directly recognizable by the hardware circuitry, the digital-to-analog converter 7 within the measurement and control unit converts this threshold parameter into a corresponding DC reference voltage. This converter 7 is powered by an internal high-precision voltage reference source to suppress external power supply ripple interference on the stability of the reference voltage output. The generated DC reference voltage is continuously applied to the inverting input of a high-speed analog comparator as a hardware-level boundary condition for determining whether a short-circuit fault has occurred in the main circuit.

[0048] S402 performs real-time analog comparison and state level switching. During the operation of the main circuit, the current transformer 4 in the base unit senses and outputs an analog current signal representing the current state of the main circuit in real time. Considering the bidirectional flow or alternating positive and negative characteristics of the main circuit current, this analog signal is sent to the microprocessor 6 for digital sampling, and simultaneously enters the front-end absolute value detection circuit through another physical branch. The unipolar signal after absolute value processing is then connected to the non-inverting input of the high-speed analog comparator. Based on the characteristics of analog circuits, the high-speed analog comparator continuously compares the real-time unipolar signal at the non-inverting input with the DC reference voltage at the inverting input. When the transient current in the main circuit rises sharply due to a short circuit, and the instantaneous level of the signal exceeds the set DC reference voltage, the output stage of the analog comparator undergoes a state transition, rapidly switching from an initial low level to a high level, thereby generating a hardware trigger pulse. For the configuration of hardware anti-jitter capacitors and hysteresis ranges around analog comparators, those skilled in the art can perform conventional designs in conjunction with specific electromagnetic compatibility standards. The construction of its peripheral conditioning circuits is a well-known technology in this field and will not be elaborated here.

[0049] S403 triggers the underlying trip drive and reports the interrupt status. To achieve a minimally delayed interruption action, the hardware trigger pulse output by the analog comparator bypasses the digital processing pipeline of the microprocessor 6 and is directly transmitted to the trip drive unit via hardware logic gates. Upon receiving the trigger pulse, the trip drive unit turns on its internal power switch, injecting driving energy into the electromagnetic trip coil of the base unit, thereby driving the mechanical mechanism to move and separate the main contact 1. Simultaneously, while outputting the execution instruction to the trip drive unit, the hardware trigger pulse is synchronously sent to the external interrupt pin of the microprocessor 6. After capturing the interrupt event, the microprocessor 6 suspends its current routine tasks and records the timestamp and action flag of this transient protection event in its internal non-volatile memory. This recording mechanism allows the device to still provide basic status recall data for subsequent fault tracing and master station querying even when the fault current is cut off and the system loses power.

[0050] In this embodiment, the flexible-rigid collaborative degradation control based on multi-dimensional state boundaries is used to integrate the internal thermodynamic state of the equipment with the external network communication quality, thereby dynamically adjusting the action boundary of the digital overload protection. When the circuit breaker faces increased heating due to contact aging, or when the master station scheduling command is delayed due to upper-layer network congestion, this mechanism can enable the equipment to spontaneously increase the sensitivity of local protection, thereby reducing the risk of thermal runaway. This process is specifically implemented through the following steps: S404 acquires multi-dimensional state parameters and calculates dynamic degradation coefficients. The measurement and control unit retrieves real-time updated cumulative thermal integrals and dynamic communication delays from its internal non-volatile memory and shared memory. To quantify the overall risk level of the current system, the measurement and control unit introduces dynamic degradation coefficients to correct the basic overload protection thresholds. In principle, thermal integrals directly characterize the physical heating state, while communication delays reflect the device's ability to obtain coordinated protection from the master station; when communication is interrupted or severely delayed, the device must lower its own overload threshold to compensate for the risk of missing remote control. Based on this, the degradation coefficient is calculated jointly based on thermal capacity margin and network communication status. The ratio of the cumulative thermal capacity integral to the maximum thermal capacity integral safety threshold is calculated, and this ratio is multiplied by the thermal capacity status weighting factor to obtain the thermal capacity loss term. The difference between the dynamic communication delay and the communication network congestion warning threshold is calculated. When the difference is greater than or equal to 0, the communication status weighting factor is used as a communication penalty term; when the difference is less than 0, the communication penalty term is 0. Subtracting the thermal capacity loss term and the communication penalty term from 1 yields the dynamic degradation coefficient. The corresponding functional relationship is: ; In the formula, Indicates the dynamic degradation coefficient; This represents the current calculated cumulative heat capacity integral; This indicates the maximum allowable heat capacity integral safety threshold of the main circuit of the equipment, and its value is determined by the thermal balance test of the equipment. and These represent the weighting factors for thermal capacity state and communication state, respectively. This indicates the dynamic communication latency obtained through cross-layer mapping; This indicates the set communication network congestion warning threshold; For step functions, when the variable Output 1 when Output 0 when the time is right. As a preferred method, the weighting factor... It is usually set between 0.1 and 0.15. The value is set between 0.05 and 0.1 to ensure that conventional thermodynamic evolution dominates, and the sum of both is configured to be less than 0.25 to avoid excessive intervention that could lead to frequent malfunctions.

[0051] S405 performs boundary limiting processing on the degradation coefficient. If the main circuit is under high load for a long time and extreme network disconnection occurs, directly substituting into the above joint calculation formula will result in the calculated value of the degradation coefficient being too small or even negative. Conversely, when some devices are just started up and communication is excellent, the calculation result may deviate from expectations due to sensor zero-point drift or data initialization. To ensure the integrity of the algorithm logic and the continuity of system power supply, the measurement control unit applies a bidirectional boundary limiting mechanism to the calculated dynamic degradation coefficient. As a preferred method, the measurement control unit internally sets a lower threshold constant, which is usually set between 0.8 and 0.85. When the measurement control unit detects that the degradation coefficient output by the formula is lower than the lower threshold, it limits the value of the dynamic degradation coefficient to the lower threshold constant; at the same time, if the calculated value is detected to be greater than 1.0, it forcibly truncates it to the upper limit value of 1.0 to ensure that the degradation coefficient is only used to tighten rather than relax the protection boundary. The limited degradation coefficient is then used to update the overload protection boundary parameters in the digital domain.

[0052] S406 triggers a combined hardware and software trip command. The measurement and control unit multiplies the factory-configured rated current reference value within the microprocessor 6 with the degradation factor after limiting, generating a dynamic overload threshold for the current operating condition. During subsequent operating cycles, the measurement and control unit continuously compares the real-time extracted current RMS value with this dynamic overload threshold. When the real-time current RMS value exceeds this dynamic overload threshold, and the duration meets the preset inverse time delay condition, the measurement and control unit determines that the main circuit has entered an abnormal heating state requiring intervention. In this case, the measurement and control unit sends a digital-domain trip command to the trip drive unit via the internal logic bus. The trip drive unit responds to this command and drives the mechanical mechanism of the base unit to disconnect the main circuit. By introducing multi-dimensional state parameters and boundary limiting, this digital-domain degradation control logic, based on the hardware transient protection of the underlying analog comparator, constructs a delayed overload protection mechanism adapted to the current equipment aging state and communication environment. For the selection of power switching transistors and the design of the drive topology inside the tripping drive unit, those skilled in the art can make conventional configurations based on the operating power consumption of the electromagnetic coil. The construction of its hardware drive circuit is a well-known technology in this field and will not be described in detail here.

[0053] Specific application examples: Assume the circuit breaker control system is installed in a 100kW commercial / industrial rooftop distributed photovoltaic grid-connected node. The circuit breaker's rated operating current ( The current is 250A, and the grid frequency is 50Hz (fundamental frequency period). The equipment has been operating in harsh outdoor environments for 3 years. The surface of the main contact 1 has suffered slight ablation due to repeated arc interruptions. In addition, the photovoltaic inverter communication network has recently experienced severe electromagnetic interference due to the expansion of the factory area, resulting in increased communication latency.

[0054] At midday, with intense sunlight and full photovoltaic power generation, the main circuit current RMS reached 230A. After the measurement and control unit locked at the zero-crossing point, it predicted that the fundamental peak value (approximately 325A) would be reached in 5ms. Figure 3 As shown, the system accurately calculates and marks the extreme points of the fundamental current after the zero-crossing point. Near the predicted peak moment, the flying isolation array 5 activates, the high-voltage side switch closes, and without introducing hundreds of volts of common-mode voltage, the sampling capacitor captures a micro-region voltage difference of approximately 162.5mV across the contacts. During the peak period, the sampling capacitor charges rapidly to approach the actual voltage drop across the contacts and maintains a stable charge after entering the physical isolation dead zone, ultimately outputting an accurate micro-region voltage drop signal to the low-voltage measurement terminal.

[0055] The measurement and control unit calculates a single-contact resistance of 0.5 mΩ using the peak voltage and current (162.5 mV / 325 A). This resistance is then superimposed with the internal fixed copper busbar resistance of 0.1 mΩ to reconstruct the current equivalent heating resistance. (The factory standard value is only 0.25mΩ, indicating that the equipment has aged.) Substituting this thermal resistance into the thermodynamic discrete model, the current cumulative heat capacity integral is calculated. The safety threshold has been reached. 80% (i.e. At this point, the equipment is on the verge of exacerbating its overheating.

[0056] The communication unit sends a probe message to the external photovoltaic inverter 10 and calculates the smoothed dynamic communication delay. (far exceeding the congestion warning threshold) This indicates that once an anomaly such as reverse power supply occurs, the circuit breaker cannot quickly isolate the fault using the master station's dispatch instructions.

[0057] The measurement and control unit jointly calculates the degradation factor. Let the weights be... (Heat capacity weight) (Communication weight): 0.08) = 0.80, according to the boundary limit rules (lower limit set at 0.85). It is truncated and assigned a value of 0.85. At this point, the original overload protection threshold of 250A is dynamically downgraded and corrected to: 250A × 0.85 = 212.5A.

[0058] Since the current actual current (230A) is already greater than the degraded threshold (212.5A), the circuit breaker initiates an inverse time delay program and trips automatically after several minutes. If the traditional fixed threshold (250A) were used, the circuit breaker would not trip, but with the aging thermal resistance (0.6mΩ), the actual heat generated by the equipment is 2.4 times that of its factory condition, and continued operation could easily lead to an electrical fire. This system, through the flexible and rigid synergy of thermal capacity and communication in the degraded circuit, successfully eliminated the fire hazard in its early stages.

[0059] Experimental verification and effect comparison: Experimental testing conditions Control group A: Traditional thermomagnetic molded case circuit breaker (MCCB, based on bimetallic strip).

[0060] Control group B: Commercially available conventional electronic circuit breakers (fixed tripping threshold, no thermal resistance feedforward correction).

[0061] Experimental Group C: The modular circuit breaker control system provided by this invention.

[0062] Test conditions were set as follows: 1.15 times the rated current was injected (overload condition). Severe contact aging was simulated by using a series fine-tuning resistor (thermal resistance increased to 2.5 times the reference value); at the same time, network anomalies were simulated by injecting an average communication delay of 300ms.

[0063] Table 1. Test Data Comparison Table Conclusion: Referring to Table 1, under the severe dual-edge conditions of equipment aging and communication degradation, both traditional equipment and conventional electronic equipment, lacking physical state tracking, exhibited severe overload malfunctions and dangerous temperature rises. For example... Figure 4 As shown, due to the lack of dynamic thermal resistance correction, the traditional fixed resistance estimation curve used in the control group remained at a low level, which seriously deviated from the rapid increase in the actual physical temperature rise; while the experimental group C, due to the introduction of the heat capacity model reconstruction of feedforward physical wear, had an estimation curve that closely matched the actual heating situation.

[0064] This invention utilizes feedforward thermal resistance calculation and state degradation (adjusting the protection threshold by lowering the degradation coefficient) to ensure that the estimated integral in the experimental group exceeds the adjustable protection intervention threshold and triggers tripping around 18 minutes into the operation, thereby stably cutting off the extreme temperature rise within the safe range of 72K. Compared to the control group, this invention effectively eliminates monitoring blind spots and improves system safety by approximately 40%.

Claims

1. A circuit breaker control method based on modular design, characterized in that, Includes the following steps: The transient current is obtained by continuously sampling the current of the main circuit, the fundamental period of the transient current is extracted and the fundamental peak time of the transient current is located, and the flying isolation array (5) is controlled at the fundamental peak time to obtain the micro-area voltage drop value at both ends of the main contact (1); The effective value of the current in the main circuit is calculated based on the transient current, the equivalent heating resistance is calculated using the micro-area voltage drop value, and the equivalent heating resistance and the effective value of the current are substituted into the thermodynamic discrete model to calculate the heat capacity integral. Monitor the status of the communication link and obtain communication delay parameters; When the transient current exceeds the short-circuit threshold, the tripping mechanism (3) is triggered to disconnect the main circuit; The dynamic degradation coefficient is calculated based on the thermal capacity integral and the communication delay parameter. The dynamic overload threshold is generated using the dynamic degradation coefficient. When the effective value of the current exceeds the dynamic overload threshold and meets the preset inverse time delay condition, the tripping mechanism (3) is triggered to cut off the main circuit.

2. The circuit breaker control method based on modular design according to claim 1, characterized in that, Locating the fundamental peak time of the transient current includes the following steps: The transient current is discretely sampled to generate a transient current sampling sequence; The zero-crossing point is determined by comparing the polarity jump of adjacent data points in the transient current sampling sequence, and the fundamental period is calculated based on the difference in timestamps of two adjacent zero-crossing points in the same direction. The predicted fundamental peak time is calculated by adding the most recently determined zero-crossing timestamp to a quarter of the fundamental frequency period, and then loading the fundamental peak time into a timer as a trigger reference.

3. The circuit breaker control method based on modular design according to claim 1, characterized in that, Controlling the flying isolation array (5) to obtain the micro-area voltage drop value across the main contact (1) includes the following steps: Output a first control pulse to the flying isolation array (5) to close the high-voltage side switch group, and use the voltage drop across the main contact (1) to charge the sampling capacitor; The first control pulse is canceled to disconnect the high-voltage side switch group, and the physical isolation dead time is entered. During the physical isolation dead time, the sampling capacitor is in a floating isolation state. After the physical isolation dead time, a second control pulse is output to close the low-voltage side switch group, and the static voltage of the sampling capacitor is read as the micro-area voltage drop value.

4. The circuit breaker control method based on modular design according to claim 1, characterized in that, The calculation of the equivalent heating resistance using the micro-region voltage drop value includes the following steps: Obtain the peak value of the transient current corresponding to the peak value of the fundamental frequency; Calculate the ratio of the absolute value of the micro-area voltage drop to the absolute value of the transient current peak value to obtain the single contact resistance; A moving average filtering algorithm is applied to the single contact resistance over multiple consecutive periods to generate a dynamic contact resistance. The dynamic contact resistance is added to the inherent loop resistance parameter to reconstruct the equivalent heating resistance.

5. The circuit breaker control method based on modular design according to claim 1, characterized in that, Substituting the equivalent heating resistance and the effective value of the current into the thermodynamic discrete model, the heat capacity integral is calculated, including the following steps: Obtain the preset equivalent heat dissipation coefficient, and use the heat capacity integral generated in the previous calculation cycle as the historical value of the heat capacity integral; The real-time heating power is obtained by multiplying the square of the effective value of the current by the equivalent heating resistance. Calculate the product of the equivalent heat dissipation coefficient, the historical value of the integral of the heat capacity, and the fundamental period; The heat capacity integral of the current calculation cycle is generated by adding the historical value of the heat capacity integral to the real-time heating power and subtracting the product.

6. The circuit breaker control method based on modular design according to claim 1, characterized in that, Obtaining communication delay parameters includes the following steps: Send a probe message carrying a transmission timestamp to the external photovoltaic inverter (10); Receive the response message returned by the external photovoltaic inverter (10) and obtain the receiving timestamp; Calculate the difference between the received timestamp and the sent timestamp to obtain the round-trip delay. The single round-trip delay is weighted and summed with the historical communication delay value saved in the previous period to generate the communication delay parameter, and the communication delay parameter is written into the shared memory space.

7. The circuit breaker control method based on modular design according to claim 1, characterized in that, When the transient current exceeds the short-circuit threshold, the tripping mechanism (3) is triggered to disconnect the main circuit, including the following steps: The short-circuit threshold is converted into a DC reference voltage, and the DC reference voltage is applied to the inverting input of the analog comparator; The main circuit current is sensed by the current transformer (4), and an analog signal reflecting the transient current is obtained. The analog signal is subjected to absolute value detection to obtain a unipolar signal, and the unipolar signal is connected to the non-inverting input terminal of the analog comparator. The level of the unipolar signal at the non-inverting input terminal is compared with the DC reference voltage at the inverting input terminal. When the level of the unipolar signal exceeds the DC reference voltage, the output terminal of the analog comparator flips to generate a hardware trigger pulse. The hardware trigger pulse is transmitted to the drive circuit of the tripping mechanism (3) to trigger the tripping mechanism (3) to cut off the main circuit.

8. The circuit breaker control method based on modular design according to claim 1, characterized in that, The dynamic degradation coefficient is calculated based on the thermal capacity integral and the communication delay parameter, including the following steps: Obtain the preset maximum heat capacity integral safety threshold and heat capacity state weighting factor, calculate the ratio of the heat capacity integral to the maximum heat capacity integral safety threshold, and multiply the ratio by the heat capacity state weighting factor to obtain the heat capacity loss term; Obtain a preset communication network congestion warning threshold and a communication state weight factor, calculate the difference between the communication delay parameter and the communication network congestion warning threshold, and when the difference is greater than or equal to 0, use the communication state weight factor as a communication penalty term; when the difference is less than 0, the communication penalty term is 0. Subtract the heat capacity loss term from 1 and the communication penalty term to obtain the dynamic degradation coefficient.

9. The circuit breaker control method based on modular design according to claim 1, characterized in that, The process of generating a dynamic overload threshold using the dynamic degradation coefficient includes the following steps: Obtain a preset lower threshold constant and an upper threshold value. When the dynamic degradation coefficient is lower than the lower threshold constant, limit the dynamic degradation coefficient to the lower threshold constant. When the dynamic degradation coefficient is greater than the upper limit value, the dynamic degradation coefficient is truncated to the upper limit value; Obtain the rated current reference value, multiply the rated current reference value by the dynamic degradation coefficient, and generate the dynamic overload threshold.

10. A circuit breaker control system based on modular design, applied to the circuit breaker control method based on modular design as described in any one of claims 1-9, characterized in that, include: The base unit contains a main contact (1), a tripping mechanism (3), a current transformer (4), a flying isolation array (5), an absolute value detector circuit, and an analog comparator. The flying isolation array (5) includes a sampling capacitor, a high-voltage side switch group, and a low-voltage side switch group. The input terminal of the high-voltage side switch group is connected to the input and output terminals of the main contact (1). The output terminal of the high-voltage side switch group is connected to both ends of the sampling capacitor. The input terminal of the low-voltage side switch group is connected to both ends of the sampling capacitor. The input terminal of the absolute value detector circuit is connected to the current transformer (4). The output terminal of the absolute value detector circuit is connected to the non-inverting input terminal of the analog comparator. The output terminal of the analog comparator is connected to the drive circuit of the tripping mechanism (3). The measurement control unit is equipped with a microprocessor (6) and a digital-to-analog converter (7). The control pin of the measurement control unit is connected to the flying isolation array (5). The input terminal of the microprocessor (6) is connected to the output terminal of the low-voltage side switch group. The output terminal of the digital-to-analog converter (7) is connected to the inverting input terminal of the analog comparator. The communication unit includes a transceiver (8) and a communication processor (9), and the communication unit is connected to an external photovoltaic inverter (10) through the transceiver (8).

Images