Fault isolation and current limiting bus coupler for network-forming converter group ac bus

Abstract

The application relates to the technical field of power system fault protection, and provides a fault isolation and current limiting bus coupler for an AC bus of a network-constructed converter group, which comprises a segmented busbar structure including a first busbar section and a second busbar section; an explosive bridge wire circuit breaker connected between the first busbar section and the second busbar section, having a bridge wire and an explosive column in contact with the bridge wire, and being used for disconnecting the electrical connection between the first busbar section and the second busbar section within a second predetermined time after receiving a trigger signal; a current limiting reactor connected in parallel with the explosive bridge wire circuit breaker, and being used for converting the fault current flowing through the explosive bridge wire circuit breaker to the current limiting reactor after the electrical connection is disconnected, so as to limit the short-circuit current peak value; and a fault detection unit connected with the explosive bridge wire circuit breaker in signal connection, and being used for sending the trigger signal within a first predetermined time. In this way, the propagation of the fault current among the converter groups is physically blocked in the protection action blind area, and the cascading off-grid is prevented.

Description

Technical Field

[0001] This invention relates to the technical field of power system fault protection, specifically to a fault isolation and current limiting bus tie cabinet for AC busbars of grid-type converter groups. Background Technology

[0002] Grid-connected converters are increasingly used in new energy grid integration and microgrids. These converters operate by simulating the external characteristics of a synchronous generator, each maintaining its own internal electromotive force (EMF). However, problems arise when a short-circuit fault occurs on the common AC bus: the electrical distance between each converter and the fault point is different, and their control parameters and droop characteristics also vary, making it difficult for the amplitude and phase of their respective output EMFs to be consistent at the moment of the fault.

[0003] The busbar itself has very low impedance, so any difference in internal potential will immediately cause circulating current between the converters. The magnitude of this circulating current is directly proportional to the potential difference and inversely proportional to the impedance, and can surge very high on low-impedance buses. At the same time, the converters are competing for reactive power—some are already deeply saturated, while others are still absorbing reactive power, resulting in a chaotic voltage distribution. As a result, fault current surges back and forth between the converter group, quickly overloading the power devices.

[0004] Some existing technical solutions attempt to solve this problem using high-speed communication, such as fiber optics. These solutions involve a central controller collecting the status of all converters and then issuing unified commands, or having converters align their status through distributed communication. However, the entire communication link, from sampling, encoding, transmission to decoding, decision-making, and execution, typically has a delay of several milliseconds. The current rise rate after a short-circuit fault is very high. Within this "control blind zone" of communication delay, the current peak may have already exceeded the withstand limit of the converter's power devices. The overcurrent protection will activate first, causing converters to disconnect from the grid one after another, and communication coordination fails before it can even function.

[0005] Besides communication delays, there's also the issue of the operating speed of conventional protection devices. Traditional circuit breakers typically take tens of milliseconds from detecting a fault to the complete separation of the contacts. During this protection blind zone, there are no physical barriers between the converter group to block the propagation path of the fault current. Physically separating the faulty and non-faulty sections while simultaneously limiting the peak short-circuit current to within the converter's tolerance range requires actions that must be completed within hundreds of microseconds. Summary of the Invention

[0006] To achieve the above objectives, in one embodiment of the present invention, a fault isolation and current limiting bus tie cabinet for AC buses of a grid-type converter group is proposed, comprising: a segmented busbar structure, including a first busbar segment and a second busbar segment; an explosive bridge wire circuit breaker connected between the first busbar segment and the second busbar segment, having a bridge wire and an explosive charge in contact with the bridge wire, for disconnecting the electrical connection between the first busbar segment and the second busbar segment within a second predetermined time after receiving a trigger signal; a current limiting reactor connected in parallel with the explosive bridge wire circuit breaker, for diverting the fault current flowing through the explosive bridge wire circuit breaker to the current limiting reactor after the electrical connection is disconnected, thereby limiting the peak value of the short-circuit current; and a fault detection unit connected to the explosive bridge wire circuit breaker for issuing the trigger signal within a first predetermined time.

[0007] Here, upon receiving the trigger signal, the explosive wire circuit breaker physically disconnects the electrical connection between the first busbar section and the second busbar section within the second predetermined time period, thereby completing the disconnection of the fault section within the operation blind zone of the protection device. Because the current-limiting reactor is connected in parallel with the explosive wire circuit breaker, at the instant the electrical connection is disconnected, the fault current is forcibly commutated to the current-limiting reactor. The impedance of the current-limiting reactor limits the peak short-circuit current below the overcurrent withstand limit of the grid-type converter. The fault detection unit issues the trigger signal within the first predetermined time period, ensuring that the entire timing chain from the occurrence of the fault to the operation of the explosive wire circuit breaker is closed within the sub-millisecond time window. Therefore, the coordination of the segmented busbar structure, the explosive wire circuit breaker, the current-limiting reactor, and the fault detection unit solves the problem of fault current propagation between the grid-type converter group within the protection operation blind zone using purely physical means, without relying on communication coordination.

[0008] Optionally, in some embodiments of the system, the explosive bridge wire circuit breaker includes: a current-carrying conductor having a pre-formed break, the current-carrying conductor being connected in series between the first busbar section and the second busbar section; an explosive charge, shaped into a shaped charge structure, in contact with the bridge wire, the shaped charge groove of the explosive charge being aligned with the pre-formed break, for generating a directional metal jet to cut the current-carrying conductor after detonation; and an insulating partition fixed within the pre-formed break, for separating the break surfaces on both sides of the pre-formed break after the current-carrying conductor is cut, so as to prevent arc reignition between the breaks after the fault current is switched to the current-limiting reactor.

[0009] In this scheme, after the explosive charge is shaped into the shaped charge structure, when the bridge wire detonates, the shaped charge groove concentrates the detonation energy and releases it along the direction of the pre-formed fracture, generating the directional metal jet. The directional metal jet cuts the current-carrying conductor at extremely high speed, forming a neat fracture at the pre-formed fracture. The insulating partition is pre-placed within the pre-formed fracture. At the instant the current-carrying conductor is cut by the directional metal jet, the insulating partition is inserted between the fracture surfaces on both sides of the fracture, physically separating the fracture surfaces. This separation action occurs synchronously with the commutation process of the fault current to the current-limiting reactor. The insulating partition prevents the arc reignition that may occur between the fracture surfaces due to the recovery voltage. Therefore, the combination of the shaped charge cutting structure, the prefabricated break, and the insulating partition completes the three functions of cutting, separating, and restoring insulation within the sub-millisecond timescale, thus solving the problem of arc reignition between the breaks after the explosive bridge wire circuit breaker is disconnected.

[0010] Optionally, in some embodiments of the system, the insulating partition is held on one side of the pre-formed fracture by an elastic pre-compression mechanism, the elastic pre-compression mechanism including a compression spring and a locking pin, the locking pin locking the insulating partition in a compressed position before the explosive charge is detonated, the detonation pressure generated by the detonation of the explosive charge pushes the locking pin to release, and the compression spring pushes the insulating partition to slide laterally into the fracture surface along the pre-formed fracture, so as to actively insert and separate the fracture surface at the moment the current-carrying conductor is cut.

[0011] In this embodiment, the elastic pre-compression mechanism pre-positions the insulating partition in the compression position before the explosive charge is detonated, and the compression spring stores the elastic potential energy. When the explosive charge is detonated, the detonation pressure not only drives the directional metal jet to cut the current-carrying conductor, but also pushes the locking pin to release. The release of the locking pin triggers the compression spring to release the stored elastic potential energy instantaneously, pushing the insulating partition to slide laterally into the fracture surface along the pre-formed fracture. This active insertion action is almost completely synchronized with the cutting of the current-carrying conductor, rather than passively waiting for the fracture to form before performing the separation. The timing of the active insertion of the insulating partition is directly driven by the detonation event of the explosive charge and is naturally coordinated with the commutation process of the fault current. Therefore, the cooperation between the elastic pre-compression mechanism and the locking pin changes the separation action of the insulating partition from a passive response to an active execution, solving the problem of precise synchronization between the insertion timing of the insulating partition and the cutting time of the current-carrying conductor.

[0012] Optionally, in some embodiments of the system, the insulating partition further includes a pre-placed arc-extinguishing medium chamber. The pre-placed arc-extinguishing medium chamber is embedded in the surface of the insulating partition facing the pre-formed fracture. The pre-placed arc-extinguishing medium chamber is filled with powdered arc-extinguishing medium. The opening of the pre-placed arc-extinguishing medium chamber is sealed by a molten sealing film. The molten sealing film melts and ruptures under the action of the high-temperature detonation products generated by the detonation of the explosive charge, allowing the powdered arc-extinguishing medium to be sprayed between the fracture surfaces under the high-pressure gas flow of the detonation products. This allows the powdered arc-extinguishing medium to absorb arc energy and accelerate the recovery of the dielectric strength between the fracture surfaces while the insulating partition separates the fracture surfaces.

[0013] In this design, the pre-placed arc-extinguishing medium chamber is embedded in the side of the insulating partition facing the pre-formed fracture, such that the powdered arc-extinguishing medium is in close proximity to the fracture surface in the space. The molten sealing membrane seals the powdered arc-extinguishing medium within the pre-placed arc-extinguishing medium chamber at room temperature. When the explosive charge detonates, the high-temperature detonation products cause the molten sealing membrane to melt and rupture. The high-pressure gas flow of the detonation products carries the powdered arc-extinguishing medium out of the pre-placed arc-extinguishing medium chamber, directly acting on the space between the fracture surfaces. The powdered arc-extinguishing medium is sprayed between the fracture surfaces during the initial stage of arc formation, absorbing the arc energy and accelerating the recovery of the dielectric strength between the fracture surfaces. This spraying action occurs simultaneously with the separation action of the insulating partition on the fracture surfaces, integrating physical separation with chemical arc extinguishing. Therefore, the structure of the pre-placed arc-extinguishing medium chamber and the molten sealing film enables the arc-extinguishing medium to be precisely released at the most needed moment, solving the problems of rapid dissipation of arc energy and rapid recovery of insulation strength between the breaks after the explosive bridge wire circuit breaker is disconnected.

[0014] Optionally, in some embodiments of the system, the explosive bridge wire circuit breaker includes at least two series-connected explosive bridge wire break units, each of which has an independent bridge wire and an explosive charge. The at least two series-connected explosive bridge wire break units are connected in series between the first busbar section and the second busbar section. Adjacent explosive bridge wire break units are connected by a voltage equalizing capacitor. The voltage equalizing capacitor is used to equalize the recovery voltage across each explosive bridge wire break unit after the explosive bridge wire circuit breaker trips, so as to accelerate the commutation process of the fault current to the current-limiting reactor.

[0015] In this embodiment, the at least two series-connected explosive bridge wire break units distribute the recovery voltage, which would originally be borne by a single break, across multiple explosive bridge wire break units. The recovery voltage across each explosive bridge wire break unit is balanced by the voltage-equalizing capacitor, reducing the recovery voltage of a single explosive bridge wire break unit and thus decreasing the risk of arc reignition between the breaks. Simultaneously, the reduced recovery voltage of each explosive bridge wire break unit means a decrease in the combined arc voltage across the explosive bridge wire circuit breaker, forcing the fault current to transfer more quickly to the parallel current-limiting reactor. The voltage-equalizing capacitor provides a high-frequency voltage-equalizing path after each explosive bridge wire break unit is disconnected, causing the recovery voltage of each explosive bridge wire break unit to converge within a very short time. Therefore, the combination of the multi-break series connection and the voltage equalization capacitor solves the problem that the arc reignites when a single broken bridge wire unit experiences excessively high recovery voltage after breaking by reducing the recovery voltage of a single broken break and accelerating the commutation of the fault current.

[0016] Optionally, in some embodiments of the system, the explosive bridge wire circuit breaker includes at least two detonation units with different amounts of explosive charge, and the at least two detonation units are stacked along the axial direction of the explosive charge. The bridge wire of each detonation unit passes through the explosive charge of the corresponding detonation unit and is connected to an independent trigger terminal. The fault detection unit includes multiple independent trigger output channels, which are respectively connected to the independent trigger terminals of the at least two detonation units to trigger the at least two detonation units in a predetermined time sequence, generating detonation waves that increase sequentially along the axial direction.

[0017] In this scheme, at least two detonation units are stacked along the axial direction of the explosive charge. The multiple independent trigger output channels of the fault detection unit output trigger pulses to the independent trigger terminals of each detonation unit according to a predetermined time sequence. Because each detonation unit has a different amount of explosive charge and a different trigger sequence, the propagation of the detonation wave along the axial direction is shaped into a wavefront that intensifies sequentially. This time-division, staged detonation method transforms the breaking process of the explosive bridge wire circuit breaker from a single burst to a controlled, gradual energy release, resulting in a smoother breaking process on the current-carrying conductor and less mechanical impact on adjacent structures. The sequential intensification of the detonation wave along the axial direction also makes the transition from a single break to multiple series breaks more orderly. Therefore, the axial stacking arrangement and the timing control of the multiple independent trigger output channels solve the problems of excessive mechanical impact and uncontrollable breaking process caused by a single detonation of the explosive bridge wire circuit breaker.

[0018] Optionally, in some embodiments, the system further includes a voltage clamping and energy dissipation network connected in parallel across the current-limiting reactor. This network includes: a solid-state switch branch, composed of silicon carbide junction field-effect transistors connected in series, connected in parallel with the current-limiting reactor, used to conduct when the exploding bridge wire circuit breaker opens and generates an arc voltage, thereby commutating the inductive current in the current-limiting reactor to the solid-state switch branch; a zinc oxide surge arrester array, connected in series with the solid-state switch branch, used to clamp the commutated bus voltage below a predetermined insulation level; and an energy-dissipating resistor connected in parallel across the zinc oxide surge arrester array, used to dissipate residual oscillation energy.

[0019] In this embodiment, the voltage clamping and energy dissipation network is connected in parallel with the current-limiting reactor, forming a three-level energy management chain. When the exploding bridge wire circuit breaker disconnects and generates the arc voltage, the solid-state switch branch first conducts, providing a low-impedance commutation path for the inductive current stored in the current-limiting reactor. The inductive current is transferred from the current-limiting reactor to the solid-state switch branch. The zinc oxide surge arrester array is connected in series with the solid-state switch branch. When the bus voltage after commutation exceeds the operating voltage of the zinc oxide surge arrester array, the zinc oxide surge arrester array conducts and clamps the bus voltage below the predetermined insulation level, preventing the overvoltage from damaging the insulation of the bus tie cabinet and the grid-type converter. The energy-dissipating resistor is connected in parallel across the zinc oxide surge arrester array, slowly dissipating the oscillation energy absorbed by the zinc oxide surge arrester array during clamping as heat. Therefore, the three-level energy management chain consisting of the solid-state switch branch, the zinc oxide surge arrester array, and the energy-dissipating resistor solves the problems of the freewheeling current of the inductive current and the commutation overvoltage in the current-limiting reactor after the exploding bridge wire circuit breaker is disconnected through the orderly commutation, clamping, and dissipation.

[0020] Optionally, in some embodiments, the zinc oxide surge arrester array includes at least two sets of zinc oxide valve columns. These at least two sets of zinc oxide valve columns have different DC reference voltages and are connected in parallel to each other via a ceramic-sealed three-electrode gas discharge tube. The two main electrodes of the ceramic-sealed three-electrode gas discharge tube are respectively connected in parallel to the two ends of the first set of zinc oxide valve columns with the lower DC reference voltage. The trigger electrode of the ceramic-sealed three-electrode gas discharge tube is connected to an auxiliary trigger capacitor via a trigger resistor. The auxiliary trigger capacitor is charged by the initial surge voltage of the voltage clamping and energy dissipation network to trigger the ceramic-sealed three-electrode gas discharge tube to conduct when the initial surge voltage reaches a set value. This allows the first set of zinc oxide valve columns to be clamped independently in the initial stage after the fault current commutation. After conduction, the energy is shared by the second set of zinc oxide valve columns with the higher DC reference voltage and the first set of zinc oxide valve columns. The ceramic-sealed three-electrode gas discharge tube also includes components connected in parallel to the two sets of zinc oxide valve columns. The voltage change rate detection branch between the main electrodes consists of a detection capacitor and a detection resistor connected in series. The common node of the detection capacitor and the detection resistor is connected to the trigger electrode. When the rise rate of the initial surge voltage exceeds a preset voltage change rate threshold, the coupling current of the detection capacitor generates a trigger voltage across the detection resistor, causing the ceramic-sealed three-electrode gas discharge tube to conduct in advance before the initial surge voltage reaches the set value. A positive temperature coefficient thermistor is also connected in series in the main discharge circuit of the ceramic-sealed three-electrode gas discharge tube. The positive temperature coefficient thermistor is in a low resistance state at room temperature and does not affect the conduction of the ceramic-sealed three-electrode gas discharge tube. During the conduction and continuous current of the ceramic-sealed three-electrode gas discharge tube, the resistance increases sharply due to the self-heating effect, limiting the current through the ceramic-sealed three-electrode gas discharge tube, thereby assisting the ceramic-sealed three-electrode gas discharge tube to reliably turn off after the voltage of the zinc oxide surge arrester array decreases, preventing follow current.

[0021] In this scheme, the graded clamping mechanism of the at least two sets of zinc oxide valve plates is automatically switched by the ceramic-sealed three-electrode gas discharge tube. In the initial stage after the fault current commutation, the initial surge voltage is insufficient to trigger the conduction of the ceramic-sealed three-electrode gas discharge tube; only the first set of zinc oxide valve plates with the lower DC reference voltage bears the surge energy and performs clamping. When the initial surge voltage reaches the set value, the charging voltage of the auxiliary trigger capacitor triggers the conduction of the ceramic-sealed three-electrode gas discharge tube, and the second set of zinc oxide valve plates with the higher DC reference voltage connects, sharing the subsequent energy with the first set of zinc oxide valve plates. Simultaneously, when the rise rate of the initial surge voltage exceeds the voltage change rate threshold, the detection capacitor in the voltage change rate detection branch generates the trigger voltage across the detection resistor through the coupling current, causing the ceramic-sealed three-electrode gas discharge tube to be triggered and conduct before the initial surge voltage reaches the set value, shortening the time the first set of zinc oxide valve plates bears the surge energy alone. During the conduction of the ceramic-sealed three-electrode gas discharge tube and the continuous flow, the resistance of the positive temperature coefficient thermistor increases sharply due to the self-heating effect, limiting the current flowing through the ceramic-sealed three-electrode gas discharge tube and assisting it in reliably turning off after the voltage of the zinc oxide surge arrester array decreases. Therefore, the synergy of the three mechanisms of graded clamping, early triggering of voltage change rate detection, and follow current interruption by the positive temperature coefficient thermistor solves the problems of uneven energy distribution and difficulty in turning off the follow current when the zinc oxide surge arrester array faces surge voltages of different steepness and amplitude.

[0022] Optionally, in some embodiments of the system, the solid-state switch branch further includes a self-powered trigger circuit, which includes: a power-harvesting resistor, one end of which is connected to the drain of one end of the solid-state switch branch, and the other end of which is connected to the cathode of a Zener diode through an isolation diode. The anode of the isolation diode is connected to the power-harvesting resistor, and the cathode is connected to the cathode of the Zener diode. The anode of the Zener diode is connected to the gate of the solid-state switch branch; and a trigger capacitor, connected in parallel across the Zener diode, used to trigger the drain when the exploding bridge wire circuit breaker opens and generates an arc voltage. When the voltage between the source and the source rises, the trigger capacitor is charged through the power extraction resistor and the isolation diode. When the voltage of the trigger capacitor exceeds the breakdown voltage of the Zener diode, the solid-state switch branch is driven to conduct. A discharge resistor is connected in parallel across the trigger capacitor. The resistance of the discharge resistor is much larger than that of the power extraction resistor, for example, more than 10 times larger. It is used to slowly discharge the charge stored on the trigger capacitor after the exploding bridge wire circuit breaker trips, so that the solid-state switch branch automatically returns to the blocking state after a predetermined time.

[0023] In this embodiment, the self-powered trigger circuit does not require any external control power supply. When the exploding bridge wire circuit breaker opens, generating an arc voltage, the voltage between the drain and source rises. The power-collecting resistor and the isolation diode form the charging path, charging the trigger capacitor. When the voltage of the trigger capacitor exceeds the breakdown voltage of the Zener diode, the Zener diode conducts, the gate is driven, and the solid-state switch branch conducts, completing the commutation of the inductive current. The isolation diode prevents the charge on the trigger capacitor from being reverse-discharged through the power-collecting resistor after the voltage between the drain and source drops, ensuring that the solid-state switch branch has sufficient sustaining time after conduction. The resistance value of the discharge resistor is much larger than that of the power-collecting resistor. After the exploding bridge wire circuit breaker opens, the discharge resistor discharges the charge on the trigger capacitor at an extremely slow rate, allowing the solid-state switch branch to automatically return to the blocking state after a predetermined time, preparing for the next fault event. Therefore, the combination of the power-harvesting resistor, the isolation diode, the trigger capacitor, and the discharge resistor enables the solid-state switch branch to possess the three functions of self-power-harvesting triggering, maintaining conduction, and automatic reset, thus solving the problem of reliable triggering and automatic recovery of the solid-state switch branch under conditions without external power supply.

[0024] Optionally, in some embodiments of the system, the explosive bridge wire circuit breaker and the current-limiting reactor are connected in parallel between the first busbar section and the second busbar section via a stacked busbar structure. The stacked busbar structure includes alternating positive busbar layers, negative busbar layers, and insulating layers. The positive busbar layer and the negative busbar layer are respectively connected to one end of the explosive bridge wire circuit breaker and one end of the current-limiting reactor, such that the loop area of ​​the parallel circuit formed by the explosive bridge wire circuit breaker and the current-limiting reactor is smaller than a predetermined area, thereby reducing the parasitic inductance when the fault current commutates from the explosive bridge wire circuit breaker to the current-limiting reactor.

[0025] In this scheme, the stacked busbar structure utilizes the alternating and tightly fitted positive and negative busbar layers to compress the loop area of ​​the parallel circuit formed by the explosive bridge wire circuit breaker and the current-limiting reactor to below the predetermined area. Since the parasitic inductance of the circuit is positively correlated with the loop area, reducing the loop area directly leads to a reduction in parasitic inductance. Physically, this reduction in parasitic inductance means that when the fault current commutates from the explosive bridge wire circuit breaker to the current-limiting reactor, the resistance of the parasitic inductance to the current change is weakened, the commutation speed is accelerated, and the current-cutting overvoltage generated during the commutation process is also reduced. Therefore, the stacked busbar structure, through its compact geometric design, optimizes the commutation dynamic characteristics between the explosive bridge wire circuit breaker and the current-limiting reactor from a physical perspective, solving the problems of commutation delay and overvoltage caused by the parasitic inductance of the parallel circuit.

[0026] Optionally, in some embodiments of the system, in the at least two series-connected explosive bridge wire break units, the cross-sectional area of ​​the bridge wire of the first explosive bridge wire break unit closer to the first busbar section is larger than the cross-sectional area of ​​the bridge wire of the second explosive bridge wire break unit farther from the first busbar section. This makes the melting time of the first explosive bridge wire break unit later than that of the second explosive bridge wire break unit. When the explosive bridge wire circuit breaker trips, the second explosive bridge wire break unit trips first to bear the initial recovery voltage, and then the first explosive bridge wire break unit trips later to bear the remaining recovery voltage. This achieves time-division sequential tripping of each of the explosive bridge wire break units, reducing the voltage equalization accuracy requirements of the voltage equalization capacitor.

[0027] In this embodiment, the differentiated design of the bridge wire cross-sectional area utilizes the positive correlation between the bridge wire melting time and the cross-sectional area. The second explosive bridge wire break unit has a smaller bridge wire cross-sectional area, and under the same fault current, it melts and completes the break before the first explosive bridge wire break unit. At this time, all the recovery voltage is borne by the second explosive bridge wire break unit. As the bridge wire of the first explosive bridge wire break unit melts at a later time, the recovery voltage is shared by the two explosive bridge wire break units. This time-division sequential breaking method results in different recovery voltage amplitudes faced by each explosive bridge wire break unit at the moment of breakage, with the later-breaking first explosive bridge wire break unit only needing to share the remaining recovery voltage. Therefore, even if the voltage equalization accuracy of the voltage equalization capacitor is limited, the voltage stress borne by each explosive bridge wire break unit at its respective breakage moment is within the safe range, solving the problem of high requirements for the voltage equalization accuracy of the voltage equalization capacitor.

[0028] Optionally, in some embodiments of the system, the fault detection unit includes: a Rogowski coil, fitted onto the conductor of the first busbar segment or the second busbar segment, for sensing the rate of change of current in the conductor; a resistor-capacitor passive integrator network, the input of which is connected to the output of the Rogowski coil, for converting the differential signal of the rate of change of current sensed by the Rogowski coil into a voltage signal proportional to the current; a Zener diode, the cathode of which is connected to the output of the resistor-capacitor passive integrator network; and a latching resistor, connected between the cathode of the Zener diode and a positive bias voltage, for maintaining the input of a hardware comparator at a high level after the voltage signal exceeds the breakdown voltage of the Zener diode, so as to latch the transient trigger signal into a steady-state signal.

[0029] In this scheme, the Rogowski coil senses the rate of change of current in the conductor and outputs the differential signal. The passive resistor-capacitor integrator network converts the differential signal into a voltage signal proportional to the current. The entire process requires no active components and has minimal delay. The Zener diode conducts when the voltage signal exceeds its breakdown voltage. The latching resistor, in conjunction with the positive bias voltage, latches the level at the input of the hardware comparator to a high level. Even if the voltage signal subsequently drops, the trigger signal remains stable. This analog latching mechanism ensures that the fault detection unit can continuously output a stable trigger signal to the exploding bridge wire circuit breaker after detecting a fault, without losing the trigger signal due to fluctuations in the fault current. Therefore, the all-analog signal conditioning and latching link composed of the Rogowski coil, the passive resistor-capacitor integrator network, the Zener diode, and the latching resistor solves the problem of the fault detection unit reliably capturing and maintaining the trigger signal within the sub-millisecond timescale.

[0030] Optionally, in some embodiments of the system, the insulating partition is made of a self-expanding fire-retardant material. The self-expanding fire-retardant material expands when the explosive charge is detonated to generate high-temperature detonation products, increasing the volume of the insulating partition to tightly fill the pre-fabricated fracture, completely physically separating the fracture surfaces on both sides of the pre-fabricated fracture, and absorbing conductive carbon soot in the detonation products to enhance the insulation recovery strength between the fractures.

[0031] In this embodiment, the self-expanding fireproof material expands in volume after receiving heat from the high-temperature detonation products generated by the detonation of the explosive charge. The insulating partition increases in volume from its initial size to its expanded size, tightly filling the space within the pre-fabricated fracture surface and completely physically separating the fracture surfaces. During the expansion process, the self-expanding fireproof material also absorbs the conductive carbon soot mixed in the detonation products, reducing the amount of conductive medium remaining between the fracture surfaces. The expansion is driven by the energy of the explosive charge itself, requiring no external triggering or additional driving mechanism, and is naturally synchronized with the cutting process of the current-carrying conductor. Therefore, the application of the self-expanding fireproof material enables the insulating partition to possess the functions of thermal self-expansion and self-cleaning, solving the problem of insufficient insulation recovery strength caused by the residual conductive carbon soot between the fracture surfaces.

[0032] Optionally, in some embodiments of the system, the fault detection unit includes: a multilayer printed circuit board Rogowski coil integrated on the busbar support insulator of the first busbar section or the second busbar section, the winding of the multilayer printed circuit board Rogowski coil being uniformly distributed along the circumference of the busbar support insulator; an inner layer compensation trace located in the same printed circuit board layer as the winding and arranged parallel and staggered along the circumference of the busbar support insulator, one end of the inner layer compensation trace being grounded and the other end being connected to the reference input of a hardware comparator to cancel the capacitive coupling common-mode interference of the first busbar section or the second busbar section to the multilayer printed circuit board Rogowski coil; an outer layer grounding shielding layer covering the multilayer printed circuit board Rogowski coil to suppress the interference of stray magnetic fields around the first busbar section or the second busbar section on the current change rate measurement; and the hardware comparator connected to the output terminal of the multilayer printed circuit board Rogowski coil and connected to the signal of the exploding bridge wire circuit breaker, the hardware comparator being used to generate the trigger signal within a first predetermined time when the current change rate exceeds a predetermined threshold.

[0033] In this solution, the multilayer printed circuit board Rogowski coil is directly integrated onto the busbar support insulator, eliminating the gap and relative displacement between the independently installed sensor and the primary conductor, thus ensuring the consistency and repeatability of the measurement. The inner layer compensation traces are arranged parallel to and staggered with the winding. The common-mode interference injected by the first or second busbar segment through capacitive coupling generates induced signals with nearly equal amplitudes on the winding and the inner layer compensation traces. The reference input of the hardware comparator receives the signal from the inner layer compensation traces as the common-mode reference, and the common-mode component in the differential-mode output is canceled out. The outer grounding shielding layer shields the external stray magnetic field from the multilayer printed circuit board Rogowski coil, further reducing the coupling interference of the external electromagnetic field on the current rate of change measurement. Therefore, the integrated structure of the multilayer printed circuit board Rogowski coil, the inner layer compensation traces, and the outer grounding shielding layer solves the problem of high-precision, low-delay measurement of the current rate of change under strong electromagnetic interference environments.

[0034] Optionally, some embodiments of the system further include a multi-channel delay trigger circuit, which includes: a multi-stage series resistor-capacitor delay network, the output of each stage of the resistor-capacitor delay network being connected to the gate of a thyristor, the anodes of all the thyristors being connected to the positive terminal of the energy storage capacitor, and the cathodes being respectively connected to multiple bridge wires of the explosive bridge wire circuit breaker; and a single trigger signal issued by the fault detection unit being input to the first stage of the resistor-capacitor delay network, which, after a stage-by-stage delay, sequentially triggers the conduction of each stage of the thyristors, releasing detonation energy to multiple bridge wires at microsecond-level time intervals, thereby realizing the sequential detonation of multiple bridge wires.

[0035] In this embodiment, the fault detection unit only needs to send one trigger signal. After the trigger signal enters the first-stage resistor-capacitor delay network, each stage of the resistor-capacitor delay network uses the charging and discharging time constants of the resistor and the capacitor to generate the microsecond-level delay step by step. The output of each stage of the resistor-capacitor delay network sequentially triggers the corresponding thyristor to conduct. After each thyristor conducts, it releases the charge of the energy storage capacitor to the corresponding bridge wire, completing the sequential detonation of the multiple bridge wires. The entire delay triggering process is completed by the purely analog resistor-capacitor network and the thyristor, without relying on any programmable logic device or microprocessor, and has extremely high reliability in the short-circuit fault environment of strong electromagnetic interference. Therefore, the combination of the multi-stage series resistor-capacitor delay network and the thyristor realizes the sequential detonation timing control of the multiple bridge wires with a very simple analog circuit, solving the problem of precise microsecond-level timing triggering of multiple bridge wires under strong electromagnetic interference conditions.

[0036] Optionally, in some embodiments of the system, the fault detection unit includes a real-time signal classification controller, which is operable to: perform sliding window truncation on the current rate of change waveform sampled by the fault detection unit within a first predetermined time period to obtain a window waveform segment; extract the peak value, wavefront time, and half-peak width of the window waveform segment in the time domain to form a time-domain feature vector; and compare the time-domain feature vector with a pre-stored short-circuit fault feature template and a transient disturbance feature template for similarity, and issue the trigger signal when the similarity between the time-domain feature vector and the short-circuit fault feature template exceeds the similarity with the transient disturbance feature template.

[0037] In this solution, the real-time signal classification controller extracts the time-domain features of the window waveform segment, transforming fault detection from simple threshold comparison to pattern recognition. The peak value reflects the intensity of the fault current, the wavefront time reflects the steepness of the current rise, and the half-peak width reflects the duration of the fault transient. The time-domain feature vector composed of these three features can distinguish between short-circuit faults and transient disturbances such as load switching. The short-circuit fault feature template and the transient disturbance feature template represent the typical feature boundaries of the two types of events, respectively. By using similarity comparison instead of a single threshold judgment, the probability of false triggering is significantly reduced. Therefore, the real-time signal classification controller, through time-domain multi-feature extraction and dual-template comparison, solves the problem that traditional hardware threshold comparison methods struggle to distinguish between genuine short-circuit faults and false triggering caused by transient disturbances.

[0038] Optionally, in some embodiments of the system, the fault detection unit includes a support vector machine classifier, which is operable to: receive current change rate waveform segments collected by the fault detection unit within a first predetermined time period; extract statistical features of the current change rate waveform segments, including skewness, kurtosis, and energy moment, to form a statistical feature vector; and input the statistical feature vector into a pre-trained support vector machine model, which outputs a fault type discrimination result, and the fault detection unit determines whether to issue the trigger signal based on the fault type discrimination result.

[0039] In this embodiment, the support vector machine classifier uses the statistical features of the current change rate waveform segment to determine the fault type. The skewness reflects the asymmetry of the waveform, the kurtosis reflects the sharpness of the waveform, and the energy moment reflects the distribution of the waveform energy along the time axis; these three characteristics characterize the transient properties of the fault current from different dimensions. The pre-trained support vector machine model constructs the optimal classification hyperplane among different fault types in the high-dimensional feature space, exhibiting stronger generalization ability for unknown samples than the fixed threshold discrimination method. Therefore, the support vector machine classifier, through statistical feature extraction and the classification decision of the support vector machine model, solves the problem of accurate fault type determination under complex fault conditions.

[0040] Optionally, in some embodiments of the system, the real-time signal classification controller is further operable to construct the short-circuit fault feature template and the transient disturbance feature template. The construction process includes: extracting a first waveform set labeled as a short-circuit fault and a second waveform set labeled as a transient disturbance from a historical fault waveform database; for each waveform in the first waveform set and the second waveform set, respectively, extracting a segment of the same length as the window waveform segment, and extracting the peak value, wavefront time, and half-peak width of the segment to form a first time-domain feature vector set and a second time-domain feature vector set; and then... The time-domain feature vector set and the second time-domain feature vector set are respectively mapped to a high-dimensional feature space. In the high-dimensional feature space, a hypersphere is constructed with the cluster center of each feature vector set as the center and a preset Mahalanobis distance as the radius, which serves as the decision boundary for the short-circuit fault feature template and the transient disturbance feature template. A regularization constraint is applied to the radius of the hypersphere so that the hypersphere of the short-circuit fault feature template and the hypersphere of the transient disturbance feature template maintain a preset separation interval in the high-dimensional feature space, thereby reducing the ambiguity range of the real-time signal classification controller during online discrimination.

[0041] In this scheme, the real-time signal classification controller constructs the feature template using the labeled data in the historical fault recording database during the offline phase. The first time-domain feature vector set and the second time-domain feature vector set are respectively mapped to the high-dimensional feature space, making the features that are linearly inseparable in the original time-domain space separable in the high-dimensional space. The hypersphere, with the cluster center as its center and the preset Mahalanobis distance as its radius, contains the feature vectors of the same type within a compact decision boundary. The regularization constraint, by limiting the radius expansion of the hypersphere, forces the retention of the preset separation interval between the hypersphere of the short-circuit fault feature template and the hypersphere of the transient disturbance feature template, reducing the probability that the feature vector falls into the ambiguity interval between the two hyperspheres during online discrimination. Therefore, the construction method of the hypersphere decision boundary and the regularization constraint solves the problem of unstable discrimination of the traditional fixed threshold template when the feature distribution boundary is ambiguous.

[0042] Optionally, in some embodiments of the system, the real-time signal classification controller is further operable to construct a sequential probability ratio test process by comparing the similarity between the time-domain feature vector and the short-circuit fault feature template and the transient disturbance feature template, including: dividing the window waveform segment into multiple sub-windows in chronological order, extracting time-domain feature sub-vectors for each sub-window; calculating the likelihood ratio between the time-domain feature sub-vector and the short-circuit fault feature template for each obtained time-domain feature sub-vector, and multiplying the likelihood ratio by the cumulative likelihood ratio of the previous sub-window to obtain the sequential likelihood ratio statistic; The sequential likelihood ratio statistic is compared with preset upper and lower bounds for acceptance and rejection. When the sequential likelihood ratio statistic exceeds the upper bound for acceptance, feature extraction of subsequent sub-windows is terminated early and the trigger signal is immediately issued. When the sequential likelihood ratio statistic is lower than the lower bound for rejection, it is determined as a transient disturbance and the discrimination is terminated. The upper bound for acceptance and the lower bound for rejection are determined by Wald sequential analysis based on the false positive rate and false negative rate allowed by the real-time signal classification controller, so that the real-time signal classification controller can minimize the required waveform length while ensuring discrimination accuracy.

[0043] The sequential probability ratio test process transforms the fixed-length window discrimination into a variable-length sequential decision. The window waveform segment is divided into multiple sub-windows, and the time-domain feature vector of each sub-window is successively extracted and used to calculate the likelihood ratio with the short-circuit fault feature template. The sequential likelihood ratio statistic accumulates as the sub-windows progress. When the accumulated information is sufficient to make a reliable judgment, the discrimination process terminates without waiting for all sub-windows to be processed. The upper bound for acceptance and the lower bound for rejection are determined by the Wald sequential analysis based on the allowable false positive and false negative rates, minimizing the required observation time while ensuring the discrimination accuracy in a statistical sense. Therefore, the sequential probability ratio test process transforms fault discrimination from a fixed-delay decision to a variable-delay information accumulation decision, solving the problem of further shortening the fault discrimination delay while ensuring the discrimination accuracy. Attached Figure Description

[0044] Figure 1 This is a functional structural diagram of a fault isolation and current limiting bus coupler for an AC busbar of a grid-type converter group according to an embodiment of the present invention. Figure 2 An exploded perspective view of the internal structure of an explosive bridge wire circuit breaker according to an embodiment of the present invention is shown. Figure 3 A schematic diagram of the analog signal isolation and conditioning circuit of a fault detection unit according to an embodiment of the present invention is shown. Detailed Implementation

[0045] Example 1 like Figure 1 As shown in the accompanying drawings, this embodiment provides a fault isolation and current limiting bus tie cabinet for the AC bus of the grid-type converter group. The bus tie cabinet is connected to the common AC bus of the grid-type converter group, dividing the bus into a first busbar section and a second busbar section, with each of the two busbar sections connected to at least one of the grid-type converters.

[0046] The segmented busbar structure 20 uses a rectangular busbar made of T2 copper, with a cross-sectional area selected at 1.5 times the rated current of the converter group. The surface is tin-plated for oxidation prevention. The break between the first and second busbar sections is bridged by an explosive bridge wire circuit breaker 30. The explosive bridge wire circuit breaker 30 contains a current-carrying conductor 301 made of the same material and with the same cross-sectional area as the busbar, exhibiting minimal loss during normal current flow. A V-shaped groove is machined in the middle of the current-carrying conductor 301 as a pre-fabricated break, with a groove depth approximately 60% of the conductor thickness. The bridge wire is a 0.2mm diameter nickel-chromium alloy wire embedded inside the explosive charge, with both ends connected in series in the discharge circuit of the energy storage capacitor. The energy storage capacitor is a 4.7μF / 3kV pulse capacitor, charged to its rated voltage by the DC power module inside the cabinet during normal operation. The explosive charge is made of RDX-based plastic explosive, with a charge of approximately 800 mg, and is compressed into a cylindrical shape and placed tightly above the pre-fabricated fracture.

[0047] The current-limiting reactor 40 adopts the hollow reactor structure, and is made of rectangular aluminum stranded wire wound into a multi-layer pancake coil with an inductance of approximately 2.5 mH. It is connected in parallel with the explosive bridge wire circuit breaker 30 between the first busbar section and the second busbar section through the stacked busbar structure. The stacked busbar structure consists of alternating stacked positive busbar layers, negative busbar layers, and insulating layers. The positive busbar layer connects one end of the explosive bridge wire circuit breaker 30 and one end of the current-limiting reactor 40, and the negative busbar layer connects the other end of both. The positive and negative busbar layers are separated only by a 0.5 mm thick polyester film, which makes the loop diameter of the parallel circuit extremely small, and the parasitic inductance controlled in the tens of nanohenries.

[0048] The fault detection unit 50 is implemented based on the Rogowski coil and the hardware comparator, and is connected to the explosive bridge wire circuit breaker 30 via the signal line. The Rogowski coil is fitted onto the conductor of the first busbar section or the second busbar section, and the output voltage is proportional to the rate of change of current di / dt. The voltage is converted into a voltage signal proportional to the current by the resistor-capacitor passive integrator network, and then sent to the non-inverting input of the hardware comparator. The inverting input of the hardware comparator is connected to a reference level, corresponding to a voltage value of 1.8 times the peak value of the rated current of the converter. When the integrated voltage signal exceeds the reference level, the hardware comparator flips and outputs the trigger signal. The entire process from the occurrence of the fault to the generation of the trigger signal is completed within 200μs.

[0049] The trigger signal drives one of the fast thyristors to conduct, and the charge in the energy storage capacitor is instantly released through the bridge wire. The bridge wire melts and detonates the explosive charge within microseconds. The detonation wave generated by the explosive charge impacts the pre-formed break in the current-carrying conductor 301, causing the current-carrying conductor 301 to break along the grooved path. The explosive bridge wire circuit breaker 30 completes the disconnection within 0.5ms, and the electrical connection between the first busbar section and the second busbar section is physically broken. Due to the extremely low parasitic inductance of the parallel circuit, the fault current is rapidly commutated to the current-limiting reactor 40 at the moment of disconnection. The 2.5mH ​​inductance of the current-limiting reactor 40 limits the peak short-circuit current to within 3 times the rated current of the converter power device, which is lower than the withstand limit of 4 times the rated current of a typical IGBT module. After disconnection and current limiting, the first busbar section and the second busbar section each form an island, and the grid-type converters connected to each other independently perform the fault ride-through within the island, and there is no longer any circulating current between the converter groups.

[0050] The electrical clearances and creepage distances between the live components inside the bus tie cabinet and between the live components and the grounded casing are all selected at 1.5 times the rated voltage of the converter group. After the fault current has been switched to the current-limiting reactor 40, the recovery voltage between the breaks created by the exploding bridge wire circuit breaker 30 is limited within the safe range by the current-limiting reactor 40 and the subsequent voltage clamping network.

[0051] Example 2 Figure 1 and Figure 2 The internal structural details of the explosive bridge wire circuit breaker 30 are further revealed. The pre-fabricated break on the current-carrying conductor 301 is a narrow rectangular slit running along the width of the conductor, approximately 1.5 mm wide, with about 40% of the conductor thickness remaining at the bottom of the slit as the normal current-carrying cross section. The two side walls of the narrow rectangular slit are parallel to each other, providing a regular guiding channel for the insulating partition 33.

[0052] The explosive charge is shaped into a shaped charge structure 321 with an inverted V-shaped cross-section, the tip of which, the shaped charge groove, faces the pre-formed fracture. The surface of the shaped charge groove is lined with a copper shaped charge liner approximately 0.3 mm thick. Upon detonation, the detonation wave propagates from above the shaped charge groove, first crushing the top of the shaped charge liner, then advancing downwards along both sides of the inverted V-shape, compressing and converging the liner material into a directional metal jet with a velocity of approximately 3500 m / s. This directional metal jet is ejected downwards along the central axis of the shaped charge groove, directly impacting the flow-through section remaining at the bottom of the pre-formed fracture, melting, vaporizing, and cutting it off within microseconds. The remaining portion of the current-carrying conductor 301—the separated fracture surfaces on both sides of the pre-formed fracture—remains essentially cold.

[0053] The insulating partition 33 is made of a 1.2mm thick epoxy fiberglass cloth laminate, pre-placed within a rectangular narrow slit with a pre-fabricated cut. A gap of approximately 0.8mm is left between the lower end face and the bottom of the slit to ensure normal flow. The upper end of the insulating partition 33 is fixed by an elastic pre-compression mechanism, which consists of a compression spring 3311 and a locking pin 3312. The compression spring 3311 has a 1.2mm diameter wire and a free length of 60mm, pre-compressed to approximately 25mm before being locked by the locking pin 3312. The locking pin 3312 is a 4mm diameter steel pin that passes through a pre-drilled hole at the upper end of the insulating partition 33, with its tail end extending into a pre-drilled hole on the side of the explosive charge, approximately 2mm from the outer wall of the explosive charge.

[0054] When the explosive charge detonates, the detonation pressure drives the directional metal jet to cut downwards while simultaneously expanding laterally, pushing the locking pin 3312 out of the pin hole of the insulating partition 33 axially. After the locking pin 3312 disengages, the elastic potential energy stored in the compression spring 3311 is released, pushing the insulating partition 33 to slide laterally into the space between the fracture surfaces along the pre-formed fracture. The insertion action and the cutting action of the directional metal jet are completed almost simultaneously, with a time difference on the order of microseconds.

[0055] An arc-extinguishing medium chamber, approximately 4 mm deep and 10 mm in diameter, is embedded in the surface of the insulating partition 33 facing the pre-formed fracture. It is filled with approximately 600 mg of 200-mesh quartz sand as a powdered arc-extinguishing medium. The chamber opening is sealed by a 0.1 mm thick aluminum foil fusion seal 3322. When the explosive charge detonates, the high-temperature detonation products exceed 2000°C, far exceeding the melting point of the aluminum foil (approximately 660°C). The fusion seal 3322 melts and ruptures upon contact with the detonation products, and a high-pressure gas flow carrying the powdered arc-extinguishing medium is ejected from the chamber, directly acting on the arc channel forming between the fracture surfaces. The quartz sand powder absorbs the arc heat, melts and vaporizes, and its vapor increases the medium pressure between the fracture surfaces.

[0056] The insulating partition 33 can also be made of a self-expanding fire-retardant material to replace the epoxy glass cloth laminate. This material uses silicone rubber as a matrix and adds expanded graphite and aluminum hydroxide flame retardant. Under the high temperature generated by the explosion, the expanded graphite expands rapidly, causing the volume of the insulating partition 33 to increase 3 to 5 times within milliseconds, tightly filling the entire space of the pre-fabricated fracture. The expanded material completely wraps the fracture surface and absorbs the conductive carbon soot generated by the explosion. The carbon soot is locked in the porous structure of the expanded graphite and cannot form a conductive bridge between the fracture surfaces.

[0057] Example 3 A voltage clamping and energy dissipation network is connected in parallel across the current limiting reactor 40. After the exploding bridge wire circuit breaker 30 disconnects and the fault current is switched to the current limiting reactor 40, the magnetic energy stored in the current limiting reactor 40 and the transient overvoltage generated during the switching process are processed.

[0058] The first stage of the voltage clamping and energy dissipation network is the solid-state switch branch, which consists of multiple silicon carbide junction field-effect transistors (SFETs) connected in series. These are normally-on devices, and are in the on-state at zero gate voltage. The number of SFETs connected in series is determined based on the rated voltage of the busbar. Each SFET has a rated voltage of 1200V, selected with a margin of 1.5 times the rated voltage of the busbar. The solid-state switch branch is connected in parallel with the current-limiting reactor 40. At the instant the exploding bridge wire circuit breaker 30 trips and generates the arc voltage, the voltage between the drain and source of the SFET rises rapidly, and the solid-state switch branch conducts, providing a low-impedance commutation path for the inductive current in the current-limiting reactor 40.

[0059] The conduction of the solid-state switch branch is controlled by the self-powered trigger circuit, which requires no external power supply. One end of the power-harvesting resistor is connected to the drain, and the other end is connected to the cathode of the Zener diode via the isolation diode. The anode of the Zener diode is connected to the gate, and the trigger capacitor is connected in parallel across the Zener diode. When the voltage between the drain and source rises due to the tripping of the explosion-proof bridge wire circuit breaker 30, the power-harvesting resistor and the isolation diode form a charging path to charge the trigger capacitor. When the voltage across the trigger capacitor exceeds the breakdown voltage of the Zener diode, the Zener diode conducts, current is injected into the gate, and the solid-state switch branch is driven to the fully conducting state. The isolation diode prevents the charge on the trigger capacitor from being discharged back into the main circuit after the voltage between the drain and source drops. The discharge resistor is connected in parallel across the trigger capacitor, and its resistance value is several hundred times that of the power-harvesting resistor—when the power-harvesting resistor is 10kΩ, the discharge resistor is selected as 2MΩ. After the explosion bridge wire circuit breaker 30 disconnects, the charge on the trigger capacitor is slowly discharged through the discharge resistor with a time constant on the order of seconds, and the solid-state switch branch automatically returns to the blocking state after the predetermined time.

[0060] The second stage of the voltage clamping and energy dissipation network is the zinc oxide surge arrester array, connected in series with the solid-state switch branch. The zinc oxide surge arrester array includes a first group of zinc oxide valve posts and a second group of zinc oxide valve posts. The DC reference voltage of the former is approximately 1.2 times the rated voltage of the bus, and the latter is approximately 1.8 times the rated voltage of the bus. The two groups of zinc oxide valve posts are connected in parallel via a ceramic-sealed three-electrode gas discharge tube. The two main electrodes of the discharge tube are respectively connected in parallel to the two ends of the first group of zinc oxide valve posts. The trigger electrode is connected to the auxiliary trigger capacitor through the trigger resistor. The auxiliary trigger capacitor is charged by the initial surge voltage. When the initial surge voltage rises, the ceramic-sealed three-electrode gas discharge tube is not yet conducting, and only the first group of zinc oxide valve posts is clamped. When the voltage across the auxiliary trigger capacitor reaches the trigger threshold, the trigger electrode injects the trigger current, and the two main electrodes conduct. The second group of zinc oxide valve posts is connected to the circuit, sharing the subsequent energy with the first group of zinc oxide valve posts. The ceramic-sealed three-electrode gas discharge tube also includes a voltage change rate detection branch, which is composed of a detection capacitor and a detection resistor connected in series, with the common node connected to the trigger electrode. When the rise rate of the initial surge voltage exceeds the preset threshold, the coupling current of the detection capacitor generates the trigger voltage across the detection resistor, driving the trigger electrode to trigger earlier, allowing the second set of zinc oxide valve plates to engage earlier. The main discharge circuit of the ceramic-sealed three-electrode gas discharge tube also includes a positive temperature coefficient thermistor connected in series. At room temperature, its resistance is only a few ohms. When the current flows continuously, the temperature rises due to the self-heating effect. After exceeding the Curie point of approximately 120°C, the resistance increases sharply to tens of kiloohms within milliseconds, limiting the current flowing through the gas discharge tube. After the voltage of the zinc oxide surge arrester array decreases, the gas discharge tube reliably shuts off.

[0061] The third stage of the voltage clamping and energy dissipation network is the energy-dissipating resistor, which is a high-power stainless steel wire-wound resistor with a resistance of approximately 50Ω, connected in parallel across the zinc oxide surge arrester array to slowly dissipate the residual oscillation energy on the busbar as heat.

[0062] Example 4 Figure 1 and Figure 2 The explosive bridge wire circuit breaker 30 shown in this embodiment includes two series-connected break units, arranged in series between the first busbar section and the second busbar section along the extension direction of the current-carrying conductor 301. Each break unit has an independent bridge wire and an independent explosive charge. The two break units are connected by an equalizing capacitor, which is connected across the adjacent terminals of the two break units.

[0063] During normal operation, the current flows sequentially through the break unit near the first busbar section, the connection node of the equalizing capacitor, and the break unit near the second busbar section, with zero voltage difference across the equalizing capacitor. When the fault detection unit 50 issues a trigger signal, the bridge wires of both break units are simultaneously energized and detonated, and their respective current-carrying conductors 301 are cut off at their respective pre-fabricated breaks. After the break, the entire recovery voltage borne by the bus tie cabinet is distributed to the two break units. The equalizing capacitor provides a high-frequency equalization path after the break, causing the recovery voltages across the two break units to converge within a very short time.

[0064] The cross-sectional area of ​​the bridge wire in the break unit closer to the first busbar section is larger than that in the break unit closer to the second busbar section—both bridge wires are made of nickel-chromium alloy, but the former has a diameter of 0.25 mm and the latter 0.18 mm. Under the same discharge current, the thinner bridge wire melts in a shorter time. The multiple independent trigger output channels of the fault detection unit 50 are connected to the trigger terminals of the two break units. When a trigger signal is issued, both break units are energized simultaneously. The thinner bridge wire in the break unit closer to the second busbar section melts and breaks first. At the instant this break unit breaks, it temporarily bears the entire recovery voltage alone, for only tens of microseconds. Subsequently, the bridge wire in the break unit closer to the first busbar section also melts, and the recovery voltage is shared by both breaks after the break is formed. This time-division sequential breaking method ensures that the voltage stress faced by each break unit at its respective break moment is within a safe range.

[0065] The detonation method inside the explosive bridge wire circuit breaker 30 can also employ multiple detonation units, stacked along the axial direction of the explosive charge. Each detonation unit has a different amount of explosive charge—the detonation unit closer to the current-carrying conductor 301 has the smallest charge, while the charge gradually increases towards the farther away. The fault detection unit 50's multiple independent trigger output channels trigger each detonation unit sequentially according to a predetermined time sequence, first triggering the unit with the smallest charge, then the units with larger charges. The triggering sequence of each detonation unit is controlled by a multi-channel delay trigger circuit. The core of this circuit is a multi-stage series resistor-capacitor delay network. The output of each delay network stage is connected to the gate of a thyristor. The anodes of all thyristors are connected to the positive terminal of the energy storage capacitor, and the cathodes are connected to the bridge wires of each detonation unit. After the single trigger signal issued by the fault detection unit 50 is input into the first-stage resistor-capacitor delay network, it triggers the conduction of each stage of thyristors through successive delays, releasing the detonation energy to each bridge wire in microsecond-level time intervals. The entire delay triggering process is completed by a purely analog resistor-capacitor network and thyristors, without relying on any programmable devices.

[0066] Example 5 The signal conditioning and latching link inside the fault detection unit 50 is further elaborated here. The fault detection unit 50 includes a Rogowski coil, which is mounted on the conductor of the first or second busbar section. The Rogowski coil has a toroidal epoxy resin frame with an inner diameter slightly larger than the width of the busbar. The winding uses 0.15mm diameter enameled copper wire, which is uniformly and densely wound about 200 turns. The output end is a pair of differential leads.

[0067] The output of the Rogowski coil is connected to the input of a passive resistor-capacitor integrator. The passive resistor-capacitor integrator consists of an integrating resistor and an integrating capacitor connected in series. The first terminal of the integrating resistor serves as the input of the passive resistor-capacitor integrator, connected to the output of the Rogowski coil. The first terminal of the integrating capacitor is connected to the second terminal of the integrating resistor, and the second terminal of the integrating capacitor is connected to signal ground. The common node between the second terminal of the integrating resistor and the first terminal of the integrating capacitor serves as the output of the passive resistor-capacitor integrator. The integrating resistor is a 10kΩ, 0.25W metal film resistor, and the integrating capacitor is a 100nF, 63V polypropylene film capacitor. The time constant of the passive resistor-capacitor integrator is the product of the resistance of the integrating resistor and the capacitance of the integrating capacitor, i.e., 10kΩ multiplied by 100nF, equal to 1ms. The differential signal of the rate of change of the current induced by the Rogowski coil is input to the first terminal of the integrating resistor, generating a voltage signal proportional to the current at the output of the passive resistor-capacitor integrator.

[0068] To further improve signal transmission fidelity under strong electromagnetic interference, the fault detection unit 50 incorporates a multi-channel analog signal conditioning and high-linearity opto-isolation circuit. This circuit uses the HCNR201 high-linearity analog optocoupler as its core. The differential signal received at the input side is first surge-clamped by a pre-matching network and a TVS transient suppression diode. After being buffered by the first-stage operational amplifier, the signal enters a servo drive stage composed of an operational amplifier and an integrating capacitor to drive the LED inside the optocoupler. A deep negative feedback loop is formed by introducing the current from the feedback photodiode to eliminate LED nonlinearity and temperature drift, achieving high-linearity signal isolation. On the isolated output side, the received current signal is amplified and low-pass filtered by a secondary operational amplifier, a transimpedance resistor, and a filter capacitor, restoring it to a low-noise voltage signal. This signal is then output to the subsequent hardware comparator, providing a high-fidelity data foundation for fault diagnosis. Figure 3 As shown.

[0069] The output of the resistor-capacitor passive integrator network is connected to the cathode of the Zener diode, and the anode of the Zener diode is connected to the non-inverting input of the hardware comparator. The Zener diode is a silicon planar Zener diode with a nominal breakdown voltage of 4.7V and a rated power of 0.5W. The first terminal of the latching resistor is connected to the cathode of the Zener diode, and the second terminal is connected to a positive bias voltage provided by a +5V DC power supply. The latching resistor is a 4.7kΩ carbon film resistor with a power rating of 0.25W. The inverting input of the hardware comparator is connected to a reference level, which is provided by the sliding terminal of a 10kΩ multi-turn potentiometer. The two fixed terminals of the multi-turn potentiometer are connected to the +5V DC power supply and signal ground, respectively. By adjusting the knob of the multi-turn potentiometer, the reference level is set to a voltage value that is 1.8 times the peak rated current of the corresponding grid-type converter. The output of the hardware comparator is connected to the trigger signal of the explosion-proof bridge wire circuit breaker 30 via a shielded twisted-pair cable. The hardware comparator is a high-speed model with a response time of less than 50ns.

[0070] Under normal load conditions, the voltage signal amplitude at the output of the resistor-capacitor passive integrator network is lower than the nominal breakdown voltage of the Zener diode (4.7V). The Zener diode is in reverse cutoff mode, and the level at the non-inverting input of the hardware comparator is biased to near 0V by a pull-down resistor connected to signal ground. The hardware comparator outputs a low level. When a short-circuit fault occurs in the conductor, the differential signal induced by the Rogowski coil is converted into a voltage signal by the resistor-capacitor passive integrator network. This voltage signal rises as the fault current increases. When the amplitude of this voltage signal exceeds 4.7V, the Zener diode is reverse-broken down and conducts. Current flows from the output of the resistor-capacitor passive integrator network through the Zener diode and into the non-inverting input of the hardware comparator. The level at the non-inverting input is rapidly pulled up to near 4.7V, exceeding the reference level of the inverting input. The hardware comparator then flips to output a 5V high level, which is the trigger signal. The delay between the rising edge of the trigger signal and the moment when the fault current exceeds the threshold does not exceed 5μs. After the Zener diode turns on, the latching resistor injects approximately 1mA of sustaining current from the +5V DC power supply to the cathode of the Zener diode. This sustaining current keeps the Zener diode in the reverse breakdown conduction state, thus maintaining a high level at the non-inverting input of the hardware comparator, and the trigger signal is latched as a steady-state 5V high-level signal. Even if a brief fluctuation in the fault current causes the voltage signal to drop below 4.7V, the sustaining current provided by the latching resistor can still keep the Zener diode from exiting the reverse breakdown state. Only when the fault current completely decays to zero and the output voltage of the resistor-capacitor passive integrator network remains below 0.6V, the sustaining current provided by the latching resistor can no longer maintain the reverse conduction of the Zener diode. The Zener diode returns to the cutoff state, the level at the non-inverting input of the hardware comparator is pulled down to 0V by the pull-down resistor, the output of the hardware comparator returns to a low level, and the latching state is released.

[0071] Example 6 The insulating partition 33 is pre-placed within the rectangular narrow slit of the pre-fabricated fracture, leaving an initial gap of approximately 0.8 mm between it and the fracture surface. When the explosive charge detonates, the high-temperature detonation products generated by the explosive charge reach temperatures above 2000°C. These high-temperature detonation products transfer heat to the surface of the insulating partition 33 via radiation and convection. The methyl vinyl silicone rubber on the surface of the insulating partition 33 begins to pyrolyze at approximately 350°C, but the aluminum hydroxide powder preferentially decomposes at approximately 220°C, releasing water of crystallization and absorbing heat, thus slowing down the rate of temperature rise inside the insulating partition 33. When the internal temperature of the insulating partition 33 reaches the expansion initiation temperature of the expandable graphite powder, the intercalating agent between the expandable graphite powder layers rapidly vaporizes. The gas pressure expands the graphite layers along the c-axis, and the volume of the expandable graphite powder expands to 300 to 500 times its original volume within 20 ms to 50 ms. The overall volume of the insulating partition 33 increases to 3 to 5 times its original volume, completely filling the rectangular narrow slit of the pre-fabricated fracture. The expanded surface of the insulating partition 33 is tightly attached to the fracture surface, completely physically separating the fracture surfaces on both sides. Conductive carbon soot particles entrained in the high-temperature detonation products are adsorbed by the porous structure formed by the expanded expandable graphite powder when passing through the expanded surface of the insulating partition 33—the specific surface area of ​​the expanded expandable graphite powder is 30 m² / g to 50 m² / g. The conductive carbon soot particles are locked in the micropores and surface of the graphite layer, unable to migrate between the fracture surfaces to form conductive bridges. After the expanded expandable graphite powder expands, the graphite layers are isolated by silica particles remaining from the pyrolysis of methyl vinyl silicone rubber and alumina particles generated from the decomposition of aluminum hydroxide powder. The volume resistivity of the insulating partition 33 after expansion at a DC voltage of 1000V is not less than [value missing]. .

[0072] Example 7 The Rogowski coil in fault detection unit 50 can also be replaced with a multilayer printed circuit board Rogowski coil integrated into the busbar support insulator, with added inner layer compensation traces and outer layer grounding shielding. The busbar support insulator is a cylindrical component cast in epoxy resin, with a rectangular through-hole in the center. The size of the rectangular through-hole is slightly larger than the cross-sectional size of the conductor of the first or second busbar segment, allowing the conductor to pass through and be supported. The multilayer printed circuit board Rogowski coil is fabricated using a 4-layer FR-4 substrate structure, with each substrate layer being 0.4 mm thick and the copper plating thickness being 1 ounce. Radial traces are evenly arranged along the circumference of each substrate layer as the turns of the winding, with a trace width of 0.2 mm and an adjacent trace spacing of 0.2 mm. The radial traces of adjacent layers are connected end-to-end through interlayer copper-plated vias, ultimately forming a winding with a total of 256 turns evenly distributed along the circumference on the 4-layer substrate. The projections of the radial traces of each layer on the circumference are evenly staggered, ensuring that the effective turn density of the winding is consistent throughout the circumference. After the Rogowski coil of the multilayer printed circuit board is manufactured, it is embedded into the casting mold of the busbar support insulator. The outer circumferential surface of the Rogowski coil of the multilayer printed circuit board is flush with the outer circumferential surface of the busbar support insulator. Then, epoxy resin is injected and cured, so that the Rogowski coil of the multilayer printed circuit board and the busbar support insulator are cast into one piece.

[0073] On each layer of the Rogowski coil substrate in a multilayer printed circuit board, a parallel compensation trace is inserted between the radial traces of every two adjacent windings as segments of the inner layer compensation trace. The width of the compensation trace is 0.2 mm, and the spacing between it and the radial trace of the winding is 0.2 mm. One end of each layer's compensation trace is connected to the PCB's ground plane through a common via, and the other end is connected to a compensation signal output terminal through independent vias of each layer. The compensation signal output terminal is connected to the reference input terminal of a hardware comparator through a PCB trace of the same length as the winding output trace. The difference between the capacitive coupling coefficient of the conductor of the first busbar segment or the second busbar segment to the winding and the capacitive coupling coefficient to the compensation trace, due to the parallel and adjacent arrangement of the winding and the compensation trace in geometric position, does not exceed 5% of the average value of their respective capacitive coupling coefficients. The difference between the voltage generated at the winding output terminal and the voltage generated at the compensation trace output terminal of the common-mode interference shall not exceed 5% of the common-mode voltage amplitude. The common-mode rejection ratio of the hardware comparator, plus the common-mode cancellation effect of the winding and compensation traces, makes the total equivalent common-mode rejection ratio not less than 80dB.

[0074] The outer grounding shield consists of a 0.035mm thick copper foil layer, which wraps around the outer cylindrical surface of the Rogowski coil on the multilayer printed circuit board. The copper foil is continuous in the circumferential direction, but has a 2mm circumferential break at a certain location to prevent the copper foil from forming a short-circuit loop and inducing eddy currents in an alternating magnetic field. Both ends of the copper foil are connected to the PCB's ground plane through multiple vias evenly distributed across each layer. The outer grounding shield has a shielding effectiveness of no less than 40dB at 1MHz and attenuates the interference voltage induced by external stray magnetic fields on the winding by no less than 100 times.

[0075] The hardware comparator is connected to the output of the Rogowski coil on the multilayer printed circuit board and to the signal of the explosion-proof bridge wire circuit breaker 30. The hardware comparator is used to generate a trigger signal within a first predetermined time when the rate of change of current exceeds a predetermined threshold.

[0076] Example 8 The following is an extended scheme for signal classification and triggering decisions. The real-time signal classification controller reads all sampled data points of the current rate of change waveform from the sampling buffer of the fault detection unit 50 within a first predetermined time period. The sampled data points are a sequence of voltage values ​​arranged in chronological order. Starting from the beginning of the sampled data points, the real-time signal classification controller slides a window across the sampled data points with a preset window length and sliding step size, capturing a continuous segment of sampled points as a window waveform fragment each time. Before capturing a window waveform fragment, the real-time signal classification controller checks whether the number of sampled points in the current window has reached the preset window length. If not, it waits for the next sampling cycle and rereads the sampling buffer. After capturing a window waveform fragment, the real-time signal classification controller iterates through all sampled voltage values ​​within the window waveform fragment, recording the maximum voltage value encountered as the peak value of the window waveform fragment. The real-time signal classification controller starts searching forward from the first sampling point of the window waveform segment, finding the sampling point index corresponding to the first rise in voltage value from near zero to 10% of the peak value, denoted as the first index; continuing the search, it finds the sampling point index corresponding to the rise in voltage value from 10% of the peak value to 90% of the peak value, denoted as the second index; the difference between the second and first indices is multiplied by the sampling period to obtain the wavefront time of the window waveform segment. The real-time signal classification controller starts searching forward from the first sampling point of the window waveform segment, finding the first sampling point index where the voltage value exceeds 50% of the peak value, denoted as the third index; continuing the search, it finds the first sampling point index where the voltage value falls from 50% above the peak value to 50% below the peak value, denoted as the fourth index; the difference between the fourth and third indices is multiplied by the sampling period to obtain the half-peak width of the window waveform segment. The real-time signal classification controller arranges the peak value, wavefront time, and half-peak width in sequence into a three-dimensional vector, which serves as the time-domain feature vector of the window waveform segment.

[0077] Assume the sampling period of the current rate of change waveform is 1μs, and the preset window length is 20 sampling points. A certain captured window waveform segment contains the following 20 voltage values: 0.2V, 0.5V, 1.1V, 2.3V, 4.5V, 7.2V, 8.9V, 9.5V, 9.7V, 9.6V, 9.4V, 8.8V, 7.5V, 5.8V, 4.0V, 2.5V, 1.5V, 0.8V, 0.4V, 0.2V. Traversing these 20 voltage values, the maximum value appears at the 9th sampling point, which is 9.7V. Therefore, the peak value of the window waveform segment is 9.7V. 10% of the peak value is 0.97V. Searching backwards from the 1st sampling point, the voltage value at the 3rd sampling point is 1.1V, exceeding 0.97V for the first time, with an index of 3. The 90% peak value is 8.73V. Continuing from the 3rd sampling point, the voltage value at the 7th sampling point is 8.9V, exceeding 8.73V for the first time, with a second index of 7. The wavefront time is (7-3)×1μs=4μs. The 50% peak value is 4.85V. Continuing from the 1st sampling point, the voltage value at the 5th sampling point is 4.5V. The first sampling point exceeding 4.85V is the 6th sampling point (voltage value 7.2V), with a third index of 6. Continuing to the 13th sampling point, the voltage value is 5.8V, and the voltage value at the 14th sampling point is 4.0V, falling below 4.85V for the first time, with a fourth index of 14. The half-peak width is (14-6)×1μs=8μs. The time-domain feature vector is [9.7V, 4μs, 8μs].

[0078] Example 9 After the time-domain feature vector is extracted, the real-time signal classification controller reads the pre-stored short-circuit fault feature template and the pre-stored transient disturbance feature template from the non-volatile memory. The pre-stored short-circuit fault feature template contains a three-dimensional short-circuit fault feature mean vector and a set of short-circuit fault feature standard deviation vectors. The pre-stored transient disturbance feature template contains a three-dimensional transient disturbance feature mean vector and a set of transient disturbance feature standard deviation vectors. The real-time signal classification controller calculates the absolute value of the difference between each component in the time-domain feature vector and the corresponding component of the short-circuit fault feature mean vector. Dividing the absolute value of the difference by the corresponding component of the short-circuit fault feature standard deviation vector yields the normalized deviation of each component. The squares of the normalized deviations of each component are summed, and the square root is taken to obtain the short-circuit fault Mahalanobis distance between the time-domain feature vector and the short-circuit fault feature template. The real-time signal classification controller calculates the transient disturbance Mahalanobis distance between the time-domain feature vector and the transient disturbance feature mean vector in the same way. The real-time signal classification controller uses the reciprocal of the Mahalanobis distance of the short-circuit fault as the time-domain feature vector and compares it with the short-circuit fault feature template for short-circuit fault similarity. It also uses the reciprocal of the Mahalanobis distance of the transient disturbance as the time-domain feature vector and compares it with the transient disturbance feature template for transient disturbance similarity. The real-time signal classification controller compares the values ​​of the short-circuit fault similarity and the transient disturbance similarity. If the short-circuit fault similarity is greater than the transient disturbance similarity, a trigger signal is sent to the explosion-proof bridge wire circuit breaker 30. If the short-circuit fault similarity is less than or equal to the transient disturbance similarity, the real-time signal classification controller discards the window waveform segment, waits for the next sampling period, and then rereads the data from the sampling buffer and repeats the above process.

[0079] Assume the short-circuit fault feature mean vector of the pre-stored short-circuit fault feature template is [8.5V, 3.5μs, 7.5μs], and the short-circuit fault feature standard deviation vector is [1.2V, 0.8μs, 1.0μs]. The transient disturbance feature mean vector of the pre-stored transient disturbance feature template is [5.0V, 6.0μs, 12.0μs], and the transient disturbance feature standard deviation vector is [1.5V, 1.2μs, 2.0μs]. Taking the time-domain feature vector [9.7V, 4μs, 8μs] as an example: calculate the Mahalanobis distance of the short-circuit fault, and the normalized deviations of each component are as follows: , , The squares are 1.000, 0.391, and 0.250; the sum is 1.641; the square root is 1.281. The short-circuit fault similarity is... Calculate the Mahalanobis distance of the transient perturbation; the normalized deviations of each component are as follows: , , The squares are 9.816, 2.779, and 4.000; the sum is 16.595; the square root is 4.074. The transient perturbation similarity is... The short-circuit fault similarity of 0.781 is greater than the transient disturbance similarity of 0.245, and the real-time signal classification controller issues a trigger signal.

[0080] Example 10 Fault type identification can also be achieved using a support vector machine (SVM) classifier. The SVM classifier reads all sampling point data of the current rate of change waveform segment from the sampling buffer of the fault detection unit 50, calculates the arithmetic mean of the sampling point data, iterates through all sampling points, subtracts the arithmetic mean from the voltage value of each sampling point, takes the cube of the result, sums the cubes of all sampling points, divides by the total number of sampling points, and then divides by the cube of the standard deviation of the sampling point data to obtain the skewness of the current rate of change waveform segment. The SVM classifier iterates through all sampling points, subtracts the arithmetic mean from the voltage value of each sampling point, takes the fourth power of the result, sums the fourth power values ​​of all sampling points, divides by the total number of sampling points, and then divides by the fourth power of the standard deviation of the sampling point data. Subtracting 3 from the quotient yields the kurtosis of the current rate of change waveform segment. The SVM classifier iterates through all sampling points, multiplies the index value of each sampling point by the square of the voltage value of that sampling point, sums the products of all sampling points, and then divides by the sum of the squares of the voltage values ​​of all sampling points to obtain the energy moment of the current rate of change waveform segment. The Support Vector Machine (SVM) classifier arranges the skewness, kurtosis, and energy moments into a three-dimensional vector as a statistical feature vector. The SVM classifier reads the model parameters of the pre-trained SVM model from non-volatile memory. These parameters include the number of support vectors, the three-dimensional coordinates of each support vector, the Lagrange coefficients of each support vector, and a bias term. The SVM classifier iterates through each support vector, calculates the dot product between the current statistical feature vector and each support vector, multiplies the dot product by the corresponding Lagrange coefficient, sums the results, and then adds the bias term to the sum to obtain the discriminant function value. The SVM classifier checks the sign of the discriminant function value. If the discriminant function value is greater than zero, it outputs a fault type classification result indicating a short-circuit fault; if the discriminant function value is less than or equal to zero, it outputs a fault type classification result indicating a transient disturbance. The fault detection unit 50 reads the fault type classification result. If the fault type classification result indicates a short-circuit fault, it issues a trigger signal.

[0081] Assume the current rate of change waveform segment contains 10 sampling points with voltage values ​​of 0.5V, 2.0V, 4.5V, 7.0V, 8.5V, 8.0V, 6.5V, 4.0V, 2.0V, and 0.8V. Calculate the arithmetic mean: V. Calculate the standard deviation: the square of the voltage value at each sampling point minus the average value is respectively... , , , , , , , , , Summing gives 80.792; dividing by 10 gives 8.079; taking the square root gives 2.843V. Calculate the skewness: subtract the average value from the voltage value at each sampling point and take the cube of the result. , , , , , , , , , Summing gives 13.564; dividing by 10 gives 1.356; dividing by... (i.e., 22.967) yields 0.059. Kurtosis is calculated by subtracting the average value from the voltage values ​​at each sampling point and then taking the fourth power of the result. , , , , , , , , , Summing gives 982.177; dividing by 10 gives 98.218; dividing by... (i.e., 65.299) gives 1.504; subtracting 3 gives -1.496. Calculate the energy moment: For each sampling point index value from 1 to 10, multiply by the square of the corresponding voltage value: , , , , , , , , , The summation of the numerators yields 1476.40; the sum of the squares of the voltage values ​​at all sampling points is: Energy moment is The statistical feature vector is [0.059, -1.496, 5.416]. Assume the pre-trained support vector machine model has the following parameters: three support vectors with coordinates [0.1, -1.2, 4.8], [0.05, -1.8, 5.9], and [0.08, -1.4, 5.2], corresponding Lagrange coefficients of 0.85, -0.62, and 0.73, respectively, and a bias term of 0.15. Calculate the inner product of each support vector and the statistical feature vector: ; ; The discriminant function value is: The discriminant function value of 24.386 is greater than zero. The support vector machine classifier outputs a fault type discrimination result representing the short circuit fault, and the fault detection unit 50 issues a trigger signal.

[0082] Example 11 The construction process of the short-circuit fault feature template and transient disturbance feature template is as follows. The real-time signal classification controller reads labeled records from the historical fault waveform database of the station-level monitoring system through the communication interface. Each labeled record contains a waveform segment file path and a fault type label, with the label value being either short-circuit fault or transient disturbance. The real-time signal classification controller traverses all labeled records, reading the waveform segment files pointed to by the labeled records with the fault type label "short-circuit fault" one by one into memory, forming the first waveform set; and reads the waveform segment files pointed to by the labeled records with the fault type label "transient disturbance" one by one into memory, forming the second waveform set. For each waveform in the first waveform set, the real-time signal classification controller extracts a segment of the same length as the window waveform segment, with the extraction starting position half a window length backward from the waveform's trigger point. For the extracted segment, the real-time signal classification controller extracts the peak value, wavefront time, and half-peak width according to the extraction method of the time-domain feature vector. The three-dimensional vector formed by these three values ​​is used as a first time-domain feature vector. The set of all first time-domain feature vectors constitutes the first time-domain feature vector set. The real-time signal classification controller processes each waveform in the second waveform set in the same way to obtain the second time-domain feature vector set.

[0083] The real-time signal classification controller calculates the arithmetic mean of each dimension of all vectors in the first time-domain feature vector set, and uses the resulting three-dimensional vector formed by the arithmetic mean as the cluster center. The controller calculates the Mahalanobis distance between each vector in the first time-domain feature vector set and the cluster center, sorts the Mahalanobis distances from smallest to largest, and takes the Mahalanobis distance at the 90th percentile position as the initial value of the preset Mahalanobis distance. The controller constructs a hypersphere in three-dimensional space with the cluster center as the center and the preset Mahalanobis distance as the radius, serving as the decision boundary for the short-circuit fault feature template. The controller processes the second time-domain feature vector set in the same way to construct the decision boundary for the transient disturbance feature template. The controller calculates the Euclidean distance between the cluster centers of the short-circuit fault feature template and the transient disturbance feature template, and uses half of the Euclidean distance as the initial value of the preset separation interval. If the sum of the preset Mahalanobis distance of the short-circuit fault feature template and the preset Mahalanobis distance of the transient disturbance feature template is greater than the Euclidean distance, the real-time signal classification controller will multiply the radii of the two hyperspheres by a scaling factor less than 1 until the sum of the radii of the two spheres is less than or equal to the difference between the Euclidean distance and the preset separation interval, thus completing the application of regularization constraints.

[0084] Assume the first time-domain feature vector set contains 5 vectors: [8.2V, 3.2μs, 7.0μs], [8.8V, 3.8μs, 8.0μs], [7.9V, 3.1μs, 6.8μs], [9.1V, 4.0μs, 8.2μs], and [8.5V, 3.5μs, 7.5μs]. The cluster centers are the average values ​​of each dimension. V, μs, μs, i.e. [8.5V, 3.52μs, 7.5μs]. When calculating the Mahalanobis distance from each vector to the cluster center, assuming the standard deviations of each dimension are 0.5V, 0.4μs, and 0.6μs, the Mahalanobis distances are as follows: Similarly, the calculations yielded 1.45, 1.38, 1.52, and 1.10. After sorting, the values ​​became 1.10, 1.30, 1.38, 1.45, and 1.52. The value at the 90th percentile was 1.52. The hypersphere center of the short-circuit fault feature template is [8.5V, 3.52μs, 7.5μs], with a radius of 1.52. The cluster centers of the second time-domain feature vector set are [5.0V, 6.0μs, 12.0μs], with a radius of 2.0. The Euclidean distance between the two cluster centers is... The preset initial separation interval is 6.22 / 2 = 3.11. The sum of the radii of the two spheres, 1.52 + 2.0 = 3.52, is greater than the difference between the Euclidean distance 6.22 and the separation interval 3.11, which is 3.11. Therefore, the separation condition is not met. The radii of the two spheres need to be multiplied by a scaling factor of 0.8, resulting in new radii of 1.22 and 1.60. The sum of the radii is 2.82, which is less than 3.11, thus satisfying the separation condition. The regularization constraint is complete.

[0085] Example 12 Similarity comparison can also be constructed as a sequential probability ratio test. The real-time signal classification controller divides the window waveform segment into several sub-windows in chronological order, each containing the same number of sampling points. For each sub-window, the real-time signal classification controller extracts the peak value, wavefront time, and half-peak width of the sampling point data within the sub-window, forming a time-domain feature vector. After extracting the time-domain feature vector of the first sub-window, the real-time signal classification controller calculates the short-circuit fault likelihood value between the time-domain feature vector and the short-circuit fault feature template. Specifically, it substitutes each component of the time-domain feature vector into a Gaussian probability density function with the mean vector and standard deviation vector of the short-circuit fault feature template as parameters, and multiplies the probability density values ​​of each component. The transient disturbance likelihood value between the time-domain feature vector and the transient disturbance feature template is calculated in the same way. The real-time signal classification controller divides the short-circuit fault likelihood value by the transient disturbance likelihood value to obtain the likelihood ratio of the time-domain feature vector. The real-time signal classification controller uses the likelihood ratio as the initial value of the cumulative likelihood ratio of the current sub-window, i.e., the sequential likelihood ratio statistic. The real-time signal classification controller reads the values ​​of the preset upper acceptance bound and the preset lower rejection bound from the non-volatile memory, where the value of the upper acceptance bound is (1 - the allowable false negative rate) divided by the allowable false negative rate, and the value of the lower rejection bound is the allowable false negative rate divided by (1 - the allowable false negative rate). The real-time signal classification controller compares the sequential likelihood ratio statistic with the upper bound of acceptance and the lower bound of rejection: if the value of the sequential likelihood ratio statistic is greater than the value of the upper bound of acceptance, the real-time signal classification controller immediately stops feature extraction for subsequent sub-windows and immediately sends a trigger signal to the explosion bridge wire circuit breaker 30; if the value of the sequential likelihood ratio statistic is less than the value of the lower bound of rejection, the real-time signal classification controller determines that the current event is a transient disturbance, stops the discrimination, and resets the sequential likelihood ratio statistic; if the value of the sequential likelihood ratio statistic is between the value of the lower bound of rejection and the value of the upper bound of acceptance, the real-time signal classification controller continues to extract the time-domain feature sub-vector of the next sub-window, calculates a new likelihood ratio, multiplies the new likelihood ratio by the current sequential likelihood ratio statistic, updates the sequential likelihood ratio statistic, and compares it with the upper bound of acceptance and the lower bound of rejection again. This process is repeated until the sequential likelihood ratio statistic exceeds the upper bound of acceptance or falls below the lower bound of rejection, or all sub-windows have been processed.

[0086] Assuming the waveform segment is divided into 4 equal sub-windows, the allowable false positive rate is 0.05, and the allowable false negative rate is 0.02. The upper bound for acceptance is... Refuse to descend to the lower realm The temporal feature vector of the first sub-window has a short-circuit fault likelihood value of 0.12 compared to the short-circuit fault feature template, and a transient disturbance likelihood value of 0.03 compared to the transient disturbance feature template, with a likelihood ratio of [missing value]. The initial sequential likelihood ratio statistic is 4.0, ranging between 0.0211 and 19.6. Processing the second sub-window continues. The short-circuit fault likelihood value for the second sub-window is 0.18, the transient disturbance likelihood value is 0.04, and the likelihood ratio is 4.5. The sequential likelihood ratio statistic is updated as follows: The value remains between the two, so we continue processing the third sub-window. The short-circuit fault likelihood value for the third sub-window is 0.15, the transient disturbance likelihood value is 0.05, and the likelihood ratio is 3.0. The sequential likelihood ratio statistic is updated as follows: When the value of 54.0 is greater than the upper limit of 19.6, the real-time signal classification controller immediately stops processing the fourth sub-window and immediately issues a trigger signal.

[0087] The real-time signal classification controller uses a field-programmable gate array (FPGA) as its hardware platform, employing a mid-scale device from the Xilinx Artix-7 series or the Altera Cyclone V series, with at least 33K logic cells within its internal logic resources. The hardware parallelism of the FPGA enables it to simultaneously complete the reading, comparison, and computation of multiple data streams within a single clock cycle, satisfying the time constraint of completing all signal processing operations within the first predetermined time period.

[0088] The real-time signal classification controller internally includes the following hardware logic modules: a sampling buffer module, a sliding window truncation module, a peak detection module, a wavefront time measurement module, a half-peak width measurement module, a time-domain feature vector assembly module, a Mahalanobis distance calculation module, a similarity comparison module, and a trigger signal generation module. These modules are cascaded in a pipelined manner, with 8 pipeline stages. The processing delay of each pipeline stage is one clock cycle. The operating clock frequency of the field-programmable gate array is set to 200 MHz, and the single clock cycle is 5 ns. The pipelined processing delay for each sampling point is: 8 × 5 ns = 40 ns.

[0089] The sampling buffer module is implemented using a dual-port block random access memory (BRAM) with a storage depth of 2048 sampling points and a data width of 16 bits for each sampling point. The dual-port design allows the sampling buffer module to simultaneously write new sampling data and read out sampled data to be processed within one clock cycle. The sliding window truncation module sequentially reads consecutive sampling points from the read port of the sampling buffer module. The window length is preset to 20 sampling points, and the sliding step size is preset to 4 sampling points. For each window truncation operation, the sliding window truncation module generates a window start address and a window length control signal, driving the read port of the sampling buffer module to output the corresponding 20 sampling point data.

[0090] The peak detection module receives 20 sampling point data points output by the sliding window capture module, and uses the hardware comparator tree structure in... The maximum value is found within each clock cycle, and the peak value of the window waveform segment is output. The wavefront time measurement module receives the same 20 sampling point data and the peak value output by the peak detection module. First, it uses two parallel digital comparators to determine the voltage corresponding to 10% of the peak value and the voltage corresponding to 90% of the peak value, respectively. Then, it searches for the sampling point index that first exceeds 10% of the peak value and the sampling point index that first exceeds 90% of the peak value in the 20 sampling points according to the time sequence. The difference between the two indices is multiplied by the sampling period of 1 μs to obtain the wavefront time. The half-peak width measurement module determines the voltage corresponding to 50% of the peak value in a similar manner, searches for the sampling point index where the rising edge exceeds 50% of the peak value and the sampling point index where the falling edge is below 50% of the peak value, calculates the difference between the two indices and multiplies it by the sampling period to obtain the half-peak width.

[0091] The time-domain feature vector assembly module sequentially combines the three values—peak value, wavefront time, and half-peak width—into a three-dimensional vector, which is temporarily stored in the form of a register. The Mahalanobis distance calculation module reads the mean vector and standard deviation vector of the pre-stored short-circuit fault feature template, as well as the mean vector and standard deviation vector of the transient disturbance feature template, from the non-volatile memory. The non-volatile memory uses the serial peripheral interface flash memory, with a capacity of 64 Mb, and stores six sets of parameters for the two templates. The Mahalanobis distance calculation module calculates the sum of squares of the normalized deviation using the hardware multiplier and adder, and then obtains the square root using the square root of the coordinate rotation digital computer algorithm, thus obtaining the Mahalanobis distance for the short-circuit fault and the Mahalanobis distance for the transient disturbance. The similarity comparison module calculates the reciprocals of the two Mahalanobis distances and uses the class with the larger reciprocal as the discrimination result.

[0092] The trigger signal generation module receives the discrimination result from the similarity comparison module. If the discrimination result indicates a short circuit fault, the trigger signal generation module pulls the level of the trigger signal output pin from the low level to the high level to generate the trigger signal.

[0093] Using the 200 MHz clock frequency, the 20 sampling point window length, and the 8-stage pipeline, the total processing time for feature extraction and classification of a single window waveform segment is: (reading time for 20 sampling points + 5 cycles for peak detection + 20 cycles for wavefront time detection + 20 cycles for half-peak width detection + approximately 15 cycles for Mahalanobis distance calculation) × 5 ns ≈ 400 ns. Within the first predetermined time of 200 μs, the real-time signal classification controller can complete at least: 200 μs ÷ 400 ns ≈ 500 complete window discrimination operations, fully meeting the real-time requirements.

[0094] The pre-stored short-circuit fault feature template and the transient disturbance feature template are obtained through offline training. The offline training process is completed on the industrial control computer of the station-level monitoring system. The industrial control computer reads all waveform records marked "short-circuit fault" from the historical fault waveform database. For each waveform, it traces back half a window length from the fault trigger point as the truncation starting point, truncates a segment of the same length as the online window, and extracts the peak value, wavefront time, and half-peak width using the same time-domain feature extraction method as the online segment, thus forming the first time-domain feature vector set. All waveform records marked "transient disturbance" are processed in the same way to form the second time-domain feature vector set. The industrial control computer calculates the mean and standard deviation of each dimension of the first and second time-domain feature vector sets, and writes the mean and standard deviation as template parameters into the flash memory of the field-programmable gate array. The template parameters can be updated by the industrial control computer according to the newly added waveform data after each fault event and rewritten into the flash memory through the serial peripheral interface.

[0095] When performing the sequential probability ratio test, the real-time signal classification controller assumes that the time-domain feature components are independent of each other. The rationality of this assumption is based on the following facts: Under the fixed fault type, the peak value is mainly affected by the fundamental amplitude of the fault current, the wavefront time is mainly affected by the fault initiation angle, and the half-peak width is mainly affected by the fault duration and the harmonic content. These three factors are dominated by different physical factors and are statistically approximately uncorrelated.

[0096] The following provides a complete example of calculating the likelihood value from the time-domain feature vector.

[0097] Assume the mean vector of the short-circuit fault feature template is [8.5V, 3.5μs, 7.5μs], and the standard deviation vector is [1.2V, 0.8μs, 1.0μs]. The mean vector of the transient disturbance feature template is [5.0V, 6.0μs, 12.0μs], and the standard deviation vector is [1.5V, 1.2μs, 2.0μs]. During the online discrimination, the time-domain feature sub-vector extracted by the first sub-window is [8.2V, 3.3μs, 7.2μs].

[0098] The probability density values ​​of each component of the sub-vector under the short-circuit fault template are calculated as follows. For the peak component 8.2V: the mean is 8.5V, the standard deviation is 1.2V, and the normalization deviation is... The Gaussian probability density function value For the wavefront time component of 3.3 μs: the mean is 3.5 μs, the standard deviation is 0.8 μs, and the normalized deviation is... The probability density value For the half-peak width component of 7.2 μs: the mean is 7.5 μs, the standard deviation is 1.0 μs, and the normalized deviation is... The probability density value The short-circuit fault likelihood value .

[0099] The probability density values ​​of each component of the subvector under the transient perturbation template: the normalization deviation of the peak component is The probability density value The normalized deviation of the wavefront time component is... The probability density value The normalization deviation of the half-peak width component is: The probability density value The transient perturbation likelihood value .

[0100] The likelihood ratio of the first said sub-window .

[0101] The initial value of the sequential likelihood ratio statistic is the likelihood ratio itself, i.e., 7434. The allowable false positive rate is 0.05, and the allowable false negative rate is 0.02. The upper bound of acceptance... The rejection of the lower bound. .

[0102] When the sequential likelihood ratio statistic 7434 is greater than the acceptance upper bound of 19.6, the real-time signal classification controller immediately terminates the processing of the subsequent sub-windows and sends the trigger signal to the exploding bridge wire circuit breaker. The entire discrimination process only consumes the processing time of the first sub-window, and does not consume the processing time of all four sub-windows, greatly shortening the fault discrimination delay.

[0103] Regarding the real-time analysis of the sequential discrimination within the first predetermined time of 200 μs, the processing delay of a single sub-window includes: approximately 5 μs for sub-window sampling point reading, approximately 3 μs for temporal feature vector extraction, and approximately 2 μs for Gaussian probability density calculation and likelihood ratio update, totaling approximately 10 μs. A maximum of 20 sub-windows can be processed within the first predetermined time of 200 μs. Typically, the number of sub-windows is set to 4 to 8, and the total processing delay is 40 to 80 μs, accounting for 20% to 40% of the first predetermined time, leaving sufficient timing margin for subsequent trigger signal generation and the exploding bridge wire circuit breaker drive.

Claims

1. A fault isolation and current limiting bus coupler for AC buses of grid-type converter groups, characterized in that, include: The segmented busbar structure includes a first busbar segment and a second busbar segment; An explosive bridge wire circuit breaker, connected between the first busbar section and the second busbar section, has a bridge wire and an explosive charge in contact with the bridge wire, and is used to disconnect the electrical connection between the first busbar section and the second busbar section within a second predetermined time after receiving a trigger signal. A current-limiting reactor, connected in parallel with the explosive bridge wire circuit breaker, is used to divert the fault current flowing through the explosive bridge wire circuit breaker to the current-limiting reactor after the electrical connection is broken, so as to limit the peak value of the short-circuit current. The fault detection unit is connected to the signal of the exploding bridge wire circuit breaker and is used to issue the trigger signal within a first predetermined time.

2. The fault isolation and current limiting bus coupler cabinet according to claim 1, wherein, The explosive bridge wire circuit breaker includes: A current-carrying conductor having a pre-fabricated break, the current-carrying conductor being connected in series between the first busbar segment and the second busbar segment; The explosive charge is shaped into a shaped charge structure and contacts the bridge wire. The shaped charge groove is aligned with the pre-formed fracture surface to generate a directional metal jet to cut the current-carrying conductor after detonation. An insulating partition, fixed within the pre-fabricated break, is used to separate the break surfaces on both sides of the pre-fabricated break after the current-carrying conductor is cut, so as to prevent the arc reignition between the breaks after the fault current is switched to the current-limiting reactor.

3. The fault isolation and current limiting bus coupler cabinet according to claim 2, wherein, The insulating partition is held on one side of the pre-formed fracture by an elastic pre-compression mechanism. The elastic pre-compression mechanism includes a compression spring and a locking pin. The locking pin locks the insulating partition in a compressed position before the explosive charge is detonated. The detonation pressure generated by the detonation of the explosive charge pushes the locking pin to release. The compression spring pushes the insulating partition to slide laterally into the fracture surface along the pre-formed fracture, so as to actively insert into and separate the fracture surface at the moment the current-carrying conductor is cut.

4. The fault isolation and current limiting bus coupler cabinet according to claim 2, wherein, The insulating partition also includes a pre-placed arc-extinguishing medium chamber. The pre-placed arc-extinguishing medium chamber is embedded in the surface of the insulating partition facing the pre-formed fracture. The pre-placed arc-extinguishing medium chamber is filled with powdered arc-extinguishing medium. The opening of the pre-placed arc-extinguishing medium chamber is sealed by a molten sealing film. The molten sealing film melts and ruptures under the action of the high-temperature detonation products generated by the detonation of the explosive charge, so that the powdered arc-extinguishing medium is sprayed between the fracture surfaces under the high-pressure gas flow of the detonation products. This allows the insulating partition to separate the fracture surfaces while the powdered arc-extinguishing medium absorbs arc energy and accelerates the recovery of the dielectric strength between the fracture surfaces.

5. The fault isolation and current limiting bus coupler cabinet according to claim 1, wherein, The explosive bridge wire circuit breaker includes at least two series-connected explosive bridge wire break units. Each explosive bridge wire break unit has an independent bridge wire and an explosive charge. The at least two series-connected explosive bridge wire break units are connected in series between the first busbar section and the second busbar section. Adjacent explosive bridge wire break units are connected by a voltage equalizing capacitor. The voltage equalizing capacitor is used to equalize the recovery voltage across each explosive bridge wire break unit after the explosive bridge wire circuit breaker trips, so as to accelerate the commutation process of the fault current to the current-limiting reactor.

6. The fault isolation and current limiting bus coupler cabinet according to claim 1, wherein, The explosive bridge wire circuit breaker includes at least two detonation units with different amounts of explosive charge. The at least two detonation units are stacked along the axial direction of the explosive charge. The bridge wire of each detonation unit passes through the explosive charge of the corresponding detonation unit and is connected to an independent trigger terminal. The fault detection unit includes multiple independent trigger output channels, which are respectively connected to the independent trigger terminals of the at least two detonation units to trigger the at least two detonation units in a predetermined time sequence, generating detonation waves that increase sequentially along the axial direction.

7. The fault isolation and current limiting bus tie cabinet according to claim 1 further includes a voltage clamping and energy dissipation network, wherein the voltage clamping and energy dissipation network is connected in parallel across the current limiting reactor, and the voltage clamping and energy dissipation network includes: The solid-state switch branch is composed of silicon carbide junction field-effect transistors connected in series. The solid-state switch branch is connected in parallel with the current-limiting reactor and is used to conduct when the exploding bridge wire circuit breaker opens and generates arc voltage, so as to commutate the inductive current in the current-limiting reactor to the solid-state switch branch. A zinc oxide surge arrester array, connected in series with the solid-state switch branch, is used to clamp the commutated bus voltage below a predetermined insulation level; and A power dissipation resistor is connected in parallel across the zinc oxide surge arrester array to dissipate residual oscillation energy.

8. The fault isolation and current limiting bus coupler cabinet according to claim 7, wherein, The zinc oxide surge arrester array includes at least two sets of zinc oxide valve columns, which have different DC reference voltages. The at least two sets of zinc oxide valve columns are connected in parallel to each other through a ceramic-sealed three-electrode gas discharge tube. The two main electrodes of the ceramic-sealed three-electrode gas discharge tube are respectively connected in parallel to the two ends of the first set of zinc oxide valve columns with the lower DC reference voltage. The trigger electrode of the ceramic-sealed three-electrode gas discharge tube is connected to an auxiliary trigger capacitor through a trigger resistor. The auxiliary trigger capacitor is charged by the initial surge voltage of the voltage clamping and energy dissipation network to trigger the ceramic-sealed three-electrode gas discharge tube to conduct when the initial surge voltage reaches a set value. This allows the first set of zinc oxide valve columns to be clamped separately in the initial stage after the fault current commutation. After conduction, the energy is shared by the second set of zinc oxide valve columns with the higher DC reference voltage and the first set of zinc oxide valve columns. The ceramic-sealed three-electrode gas discharge tube also includes a voltage change rate detection branch connected in parallel between the two main electrodes. The voltage change rate detection branch is composed of a detection capacitor and a detection resistor connected in series. The common node of the detection capacitor and the detection resistor is connected to the trigger electrode. When the rise rate of the initial surge voltage exceeds a preset voltage change rate threshold, the coupling current of the detection capacitor generates a trigger voltage on the detection resistor, so that the ceramic-sealed three-electrode gas discharge tube is turned on in advance before the initial surge voltage reaches the set value. A positive temperature coefficient thermistor is also connected in series in the main discharge circuit of the ceramic-sealed three-electrode gas discharge tube. The positive temperature coefficient thermistor is in a low resistance state at room temperature and does not affect the conduction of the ceramic-sealed three-electrode gas discharge tube. During the period when the ceramic-sealed three-electrode gas discharge tube is conducting and the current is continuous, the resistance increases sharply due to the self-heating effect, which limits the current passing through the ceramic-sealed three-electrode gas discharge tube, so as to assist the ceramic-sealed three-electrode gas discharge tube to reliably turn off after the voltage of the zinc oxide surge arrester array decreases, and prevent follow current.

9. The fault isolation and current limiting bus coupler cabinet according to claim 7, wherein, The solid-state switch branch also includes a self-powered trigger circuit, which includes: A power-collecting resistor has one end connected to the drain of one end of the solid-state switch branch, and the other end connected to the cathode of a Zener diode through an isolation diode. The anode of the isolation diode is connected to the power-collecting resistor, the cathode is connected to the cathode of the Zener diode, and the anode of the Zener diode is connected to the gate of the solid-state switch branch. A trigger capacitor, connected in parallel across the Zener diode, is used to charge the trigger capacitor through the energy-harvesting resistor and the isolation diode when the exploding bridge wire circuit breaker opens and generates an arc voltage causing a rise in the voltage between the drain and source. When the voltage of the trigger capacitor exceeds the breakdown voltage of the Zener diode, it drives the solid-state switch branch to conduct; and A bleed resistor is connected in parallel across the trigger capacitor. The resistance of the bleed resistor is 10 times greater than the resistance of the energy extraction resistor. It is used to slowly discharge the charge stored on the trigger capacitor after the exploding bridge wire circuit breaker disconnects, so that the solid-state switch branch automatically returns to the blocking state after a predetermined time.

10. The fault isolation and current limiting bus coupler cabinet according to claim 1, wherein, The explosive bridge wire circuit breaker and the current-limiting reactor are connected in parallel between the first busbar section and the second busbar section through a stacked busbar structure. The stacked busbar structure includes alternating positive busbar layers, negative busbar layers, and insulating layers. The positive busbar layer and the negative busbar layer are respectively connected to one end of the explosive bridge wire circuit breaker and one end of the current-limiting reactor, so that the loop area of ​​the parallel circuit formed by the explosive bridge wire circuit breaker and the current-limiting reactor is smaller than a predetermined area, thereby reducing the parasitic inductance when the fault current is commutated from the explosive bridge wire circuit breaker to the current-limiting reactor.

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