Intelligent fusion terminal lightning protection circuit

Abstract

The application provides a lightning protection circuit of an intelligent fusion terminal, and relates to the technical field of lightning protection of smart grid equipment. The protection circuit comprises at least two external ports, a port pre-stage current-limiting isolation circuit, a discharge bus circuit, a unified energy discharge circuit, a partitioned grounding circuit and a centralized deterioration monitoring circuit. The common-mode discharge branches of the pre-stage isolation circuits of the ports are uniformly connected to the discharge bus; the unified energy discharge circuit is connected across the discharge bus and a lightning protection ground copper foil area; the lightning protection ground and the functional ground are provided with an isolation gap and are connected only through a single-point bridging device; the centralized monitoring circuit collects electrical parameters of the protection devices and outputs an alarm when the protection devices deteriorate. The application uniformly guides and centrally discharges the surges of multiple ports, effectively blocks the surge crosstalk between the ports, weakens the interference of the surge current on the functional ground based on the partitioned isolation of the lightning protection ground and the functional ground, and realizes the online monitoring and alarm of the health state of the protection devices in combination with the centralized deterioration monitoring circuit.

Description

Technical Field

[0001] This invention relates to the field of lightning protection technology for smart grid equipment, and more particularly to a lightning protection circuit for a smart fusion terminal. Background Technology

[0002] As a core edge device of the low-voltage power distribution Internet of Things (IoT), the intelligent fusion terminal is widely deployed in environments with complex electromagnetic conditions, such as outdoor substations, ring main units, and pole-mounted transformer areas. To achieve power information acquisition, status monitoring, and communication interaction with energy meters, data collectors, reactive power compensation controllers, and various sensors, the intelligent fusion terminal typically has multiple external interfaces, including an AC power input port, an RS485 communication port, an RS232 debugging port, an Ethernet communication port, and general-purpose input / output ports.

[0003] Because these ports are connected to external devices via long cables, surge voltage and current can easily couple into the terminal's interior along the cables under lightning strikes or induced surge conditions, damaging components in the power supply circuit, communication interface circuit, metering and sampling circuit, and control processing circuit. In existing technologies, most intelligent converged terminals employ independent surge protection schemes for different ports, such as varistors and current-limiting devices at the power supply end, and TVS devices and resettable fuses at the communication end. This type of scheme is essentially an island-like, localized protection, lacking a comprehensive global surge protection architecture for all ports. Due to this lack of a global perspective, existing terminals exhibit systemic deficiencies caused by architectural flaws in harsh electromagnetic environments, specifically manifested as follows: (1) Topological fragmentation at the architecture level. The surge protection circuits of each port are independent of each other and lack a unified energy collection and discharge path. When a surge enters a port, the surge current is very likely to couple to other ports through the common loop inside the terminal, forming cross-port surge return and crosstalk, causing the protection device to bear surge stress beyond the design expectation and causing secondary impact on the internal sensitive circuits; (2) Dispersed discharge paths cause ground plane interference. Because each port has an independent discharge circuit, the grounding system is distributed. When multiple protection devices are activated, transient potential differences are easily generated in the common ground reference area, which in turn affects the stable operation of analog sampling, metering and communication circuits; (3) Architectural defects lead to resource redundancy and increased costs. In the absence of a global coordination mechanism, in order to improve the surge tolerance of each port, the existing technology configures complete high current protection devices for each port, resulting in a large number of devices and a large PCB area, which is not conducive to the miniaturization of the terminal and cost control; (4) Redundancy leads to blind spots in operation and maintenance. The large number of distributed protection devices makes it impossible for the system to establish a unified monitoring node. After being subjected to multiple surges, protection devices such as varistors and TVS devices may experience parameter drift, increased leakage current or failure. Existing solutions usually lack a centralized status monitoring mechanism for multi-port protection devices, which is not conducive to online maintenance.

[0004] Therefore, there is an urgent need for a completely new architecture that can take a global perspective to achieve unified guidance, centralized discharge, zoned grounding of multi-port surges, and intelligent integrated terminal lightning protection circuit with centralized device monitoring capabilities. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, the present invention adopts the following technical solution: A smart fusion terminal lightning protection circuit includes at least two external ports, a port front-end current limiting isolation circuit, a discharge bus circuit, a unified energy discharge circuit, a zoned grounding circuit, and a centralized degradation monitoring circuit, each of which is connected to a port front-end current limiting isolation circuit.

[0006] The port front-end current limiting isolation circuits are respectively set between each of the external ports and the internal functional circuits of the terminal. Each of the port front-end current limiting isolation circuits is provided with a common-mode discharge branch, which is used to limit the surge current amplitude entering the internal functional circuits of the terminal when a surge occurs, and guide the common-mode surge energy to the discharge bus circuit.

[0007] The discharge bus circuit is a common low-impedance conductive node on a printed circuit board. The discharge terminals of each of the first-level common-mode discharge branches are connected in parallel to the same discharge bus node. The discharge bus node forms a low-impedance discharge path through wide copper foil, metal copper busbar or multiple layers of parallel copper foil, which is used to converge the common-mode surge currents guided from each port to one place.

[0008] The input terminal of the unified energy discharge circuit is electrically connected to the discharge bus node, and its output terminal is connected to the lightning protection ground copper foil area, which is used to centrally discharge and limit the residual voltage of the surge energy gathered from multiple ports.

[0009] The partitioned grounding circuit includes a lightning protection copper foil area and a functional ground copper foil area that are physically insulated from each other. An isolation seam, slot, or clearance strip is provided between the lightning protection copper foil area and the functional ground copper foil area, and the two are only electrically connected by a single-point bridging device. The lightning protection copper foil area is used to receive the surge current released by the unified energy discharge circuit and guide it to the ground. The functional ground copper foil area is used to provide a reference ground for the internal functional circuits of the terminal.

[0010] The sampling terminals of the centralized degradation monitoring circuit are respectively connected to the two ends or the return branch of at least one monitored protection device, and are used to output abnormal signals when the parameters of the monitored protection device drift, leakage current increases or fails.

[0011] As a preferred embodiment of this application, the unified energy discharge circuit includes a primary high-current-throughput discharge branch and a secondary fast clamping branch. Both the primary high-current-throughput discharge branch and the secondary fast clamping branch are connected in parallel between the discharge bus node and the lightning protection grounding copper foil area. The primary high-current-throughput discharge branch includes one or more of a gas discharge tube, a varistor, and a discharge gap device, used to handle the discharge of the main surge current. The secondary fast clamping branch includes a high-power TVS device, whose response speed is faster than that of the primary high-current-throughput discharge branch, used to clamp and limit voltage spikes on the discharge bus within the time window before the primary branch is fully conducting. Both operate sequentially in response time and cooperate functionally to limit the voltage on the discharge bus within a safe range. Preferably, the unified energy discharge circuit is located near the external port connector, and the connection length between the unified energy discharge circuit and the discharge bus circuit is 3mm to 20mm to reduce the impact of parasitic inductance on the discharge path.

[0012] As a preferred embodiment of this application, the external port includes any two or more combinations of AC power port, RS485 communication port, RS232 communication port, Ethernet communication port, or general purpose input / output port. The specific configuration of the pre-stage current limiting and isolation circuit for each different type of port is as follows: The power port front-end current limiting isolation circuit includes a fuse, a current limiting impedance device, and a common-mode suppression device connected in series on each power supply line, and a differential-mode clamping device connected in parallel between the power supply lines. Each power supply line is connected to the discharge bus circuit through a common-mode discharge branch.

[0013] The RS485 port front-end current limiting isolation circuit includes a common-mode choke and a current-limiting resistor connected in series on lines A and B, respectively. A differential-mode TVS device is connected in parallel between lines A and B. Lines A and B are respectively connected to the discharge bus circuit through common-mode discharge branches.

[0014] The Ethernet front-end current limiting isolation circuit corresponding to the Ethernet port includes an RJ45 interface, a network transformer, and a PHY chip. The center tap of the network transformer is connected to the discharge bus circuit through a common-mode discharge branch, and the shield of the RJ45 interface is electrically connected to the lightning protection ground copper foil area in the partitioned grounding circuit.

[0015] As a preferred embodiment of this application, the single-point bridging device is one or more of a zero-ohm resistor, a ferrite bead, a resistor, an inductor, or a spark gap, or a parallel combination of a high-voltage safety capacitor and a discharge gap device.

[0016] The functional ground copper foil area is divided into a digital ground copper foil area and an analog ground copper foil area, and the digital ground copper foil area and the analog ground copper foil area are connected by a bridging device.

[0017] As a preferred embodiment of this application, the centralized degradation monitoring circuit includes a high-resistance voltage divider sampling branch and a comparator for the varistor. The high-resistance voltage divider sampling branch is connected in parallel across the varistor, and its total resistance is 1MΩ to 20MΩ, ensuring no significant current shunting occurs in the varistor during normal operation. The output of the comparator is connected to the main control MCU via an optocoupler isolation circuit. The centralized degradation monitoring circuit also includes a sampling resistor and a window comparator for the TVS device. The sampling resistor is connected in series in the return current branch of the TVS device, and its resistance is 0.05Ω to 10Ω, ensuring no additional voltage drop occurs in the discharge path during normal operation. The output of the window comparator is connected to the alarm output branch.

[0018] Preferably, the alarm output branch includes a logic summarization circuit, an open-drain transistor, and an optocoupler. Any abnormal signal from the monitored and protected device can be summed by the logic summarization circuit and then used to control the open-drain transistor to output a unified alarm signal, which is then connected to the main control MCU via the optocoupler. The logic summarization circuit adopts an OR logic gate, a wire-OR connection structure, or a wire-AND connection structure.

[0019] Compared with the prior art, the present invention has the following beneficial effects: (1) At the circuit topology level, this invention connects the common-mode discharge branches in the front-end current limiting isolation circuits of multiple ports to the same discharge bus node, so that common-mode surges entering from any port are uniformly guided to a unified energy discharge circuit for centralized processing via the discharge bus node. This globally coordinated architecture physically blocks the path of surges flowing back to other ports through the internal functional circuits of the terminal, avoiding the problem of inter-port surge crosstalk caused by the dispersion of discharge paths in distributed protection schemes.

[0020] (2) In terms of electromagnetic compatibility and anti-interference, based on the above-mentioned unified discharge architecture, this invention further divides the lightning protection ground copper foil area and the functional ground copper foil area into separate zones on the physical plane, and achieves electrical connection only through a single-point bridging device. Thanks to the unification and concentration of the discharge path, the peak surge current is limited to the lightning protection ground copper foil area and its adjacent circuits, reducing the diffusion range and duration of the surge discharge current on the functional ground plane, thereby weakening the interference of ground potential fluctuations on power metering, data acquisition and communication circuits. In addition, in the zoned grounding strategy, when the single-point bridging device adopts the parallel combination of high-voltage safety capacitor and discharge gap device, it can automatically short-circuit the lightning protection ground and the functional ground into an overall equipotential floating ground in the event of external grounding failure, preventing the abnormal rise of the lightning protection ground potential caused by grounding failure from breaking down the isolation device spanning the two grounds, and improving the surge survivability of the terminal in the event of poor grounding or grounding failure.

[0021] (3) In terms of engineering implementation and cost control, thanks to the global coordination mechanism of multi-port shared discharge bus and unified energy discharge circuit, each port only needs to be configured with a lightweight first-level common mode discharge branch. The unified energy discharge circuit centrally undertakes the subsequent large current discharge and residual voltage clamping functions, avoiding the problem of redundant device quantity and increased PCB area caused by configuring complete protection devices for each port, which is conducive to terminal miniaturization design and cost control.

[0022] (4) In terms of system operation and maintenance and security assurance, this invention further constructs a centralized degradation monitoring network for the highly integrated protection architecture mentioned above. By connecting a high-resistance voltage divider sampling branch in parallel across the varistor and a sampling resistor in series in the return current branch of the TVS device, and using a comparator or window comparator to perform threshold judgment on the sampling signal, centralized monitoring of leakage current and conduction characteristics of key protection devices at multiple ports is realized. An alarm signal is output before the device parameters drift or fail, and maintenance personnel can promptly grasp the health status of the lightning protection circuit, preventing safety hazards caused by the failure of protection in the existing distributed architecture. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the overall structure of a lightning protection circuit for an intelligent fusion terminal according to the present invention; Figure 2 This is a schematic diagram of the connection of the power port pre-stage current limiting isolation circuit in this invention; Figure 3 This is a schematic diagram of the connection of the RS485 port front-end current limiting isolation circuit in this invention; Figure 4 This is a connection diagram of the Ethernet port front-end current limiting isolation circuit in this invention; Figure 5This is a schematic diagram showing the connection of the discharge bus circuit and the unified energy discharge circuit in this invention.

[0024] Figure 6 This is a schematic diagram of the layout of the PCB partitioned grounding circuit in this invention; Figure 7 This is a schematic diagram of the centralized degradation detection circuit connection in this invention; Figure 8 This is a schematic diagram showing the connection between the alarm output circuit and the main control MCU in this invention. Detailed Implementation

[0025] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described below are only used to explain the present invention and are not intended to limit the present invention.

[0026] To facilitate understanding of the technical solution of this application, the core concepts involved in this application are first defined as follows: Discharge bus circuit: An independent low-impedance conductor structure (e.g., a copper foil area with a width of not less than 5mm, multi-layer parallel copper foil, or metal copper busbar) located on the printed circuit board (PCB) near the external interface connector. Its function is to serve as a common bus node, to gather the common-mode surge current introduced from all external ports in one place, and to guide it to the subsequent discharge circuit.

[0027] Zoned grounding circuit: In the physical layout of a PCB, the grounding conductor area that receives surge discharge current (i.e., the lightning protection copper foil area) is physically isolated from the grounding conductor area that provides a reference potential for the internal functional circuits of the terminal (i.e., the functional ground copper foil area) (e.g., through slots, isolation seams, or clearance strips), and the two are electrically connected only through a single bridging device. Its purpose is to limit the spread of surge current on the functional ground plane.

[0028] Unified Energy Discharge Circuit: A multi-stage surge absorption circuit combination, which includes a first-stage high-current-capacity discharge branch and a second-stage fast clamping branch, used to receive all the surge energy gathered by the discharge bus circuit, and sequentially complete the main energy discharge and residual voltage clamping, limiting the voltage on the discharge bus to the range that subsequent circuits can withstand.

[0029] Centralized degradation monitoring circuit: A sampling and judgment circuit is set for at least one monitored protection device. It collects the voltage signal across the varistor through a high-resistance voltage divider sampling method, or collects the current signal of the TVS device return branch through a series sampling resistor method, and compares the sampled signal with a preset threshold to determine whether the protection device has experienced parameter drift, increased leakage current, or failure.

[0030] like Figure 1As shown, this embodiment provides a smart fusion terminal lightning protection circuit, including a multi-port front-end current limiting isolation circuit, a discharge bus circuit, a unified energy discharge circuit, a zoned grounding circuit, and a centralized degradation monitoring circuit.

[0031] The multi-port front-end current limiting isolation circuits are respectively disposed between each external port and the corresponding internal functional circuit of the terminal. Each external port is connected to the corresponding internal functional circuit of the terminal via the multi-port front-end current limiting isolation circuits. Each multi-port front-end current limiting isolation circuit is provided with a common-mode discharge branch, and the discharge terminal of each common-mode discharge branch is respectively connected to the discharge bus circuit. In this embodiment, the external ports include an AC power port, an RS485 port, and an Ethernet port; correspondingly, the multi-port front-end current limiting isolation circuits include a power supply front-end current limiting isolation circuit, an RS485 front-end current limiting isolation circuit, and an Ethernet front-end current limiting isolation circuit.

[0032] The input terminal of the discharge bus circuit is connected to the common-mode discharge branch led out from the front-stage current limiting isolation circuit of each port, and the output terminal is connected to the unified energy discharge circuit. It is used to gather the common-mode surge current led out from each port to the same node and send it to the unified energy discharge circuit.

[0033] The unified energy discharge circuit is connected between the discharge bus circuit and the lightning protection ground copper foil area. Its input terminal is connected to the discharge bus circuit, and its output terminal is connected to the lightning protection ground copper foil area. It is used to centrally discharge the surge energy after it is gathered, and to clamp and limit the residual voltage on the discharge bus.

[0034] The partitioned grounding circuit includes a lightning protection copper foil area and a functional ground copper foil area. The lightning protection copper foil area is connected to the grounding terminal of the unified energy discharge circuit and is used to receive surge discharge current; the functional ground copper foil area is connected to the grounding terminal of the internal functional circuit and is used to provide a reference ground for the internal circuit. The lightning protection copper foil area and the functional ground copper foil area are electrically connected only through a single-point bridging device.

[0035] The sampling terminals of the centralized degradation monitoring circuit are respectively connected to both ends of the monitored protection device or in the return branch, and are used to output abnormal signals when the protection device parameters drift, leakage current increases or fails; the output terminal of the centralized degradation monitoring circuit is connected to the main controller through the alarm output branch.

[0036] like Figure 2 As shown, in this embodiment, the power supply front-end current limiting isolation circuit is located between the AC power port and the internal power conversion circuit of the terminal. This circuit is used to limit the surge current amplitude flowing into the subsequent stage through series impedance when a surge occurs, to block the rapid steep wave at the surge leading edge through common-mode suppression devices, and to guide the common-mode surge to the discharge bus through common-mode discharge devices, while protecting the downstream power conversion circuit from differential-mode overvoltage impact.

[0037] The configuration of the power supply pre-stage current limiting isolation circuit is determined based on the power supply type of the power port. As a typical application scenario, this embodiment uses single-phase AC (AC 220V) power supply as an example. In this scenario, the power supply pre-stage current limiting isolation circuit includes a fuse F1, a current limiting impedance device RT1, and one winding of a common-mode suppression device L1 connected in series on the live wire L; a fuse F2, a current limiting impedance device RT2, and the other winding of a common-mode suppression device L1 are connected in series on the neutral wire N. A differential-mode clamping device RV1 is connected in parallel between the live wire L and the neutral wire N. A common-mode bleeder GDT1 is connected between the live wire L and the bleeder bus circuit, and a common-mode bleeder GDT2 is connected between the neutral wire N and the bleeder bus circuit. For three-phase AC power supply scenarios, the aforementioned series branches can be set up on each phase line and the neutral line, and the common-mode discharge branches of each phase line can be connected to the discharge bus circuit. For DC power supply scenarios, the aforementioned series branches can be set up on the positive bus and the negative bus, and the common-mode discharge branches of the positive and negative buses can be connected to the discharge bus circuit.

[0038] The fuses F1 and F2 are slow-blow type fuses with a rated current of 3A. Their function is to melt and disconnect the power supply circuit in the event of a power frequency short circuit or continuous overcurrent, preventing subsequent devices from being damaged or catching fire due to overheating caused by overcurrent. Fuses F1 and F2 are located at the very beginning of the circuit (closest to the AC power port). Their selection criteria are: the rated current must be greater than the maximum input current when the terminal is operating normally (the maximum operating current in this embodiment is 2A), and less than the withstand current of the subsequent current-limiting impedance devices RT1 and RT2 and the varistor RV1 during a short circuit fault, to ensure that the fuses melt first when the protective devices fail and short circuit occurs.

[0039] The current-limiting impedance devices RT1 and RT2 are positive temperature coefficient thermistors (PTCs) with a room temperature resistance of 10Ω, and are placed after the fuses F1 and F2. The selection criteria are as follows: under the action of the maximum surge voltage (6kV combined wave), the high resistance state (hundreds to thousands of ohms) exhibited by the PTC after heating up needs to limit the surge current amplitude within the rated current capacity range of the common-mode discharge devices GDT1 and GDT2 and the differential-mode clamping device RV1; the low resistance (10Ω) at room temperature ensures that it does not affect the normal power supply.

[0040] The common-mode suppression device L1 is a common-mode choke with an inductance of 10mH. The selection criteria are as follows: within the surge rise time (typically 1.2μs), the inductive reactance XL = 2πfL, approximately 5kΩ (@1MHz), which is much greater than the input impedance of the downstream circuit. This allows most of the surge energy to be reflected back to the source side or forced to be discharged through the common-mode discharge devices GDT1 and GDT2. The differential-mode current flux cancels each other out, without affecting the normal power supply.

[0041] The differential mode clamping device RV1 is a varistor (model 14D471K), connected in parallel between the live wire L and the neutral wire N, with a nominal varistor voltage of 470V and a peak pulse current of 4.5kA (8 / 20μs waveform). The selection criteria are: the varistor voltage of 470V is higher than the AC peak voltage of 311V (to prevent conduction during normal operation) and lower than the maximum withstand voltage of 600V of the downstream power conversion circuit (to ensure effective clamping); the current carrying capacity of 4.5kA is greater than the maximum peak differential mode surge current of 3kA (IEC 61000-4-5 standard) to ensure that the device does not experience thermal breakdown.

[0042] The common-mode discharge devices GDT1 and GDT2 are gas discharge tubes, connected between the live wire (L), neutral wire (N), and the discharge bus circuit, respectively. They have a DC breakdown voltage of 800V and a current carrying capacity of 5kA. The selection criteria are: the breakdown voltage of 800V is higher than the AC peak voltage of 311V (to prevent false triggering due to grid fluctuations), while being lower than the interlayer withstand voltage of the common-mode suppression device L1 (to ensure that the common-mode suppression device is not damaged before GDT breakdown); the 5kA current carrying capacity, in conjunction with the unified energy discharge circuit, undertakes the final discharge task, and GDT1 and GDT2 only need to withstand the residual surge current after PTC current limiting.

[0043] The dynamic operation of the power supply pre-amplifier current limiting isolation circuit is as follows: When a differential-mode surge occurs, MOV1 conducts and clamps the differential-mode voltage to below approximately 600V, protecting the downstream power conversion circuit. When a common-mode surge occurs, the PTC quickly presents a high-impedance state to limit the current amplitude, and the high impedance of the common-mode choke prevents the surge's steep leading edge from propagating backward. When the common-mode voltage exceeds 800V, GDT1 / GDT2 breaks down and conducts, guiding the surge through the discharge bus circuit to the unified energy discharge circuit for centralized discharge. Through the above-mentioned pre-amplifier impedance interception and common-mode current diversion, the common-mode surge is controlled within the power supply port pre-amplifier circuit and cannot couple to other ports through the internal common circuit of the terminal, thus achieving the blocking of surge crosstalk between ports.

[0044] like Figure 3 As shown, the RS485 front-end current limiting isolation circuit is located between the RS485 port and the internal RS485 transceiver circuit of the terminal. This circuit is used to limit the rate of rise of surge current on the differential line through series impedance, block the propagation of common-mode surge through common-mode choke, absorb the differential-mode surge between lines through differential-mode clamping device, and guide the common-mode surge to the discharge bus through the common-mode discharge branch.

[0045] The specific connection relationship of the RS485 pre-amplifier current limiting isolation circuit is as follows: On line A, one winding of the common-mode choke L2 and the current-limiting resistor R1 are connected in series; on line B, the other winding of the common-mode choke L2 and the current-limiting resistor R2 are connected in series. A differential-mode TVS device TVS1 is connected in parallel between lines A and B. Line A is connected to the bleeder bus circuit via the common-mode bleeder branch TSS1; line B is connected to the bleeder bus circuit via the common-mode bleeder branch TSS2.

[0046] The current-limiting resistors R1 and R2 are both 10Ω. The selection criteria are as follows: they form an RC filter with the distributed capacitance of the RS485 bus, extending the surge rise time from the nanosecond level to the microsecond level, so that the common-mode discharge branches TSS1 and TSS2 have sufficient response time; at the same time, 10Ω is a very small percentage compared to the 120Ω bus termination resistor, and will not affect the normal communication signal level.

[0047] The common-mode impedance of the common-mode choke L2 is 100Ω (@100MHz). The selection criteria are as follows: after being connected in series with the current-limiting resistors R1 and R2 (10Ω), impedance matching is formed on the surge frequency component, so that most of the common-mode surge energy is reflected or consumed before reaching TSS1 and TSS2; it presents low impedance to differential signals and does not affect normal communication.

[0048] The differential-mode TVS device, TVS1, is a bidirectional TVS transistor, model SMBJ15CA, with a reverse turn-off voltage of 15V, a clamping voltage of 21.2V (10 / 1000μs), and a peak pulse power of 600W. It is connected in parallel between lines A and B. The selection criteria are: the turn-off voltage of 15V is higher than the normal operating differential voltage range of RS485 (-7V to +12V) to ensure that it does not conduct during normal communication; the clamping voltage of 21.2V is lower than the absolute maximum rated voltage of the RS485 transceiver chip (±25V) to ensure that the chip is not damaged under differential-mode surge impact.

[0049] The common-mode discharge branches TSS1 and TSS2 are semiconductor discharge tubes with a DC breakdown voltage of 90V and a current carrying capacity of 100A (8 / 20μs). The selection criteria are as follows: the breakdown voltage of 90V is higher than the maximum common-mode voltage of the RS485 bus (±15V) to prevent false triggering during normal communication; at the same time, it is lower than the common-mode withstand voltage of the RS485 transceiver chip (±25V to ±60V) to ensure that TSS conducts preferentially during common-mode overvoltage, directing the surge to the discharge bus circuit rather than being applied to the transceiver chip.

[0050] The dynamic operation of the RS485 pre-amplifier current-limiting isolation circuit is as follows: TVS1 conducts when the voltage exceeds 15V, clamping the differential-mode voltage below 21.2V to protect the downstream transceiver chip. When a common-mode surge occurs, the high impedance of L2 blocks the surge's steep leading edge from propagating backward. R1 and R2 limit the surge current rise rate. When the common-mode voltage exceeds 90V, TSS1 and TSS2 conduct, directing the surge into the discharge bus circuit. The synergistic effect of R1, R2, and L2 ensures that the surge current borne by TSS1 and TSS2 is limited to within the 100A current capacity range.

[0051] like Figure 4 As shown, the Ethernet front-end current limiting and isolation circuit is located between the Ethernet port and the internal Ethernet PHY circuit of the terminal. This circuit is used to achieve electrical isolation between the port side and the internal circuit side through the network transformer, guide the common-mode surge to the discharge bus through the common-mode discharge device at the center tap, introduce the shielding layer induced surge into the lightning protection ground through the shielding shell capacitor branch, and suppress the residual spikes after transformer coupling through the secondary clamping branch.

[0052] The specific connection relationship of the Ethernet front-end current limiting isolation circuit is as follows: the differential pairs (TD+, TD-, RD+, RD-) of the RJ45 interface are connected to the primary side of the network transformer T1, and the secondary side of T1 is connected to the internal Ethernet PHY circuit of the terminal. The center tap of T1 is connected to the discharge bus circuit via the common-mode discharge device GDT3. The shield of the RJ45 interface is connected to the lightning protection ground copper foil area via the capacitor branch C1. A local residual voltage clamping branch TVS2 is connected in parallel between the secondary side of T1 and the PHY circuit.

[0053] The network transformer T1 contains an isolation transformer, whose primary and secondary sides transmit signals through magnetic coupling while being electrically isolated from each other (the isolation voltage is typically 1500VAC). This isolation itself constitutes a barrier against common-mode surges: common-mode surges cannot be directly coupled from the primary side to the secondary side through the magnetic core between the transformer windings, but can only transmit a small amount of high-frequency energy through the parasitic capacitance between the windings.

[0054] The common-mode bleeder GDT3 is a gas discharge tube with a DC breakdown voltage of 800V. It is connected between the center tap of T1 and the bleeder bus circuit. The selection criteria are: the breakdown voltage of 800V is higher than the normal operating bias voltage of the center tap (3.3V), while being much lower than the primary-secondary isolation withstand voltage of T1 (approximately 2121V peak at 1500VAC), ensuring that the transformer insulation layer does not break down before GDT3 is turned on.

[0055] The capacitor branch C1 uses a 1000pF / 2kV high-voltage ceramic capacitor, connected between the shield of the RJ45 interface and the copper foil area of ​​the lightning protection ground. The selection criteria are: high impedance at low frequencies or DC to isolate the DC path between the shield and the lightning protection ground, preventing ground loop interference; low impedance under high-frequency surges (100kHz~10MHz) (capacitive reactance of about 159Ω at 1MHz), introducing the induced surge of the shield into the lightning protection ground for discharge; and a 2kV withstand voltage greater than the typical surge voltage of the communication port (1kV~2kV) to ensure that the capacitor does not break down.

[0056] The local residual voltage clamping branch uses a low-capacitance TVS array (TVS2), with a clamping voltage not exceeding 5V (typically 3.3V) and a total capacitance not exceeding 5pF. It is connected between the differential pair on the secondary side of T1 and the functional ground copper foil area. The selection criteria are: the total capacitance of 5pF matches the frequency (50MHz) of the 100Mbps Ethernet signal, the time constant RC is much smaller than the signal bit width, and it does not distort the high-speed signal; the clamping voltage of 3.3V is higher than the normal operating voltage of the PHY chip (3.3V) but lower than its absolute maximum rated voltage (3.6V~4.0V), ensuring effective clamping without affecting communication.

[0057] The dynamic operation of the Ethernet front-end current limiting isolation circuit is as follows: When a common-mode surge enters from the Ethernet cable, the surge first reaches the differential pair of the RJ45 interface. Due to the magnetic coupling isolation between the primary and secondary windings of T1, the surge is concentrated in the primary winding and center tap, and cannot be directly transmitted to the secondary side. When the center tap voltage exceeds 800V, GDT3 conducts, guiding the surge into the discharge bus circuit. Simultaneously, the surge current induced on the metal shield of the RJ45 interface flows into the lightning protection grounding copper foil area through C1. A small amount of high-frequency residual energy is coupled to the secondary side through the parasitic capacitance between the T1 windings, clamped to below 5V by TVS2, protecting the PHY chip.

[0058] like Figure 5 As shown, the bleed bus circuit is located on the PCB near the external port connector. Its function is to serve as a common low-impedance node, which gathers the common-mode surge currents guided by the current limiting isolation circuits of each port into one place and sends them to the unified energy bleed circuit.

[0059] The physical implementation of the bleeder bus circuit is as follows: In this embodiment, a 5mm wide copper foil is used on the PCB surface, with a thickness of 2oz (approximately 70μm), corresponding to a DC resistance of approximately 0.3mΩ / cm. The bleeder terminals of each port common-mode bleeder (GDT1, GDT2, TSS1, TSS2, GDT3) are soldered to the same common connection node of the bleeder bus circuit using the shortest possible trace, with each connection length not exceeding 10mm. The connection length between the bleeder bus circuit and the unified energy bleeder circuit is also not greater than 10mm. The selection of the copper foil width and thickness is based on the requirement that the copper foil temperature rise must not exceed 30℃ under the maximum peak current of a lightning surge (20kA, 8 / 20μs waveform). According to the conductor temperature rise calculation formula ΔT=I... ² ×R×t / (c×m), where I is 20kA, R is approximately 0.2mΩ, and t is the surge duration of approximately 20μs. The calculated temperature rise is approximately 15℃, which is below the engineering allowable value of 30℃. The selection of a connection length not exceeding 10mm is based on the following: parasitic inductance L≈0.5nH / mm×10mm=5nH, and inductive reactance XL=2πfL≈0.031Ω at the surge leading-edge frequency component (approximately 1MHz), which is negligible compared to the total impedance of the discharge path, ensuring that excessively high induced voltage spikes will not occur due to parasitic inductance during high current discharge.

[0060] The unified energy discharge circuit is connected between the discharge bus circuit and the lightning protection grounding copper foil area. Its function is to receive all the surge energy gathered by the discharge bus circuit, and to complete the main energy discharge and residual voltage clamping. The unified energy discharge circuit includes a primary high-current-capacity discharge branch and a secondary fast clamping branch, which are connected in parallel between the discharge bus circuit and the lightning protection grounding copper foil area.

[0061] The high-current-carrying capacity bleeder branch consists of a gas discharge tube (GDT4) and a varistor (RV2) connected in series. The GDT4 side is connected to the bleeder bus circuit, and the RV2 side is connected to the lightning protection grounding copper foil area. The GDT4 has a current-carrying capacity of 20kA (8 / 20μs) and a DC breakdown voltage of 600V; the RV2 has a nominal varistor voltage of 470V and a maximum peak pulse current of 6.5kA (8 / 20μs). The series combination of GDT4 and RV2 utilizes the complementary characteristics of the two devices: GDT4 has a high current-carrying capacity but a slow response (breakdown delay of approximately 100ns to 1μs), while RV2 has a fast response (nanosecond level) but a relatively limited current-carrying capacity. In the initial stage of a surge, RV2 responds first, followed by GDT4 breaking down and conducting to bear the majority of the surge current. RV2 only bears the low residual voltage (approximately 20V to 50V) after GDT4 conducts, avoiding overheating and aging when RV2 is subjected to high current alone. The selection of the 20kA current-carrying capacity of GDT4 is based on the following criteria: it covers the IEC 61000-4-5 standard level 4 surge test requirements (6kV test voltage corresponds to 3kA short-circuit current), and also considers the current superposition effect when multiple ports are simultaneously subjected to surges, leaving at least 3 times the redundancy. The selection of the 470V varistor voltage of RV2 is based on the following criteria: it is lower than the breakdown voltage of 800V of the power supply's front-end GDT1 and GDT2, ensuring that surge energy is preferentially guided to a unified discharge channel rather than being discharged disorderly in the front-end of the ports.

[0062] The secondary fast clamping branch uses a high-power TVS device, TVS3, connected between the discharge bus circuit and the surge protection copper foil area. Its peak pulse power is 1500W (10 / 1000μs), reverse turn-off voltage is 400V, and clamping voltage is 560V. TVS3 has an extremely fast response speed (sub-nanosecond level), used to synchronously and rapidly clamp voltage spikes on the discharge bus circuit within the time window before the primary branch is fully turned on. The turn-off voltage of 400V is selected based on the following criteria: it is higher than the highest DC voltage that may occur during normal operation of the discharge bus circuit (approximately 250V), ensuring that it does not conduct under non-surge conditions; the clamping voltage of 560V is lower than the maximum withstand voltage of the sensitive devices in the terminal's internal functional circuit (600V), and higher than the sustaining voltage after GDT4 is turned on (approximately 15V to 30V), ensuring that TVS3 automatically exits the conducting state after GDT4 is turned on.

[0063] The dynamic operation of the unified energy discharge circuit is as follows: After the surge current flows into the unified energy discharge circuit from the discharge bus circuit, at the surge leading edge (0 to 100 ns), TVS3 is preferentially turned on, limiting the voltage spike of the discharge bus circuit to below 560V. Subsequently (100 ns to 1 μs), RV2 is turned on, and GDT4 begins to ionize. After GDT4 is fully turned on (approximately 1 μs to 2 μs), its on-resistance is extremely low (approximately 1 Ω), and the vast majority of the surge current (approximately 90% or more) is discharged to the lightning protection ground copper foil area through the series branch of GDT4 and RV2, and TVS3 automatically returns to a high-resistance state. Through the coordinated operation of the two branches, the voltage of the discharge bus circuit is always controlled below 560V throughout the entire surge process.

[0064] like Figure 6 As shown, the zoned grounding circuit includes a lightning protection copper foil zone and a functional ground copper foil zone. It is used to confine the path of surge discharge current within the lightning protection copper foil zone and its adjacent circuits, preventing large surge currents from spreading across the functional ground plane, thereby reducing the interference of ground potential fluctuations on power metering, data acquisition, and communication circuits.

[0065] In this embodiment, the PCB is divided into an interface protection area A, a unified discharge area B, a functional digital area C, and a sensitive analog area D along the signal flow direction. The interface protection area A is located on the side of the PCB closest to the external connector and is used to arrange the front-end current limiting isolation devices for each port; the unified discharge area B is adjacent to the interface protection area A and is used to arrange the discharge bus circuit, the unified energy discharge circuit, and the lightning protection grounding copper foil area; the functional digital area C and the sensitive analog area D are located on the inner side of the PCB and are used to arrange the main control MCU, the communication chip, and the analog sampling circuit, respectively.

[0066] The surge protection copper foil area is an independent copper foil region on the PCB, located within the unified discharge area B. Its area is approximately 20mm × 25mm, and the copper foil thickness is 2oz. This area is connected in parallel with the surge protection copper foil on the inner and bottom layers of the PCB through multiple rows of grounding vias (0.3mm diameter, 1.0mm spacing), forming a multi-path low-impedance discharge channel. This allows surge current to be discharged simultaneously from the top, inner, and bottom layers, reducing the current density and temperature rise on a single plane. The surge protection copper foil area is connected to the ground via grounding mounting holes on the PCB and an external grounding cable.

[0067] The functional ground copper foil area is a ground conductor area on the PCB that provides a reference potential for the internal functional circuits of the terminal. It includes the digital ground copper foil area in the functional digital area C and the analog ground copper foil area in the sensitive analog area D.

[0068] The physical relationship between the lightning protection ground copper foil area and the functional ground copper foil area is as follows: a slot (i.e., a physical cutout area on the PCB) with a width of 2.5mm is provided between them to physically separate them, with no direct copper foil connection. The selection of the slot width of 2.5mm is based on the creepage distance requirements for functional insulation in IEC 60950-1 or GB 4943.1 standards. Under pollution level 2 and material group IIIa conditions, the minimum creepage distance corresponding to a 250V operating voltage is 2.5mm. This width ensures that surface breakdown or arcing will not occur between the lightning protection ground and the functional ground under normal operation and surge impact.

[0069] The lightning protection ground copper foil area and the functional ground copper foil area are electrically connected only through a single point bridging device. In this embodiment, the point bridging device is a zero-ohm resistor, with an equivalent DC resistance of approximately 50mΩ and a high-frequency impedance of approximately tens of ohms (at 100MHz). The zero-ohm resistor is selected based on the following: Under normal operation, the zero-ohm resistor provides a low-impedance DC path, making the DC potential difference between the lightning protection ground copper foil area and the functional ground copper foil area close to zero, ensuring the stability of the reference potential of the internal circuit of the terminal; when a surge occurs, the high-frequency impedance (tens of ohms) of the zero-ohm resistor is several orders of magnitude higher than the low-impedance discharge path (milliohms) of the lightning protection ground copper foil area. Therefore, the surge current will preferentially be discharged to the ground along the low-impedance path of the lightning protection ground copper foil area, with only a very small amount of residual current flowing into the functional ground copper foil area through the zero-ohm resistor, thereby suppressing the ground potential rise on the functional ground plane within an acceptable range (the measured ground bounce in this embodiment is less than 1V). The single-point bridging device is placed near the power inlet of the AC power port. The location is chosen because it is the closest point in terms of geographical location between the lightning protection ground copper foil area and the functional ground copper foil area, which can avoid the introduction of additional parasitic inductance by long-distance traces.

[0070] The functional ground copper foil area is further divided into a digital ground copper foil area and an analog ground copper foil area. The digital ground copper foil area is located in the functional digital area C and is connected to the grounding terminal of digital circuits such as the main control MCU and communication chips. The analog ground copper foil area is located in the sensitive analog area D and is connected to the grounding terminal of analog circuits such as voltage sampling and current sampling. The digital ground copper foil area and the analog ground copper foil area are connected by a bridging device. In this embodiment, the bridging device is a ferrite bead (100Ω@100MHz), whose function is to isolate the high-frequency switching noise generated by the digital circuit and prevent digital noise from coupling to the analog sampling circuit through the common ground impedance. The impedance of the ferrite bead, 100Ω@100MHz, is selected based on the following: this impedance value presents a high impedance state at the main switching noise frequency of the digital circuit (the operating frequency of the main control MCU in this embodiment is 50MHz to 100MHz), blocking the digital noise current from flowing into the analog ground; while it presents a low impedance state at DC and low frequencies (the frequency range of the sampling signal is 50Hz to 1kHz), ensuring that the DC potential of the digital ground and the analog ground are consistent.

[0071] The dynamic operation of this grounding circuit is as follows: After the surge current is discharged through the unified energy discharge circuit, it flows into the ground through the lightning protection copper foil area and the external grounding cable. Because the lightning protection copper foil area and the functional ground copper foil area are physically isolated by a 2.5mm wide slot, the surge current cannot directly propagate to the functional ground plane through the continuous copper foil path. The only possible electrical path is a single-point bridging device, but its high-frequency impedance is much higher than the discharge impedance of the lightning protection ground plane. Therefore, the vast majority of the surge current is discharged along the lightning protection ground plane and will not enter the functional ground plane. Through the combined effect of the above physical isolation and single-point bridging, the ground potential fluctuation on the functional ground plane is controlled to an extremely low level, thereby protecting the power metering and communication circuits from ground bounce noise interference.

[0072] As another implementation, the single-point bridging device can be a parallel combination of a high-voltage safety capacitor and a discharge gap device. The high-voltage safety capacitor has a capacitance of 1nF to 10nF and a withstand voltage of not less than 2kV, while the discharge gap device has a DC breakdown voltage set to 300V to 600V. The working mechanism of this combination is as follows: When the external grounding is normal, the potential of the lightning protection copper foil area is clamped to near the earth potential by the external grounding wire. The DC voltage across the high-voltage safety capacitor is close to zero, and the discharge gap device is not conducting. At this time, the function of this combination is similar to that of a zero-ohm resistor, i.e., maintaining the DC equipotential between the lightning protection ground and the functional ground. However, the high-voltage safety capacitor provides a lower impedance path for high-frequency signals, which is beneficial for improving the electromagnetic compatibility performance of the terminal. When the external grounding fails (e.g., the grounding wire is corroded and broken or the grounding terminal is loose) and a surge occurs, the surge current is discharged to the lightning protection copper foil area through a unified energy discharge circuit and cannot flow into the earth through the external grounding wire. This causes a sharp rise in the potential of the lightning protection ground copper foil area relative to the functional ground copper foil area. When the potential difference between the two exceeds the DC breakdown voltage (300V to 600V) of the discharge gap device, the discharge gap device breaks down and conducts, momentarily short-circuiting the lightning protection ground copper foil area and the functional ground copper foil area. This creates an equipotential floating ground between the two ground planes, preventing the high potential difference from damaging the isolation devices (such as optocouplers, network transformers, and isolation power modules) that cross the two grounds. After the surge energy is dissipated, the potential of the lightning protection ground copper foil area gradually drops. When the potential difference is lower than the sustaining voltage of the discharge gap device, the discharge gap device automatically returns to the off state. Through this mechanism, a single-point bridging device using a high-voltage safety capacitor and a discharge gap device in parallel can adapt to both normal grounding and grounding failure scenarios, improving the survivability of the terminal under harsh field conditions.

[0073] like Figure 7 As shown, the centralized degradation monitoring circuit sets up sampling and judgment circuits for the monitored protective devices (including varistors and TVS devices), and outputs abnormal signals when device parameters drift, leakage current increases or fails, so as to realize online monitoring of the health status of the protective devices.

[0074] For the monitoring branch of the varistor: For the varistor RV2 in the unified energy discharge circuit, a high-impedance voltage divider sampling branch is connected in parallel across its two ends. This branch consists of resistors R3 and R4 connected in series, both with a resistance of 1MΩ. The connection point of R3 and R4 serves as the midpoint of the voltage divider, which is connected to the non-inverting input of comparator U1. The inverting input of U1 is connected to the reference voltage Vref (provided by the TL431 reference source, set to 1.25V). The output of U1 is connected to the alarm output branch via optocoupler OC1. The selection of 1MΩ resistors for R3 and R4 is based on the following: When the voltage across RV4 is 470V, the shunt current in the sampling branch is only 470V / 2MΩ = 235μA, which is negligible compared to the surge current borne by RV4 and will not affect the surge protection performance of RV4. Simultaneously, this total resistance (2MΩ) is much greater than the equivalent leakage resistance of RV4 (equivalent resistance is 23.5MΩ when the leakage current is 20μA), ensuring that the sampling branch will not significantly affect the leakage current measurement. The selection of the reference voltage Vref = 1.25V for U1 is based on the following: When the leakage current of RV4 increases, the voltage drop across R3 changes, causing a shift in the midpoint voltage of the voltage divider. When this shift exceeds 1.25V, U1 flips to output a high-level abnormal signal.

[0075] For the monitoring branch of the TVS device: In the unified energy discharge circuit, a sampling resistor R5 with a resistance of 100mΩ is connected in series in the return current branch of TVS3. One end of R5 is connected to the lightning protection ground copper foil area of ​​TVS3, and the other end is connected to the lightning protection ground copper foil area. The discharge current of TVS3 returns to the lightning protection ground through R5. The two ends of R5 are respectively connected to the two input terminals of window comparator U2. U2 is set with an upper threshold VH and a lower threshold VL. The output terminal of U2 is connected to the alarm output branch. The selection of 100mΩ for R5 is based on the following: Under normal TVS3 leakage current (5μA), the voltage drop is only 0.5μV, which does not affect monitoring; when TVS3 experiences soft breakdown due to degradation, the return current can reach the mA to tens of mA level, and the voltage drop across R5 can reach the mV to V level, sufficient for detection by U2; when TVS3 withstands surge currents (up to hundreds of amperes), the voltage drop across R5 is tens of volts, which will not affect the normal discharge performance of TVS3. The threshold settings for U2 are as follows: VH must be higher than the voltage drop across R5 (100μV) plus the input offset voltage of U2 (1mV) when TVS3 has the maximum allowable leakage current (1mA), so VH = 2mV; VL must be lower than the voltage drop across R5 (0.5μV) when TVS3 has the normal leakage current (5μA), so VL = 50μV. When the voltage across R5 is higher than VH or lower than VL, U2 determines that TVS3 is in an abnormal state and outputs an abnormal signal.

[0076] The output terminals of U1 and U2 are connected to the alarm output branch via optocoupler isolators OC1 and OC2, respectively. Their function is to isolate the electrical connection between the monitoring circuit (located on the lightning protection copper foil area side) and the main control circuit (located on the functional ground copper foil area side), preventing surge or high voltage signals from entering the low-voltage digital area where the main control MCU is located via the monitoring signal line.

[0077] like Figure 8 As shown, the alarm output branch includes a logic summarization circuit, an open-drain transistor, and an optocoupler isolator. Its function is to logically summarize the abnormal signals output by each comparator or window comparator, form a unified alarm signal, and transmit it to the main control MCU.

[0078] The abnormal signals (active high) output by each comparator U1 or window comparator U2 are connected to the input of the logic summarization circuit via signal lines. The output of the logic summarization circuit is connected to the gate of the open-drain transistor. The drain (or collector) of the open-drain transistor is connected to the unified alarm line ALM, which is connected to the DC power supply VCC (3.3V in this embodiment) via pull-up resistor R6. The unified alarm line ALM is then connected to the interrupt input INT of the main control MCU via an optocoupler isolator.

[0079] In this embodiment, the logic summarization circuit uses an OR logic gate (which can be implemented using a diode OR gate composed of multiple diodes or a 74HC32 OR gate chip). Its function is: when any input terminal receives a valid abnormal signal, the output terminal outputs a valid level. An NMOS transistor (such as a 2N7002) is used as the open-drain transistor. Its gate is connected to the output terminal of the logic summarization circuit, its source is grounded, and its drain is connected to the unified alarm line ALM. When the logic summarization circuit outputs a high level, the open-drain transistor is turned on, and the unified alarm line ALM is pulled low. When all monitoring branches are normal, the logic summarization circuit outputs a low level, the open-drain transistor is turned off, and the unified alarm line ALM is held high at VCC by R6. The reason for using an OR logic gate (instead of an AND logic gate) in the logic summarization circuit is that in security monitoring applications, the deterioration of any protective device constitutes a security hazard. Therefore, OR logic should be used to implement a single alarm, rather than AND logic requiring all devices to deteriorate before an alarm is triggered.

[0080] The optocoupler isolator uses a common optocoupler (such as PC817). Its input side is connected to the unified alarm line ALM, and its output side is connected to the interrupt input terminal INT of the main control MCU. The function of the optocoupler is to further realize the electrical isolation between the lightning protection ground side alarm circuit and the functional ground side main control MCU, ensuring that high voltage signals that may appear on the unified alarm line ALM will not be transmitted to the main control MCU, thus protecting the I / O ports of the main control MCU. The unified alarm line ALM is connected to the interrupt input terminal INT of the main control MCU after passing through the optocoupler isolator, so that once the protection device deteriorates, the main control MCU can be immediately interrupted and triggered without polling, improving the real-time performance of the alarm response.

[0081] Example 2 This embodiment uses the example of lightning-induced surges simultaneously entering from the AC power port and the RS485 port to illustrate the multi-module collaborative operation process of the entire lightning protection circuit.

[0082] Phase 1: Initial stage of surge (t=0~10ns) The surge voltage arrives simultaneously at both the AC power port and the RS485 port. At the AC power port, the common-mode surge on the live wire L and the neutral wire N first passes through fuses F1 and F2 (which are not yet blown and are in a low-resistance state) and PTC thermistors RT1 and RT2 (initially, due to thermal inertia, they have not yet heated up and are still in a low-resistance state of approximately 10Ω), reaching the common-mode choke L1. L1 presents a high impedance to the steep leading edge of the common-mode surge, preventing the steep wavefront from passing directly through.

[0083] On the RS485 port side, the surge reaches the current-limiting resistors R1 and R2 and the common-mode choke L2. R1 and R2 (10Ω) together with the distributed capacitance of lines A and B form an RC filter, reducing the rise rate of the surge front from approximately 1kV / μs to approximately 0.1kV / μs. L2 presents a 100Ω impedance to the common-mode surge, preventing the surge from propagating backward along the differential line pair.

[0084] Simultaneously, the varistor RV1 on the AC power port side responds. When the differential mode voltage between the live wire L and the neutral wire N exceeds 470V, RV1 conducts, discharging the differential mode surge current through its internal components. The bidirectional TVS diode TVS1 on the RS485 port side responds. When the differential mode voltage between line A and line B exceeds 15V, TVS1 conducts, clamping the differential mode surge below 21.2V.

[0085] Phase 2: Common-mode discharge phase (t=10ns~1μs) As the common-mode voltage continues to rise, the gas discharge tubes GDT1 and GDT2 on the AC power port side reach their 800V breakdown voltage, ionize and conduct, guiding the common-mode surge current from the live wire (L) and neutral wire (N) through GDT1 and GDT2 to the discharge bus circuit. Since RT1 and RT2 have already exhibited a high resistance state (approximately several hundred ohms) due to Joule heating in the previous stage, the surge current through GDT1 and GDT2 is limited to approximately 10A to 50A, far below their 5kA current carrying capacity, ensuring the safe operation of the GDTs.

[0086] The semiconductor discharge tubes TSS1 and TSS2 on the RS485 port side reach a breakdown voltage of 90V and conduct, guiding the common-mode surge current from lines A and B through TSS1 and TSS2 to the BUS. Due to the series impedance of R1, R2 (10Ω) and L2 (100Ω), the surge current through TSS1 and TSS2 is limited to approximately 1A to 5A, far below their 100A current carrying capacity.

[0087] Common-mode surge currents from both ports converge at the same common node in the bleeder bus circuit, achieving physical convergence of surge energy across multiple ports. Since the discharge terminals of all common-mode bleeder devices are soldered to the same bleeder bus node, after the surge currents converge on the bleeder bus, there is no branch path from one port to another through the internal common loop of the terminal, and surge crosstalk between ports is physically blocked.

[0088] Phase 3: Centralized release and clamping phase (t=1μs~20μs) The converged surge current is transmitted to the unified energy discharge circuit via the discharge bus circuit. At the initial moment (1μs) when the surge arrives at the unified energy discharge circuit, TVS3 is preferentially turned on with its sub-nanosecond response speed to clamp the voltage spike on the discharge bus below 560V.

[0089] Subsequently (1μs to 2μs), RV4 in the first-stage high-current-capacity discharge branch conducts (varistor voltage 470V), and GDT4 begins to ionize. After GDT4 is fully turned on (approximately 2μs), its on-resistance drops to approximately 1Ω, and most of the surge current on the BUS (approximately 90%) is discharged to the surge protection ground copper foil area PGND through the series branch of GDT4 and RV4. After enduring a brief period of large current of approximately 2μs, TVS3 automatically returns to a high-resistance state due to the low-resistance conduction of the GDT4-MOV4 branch.

[0090] Surge current is released to the ground through the ground mounting holes on the PCB and external grounding cables via a multi-path low-impedance channel formed by the wide copper foil (5mm wide, 2oz thick) and dense via array in the surge protection copper foil area. Because the surge protection copper foil area and the functional ground copper foil area are physically isolated by a 2.5mm wide slot and electrically connected only by a single-point bridging device (zero-ohm resistor), the high-frequency impedance of the zero-ohm resistor (approximately tens of ohms) is much higher than the discharge impedance of the surge protection ground plane (milliohms). The surge discharge current is limited to a closed return flow in the surge protection copper foil area and its adjacent loops. Only a very small amount of residual current (less than 0.1% of the total surge current) flows into the functional ground copper foil area through the zero-ohm resistor, and the ground potential bounce on the functional ground plane is controlled below 1V.

[0091] Phase 4: Recovery phase after surge (after t=20μs) After the surge energy was dissipated, all protective devices automatically recovered: the internal gas or semiconductor materials of GDT1, GDT2, GDT4, TSS1, and TSS2 returned to a high-resistance insulation state; RV1, RV4, and TVS3 returned to a high-resistance cutoff state; RT1 and RT2 returned to a low-resistance state (10Ω) after natural cooling, without affecting normal power supply. The terminal's internal functional circuits did not experience overvoltage or overcurrent surges exceeding their withstand capabilities throughout the surge, and the terminal resumed normal power supply and communication.

[0092] Phase 5: Deterioration Monitoring Phase (Ongoing, running in parallel with the above four phases) During normal operation of the terminal, the centralized degradation monitoring circuit continues to run. For RV2, the high-resistance voltage divider sampling branch (R3 and R4, each 1MΩ) continuously collects the voltage signal across RV4. The midpoint voltage of the voltage divider is input to comparator U1 and compared with the reference voltage Vref (1.25V). When RV4 deteriorates due to accumulated surge impacts and the leakage current increases, the equivalent resistance of RV4 decreases, and the midpoint voltage of the voltage divider shifts. When the shift causes the midpoint voltage of the voltage divider to exceed 1.25V, U1 flips and outputs a high-level abnormal signal.

[0093] For TVS3, sampling resistor R5 (100mΩ) continuously acquires the current signal of the TVS3 return branch, and the voltage across R5 is connected to window comparator U2. When TVS3 experiences increased leakage current or soft breakdown due to degradation, the voltage across R5 exceeds the upper limit threshold VH (2mV) or lower limit threshold VL (50μV) set by U2, and U2 outputs an abnormal signal.

[0094] The abnormal signals output by U1 or U2 are aggregated by the logic summarization circuit, which then controls the open-drain transistor to turn on, pulling the unified alarm line ALM low. The low-level signal of ALM is transmitted to the interrupt input terminal INT of the main control MCU through the optocoupler isolator, triggering the interrupt service routine of the main control MCU. The main control MCU then outputs alarm information to the host computer or local display interface through the communication interface, prompting maintenance personnel to arrange maintenance or replacement in a timely manner, so as to avoid damage to the terminal in subsequent lightning strikes due to the failure of protection not being detected in time.

[0095] The above detailed embodiments describe the implementation details of the technical solution of the present invention at each module level and the multi-module collaborative working mechanism. Those skilled in the art should understand that the device models, parameter values, and port types used in the above embodiments are merely illustrative and do not constitute a limitation on the scope of the present invention. Any modifications, equivalent substitutions, and improvements made within the scope of the technical concept and claims of the present invention should fall within the protection scope of the present invention.

Claims

1. A surge protection circuit for an intelligent fusion terminal, characterized in that, include: At least two external ports, and port pre-amplifier current limiting isolation circuits that are connected one-to-one with each of the external ports; The bleed bus circuit is a common low-impedance conductive node on the printed circuit board. Each of the port's pre-stage current limiting isolation circuits includes a common-mode bleed branch, and the grounding terminals of all the common-mode bleed branches are electrically connected to the bleed bus circuit. A unified energy discharge circuit, whose input terminal is electrically connected to the discharge bus circuit and whose output terminal is connected to the lightning protection ground copper foil area, is used to centrally discharge and limit the residual voltage of surge energy gathered from multiple ports. The partitioned grounding circuit includes a lightning protection copper foil area and a functional ground copper foil area that are physically insulated from each other. The grounding terminal of the unified energy discharge circuit is electrically connected to the lightning protection copper foil area. The lightning protection copper foil area and the functional ground copper foil area are only electrically connected through a single-point bridging device. A centralized degradation monitoring circuit, whose sampling terminals are respectively connected to the voltage sampling terminal or current sampling terminal of at least one monitored protection device in the unified energy discharge circuit and / or the common mode discharge branch, and whose output terminal is configured to output a monitoring alarm signal.

2. The intelligent fusion terminal lightning protection circuit according to claim 1, characterized in that, The at least two external ports include any two or more combinations of power ports, RS485 communication ports, RS232 communication ports, Ethernet ports, or general purpose input / output ports.

3. The intelligent fusion terminal lightning protection circuit according to claim 2, characterized in that, The power supply front-end current limiting isolation circuit corresponding to the power port includes a fuse, a current limiting impedance device and a common mode suppression device connected in series, and a differential mode clamping device is connected in parallel between the power supply lines. Each power supply line is connected to the discharge bus circuit through a common mode discharge branch. The common-mode discharge branch includes one or more of a gas discharge tube, a semiconductor discharge tube, and a metal oxide varistor, and the discharge terminal of the common-mode discharge branch is soldered to the common connection node of the discharge bus circuit.

4. The intelligent fusion terminal lightning protection circuit according to claim 2, characterized in that, The RS485 communication port corresponding RS485 front-end current limiting isolation circuit includes a common-mode choke and a current limiting resistor connected in series on lines A and B, respectively. A differential-mode TVS device is connected in parallel between lines A and B. Lines A and B are respectively connected to the discharge bus circuit through common-mode discharge branches. The current-limiting resistor has a resistance of 4.7Ω to 33Ω, the differential-mode TVS device is a bidirectional transient suppression diode, and the common-mode choke has a common-mode impedance of 50Ω to 500Ω.

5. The intelligent fusion terminal lightning protection circuit according to claim 2, characterized in that, The Ethernet front-end current limiting isolation circuit corresponding to the Ethernet port includes an RJ45 interface, a network transformer and a PHY chip. The center tap of the network transformer is connected to the discharge bus circuit through a common-mode discharge branch, and the shield of the RJ45 interface is electrically connected to the lightning protection ground copper foil area in the partitioned grounding circuit. The Ethernet port front-end current limiting isolation circuit also includes a low-capacitance TVS device disposed between the secondary side of the network transformer and the PHY chip.

6. The intelligent fusion terminal lightning protection circuit according to claim 1, characterized in that, The discharge bus circuit includes a low-impedance common discharge conductor disposed on the PCB interface side. The low-impedance common discharge conductor is composed of wide copper foil, thickened copper foil, double-layer parallel copper foil or metal copper busbar, and is connected in parallel with the discharge copper foil of the adjacent board layer through a via array. The centralized degradation monitoring circuit includes a high-resistance voltage divider sampling branch for the varistor and a comparator. The high-resistance voltage divider sampling branch is connected in parallel across the varistor, and the output of the comparator is connected to the main control MCU via an optocoupler isolation circuit.

7. The intelligent fusion terminal lightning protection circuit according to claim 1, characterized in that, The unified energy discharge circuit includes a first-stage high-current-capacity discharge branch and a second-stage fast clamping branch, wherein: The primary high-current-capacity discharge branch includes one or more of the following: gas discharge tube, varistor, and discharge gap device; The secondary fast clamping branch includes a high-power TVS device; Furthermore, the primary high-current-capacity discharge branch and the secondary fast clamping branch are both connected in parallel between the discharge bus circuit and the partition grounding circuit; The unified energy discharge circuit is located near the external port connector, and the connection length between the unified energy discharge circuit and the discharge bus circuit is no more than 10mm.

8. The intelligent fusion terminal lightning protection circuit according to claim 1 or 4, characterized in that, The partitioned grounding circuit includes a lightning protection copper foil area and a functional ground copper foil area. An isolation seam, slot or clearance strip is provided between the lightning protection copper foil area and the functional ground copper foil area, and they are electrically connected by a single-point bridging device. The single-point bridging device is one or more of a zero-ohm resistor, a ferrite bead, a resistor, an inductor, or a spark gap, or a parallel combination of a high-voltage safety capacitor and a discharge gap device. The functional ground copper foil area is divided into digital ground and analog ground, and the digital ground and analog ground are connected by a bridging device.

9. The intelligent fusion terminal lightning protection circuit according to claim 1, characterized in that, The centralized degradation monitoring circuit includes a sampling resistor and a window comparator for the TVS device. The sampling resistor is connected in series in the return current branch of the TVS device, and the output of the window comparator is connected to the alarm output branch.

10. The intelligent fusion terminal lightning protection circuit according to claim 9, characterized in that, The alarm output branch includes a logic summarization circuit, an open-drain transistor, and an optocoupler isolator. Any abnormal signal from the monitored and protected device can be output as a unified alarm signal through the logic summarization circuit. The logic summarization circuit is an OR logic gate, a wire-OR connection, or a wire-AND connection structure.

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