Dual-loop based multi-source parallel current sharing control method and system

Abstract

The application provides a kind of based on double loop's multi-power parallel current sharing control method and system, method includes: obtaining multiple operating state information sets of multiple power supply;Determine the upper limit of output current, current step value and output voltage value of power supply;According to output voltage value, determine the first duty cycle of voltage loop;According to current step value, raise the upper limit of output current;According to the upper limit of output current after lifting, first operating state information set, preset current offset and rated output current upper limit, determine output current value;According to output current value, determine the second duty cycle of current loop;Based on the smaller value in first duty cycle and second duty cycle, generate drive signal and send to power switch component of power supply.The application can realize the current sharing control under steady state condition of multiple power supply parallel and current suppression under transient current impact condition, which is beneficial to improve the current sharing regulation precision, operation stability and safety of multiple machine parallel.

Description

Technical Field

[0001] This application relates to the technical field of circuit devices or systems for power supply or distribution, or to the technical field of general control or regulation systems, and in particular to a method and system for parallel current sharing control of multiple power sources based on a dual-loop circuit. Background Technology

[0002] In multi-power supply parallel systems, conditions such as power switching, short-term fault restarts, and asynchronous shutdowns can easily trigger instantaneous current overshoots. The current from the power supply that is taken off the line will instantly transfer to the online power supply, causing the online power supply current to surge to near its maximum current limit within a short period. Some power supplies have a short-term overload capacity of 1.3 times their rated current, which will further increase the peak instantaneous current, exacerbate the electrical stress on the power switching transistors, and accelerate device aging. In scenarios such as assembly line production where power supplies need to be frequently started and stopped, repeated current surges will significantly shorten the power supply's lifespan and may even cause it to fail in a short period of time, seriously affecting power supply reliability.

[0003] Current multi-power supply parallel current sharing control schemes generally adopt a conventional dual-loop control scheme with voltage loop current sharing and current loop fixed threshold current limiting. The current limiting control parameters are mostly fixed configurations, which cannot adapt to the dynamic changes in the number of parallel power supplies. Furthermore, conventional schemes usually lack a gradual current constraint mechanism, and there is no smooth transition path during the current transfer process. They can only passively wait for the current to reach the limit before executing the current limiting action. At the same time, conventional schemes use a single fixed current limiting threshold to cover both steady-state operation and instantaneous current surge conditions, which cannot meet the control requirements of both types of conditions: when the current limiting threshold is too low, the current fluctuation of steady-state current sharing is prone to falsely triggering the current limiting action, interfering with the current sharing accuracy of multiple machines; when the current limiting threshold is too high, the instantaneous surge current is not effectively constrained, and it is difficult to reduce the impact stress caused by the instantaneous current transfer, which cannot meet the stable and continuous operation requirements of multiple parallel power supplies under frequent start-stop conditions.

[0004] Therefore, there is an urgent need for a multi-power supply parallel current sharing control scheme that can be adapted to all operating conditions, and can perform current sharing micro-adjustment under the steady state of multiple power supplies, as well as effectively suppress the instantaneous current surge caused by asynchronous switching and start-up of multiple power supplies, reduce the repeated electrical stress on the power switching transistors, and improve the reliability and service life of multi-power supply parallel operation. Summary of the Invention

[0005] This application provides a method and system for parallel current sharing control of multiple power sources based on a dual-loop circuit. Through a dual-loop duty cycle competitive control mechanism, it acquires the operating status information set of multiple power sources, completes dynamic calculation of reference parameters, step-by-step increase of current limits, and multi-level current limiting judgment. Under normal conditions, the voltage loop dominates to achieve steady-state current sharing regulation of multiple power sources. In the event of current surge, the current loop intervenes to perform current limiting clamping protection, thereby effectively suppressing instantaneous current surges under conditions such as power supply switching and asynchronous start-stop, improving the accuracy of parallel current sharing of multiple power sources, reducing repeated electrical stress on power switching transistors, and ensuring the operational reliability and service life of the power supply system.

[0006] In a first aspect, embodiments of this application provide a dual-loop multi-power supply parallel current sharing control method, applied to a controller of a multi-power supply parallel system, wherein the multi-power supply includes a first power supply, and the method includes: Obtain multiple sets of operating status information for the multiple power supplies; The first output current upper limit, the first current step value, and the target output voltage value of the first power supply are determined based on the multiple operating state information sets of the multiple power supplies. The first duty cycle of the voltage loop of the first power supply is determined based on the target output voltage value; The first output current upper limit is increased according to the first current step value to obtain the second output current upper limit; multi-level judgment is performed based on the second output current upper limit, the first operating state information set corresponding to the first power supply, the preset current offset and the rated output current upper limit to determine the target output current value; the second duty cycle of the current loop of the first power supply is determined based on the target output current value. The smaller of the first duty cycle and the second duty cycle is determined as the target duty cycle; A first drive signal is generated based on the target duty cycle and sent to the power switching component of the first power supply.

[0007] Secondly, embodiments of this application provide a multi-power supply parallel system, including a data acquisition module, a data processing module, a first duty cycle calculation module, a second duty cycle calculation module, and an output control module, wherein: The data acquisition module is used to acquire multiple sets of operating status information of the multiple power supplies; The data processing module is used to determine the first output current upper limit, the first current step value, and the target output voltage value of the first power supply based on the multiple operating state information sets of the multiple power supplies. The first duty cycle calculation module is used to determine the first duty cycle of the voltage loop of the first power supply based on the target output voltage value. The second duty cycle calculation module is used to increase the first output current limit by the first current step value to obtain the second output current limit; perform multi-level judgment based on the second output current limit, the first operating state information set corresponding to the first power supply, the preset current offset and the rated output current limit to determine the target output current value; and determine the second duty cycle of the current loop of the first power supply based on the target output current value. The output control module is used to determine the smaller value between the first duty cycle and the second duty cycle as the target duty cycle; generate a first drive signal based on the target duty cycle and send it to the power switching component of the first power supply.

[0008] Thirdly, embodiments of this application provide an electronic device, including a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for performing steps in any method of the first aspect of this application.

[0009] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program for electronic data interchange, wherein the computer program causes a computer to perform some or all of the steps described in any method of the first aspect of this application.

[0010] Fifthly, embodiments of this application provide a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps described in any method of the first aspect of this application. The computer program product may be a software installation package.

[0011] As can be seen, in this application, the controller determines the first upper limit of the output current, the first current step value, and the target output voltage value of the first power supply based on multiple operating state information sets of multiple power supplies; determines the first duty cycle of the voltage loop of the first power supply based on the target output voltage value; raises the first upper limit of the output current according to the first current step value to obtain the second upper limit of the output current; performs multi-level judgment based on the second upper limit of the output current, the first operating state information set corresponding to the first power supply, the preset current offset, and the rated upper limit of the output current to determine the target output current value; determines the second duty cycle of the current loop of the first power supply based on the target output current value; determines the smaller value between the first duty cycle and the second duty cycle as the target duty cycle; and generates a first drive signal based on the target duty cycle and sends it to the power switching component of the first power supply. Thus, compared to the conventional dual-loop control scheme that commonly adopts voltage loop current sharing and current loop fixed threshold current limiting in current-multiple power supply parallel current sharing control schemes, this application can adaptively configure the current step parameter based on the number of power supplies in operation, dynamically update the current limiting parameter according to real-time operating conditions, and gently suppress the current rise by gradually increasing the current limit value; through the competition of minimizing the duty cycle of the dual loops, the voltage loop normally achieves steady-state current sharing, and the current loop switches to current limiting clamp when the current approaches the limit value to prevent steady-state false current limiting, reduce the current surge caused by asynchronous power supply switching and start-up / stop, reduce repeated electrical stress on the power switching transistors, and improve the current sharing accuracy and operational reliability of the parallel power supply system. Attached Figure Description

[0012] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a schematic diagram of the current waveform of a multi-power source instantaneous current surge provided in an embodiment of this application; Figure 2 This is a system architecture diagram of a multi-power supply parallel system provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application; Figure 4 This is a flowchart illustrating the steps of a multi-power supply parallel current sharing control method based on a dual-loop circuit, as provided in an embodiment of this application. Figure 5 This is a flowchart illustrating the steps for determining a target output voltage value according to an embodiment of this application; Figure 6 This is a flowchart illustrating the steps for determining a target output current value according to an embodiment of this application; Figure 7This is a schematic diagram of a dual-loop competing power supply control provided in an embodiment of this application; Figure 8 This is a schematic diagram of a current waveform for preventing instantaneous current overshoot using multiple power supplies, provided in an embodiment of this application. Figure 9 This is a schematic diagram of the total current waveform of a multi-power supply parallel system provided in an embodiment of this application; Figure 10 This is an overall flowchart of a dual-loop multi-power supply parallel current sharing control method provided in an embodiment of this application; Figure 11 This is a block diagram of the functional modules of a multi-power supply parallel system provided in an embodiment of this application. Detailed Implementation

[0014] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0015] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0016] It should be understood that the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document indicates that the preceding and following related objects are in an "or" relationship. In the embodiments of this application, "multiple" refers to two or more.

[0017] In the embodiments of this application, "at least one item" or its similar expression refers to any combination of these items, including any combination of a single item or a plurality of items. "One or more" means one or more, while "multiple" means two or more. For example, "at least one item" of a, b, or c can represent the following seven cases: a, b, c; a and b; a and c; b and c; a, b, and c. Each of a, b, and c can be an element or a set containing one or more elements.

[0018] In this application embodiment, "connection" refers to various connection methods such as direct connection or indirect connection to realize communication between devices. This application embodiment does not limit this in any way.

[0019] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0020] Please see Figure 1 , Figure 1 This is a schematic diagram of the current waveform of a multi-source transient current surge provided in an embodiment of this application, as shown below. Figure 1 As shown, in a multi-power supply parallel scenario, before time T1, the first and second power supplies are in a steady-state current-sharing operation state. The output current values ​​I_1 and I_2 of the first power supply are both 0.8 times the rated output current limit Imax, sharing the load power. At time T1, the first power supply shuts down and exits operation. At this time, the output current value I_1 of the first power supply drops sharply to 0, and the load power is instantly transferred to the second power supply. The output current value I_2 of the second power supply undergoes a step jump, instantly surging to 1.3 times the rated output current limit Imax, entering a short-term overload state. At time T2, the second power supply shuts down, and the output current value I_2 of the second power supply drops back to zero.

[0021] It is evident that the changes in the first and second power supply current waveforms reflect a significant instantaneous current overshoot problem in multi-power supply parallel systems under sequential power-off conditions. The current jumps directly to the overload peak without transition, applying substantial instantaneous electrical stress to the power switching components inside the power supply, thus exacerbating device losses. In applications such as assembly line production where power supplies need to be frequently started and stopped, repeated current surges will significantly shorten the lifespan of power switching devices and may even cause the power supply to fail in a short period.

[0022] To address the instantaneous current surge caused by asynchronous switching and start-up / shutdown of multiple power sources, this application proposes a dual-loop multi-power source parallel current sharing control method and system.

[0023] Please see Figure 2 , Figure 2 This is a system architecture diagram of a multi-power supply parallel system provided in an embodiment of this application, such as... Figure 2 As shown, the multi-power parallel system 100 includes a first power supply 110, a second power supply 120, a controller 130, and a load 140; the controller 130 establishes a communication connection with the first power supply 110 and the second power supply 120, and the output terminals of the first power supply 110 and the second power supply 120 are connected in parallel with the same polarity and then connected to the load 140.

[0024] The first power supply 110 integrates a first power switch assembly 111 and a first broadcast assembly 112. The first power switch assembly 111 can be composed of semiconductor power switching devices such as MOSFETs and IGBTs and supporting drive circuits. It is the power conversion execution unit of the first power supply 110 and is used to control the on / off duty cycle of the power switch according to the drive signal, thereby adjusting the output voltage and output current of the first power supply 110. The first broadcast assembly 112 is the sampling and communication interface unit of the first power supply 110. It is used to collect the operating status information of the first power supply 110, such as output voltage, output current, and operating status, in real time, and upload the operating status information to the controller 130 through the communication connection.

[0025] The second power supply 120 integrates a second power switch assembly 121 and a second broadcast assembly 122. The second power switch assembly 121 can be composed of semiconductor power switching devices such as MOSFETs and IGBTs and supporting drive circuits. It is the power conversion execution unit of the second power supply 120, used to control the on / off duty cycle of the power switch according to the drive signal, thereby adjusting the output voltage and output current of the second power supply 120. The second broadcast assembly 122 is the sampling and communication interface unit of the second power supply 120, used to collect the operating status information of the second power supply 120 such as output voltage, output current, and operating status in real time, and upload the operating status information to the controller 130 through the communication connection.

[0026] It should be noted that the multi-power supply parallel system 100 includes, but is not limited to, the first power supply 110 and the second power supply 120, and may also include more power supplies operating in parallel. In some embodiments, the parallel power supplies may be industrial-grade power modules such as DC switching power supplies, AC / DC converters, and programmable DC power supplies, which have adjustable output voltage and current capabilities.

[0027] The controller 130 is the control core of the multi-power supply parallel system 100. Internally, it includes a first dual-loop operation unit 131 corresponding to the first power supply 110 and a second dual-loop operation unit 132 corresponding to the second power supply 120. The controller 130 receives operating status information of each power supply reported by the first broadcast component 112 and the second broadcast component 122. Based on the operating status information of the multiple power supplies, it dynamically calculates the upper limit of the output current, the current step value, and the target output voltage value for each power supply. Through the first dual-loop operation unit 131 and the second dual-loop operation unit 132, which respectively use voltage loop and current loop control algorithms for the corresponding power supply, the voltage loop duty cycle and current loop duty cycle are obtained. The smaller of the two duty cycles is selected as the target duty cycle, and a corresponding drive signal is generated and sent to the power switching component of the corresponding power supply via a communication connection.

[0028] Among them, load 140 is the power supply object of the multi-power parallel system 100. It can be various DC power equipment such as industrial assembly line processing equipment, servo drive system, automated production testing device, etc., and is provided with stable working power by the first power supply 110 and the second power supply 120 connected in parallel.

[0029] As can be seen, in this embodiment, through the coordinated operation of the controller 130, the first power supply 110, the second power supply 120 and the load 140, the controller 130 independently configures a dual-loop operation unit for each power supply, realizing full-process control of operation status acquisition, dynamic configuration of reference parameters, step-up current limit, and optimal output of dual-loop duty cycle. This solves the technical problems of traditional multi-power supply parallel current sharing control schemes, which use fixed current limiting thresholds, lack current smoothing constraint mechanisms, and are prone to accidental current limiting during steady-state operation. It achieves a balance between the steady-state current sharing accuracy and transient impact suppression effect of multi-power supply, improving the operational reliability of multi-power supply parallel operation and the service life of power devices.

[0030] Furthermore, in some embodiments, the multi-power supply parallel system 100 can also adopt a distributed control architecture as an alternative implementation, eliminating the need for a separate controller 130. In addition to power switching components and broadcasting components, the first power supply 110 and the second power supply 120 each integrate a dual-loop operation unit. The power supplies establish a communication connection via a CAN bus, sharing operating status information and current sharing reference information. Each power supply's internal dual-loop operation unit independently completes its own current sharing adjustment and current limiting control, generating local drive signals to control its own power switching components, thus achieving distributed collaborative control of the multi-power supply parallel operation.

[0031] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, such as... Figure 3As shown, the electronic device includes a processor 310, a memory 320, a communication interface 330, and one or more programs 321. The processor 310 is communicatively connected to the memory 320 and the communication interface 330 via an internal communication bus. The one or more programs 321 are stored in the memory 320 and configured to be executed by the processor 310. The one or more programs 321 include instructions for performing any step in an embodiment of an industrial voice interaction method described below. It is understood that the electronic device can be equipped with and control the execution of... Figure 2 The architecture of a multi-power supply parallel system is described above.

[0032] After understanding the software and hardware architecture of this application, the following will be combined with... Figure 4 This application describes a dual-loop multi-power supply parallel current sharing control method based on an embodiment of the present application. Figure 4 This is a flowchart illustrating the steps of a dual-loop multi-power supply parallel current sharing control method provided in an embodiment of this application, applied to... Figure 2 The controller 130 in the middle, the method includes the following steps S101 to S108: Step S101: Obtain multiple sets of operating status information for the multiple power supplies.

[0033] The individual operating status information set includes, but is not limited to, electrical operating parameters such as real-time output current and real-time output voltage of a single power supply, as well as equipment status parameters such as power-on / off status, fault status, and operating mode, and rated reference parameters such as rated output current limit, rated output voltage, and short-time overload threshold, which are used to characterize the real-time operating status and reference configuration of a single power supply.

[0034] Specifically, the method of acquiring the operating status information set is adapted to different control architectures. In the preferred centralized control architecture of this application, the controller can use a combination of power supply periodic active reporting, controller polling acquisition, and switching event triggered reporting to acquire the operating status information set collected and reported by each power supply. In the distributed control architecture, each power supply broadcasts its own operating status information set to the communication bus at a preset period through its own broadcast component, and the other power supplies can receive and acquire it from the bus to achieve global operating status sharing and synchronization.

[0035] Step S102: Determine the first output current upper limit, the first current step value, and the target output voltage value of the first power supply based on the multiple operating state information sets of the multiple power supplies.

[0036] The first output current upper limit is the maximum current threshold allowed to be output by the first power supply under the current operating conditions. It serves as the upper limit setpoint for the current loop control, constraining the output current amplitude of the power supply and avoiding the risks of overload operation and current overshoot.

[0037] Among them, the first current step value is the single increment of the first power supply during the dynamic adjustment of the current limit. It is the core parameter for realizing the step-like increase of the current limit. It is used to control the rising slope of the upper limit of the current, avoid the instantaneous current impact caused by the step change of the current limit, and ensure the smooth transition of the output current.

[0038] In one possible embodiment, determining the first output current upper limit, the first current step value, and the target output voltage value of the first power supply based on multiple operating state information sets of the multiple power supplies includes: determining the number of power supplies in operation and the actual output current value of at least one power supply in operation, including the first power supply, based on the multiple operating state information sets; calculating the average value of the actual output current values ​​of the at least one power supply in operation to obtain an average output current value; obtaining the first output current upper limit based on the sum of the average output current value and the preset current offset; obtaining the first current step value based on the ratio of the preset total system current step value to the number of power supplies in operation; and determining the target output voltage value based on the average output current value, the first operating state information set, and the preset reference output voltage value.

[0039] The system total current step value is the total step size of a single adjustment to the overall current limit of the multi-power supply parallel system, and is a preset fixed reference parameter. The system total current step value must be shared by all parallel power supplies that are currently powered on; the current step size of a single power supply is negatively correlated with the number of powered-on power supplies. Therefore, the first current step value for the corresponding first power supply can be obtained by calculating the ratio of the system total current step value to the number of powered-on power supplies. The system total current step value is used to maintain a smooth increase in the total system output current, avoiding current fluctuations caused by excessively large current step sizes of a single power supply, and also preventing output circulating current caused by inconsistent step sizes among power supplies.

[0040] The upper limit of the first output current is determined by summing the average output current value and the preset current offset. Under normal current sharing conditions, the output current of each parallel power supply fluctuates slightly around the average output current. The upper limit of the first output current is determined by adding the preset current offset to the average output current, which allows the current limiting threshold to adapt to the actual load level and current sharing fluctuation range of the current system.

[0041] For example, let the average output current value be Iave, the preset current offset be Igap, the total system current step value be Istep_all, and the number of power supplies be X. Then, the first output current limit of the first power supply is Iref1 = Iave + Igap, and the first current step value is Istep1 = Istep_all / X.

[0042] Furthermore, the target output voltage value is obtained by fine-tuning the current sharing based on the preset reference output voltage value and the deviation between the system average output current and the actual output current of the first power supply, and serves as a given reference value for subsequent voltage loop calculations.

[0043] As can be seen, in this embodiment, the control reference parameters of the first power supply are dynamically configured based on the number of power supplies in the multi-power supply parallel system and the average output current value, so that the current limiting threshold is adaptively adjusted. At the same time, the current step of each power supply is synchronously balanced, which avoids the defect of poor adaptability of the fixed current limiting threshold of the loop, and also avoids current fluctuation and output circulating current. It provides a reference input for the subsequent dual-loop operation with an adapted working condition, ensuring the current sharing accuracy and the current surge suppression effect.

[0044] Step S103: Determine the first duty cycle of the voltage loop of the first power supply based on the target output voltage value.

[0045] Among them, the voltage loop is the core voltage regulation loop of the power conversion control. It takes the target output voltage value as a given reference, collects the actual output voltage of the first power supply as the feedback input, and outputs the corresponding control quantity after error amplification and closed-loop regulation.

[0046] The first duty cycle is the control quantity output by the voltage loop, which represents the ratio of the conduction time of the power switching device to the switching cycle. It directly controls the conduction state of the power switching transistor of the first power supply, thereby determining the output voltage amplitude. By adjusting the duty cycle, the actual output voltage can be driven to track the target output voltage value, thereby achieving stable control and current sharing fine adjustment of the output voltage.

[0047] In one possible embodiment, determining the first duty cycle of the voltage loop of the first power supply based on the target output voltage value includes: determining the actual output voltage value of the first power supply based on the first operating state information set; determining a first voltage difference between the target output voltage value and the actual output voltage value of the first power supply; and performing calculations on the first voltage difference based on the voltage loop compensator to obtain the first duty cycle of the voltage loop of the first power supply.

[0048] For example, suppose the actual output voltage sampling value of the first power supply is Vsamp1, the voltage loop compensator is Gv(Z), and the target output voltage value of the first power supply is Vref1. Then the first voltage difference Verr1 = Vref1 - Vsamp1. After the voltage loop compensator Gv(Z) calculates the voltage difference, the first duty cycle Dv1 of the voltage loop is obtained.

[0049] Here, Gv(Z) is a discrete-domain voltage loop compensator, adapted to the periodic sampling operation mode under a digital control architecture, and is typically implemented using a discrete proportional-integral (PI) controller. The proportional element can respond to changes in voltage difference in real time, quickly outputting the duty cycle adjustment to suppress voltage fluctuations; the integral element can accumulate historical voltage differences, gradually eliminating steady-state deviations in the output voltage, ensuring that the actual output voltage accurately tracks the target output voltage value; through the closed-loop operation of this compensator, the voltage difference can be converted into the corresponding power switch duty cycle control quantity, balancing the dynamic response speed and steady-state control accuracy of the voltage loop.

[0050] As can be seen, in this embodiment, under steady-state operation, the actual output current value of each power supply fluctuates slightly around the average output current value. The voltage loop performs closed-loop calculation on the deviation between the target output voltage and the actual sampled voltage through the discrete compensator and adjusts the duty cycle, which can stably maintain the output voltage accuracy. At the same time, it accurately meets the voltage fine-tuning requirements of current sharing regulation, and provides an accurate voltage loop output reference for subsequent dual-loop duty cycle optimal control.

[0051] Step S104: Increase the first output current upper limit according to the first current step value to obtain the second output current upper limit.

[0052] The step-up adjustment refers to using the current first output current limit as a base, and adding a first current step value to obtain the second output current limit, thus achieving a step-by-step increase in the current limit. This method replaces abrupt changes in the current limit with small, incremental steps, which can constrain the rate of increase of the output current, avoid current overshoot, and ensure a smooth and controllable current rise.

[0053] In one possible embodiment, the controller continuously acquires multiple sets of operating status information of the multiple power supplies according to a first preset period, and redetermines the first output current upper limit, the first current step value, and the target output voltage value of the first power supply based on the latest acquired multiple sets of operating status information, and iteratively updates the target duty cycle; wherein, within a single first preset period, the first output current upper limit is used as a benchmark, and the second output current upper limit is continuously updated by accumulating and increasing the first current step value according to a second preset period.

[0054] The first preset period is the global update period for the first power supply reference parameters. The controller summarizes the operating status information of all parallel power supplies according to this period, recalculates the average output current, and synchronously refreshes the first output current upper limit, the first current step value, and the target output voltage value to adapt to operating conditions such as changes in the number of power supplies and significant load changes. For example, this period can be set to 3 seconds, corresponding to each power supply broadcasting its actual output current, actual output voltage, and power-on / off status via the CAN bus every 300ms. Within a single period, 10 sets of operating status information can be received, which can effectively avoid the reference calculation deviation caused by CAN communication packet loss.

[0055] The second preset period is the step execution period for the current limit, and its duration is shorter than the first preset period. Within a single first preset period, the reference parameters (number of power supplies, average output current, first output current upper limit, first current step value, and target output voltage value) remain fixed. The controller uses the currently determined first output current upper limit as the initial reference, and successively adds the first current step value according to the second preset period to continuously update the second output current upper limit; until the next first preset period is reached, the reference parameters are updated and the above-mentioned successive step operation is repeated.

[0056] As can be seen, in this embodiment, a dual-cycle hierarchical control mechanism is adopted. In the long cycle, the global control reference parameters (number of power supplies, average output current, first output current upper limit, first current step value, and target output voltage value) are iteratively updated to ensure that the current limiting reference parameters are dynamically adapted to the operating conditions of multiple power supplies. In each long cycle, the first output current upper limit is continuously increased step by step according to the first current step value in the short cycle. This avoids output current overshoot and circulating current between parallel power supplies caused by sudden limit changes, and provides a continuous and smooth limit reference for subsequent dual-loop current limiting control, thus achieving a balance between operating condition adaptation and control smoothness.

[0057] Step S105: Perform multi-level judgment based on the second upper limit of output current, the first operating status information set corresponding to the first power supply, the preset current offset, and the upper limit of rated output current to determine the target output current value.

[0058] The target output current value is determined by taking the second output current upper limit as the dynamic limiting benchmark, combining the actual output current of the first power supply, the preset current offset, and the rated output current upper limit, and after multi-level limiting verification. It is the current reference value for subsequent current loop calculations.

[0059] Step S106: Determine the second duty cycle of the current loop of the first power supply based on the target output current value.

[0060] Among them, the current loop is the core current-stabilizing loop of the power conversion control. It takes the target output current value as a given reference, collects the actual output current of the first power supply as the feedback input, and outputs the corresponding control quantity after error amplification and closed-loop regulation.

[0061] The second duty cycle is the control quantity output by the current loop, which represents the ratio of the conduction time of the power switch to the switching cycle. It directly controls the conduction state of the first power switch and thus determines the output current amplitude. By adjusting the duty cycle, the actual output current can be driven to track the target output current value, thereby achieving precise regulation and current limiting protection of the output current.

[0062] In one possible embodiment, determining the second duty cycle of the current loop of the first power supply based on the target output current value includes: determining a first current difference between the target output current value and the actual output current value of the first power supply; and performing calculations on the first current difference based on the current loop compensator to obtain the second duty cycle of the current loop of the first power supply.

[0063] For example, suppose the actual output current sampling value of the first power supply is Isamp1, the current loop compensator is Gi(Z), and the target output current value of the first power supply is Iref_goal1. Then the first current difference Ierr1 = Iref_goal1 - Isamp1. After the current loop compensator Gi(Z) calculates the current difference, the second duty cycle Di1 of the current loop is obtained.

[0064] Gi(Z) is a discrete-domain current loop compensator, adapted to the periodic sampling operation mode under a digital control architecture, and is typically implemented using a discrete proportional-integral (PI) controller. The proportional element can respond to changes in the current difference in real time, quickly outputting the duty cycle adjustment to suppress transient current fluctuations; the integral element can accumulate historical current differences, gradually eliminating steady-state deviations in the output current, ensuring that the actual output current accurately tracks the target output current value; through the closed-loop operation of this compensator, the current difference can be converted into the corresponding power switch duty cycle control quantity, balancing the dynamic response speed and steady-state control accuracy of the current loop.

[0065] As can be seen, in this embodiment, under the condition that the instantaneous current impact disrupts the steady state, the current loop performs closed-loop calculation on the deviation between the target output current and the actual sampled current and adjusts the duty cycle through the discrete compensator. This can quickly suppress the transient current impact fluctuation, accurately maintain the tracking accuracy of the output current, and at the same time achieve reliable overcurrent limiting protection, providing an accurate current loop output reference for subsequent dual-loop duty cycle optimal control.

[0066] Step S107: Determine the smaller value between the first duty cycle and the second duty cycle as the target duty cycle.

[0067] Under steady-state normal operating conditions, the target output current value is determined through multi-level judgment. The set value is the system average output current value plus a preset current offset, slightly higher than the actual output current value of a single power supply (in current-sharing mode, the output current values ​​of each power supply fluctuate slightly around the average output current value), preserving a current-sharing adjustment margin. At this time, the input error of the current loop is positive and its amplitude is stable. The second duty cycle of its PI compensator output is in a high-limited state and does not participate in real-time adjustment. To maintain output voltage stability and achieve fine-tuning of current sharing, the first duty cycle of its PI compensator output is in a dynamic adjustment level, with a relatively lower value. After taking the minimum of the two values, the first duty cycle of the voltage loop dominates the power conversion control, ensuring voltage regulation accuracy and current-sharing adjustment performance, while the current loop is in a current-limiting backup state.

[0068] In situations where partial power supply shutdown causes a transient current surge, the actual output current of a single power supply rises rapidly. However, the target output current, constrained by the step-up mechanism, can only increase slowly in fixed steps. Therefore, the actual output current quickly approaches or even exceeds the target output current. At this point, the input deviation of the current loop rapidly narrows or even reverses, and its second duty cycle narrows to a smaller value, automatically switching to current loop-dominated control to clamp the output current within a safe range and suppress current overshoot.

[0069] As can be seen, in this embodiment, the seamless switching of the dual loops can be achieved by simply comparing the duty cycle values. The voltage loop current sharing regulation and the current loop overcurrent protection are integrated into the same control logic, which has both the voltage regulation and current sharing performance under normal operating conditions and the rapid current limiting protection capability under abnormal operating conditions. This can effectively avoid control oscillations and output sudden changes caused by mode switching.

[0070] Step S108: Generate a first drive signal based on the target duty cycle and send it to the power switching component of the first power supply.

[0071] The first driving signal is a pulse width modulation (PWM) driving signal for power switching components, such as power switching transistors. It is generated after level conversion, isolation amplification and dead time configuration of the driving circuit, with the target duty cycle as the modulation reference. It is used to control the on and off timing of each power switching device in the first power conversion circuit and convert the duty cycle control quantity after dual-loop coordination into the actual switching action of power conversion.

[0072] As can be seen, in this embodiment, the target duty cycle obtained by the dual-loop low-value optimization logic is uniformly converted into a drive signal for execution. Without the need to add an independent mode switching circuit, the integrated output of voltage regulation, current sharing regulation and current limiting protection can be realized. This ensures the stability and accuracy of the output voltage and the smoothness of the current sharing regulation under steady-state conditions, and also ensures the rapid response of the current limiting protection under current surge conditions, effectively improving the control reliability and operational stability of multiple power supplies in parallel.

[0073] Please see Figure 5 , Figure 5 This is a flowchart illustrating the steps for determining a target output voltage value according to an embodiment of this application. The step of determining the target output voltage value based on the average output current value, the first operating state information set, and a preset reference output voltage value includes the following steps: S201. Determine the actual output current value of the first power supply based on the first operating status information set.

[0074] S202. Determine the current sharing voltage adjustment amount corresponding to the voltage loop of the first power supply based on the current difference between the average output current value and the actual output current value of the first power supply.

[0075] In this embodiment, the current-sharing voltage regulation is calculated based on a preset mapping relationship between the current difference and the current-sharing voltage regulation. The preset mapping relationship can be a linear proportional relationship, piecewise linear characteristics, nonlinear gain curves, or regulation characteristics with dead zone, etc. It can be adapted and selected according to the current-sharing accuracy index, dynamic response requirements, and power topology characteristics of the multi-power supply parallel system. The deviation between the actual output current value of a single power supply and the average output current value of the system is converted into a fine-tuning amount of the voltage reference, thereby achieving a balanced distribution of the output current of each parallel power supply.

[0076] Furthermore, the generation of the current-sharing voltage regulation is not limited to the corresponding calculation of the preset mapping relationship. It can also perform proportional calculation, proportional-integral calculation, or directly use the average output current value and the actual output current value as index parameters to perform table lookup calculation, nonlinear function calculation, etc., to adapt to the current-sharing regulation requirements of parallel power supply systems with different power levels and different digital control architectures. This application does not impose any limitations on this.

[0077] S203. The current sharing voltage adjustment amount is superimposed on the preset reference output voltage value to obtain the target output voltage value, wherein the target output voltage value is the given output voltage of the voltage loop of the first power supply used for current sharing adjustment.

[0078] The preset reference output voltage value is the pre-set target value of the basic output voltage of a single power supply. Under the condition that current sharing regulation is not applied, the first power supply will output voltage according to this value.

[0079] For example, let the preset reference output voltage value be Vset, the current sharing voltage adjustment amount corresponding to the first power supply be Vadjust1, the system average output current value be Iave, the actual output current sampling value of the first power supply be Isamp1, and the current sharing adjustment coefficient be K. Then the current sharing voltage adjustment amount is calculated according to the calculation formula Vadjust1=K×(Iave-Isamp1), and the target output voltage value of the first power supply is Vref1=Vset+Vadjust1.

[0080] As can be seen, in this embodiment, the current sharing voltage adjustment is generated based on the deviation between the actual output current value and the average output current value of a single power supply, and is superimposed on the reference output voltage value to obtain the target setpoint of the voltage loop. The output current of each parallel power supply can be evenly distributed through a small offset of the voltage reference, without the need to add an independent hardware current sharing circuit. At the same time, the current sharing adjustment is carried out with the system's basic voltage regulation reference as the center, which can constrain the output voltage fluctuation within the allowable range. Current sharing control is achieved under the premise of ensuring the system's voltage regulation accuracy, and the adjustment method is flexible and configurable, which can adapt to parallel power supply systems with different topologies and power levels.

[0081] Please see Figure 6 , Figure 6 This is a flowchart illustrating the steps for determining a target output current value according to an embodiment of this application. The step of determining the target output current value by performing multi-level judgments based on the second output current upper limit, the first operating state information set corresponding to the first power supply, a preset current offset, and the rated output current upper limit includes the following steps: S301. Take the larger of the actual output current value and the average output current value of the first power supply and sum it with the preset current offset to obtain the third output current upper limit.

[0082] Specifically, if the actual output current sample value Isamp1 of the first power supply is greater than the average output current value Iave, then the upper limit of the third output current Iref3 = Isamp1 + Igap; if the actual output current sample value Isamp1 of the first power supply is less than or equal to the average output current value Iave, then the upper limit of the third output current Iref3 = Iave + Igap.

[0083] S302. Perform a numerical comparison operation between the second upper limit of the output current and the third upper limit of the output current to obtain the first-level judgment result.

[0084] S303. Determine the upper limit of the intended output current based on the judgment result of the first level.

[0085] The intended output current upper limit is an intermediate current limiting reference value obtained through the first level comparison, which is used to connect the level judgment of the operating condition adaptation limit and the system rated limit.

[0086] In one possible embodiment, determining the intended output current upper limit based on the first level judgment result includes: if the first level judgment result is detected that the second output current upper limit is less than or equal to the third output current upper limit, then the second output current upper limit is determined as the intended output current upper limit; if the first level judgment result is detected that the second output current upper limit is greater than the third output current upper limit, then the third output current upper limit is determined as the intended output current upper limit.

[0087] Specifically, based on the first-level judgment result, the smaller value between the second output current limit Iref2 and the third output current limit Iref3 is selected as the intended output current limit Iref_tend1. In this way, while adapting to the dynamic margin of real-time current sharing, the output current limit of the first power supply is constrained not to exceed the preset second-level current limiting threshold.

[0088] S304. Perform a numerical comparison operation between the intended upper limit of output current and the rated upper limit of output current to obtain the second-level judgment result.

[0089] The rated output current upper limit is a pre-set maximum current threshold that a single power supply is allowed to continuously and stably output. It is determined by the power device specifications, heat dissipation design, and overall rated power of the power supply. As the final constraint boundary for multi-level current limiting judgment, it is used to ensure that the power supply output current is always within the rated safe operating range and to avoid over-stress damage to power devices due to overcurrent.

[0090] S305. Determine the target output current value based on the second-level judgment result. The target output current value is the current setpoint value of the current loop of the first power supply used for current limiting clamping.

[0091] Among them, current limiting clamping refers to the current loop using the target output current value as a reference threshold, and continuously adjusting the closed loop to constrain the power supply output current to near the limit value, thus suppressing the current from continuing to increase. It belongs to a continuous closed-loop control mechanism, which is different from the switch-type overcurrent protection that executes shutdown after triggering. It can maintain the normal operation of the system while limiting the output current, and provide a smooth current safety boundary for parallel power supply systems.

[0092] In one possible embodiment, determining the target output current value based on the second-level judgment result includes: if the second-level judgment result indicates that the intended output current upper limit is less than or equal to the rated output current upper limit, then the intended output current upper limit is determined as the target output current value; if the second-level judgment result indicates that the intended output current upper limit is greater than the rated output current upper limit, then the rated output current upper limit is determined as the target output current value.

[0093] Specifically, based on the second-level judgment result, the smaller of the intended output current limit Iref_tend1 and the rated output current limit Imax is selected as the target output current value Iref_goal1. In this way, while inheriting the current limiting result of the previous operating condition, the upper limit of the output current of the first power supply is constrained not to exceed the rated output current extreme value of a single power supply, ensuring that the power supply operates within the safe current range.

[0094] As can be seen, in this embodiment, the multi-level progressive current limiting judgment mechanism does not intervene in steady-state current sharing regulation for instantaneous current surge conditions such as parallel switching, load changes, and asynchronous power-on / off. Under steady-state conditions, the current limiting threshold is higher than the actual output current value, and the voltage loop independently completes the current sharing regulation. When an instantaneous current surge occurs, a stronger current upper limit is selected at each level as the current loop current limiting clamp setpoint to quickly constrain the current peak value and rise rate, ensuring that the rated safety threshold is not exceeded. At the same time, a continuous closed-loop current limiting clamp is used to replace the switching overcurrent protection, maintaining continuous power supply to the system while suppressing current overshoot and ensuring device safety, thus balancing steady-state current sharing accuracy and reliability under surge conditions.

[0095] The above has provided a detailed explanation of the overall steps and logic for determining the target output voltage and target output current values ​​using the dual-loop multi-power supply parallel current sharing control method of this application. The following section will combine... Figures 7-9 The implementation principle of dual-loop competitive power supply control, the suppression effect of instantaneous current overshoot of multiple power supplies, and the total current operation characteristics of multi-power supply parallel system are further explained and verified.

[0096] Please see Figure 7 , Figure 7 This is a schematic diagram of a dual-loop competing power supply control provided in an embodiment of this application, as shown below. Figure 7 As shown, this application only designs a dual-loop competitive control architecture for voltage source parallel current sharing scenarios. Current source parallel operation naturally has continuous current limiting characteristics and does not have current overshoot problems under operating conditions such as asynchronous shutdown, so this design logic is not applicable.

[0097] Specifically, under steady-state current sharing conditions, the first power supply employs a dual-loop competitive power supply control. The voltage loop uses the target output voltage value Vref1 of the first power supply as the voltage setpoint. Vref1 is generated by superimposing the preset reference output voltage value Vset with the current sharing voltage adjustment amount Vadjust1 of the first power supply. After calculating the difference between the target output voltage value Vref1 and the actual output voltage value Vsamp1 of the first power supply, the result is input to the voltage regulator Gv(Z) to output the voltage loop control quantity. The current loop uses the upper limit of the rated output current Imax as the final constraint current limiting reference. Its current limiting setpoint is generated by the aforementioned multi-level judgment logic. After calculating the difference between the current limit setpoint and the actual output current sample value Isamp1 of the first power supply, the result is input to the current regulator Gi(Z) to output the current loop control quantity. Furthermore, under steady-state current sharing conditions, the voltage loop control quantity is less than the current loop control quantity. The smaller logic unit outputs the voltage loop control quantity to obtain the first duty cycle Dv1, which serves as the final control signal for the power switch of the first power supply. The voltage loop dominates the voltage regulation and current sharing adjustment.

[0098] Specifically, under the instantaneous current surge condition, the second power supply is controlled in a dual-loop competitive power supply manner. The voltage loop uses the target output voltage value Vref2 of the second power supply as the voltage setpoint. Vref2 is generated by superimposing the preset reference output voltage value Vset with the current sharing voltage adjustment amount Vadjust2 of the second power supply. After calculating the difference between the target output voltage value Vref2 and the actual output voltage value Vsamp2 of the second power supply, the result is input to the voltage regulator Gv(Z) and outputs the voltage loop control quantity. Similarly, the current loop uses the upper limit of the rated output current Imax as the final constraint current limiting reference. Its current limiting setpoint is generated by the aforementioned multi-level judgment logic, and after calculating the difference between it and the actual output current sampling value Isamp2 of the second power supply, the result is input to the current regulator Gi(Z) and outputs the current loop control quantity. Furthermore, under the condition of instantaneous current surge, the output current of the second power supply rises rapidly. The current loop control quantity is less than the voltage loop control quantity. The output current loop control quantity of the smaller logic unit is used to obtain the second duty cycle Di1, which serves as the final control signal for the power switch of the second power supply. The current loop dominates the current limiting clamping to suppress the instantaneous current overshoot.

[0099] As can be seen, in this embodiment, the automatic switching and division of labor between steady-state current sharing and transient current limiting is achieved through a competition architecture where the voltage loop and current loop compete for the smallest value. Under steady-state conditions, the voltage loop dominates control, ensuring current sharing accuracy and output voltage stability. During transient current surges, the current loop automatically takes over, combining multi-level progressive current limiting logic to gradually narrow the current upper limit, effectively suppressing the peak current surge and its rise rate. The two power control links operate independently and in parallel, requiring no additional communication coordination. This avoids overcurrent risks in scenarios such as parallel switching and asynchronous power on / off, while ensuring steady-state current sharing performance and system power supply continuity, improving the operational reliability and adaptability of multi-power parallel systems.

[0100] Please see Figure 8 , Figure 8 This is a schematic diagram of a current waveform for preventing instantaneous current overshoot using multiple power supplies, as provided in an embodiment of this application. Figure 8 As shown in the figure, the lower part of the figure shows the current waveform of the first power supply, and the upper part shows the current waveform of the second power supply. Taking the first power supply shutdown condition as an example, before time T1, the system is in a steady-state current sharing state with multiple power supplies in parallel. The output current I_1 of the first power supply and the output current I_2 of the second power supply are both 0.8 times the rated output current limit Imax. The average output current value of the currently powered-on power supply is Iave. At this time, the first output current limit (Iave+Igap) composed of the average output current value Iave plus the preset current offset Igap is the current limiting threshold used by each parallel power supply. Under steady state, the actual output current of the two power supplies is lower than this threshold. Therefore, the first power supply and the second power supply are controlled by the voltage loop, and the voltage regulation and current sharing are completed synchronously. The current loop is in standby state and does not intervene in normal operation.

[0101] Furthermore, at time T1, the first power supply shuts down, and its output current I_1 drops sharply to 0. All load current is transferred to the second power supply, and its output current I_2 begins to rise rapidly. When the second power supply's output current I_2 climbs to the upper limit of the first output current Iave + Igap, the second power supply's multi-level progressive current limiting judgment mechanism is activated. The current loop gradually takes over control, continuously adjusting and constraining the current rise rate and peak value through closed-loop regulation. Finally, the second power supply's output current I_2 smoothly transitions to a new steady-state current value I2_new, and the current peak value is clamped within the range of I2_new + Igap, without any uncontrolled instantaneous current overshoot.

[0102] As can be seen, in this embodiment, a dual-loop competitive control architecture combined with a multi-level progressive current limiting mechanism achieves automatic adaptation between steady-state current sharing and transient current limiting. In steady state, the current loop is in standby mode, with the voltage loop primarily responsible for voltage regulation and current sharing of each power supply. When a power supply shutdown causes a transient current surge, the current loop automatically takes over control step by step, smoothing the current rise process through continuous closed-loop regulation. Compared to traditional switching overcurrent protection schemes, this approach effectively suppresses transient current overshoot, prevents power devices from suffering overstress shocks, ensures the continuity of load power supply, achieves a smooth and shock-free transition of load current transfer, and improves the operational reliability and adaptability of multi-power supply parallel systems.

[0103] Combination Figure 8 Please see Figure 9 , Figure 9 This is a schematic diagram of the total current waveform of a multi-power supply parallel system provided in an embodiment of this application, as shown below. Figure 9As shown in the figure, from bottom to top, the waveforms are the current waveforms of the first power supply, the second power supply, the third power supply, and the total system current. The system initially operates in a steady-state current-sharing state with the three power supplies connected in parallel. The output currents I_1, I_2, and I_3 of the first, second, and third power supplies are all 0.8 times the rated output current upper limit I_max. The corresponding upper limit of the first output current for each power supply is I_ave + I_gap. The total system current is I_total. Figure 9 The waveforms shown are ideal nominal representations after steady-state current sharing convergence. Under steady-state operation, the output current of each online power supply converges to the same value. Therefore, the average output current value of the system is equal to the steady-state output current value of a single power supply. Under steady-state conditions, all three power supplies are controlled by the voltage loop, and the current limiting mechanism is not triggered.

[0104] At time T1, the first power supply shuts down, causing a transient current surge. The output current I_1 of the first power supply drops sharply to 0, while the output currents of the second and third power supplies rise synchronously. When the current climbs to the upper limit of the first output current Iave + Igap, the multi-level current limiting mechanism is activated, and the current loop intervenes in closed-loop regulation.

[0105] At time t1, which marks the start of the first preset cycle, the controller re-collects the operating status information set of multiple power supplies, counts the number of currently powered-on power supplies, recalculates and updates the average output current value (Iave), and synchronously updates the current limiting threshold parameters such as the first output current upper limit for each power supply. After the parameter update, the system enters a new steady-state operation phase with two power supplies connected in parallel. The output currents of the second and third power supplies converge to I2_new and I3_new, respectively. Under ideal steady-state current sharing, the values ​​of I2_new and I3_new are consistent and equal to the updated system average output current value Iave_new. Therefore, Iave_new + Igap is the same value as I2_new + Igap and I3_new + Igap, and they coincide on the same horizontal dashed line in the figure.

[0106] At time T2, the second power supply shuts down, causing a transient current surge. The output current I_2 of the second power supply drops sharply to 0, and the entire load current is carried solely by the remaining third power supply. The output current of the third power supply continues to rise, reaching the updated upper limit of the first output current Iave_new + Igap, after which it enters the current limiting adjustment phase, eventually smoothly transitioning to a full-load steady state.

[0107] The total system current is the sum of the output currents of all parallel power supplies. The waveform of the total system current exhibits a segmented characteristic of "step drop – steady rise – steady-state convergence" as each power supply is shut down: after each power supply shutdown, the total current first drops sharply with the current of the disconnected power supply, then rises steadily at an approximately constant rate, and finally converges to the steady-state level corresponding to the current parallel capacity. This application employs a current step-adaptive mechanism. The controller adjusts the current rise rate of a single power supply in reverse according to the real-time number of power supplies in operation, ensuring that the product of the current rise rate of a single power supply and the number of power supplies in operation remains essentially constant. Therefore, even though the number of power supplies in operation decreases successively, the current fluctuation impact presented by the system remains consistent, with no sudden current spikes throughout the process.

[0108] As can be seen, in this embodiment, based on the dual-loop competitive control architecture, under the condition of multiple power supplies being decommissioned one by one, the voltage loop dominates current sharing control in the steady-state phase to ensure the balanced output current of each online power supply; in the transient phase, the current loop intervenes step by step to limit the closed-loop current, combined with the current stepping dynamic adaptation mechanism according to the number of parallel units and the periodic average current parameter update, driving the remaining power supplies to synchronously increase their output. This ensures both the balanced current stress of each power supply and maintains a constant rate of increase of the total system current and consistent intensity of external current impact, effectively suppressing instantaneous current spikes and overshoots. While reducing the operating stress of a single power supply and improving safety, it also ensures a smooth transition of the total system current and the continuity of power supply, improving the adaptability and operational reliability of the multi-power supply parallel system.

[0109] Please see Figure 10 , Figure 10 This is an overall flowchart of a dual-loop multi-power supply parallel current sharing control method provided in an embodiment of this application, as shown below. Figure 10As shown, the specific steps include: after the process starts, the first preset cycle is entered to obtain multiple operating status information sets of multiple power supplies, and the average output current value is determined as Iave, the number of power supplies is X, the actual output voltage sampling value of the first power supply is Vsamp1, the actual output current sampling value is Isamp1, and the current sharing voltage adjustment amount is Vadjust1; the preset current offset is determined as Igap, the system total current step value is Istep_all, and the preset reference output voltage value is Vset; then, based on the above parameters, three calculations are completed: (1) According to the formula Iref1=Iave+Igap, the average output current value is determined as Igap, the system total current step value is Istep_all, and the preset reference output voltage value is Vset; then, based on the above parameters, three calculations are completed: (1) the average output current value is determined as Iave+Igap. (1) Determine the upper limit of the first output current of the first power supply Iref1; (2) Determine the first current step value Istep1 according to the formula Istep1=Istep_all / X; (3) First calculate the current sharing voltage adjustment amount Vadjust1 according to the formula Vadjust1=K×(Iave-Isamp1), and then obtain the target output voltage value Vref1 according to the formula Vref1=Vset+Vadjust1; then, obtain the first voltage difference Verr1 according to the formula Verr1=Vref1-Vsamp1, and determine the first duty cycle Dv1 of the voltage loop of the first power supply through the voltage loop compensator calculation.

[0110] In each second preset period within the first preset period, the first output current upper limit Iref1 is raised according to the first current step value Istep1 to obtain the second output current upper limit Iref2; then the target output current value Iref_goal1 is determined by three levels of threshold judgment: (1) The first level judges whether the actual output current sampling value Isamp1 is greater than the average output current value Iave: if yes, the third output current upper limit Iref3 = Isamp1 + Igap is determined; if no, the third output current upper limit Iref3 = Iave + Igap is determined, realizing the current limiting reference switching based on the actual current or the average current; (2) The second level judges the second output current upper limit Iref2. Is the upper limit of the output current Iref2 less than the upper limit of the third output current Iref3? If yes, then determine the upper limit of the intended output current Iref_tend1=Iref2; if no, then determine the upper limit of the intended output current Iref_tend1=Iref3, and take the smaller value of the two to achieve the clamping of the step upper limit and the current limiting reference; (3) The third level judges whether the upper limit of the intended output current Iref_tend1 is less than the upper limit of the rated output current Imax: if yes, then determine the target output current value Iref_goal1=Iref_tend1; if no, then determine the target output current value Iref_goal1=Imax, and achieve overload protection by limiting the rated value. Then, the first current difference Ierr1 is obtained according to the formula Ierr1=Iref_goal1-Isamp1, and the second duty cycle Di1 of the current loop of the first power supply is determined by the current loop compensator.

[0111] Furthermore, the smaller value between the first duty cycle Dv1 and the second duty cycle Di1 is determined as the target duty cycle; a first drive signal is generated based on the target duty cycle and sent to the power switch component of the first power supply, thus ending the single control process.

[0112] As can be seen, this embodiment adopts a dual-loop competitive control architecture with voltage and current loops. The system operating parameters are refreshed, current sharing voltage is adjusted, and voltage loop duty cycle is calculated in the first preset cycle. A shorter second preset cycle is used to perform a step-by-step increase in the upper current limit and multi-level current limiting threshold discrimination. Finally, the drive signal is determined by the logic of selecting the smaller duty cycle of the two loops. This application achieves balanced distribution of output current from each parallel power supply through the voltage loop's current sharing adjustment mechanism. Furthermore, it achieves smooth current limiting during load transfer through a current step value linked to the number of power supplies. Combined with a multi-level threshold protection mechanism of average current clamping and rated current clamping, it avoids current overshoot and overload. While ensuring steady-state current sharing accuracy, it effectively improves the current stability and system reliability in multi-power supply parallel dynamic switching scenarios.

[0113] The above primarily describes the solutions of the embodiments of this application from the perspective of the method execution process. It is understood that, in order to achieve the above functions, the electronic device includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in the embodiments provided herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0114] This application embodiment can divide the electronic device into functional units according to the above method example. For example, each function can be divided into a separate functional unit, or two or more functions can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0115] When dividing each function into modules according to its corresponding function. Figure 11This is a functional block diagram of a multi-power parallel system provided in an embodiment of this application; the multi-power parallel system 100 includes a data acquisition module 1010, a data processing module 1020, a first duty cycle calculation module 1030, a second duty cycle calculation module 1040, and an output control module 1050, wherein: The data acquisition module 1010 is used to acquire multiple sets of operating status information of the multiple power supplies; The data processing module 1020 is used to determine the first output current upper limit, the first current step value and the target output voltage value of the first power supply based on the multiple operating state information sets of the multiple power supplies. The first duty cycle calculation module 1030 is used to determine the first duty cycle of the voltage loop of the first power supply based on the target output voltage value. The second duty cycle calculation module 1040 is used to increase the first output current limit by the first current step value to obtain a second output current limit; perform multi-level judgment based on the second output current limit, the first operating state information set corresponding to the first power supply, the preset current offset and the rated output current limit to determine the target output current value; and determine the second duty cycle of the current loop of the first power supply based on the target output current value. The output control module 1050 is used to determine the smaller value between the first duty cycle and the second duty cycle as the target duty cycle; generate a first drive signal based on the target duty cycle and send it to the power switching component of the first power supply.

[0116] Optionally, in determining the first output current upper limit, first current step value, and target output voltage value of the first power supply based on the multiple operating state information sets of the multiple power supplies, the data processing module 1020 is specifically configured to: determine the number of power supplies in operation and the actual output current value of at least one power supply in operation, including the first power supply, based on the multiple operating state information sets; calculate the average value of the actual output current values ​​of the at least one power supply in operation to obtain an average output current value; obtain the first output current upper limit based on the sum of the average output current value and the preset current offset; obtain the first current step value based on the ratio of the preset total system current step value to the number of power supplies in operation; and determine the target output voltage value based on the average output current value, the first operating state information set, and the preset reference output voltage value.

[0117] Optionally, in determining the target output voltage value based on the average output current value, the first operating state information set, and the preset reference output voltage value, the data processing module 1020 is specifically configured to: determine the actual output current value of the first power supply based on the first operating state information set; determine the current sharing voltage adjustment amount corresponding to the voltage loop of the first power supply based on the current difference between the average output current value and the actual output current value of the first power supply; and superimpose the current sharing voltage adjustment amount onto the preset reference output voltage value to obtain the target output voltage value, wherein the target output voltage value is a given output voltage used by the voltage loop of the first power supply for current sharing adjustment.

[0118] Optionally, in determining the first duty cycle of the voltage loop of the first power supply based on the target output voltage value, the first duty cycle calculation module 1030 is specifically used to: determine the actual output voltage value of the first power supply based on the first operating state information set; determine the first voltage difference between the target output voltage value and the actual output voltage value of the first power supply; and calculate the first duty cycle of the voltage loop of the first power supply based on the voltage loop compensator.

[0119] Optionally, in determining the target output current value by performing multi-level judgments based on the second output current upper limit, the first operating state information set corresponding to the first power supply, the preset current offset, and the rated output current upper limit, the second duty cycle calculation module 1040 is specifically used to: take the larger of the actual output current value and the average output current value of the first power supply and sum it with the preset current offset to obtain a third output current upper limit; perform a numerical comparison operation between the second output current upper limit and the third output current upper limit to obtain a first-level judgment result; determine the intended output current upper limit based on the first-level judgment result; perform a numerical comparison operation between the intended output current upper limit and the rated output current upper limit to obtain a second-level judgment result; and determine the target output current value based on the second-level judgment result, wherein the target output current value is the current setpoint value used by the current loop of the first power supply for current limiting clamping.

[0120] Optionally, in determining the upper limit of the intended output current based on the first level judgment result, the second duty cycle calculation module 1040 is specifically used to: if the first level judgment result is detected that the upper limit of the second output current is less than or equal to the upper limit of the third output current, then the upper limit of the second output current is determined as the upper limit of the intended output current; if the first level judgment result is detected that the upper limit of the second output current is greater than the upper limit of the third output current, then the upper limit of the third output current is determined as the upper limit of the intended output current.

[0121] Optionally, in determining the target output current value based on the second-level judgment result, the second duty cycle calculation module 1040 is specifically used to: if the second-level judgment result is detected that the upper limit of the intended output current is less than or equal to the upper limit of the rated output current, then the upper limit of the intended output current is determined as the target output current value; if the second-level judgment result is detected that the upper limit of the intended output current is greater than the upper limit of the rated output current, then the upper limit of the rated output current is determined as the target output current value.

[0122] Optionally, in determining the second duty cycle of the current loop of the first power supply based on the target output current value, the second duty cycle calculation module 1040 is specifically used to: determine a first current difference between the target output current value and the actual output current value of the first power supply; and perform calculations on the first current difference based on the current loop compensator to obtain the second duty cycle of the current loop of the first power supply.

[0123] Optionally, the controller continuously acquires multiple sets of operating status information of the multiple power supplies according to a first preset period, and redetermines the first output current upper limit, the first current step value, and the target output voltage value of the first power supply based on the latest acquired multiple sets of operating status information, and iteratively updates the target duty cycle; wherein, within a single first preset period, the first output current upper limit is used as a reference, and the second output current upper limit is continuously updated by accumulating and increasing the first current step value according to a second preset period.

[0124] As can be seen, this application obtains the operating status information set of multiple power sources through a dual-loop duty cycle competition control mechanism, completes the dynamic calculation of reference parameters, the step-by-step increase of current limits and the multi-level current limiting judgment. Under normal conditions, the voltage loop dominates to realize the steady-state current sharing regulation of multiple power sources, and the current loop switches in to perform current limiting clamping protection in the case of current surge. This effectively suppresses the instantaneous current surge under the conditions of power supply switching and asynchronous start-stop, improves the current sharing accuracy of multiple power sources in parallel, reduces the repeated electrical stress of power switching transistors, and ensures the operational reliability and service life of the power supply system.

[0125] It should be noted that the specific implementation of each operation can be described in the corresponding description of the method embodiments shown above. The multi-power supply parallel system can be used to execute the above method embodiments of this application, and will not be described again here.

[0126] This application also provides a computer-readable storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments, wherein the computer includes an electronic device.

[0127] This application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. The computer program product may be a software installation package, and the computer may include an electronic device.

[0128] It should be noted that, for the sake of simplicity, the above embodiments are all described as a series of actions. Those skilled in the art should understand that this application is not limited to the described order of actions, as some steps in the embodiments of this application can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions, steps, modules, or units involved are not necessarily essential to the embodiments of this application.

[0129] In the above embodiments, the descriptions of each embodiment in this application have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0130] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. This program can be stored in a computer-readable storage medium, and when executed, it can include the processes described in the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM or random access memory (RAM), magnetic disks, or optical disks.

[0131] The steps of the methods or algorithms described in the embodiments of this application can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in RAM, flash memory, ROM, EPROM, electrically erasable programmable read-only memory (EEPROM), registers, hard disk, portable hard disk, read-only optical disk (CD-ROM), or any other form of storage medium well known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Furthermore, the ASIC can reside in a terminal device or management device. Alternatively, the processor and storage medium can exist as discrete components in the terminal device or management device.

[0132] Those skilled in the art will recognize that, in one or more of the examples above, the functions described in the embodiments of this application can be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. This computer program product includes one or more computer instructions. When these computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., digital video discs (DVDs)), or semiconductor media (e.g., solid-state disks (SSDs)).

[0133] The modules / units included in the various devices and products described in the above embodiments can be software modules / units, hardware modules / units, or a combination of both. For example, for devices and products applied to or integrated into a chip, all modules / units can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits. For devices and products applied to or integrated into a chip module, all modules / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The implementation is achieved through a software program that runs on the processor integrated within the chip module. The remaining modules / units (if any) can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into terminal equipment, each of their modules / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components within the terminal equipment. Alternatively, at least some modules / units can be implemented through a software program that runs on the processor integrated within the terminal equipment, while the remaining modules / units (if any) can be implemented using hardware methods such as circuits.

[0134] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the embodiments of this application. It should be understood that the above descriptions are merely specific embodiments of the embodiments of this application and are not intended to limit the protection scope of the embodiments of this application. Any modifications, equivalent substitutions, improvements, etc., made on the basis of the technical solutions of the embodiments of this application should be included within the protection scope of the embodiments of this application.

Claims

1. A multi-power supply parallel current sharing control method based on a dual-loop circuit, characterized in that, A controller for a multi-power-supply parallel system, wherein the multi-power supply includes a first power supply, the method comprising: Obtain multiple sets of operating status information for the multiple power supplies; The first output current upper limit, the first current step value, and the target output voltage value of the first power supply are determined based on the multiple operating state information sets of the multiple power supplies. The first duty cycle of the voltage loop of the first power supply is determined based on the target output voltage value; The first output current upper limit is increased according to the first current step value to obtain the second output current upper limit; multi-level judgment is performed based on the second output current upper limit, the first operating state information set corresponding to the first power supply, the preset current offset and the rated output current upper limit to determine the target output current value; the second duty cycle of the current loop of the first power supply is determined based on the target output current value. The smaller of the first duty cycle and the second duty cycle is determined as the target duty cycle; A first drive signal is generated based on the target duty cycle and sent to the power switching component of the first power supply.

2. The method according to claim 1, characterized in that, The step of determining the first output current upper limit, the first current step value, and the target output voltage value of the first power supply based on multiple operating state information sets of the multiple power supplies includes: The number of power supplies that are powered on and the actual output current value of at least one power supply that is powered on are determined based on the multiple sets of operating status information, wherein the at least one power supply includes the first power supply. Calculate the average value of the actual output current of at least one power supply that is in the power-on state to obtain the average output current value; The first upper limit of output current is obtained by summing the average output current value and the preset current offset. The first current step value is obtained based on the ratio of the preset total system current step value to the number of power supplies. The target output voltage value is determined based on the average output current value, the first operating status information set, and the preset reference output voltage value.

3. The method according to claim 2, characterized in that, Determining the target output voltage value based on the average output current value, the first operating state information set, and the preset reference output voltage value includes: Based on the first operating status information set, determine the actual output current value of the first power supply; The current sharing voltage adjustment amount corresponding to the voltage loop of the first power supply is determined based on the current difference between the average output current value and the actual output current value of the first power supply. The current sharing voltage adjustment is superimposed on the preset reference output voltage value to obtain the target output voltage value, which is the given output voltage of the voltage loop of the first power supply used for current sharing adjustment.

4. The method according to any one of claims 2-3, characterized in that, Determining the first duty cycle of the voltage loop of the first power supply based on the target output voltage value includes: Based on the first operating status information set, determine the actual output voltage value of the first power supply; Determine a first voltage difference between the target output voltage value and the actual output voltage value of the first power supply; The first duty cycle of the voltage loop of the first power supply is obtained by calculating the first voltage difference based on the voltage loop compensator.

5. The method according to claim 2, characterized in that, The step of determining the target output current value by performing multi-level judgments based on the second output current upper limit, the first operating state information set corresponding to the first power supply, the preset current offset, and the rated output current upper limit includes: The larger of the actual output current value and the average output current value of the first power supply is summed with the preset current offset to obtain the third upper limit of the output current. A numerical comparison operation is performed between the second upper limit of the output current and the third upper limit of the output current to obtain the first-level judgment result; The upper limit of the intended output current is determined based on the judgment result of the first level. A numerical comparison operation is performed between the intended upper limit of output current and the rated upper limit of output current to obtain the second-level judgment result; The target output current value is determined based on the second-level judgment result. The target output current value is the current setpoint value used by the current loop of the first power supply for current limiting clamping.

6. The method according to claim 5, characterized in that, The step of determining the upper limit of the intended output current based on the first-level judgment result includes: If the first-level judgment result is detected to be that the second output current upper limit is less than or equal to the third output current upper limit, then the second output current upper limit is determined as the intended output current upper limit; If the first-level judgment result indicates that the upper limit of the second output current is greater than the upper limit of the third output current, then the upper limit of the third output current is determined as the intended upper limit of the output current.

7. The method according to claim 5, characterized in that, Determining the target output current value based on the second-level judgment result includes: If the second-level judgment result is detected to be that the intended output current upper limit is less than or equal to the rated output current upper limit, then the intended output current upper limit is determined as the target output current value; If the second-level judgment result indicates that the intended output current upper limit is greater than the rated output current upper limit, then the rated output current upper limit is determined as the target output current value.

8. The method according to any one of claims 5-7, characterized in that, Determining the second duty cycle of the current loop of the first power supply based on the target output current value includes: Determine a first current difference between the target output current value and the actual output current value of the first power supply; The second duty cycle of the current loop of the first power supply is obtained by calculating the first current difference based on the current loop compensator.

9. The method according to claim 1, characterized in that, The controller continuously acquires multiple sets of operating status information of the multiple power supplies according to a first preset period, and redetermines the first output current upper limit, the first current step value and the target output voltage value of the first power supply based on the latest acquired multiple sets of operating status information, and iteratively updates the target duty cycle. Within a single first preset period, the first output current upper limit is used as a benchmark, and the second output current upper limit is continuously updated by accumulating and increasing the first current step value according to the second preset period.

10. A multi-power supply parallel system, characterized in that, It includes a data acquisition module, a data processing module, a first duty cycle calculation module, a second duty cycle calculation module, and an output control module, wherein: The data acquisition module is used to acquire multiple sets of operating status information of the multiple power supplies; The data processing module is used to determine the first output current upper limit, the first current step value, and the target output voltage value of the first power supply based on the multiple operating state information sets of the multiple power supplies. The first duty cycle calculation module is used to determine the first duty cycle of the voltage loop of the first power supply based on the target output voltage value. The second duty cycle calculation module is used to increase the first output current limit by the first current step value to obtain the second output current limit; perform multi-level judgment based on the second output current limit, the first operating state information set corresponding to the first power supply, the preset current offset and the rated output current limit to determine the target output current value; and determine the second duty cycle of the current loop of the first power supply based on the target output current value. The output control module is used to determine the smaller value between the first duty cycle and the second duty cycle as the target duty cycle; generate a first drive signal based on the target duty cycle and send it to the power switching component of the first power supply.

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