A multi-loop electric energy metering box and a control system thereof

Abstract

The present application relates to the field of electric energy metering, and discloses a multi-loop electric energy metering box and a control system thereof. The metering box comprises a micro-power wideband signal generator, an envelope detection circuit, a multi-channel analog-digital converter and a main control system. The main control system controls the micro-power wideband signal generator to inject a multi-frequency sweep carrier voltage signal in a non-metering blind area time window, calculates a phase angle drift based on a response signal, and generates a dynamic trigger threshold. The envelope detection circuit extracts a current envelope voltage signal and outputs an interrupt trigger signal when the first derivative of the current envelope voltage signal exceeds the dynamic trigger threshold. The main control system responds to the interrupt trigger signal, controls the multi-channel analog-digital converter to perform dimension reduction sampling to generate a low-dimensional measurement vector, and reconstructs the low-dimensional measurement vector based on an orthogonal matching pursuit algorithm to recover transient waveform data. The present application reduces the sampling data throughput of the system, improves the accuracy of transient disturbance capture and the waveform reconstruction and recovery precision.

Description

Technical Field

[0001] This invention relates to the field of electricity metering technology, specifically to a multi-loop electricity metering box and its control system. Background Technology

[0002] With the development of smart grids, multi-circuit energy metering boxes are increasingly used in complex power consumption environments. They not only need to perform basic steady-state energy metering but also need to accurately capture transient disturbance waveforms in the power grid. However, existing energy metering equipment typically relies on fixed trigger thresholds preset within the system when extracting transient disturbance signals. This fixed threshold mechanism cannot detect or adapt to impedance drift caused by insulation aging or physical material degradation after long-term line operation, easily leading to missed detection or false triggering of disturbance signals under different line health conditions.

[0003] Meanwhile, in order to capture high-frequency transient waveforms as completely as possible, traditional solutions often directly adopt a high-frequency full sampling mode after triggering. This method generates a huge data throughput in the very short time after the disturbance occurs, which puts a huge transmission load on the instantaneous processing capability of the analog-to-digital converter and the system bus bandwidth.

[0004] Furthermore, existing waveform data processing technologies mostly employ a single, fixed base dictionary matrix. When the degradation of the physical state of the line causes nonlinear variations in the frequency domain distribution characteristics of transient disturbance waveforms, the inability to adaptively switch the matching reconstruction base can easily lead to severe distortion in the final recovered transient waveform, making it difficult to meet the actual needs of high-precision power quality monitoring. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a multi-loop power metering box and its control system, which solves the problems of misjudgment and waveform distortion caused by the fixed trigger threshold and single reconstruction base in existing power metering boxes when capturing and recovering transient disturbance waveforms, which cannot adapt to the aging state of the line. In addition, high-frequency full sampling causes excessive data processing load on the system.

[0006] To achieve the above objectives, the present invention provides the following technical solution: The first aspect of the present invention provides a multi-circuit power metering box, including a main bus, independent circuits, a multi-channel analog-to-digital converter, a low-power broadband signal generator, an envelope detection circuit, and a main control system.

[0007] A low-power broadband signal generator is coupled to the main bus, and the envelope detection circuit and multi-channel analog-to-digital converter are connected to each independent circuit.

[0008] The main control system enters the zero-crossing impedance detection state within the non-metering blind zone time window, controls the micro-power broadband signal generator to inject multi-frequency sweep carrier voltage signals, and calculates the phase angle drift of each independent circuit based on the collected response signals, thereby generating a dynamic trigger threshold.

[0009] The envelope detection circuit extracts the current envelope voltage signal and outputs an interrupt trigger signal when the first derivative of the current envelope voltage signal exceeds the dynamic trigger threshold.

[0010] The main control system responds to the interrupt trigger signal and switches to the transient disturbance sparse sampling state. It controls the multi-channel analog-to-digital converter to perform dimensionality reduction sampling to generate low-dimensional measurement vectors, and reconstructs the low-dimensional measurement vectors based on the orthogonal matching pursuit algorithm to recover transient waveform data.

[0011] The aforementioned main control system achieves physical isolation in the time dimension from the conventional low-frequency steady-state metering process by injecting a swept-frequency carrier signal within the non-metering blind zone time window near the fundamental zero-crossing point. The system generates phase drift by calculating the degree of complex impedance phase angle shift of the response signal at different frequency points, and quantitatively assesses the impedance state changes of the physical medium of the independent loop.

[0012] The main control system dynamically adjusts the trigger threshold for extracting transient disturbance signals based on the phase drift, creating a feedback linkage between the over-limit judgment criterion of the first derivative of the current envelope and the current physical state of the line. After capturing a transient disturbance, the system performs dimensionality reduction and truncation on the original analog signal through a multi-channel analog-to-digital converter, and then restores the complete transient waveform data through an orthogonal matched pursuit algorithm, preserving transient characteristic information while reducing the sampling data throughput.

[0013] Furthermore, the main control system includes a feature linkage mapping unit and a threshold configuration register; the feature linkage mapping unit extracts the maximum extreme value of the phase angle drift, performs an exponential decay operation based on a preset benchmark trigger threshold and the maximum extreme value to generate a dynamic trigger threshold, and writes the dynamic trigger threshold into the threshold configuration register;

[0014] The envelope detection circuit incorporates a hardware comparator. This comparator compares the first derivative with the analog reference level corresponding to the dynamic trigger threshold stored in the threshold configuration register, thus flipping the output interrupt trigger signal. The feature linkage mapping unit performs an exponential decay operation, making the maximum extreme value of the phase drift of the independent loop larger. This results in an exponential decay of the generated dynamic trigger threshold, automatically increasing the sensitivity to capture envelope abrupt changes when the physical health of the independent loop deteriorates.

[0015] Furthermore, the main control system also includes a reconfiguration operation unit, a dictionary selection register, and a non-volatile storage area; the feature linkage mapping unit compares the maximum extreme value with the health margin critical threshold, and if the maximum extreme value is greater than the health margin critical threshold, it outputs a degradation warning flag.

[0016] The non-volatile storage area includes a first storage sector containing a standard Fourier base dictionary matrix and a second storage sector containing a nonlinear feature base dictionary matrix; when the feature linkage mapping unit outputs a degradation warning flag, it writes the starting address of the second storage sector to the dictionary selection register, otherwise it writes the starting address of the first storage sector.

[0017] The reconstruction unit extracts basis vectors based on the starting address, which serve as the optimal sparse dictionary matrix for the orthogonal matched pursuit algorithm. The system adaptively switches the basis type used by the sparse reconstruction algorithm based on the output state of the impedance degradation warning flag, matching the frequency domain distribution characteristics of transient waveforms under different line health conditions.

[0018] Furthermore, the main control system has a pre-stored non-uniform random observation matrix, and the number of dimensionality-reduced sampling points of the non-uniform random observation matrix is ​​less than the total number of sampling points. When the main control system enters the transient disturbance sparse sampling state, it writes the sequence parameters of the non-uniform random observation matrix into the sampling frequency configuration register of the multi-channel analog-to-digital converter, and controls the multi-channel analog-to-digital converter to output a sampling trigger pulse sequence with non-uniform time intervals, thereby reducing the dimensionality of the analog signal of the independent loop to generate a low-dimensional measurement vector.

[0019] Furthermore, the main control system integrates a hardware direct memory access controller; the target address of the direct memory access controller is configured with a first channel and a second channel; the main control system activates the first channel within the non-metering blind zone time window and routes the collected response signal to the data buffer of the carrier control unit;

[0020] When the main control system is outside the non-metering blind zone time window and receives an interrupt trigger signal, it shuts down the first channel and activates the second channel, routing the low-dimensional measurement vector to the data buffer of the reconstruction computing unit, thereby achieving time-division multiplexing of the physical acquisition channels. The multi-channel switching mechanism of the direct memory access controller isolates the storage paths of steady-state impedance detection data and transient disturbance sampling data.

[0021] The second aspect of the present invention provides a control system for a multi-loop energy metering box, which is applied to the multi-loop energy metering box and includes the following control logic: in the non-metering blind zone time window near the fundamental zero-crossing point, the steady-state low-frequency metering state is switched to the zero-crossing impedance detection state; in the zero-crossing impedance detection state, a multi-frequency sweep carrier voltage signal is injected and the phase angle drift of each independent loop is calculated based on the collected response signal, thereby generating a dynamic trigger threshold.

[0022] The current envelope voltage signal of each independent loop is extracted in real time, and an interrupt trigger signal is generated when the first derivative of the current envelope voltage signal exceeds the dynamic trigger threshold. In response to the interrupt trigger signal, the system switches to the transient disturbance sparse sampling state and controls the execution of dimensionality reduction sampling to generate a low-dimensional measurement vector. The low-dimensional measurement vector is processed based on the orthogonal matching pursuit algorithm to reconstruct and recover transient waveform data.

[0023] Furthermore, the logic for calculating the phase drift of each independent loop based on the acquired response signal includes: performing a discrete Fourier transform to extract the frequency domain components of the response signal, calculating the complex impedance phase angle of the independent loop at each detection frequency point; calculating the algebraic difference between the complex impedance phase angle and the reference healthy phase angle to generate the phase drift; and traversing all detection frequency points in the frequency band to extract the maximum extreme value of the phase drift.

[0024] Furthermore, the logic for generating the dynamic trigger threshold includes: extracting the pre-configured baseline trigger threshold and the mapping sensitivity coefficient; performing an exponential decay operation, multiplying the baseline trigger threshold by an exponential function with the natural constant as the base, where the exponent of the exponential function is the negative of the product of the mapping sensitivity coefficient and the maximum extremum, to generate a dynamic trigger threshold that decreases exponentially.

[0025] The control logic also includes: when the maximum extreme value is greater than the preset health margin critical threshold, outputting a degradation warning flag, thereby triggering a forced mapping switch of the sparse dictionary matrix.

[0026] Furthermore, the logic for processing low-dimensional measurement vectors based on the orthogonal matching pursuit algorithm includes: obtaining the currently configured optimal sparse dictionary matrix and non-uniform random observation matrix; establishing an observation equation to link the low-dimensional measurement vector, non-uniform random observation matrix, optimal sparse dictionary matrix, and the sparse coefficient vector to be solved.

[0027] Solve the optimization problem with the objective function of minimizing the number of non-zero elements in the sparse coefficient vector to be solved, and output the estimated sparse coefficient vector; perform the dot product operation between the optimal sparse dictionary matrix and the estimated sparse coefficient vector to generate transient waveform data.

[0028] Furthermore, the control logic also includes a transmission channel compensation step: extracting the ideal spectral reference data of the multi-frequency swept carrier voltage signal, performing a complex division operation between it and the frequency domain component of the actual response signal, and calculating the system transfer function of the physical sensing link;

[0029] The parameters of the system transfer function are extracted to generate an attenuation coefficient matrix. After generating transient waveform data, the attenuation coefficient matrix is ​​used to perform an inverse compensation multiplication operation on the transient waveform data in the frequency domain, outputting the calibrated waveform data. The inverse compensation multiplication operation eliminates the distortion effect of the physical sensor link's frequency response characteristics on the reconstructed waveform.

[0030] This invention provides a multi-loop energy metering box and its control system. It has the following advantages:

[0031] 1. This invention injects a multi-frequency sweep carrier voltage signal within the non-metering blind zone time window and calculates the maximum extreme value of the phase angle drift. It then performs an exponential decay operation to generate a dynamic trigger threshold. This structure uses the phase angle drift to quantitatively evaluate the impedance physical state of an independent circuit, enabling the trigger threshold of the current envelope abrupt change to adaptively and dynamically adjust with the change of the line state. Without interfering with low-frequency steady-state metering, it improves the accuracy of the system in capturing transient disturbances of lines with different aging degrees.

[0032] 2. This invention outputs an interrupt trigger signal when the first derivative of the envelope exceeds the limit, controls the multi-channel analog-to-digital converter to output a sampling trigger pulse sequence with non-uniform time intervals to generate a low-dimensional measurement vector, and uses an orthogonal matched pursuit algorithm to reconstruct and recover the transient waveform. This mechanism reduces the instantaneous data throughput of the analog-to-digital converter and the transmission bandwidth pressure of the front-end bus by replacing high-frequency full sampling with dimensionality reduction, thereby improving the processing efficiency of the hardware system for sudden high-frequency disturbance signals.

[0033] 3. This invention compares the maximum extreme value of the phase angle drift with the critical threshold of the health margin to output a degradation warning flag. Based on this flag, it maps and switches between the first storage sector containing the standard Fourier base dictionary matrix and the second storage sector containing the nonlinear feature base dictionary matrix. This design enables the optimal sparse dictionary matrix of the sparse reconstruction algorithm to dynamically match the current physical health status of the line, avoiding reconstruction distortion of a single dictionary matrix under different line operating conditions and improving the restoration accuracy of transient waveform data. Attached Figure Description

[0034] Figure 1 This is a schematic diagram of the overall hardware topology and control system architecture of the present invention;

[0035] Figure 2 This is a schematic diagram of the overall workflow of the control system of the present invention;

[0036] Figure 3 This is a schematic diagram of the transient trigger threshold dynamic adjustment process of the present invention;

[0037] Figure 4 This is a schematic diagram of the transient envelope triggering and modal hardware interrupt control process of the present invention;

[0038] Figure 5 This is a schematic diagram of the time-division multiplexing scheduling logic for the high-speed analog-to-digital converter channel of the present invention;

[0039] Figure 6This is a schematic diagram comparing the dimensionality reduction sparse sampling and reconstruction approximation effects of the high-frequency transient disturbance signal in this invention.

[0040] in, Figure 6 It contains two sub-figures. Sub-figure A is a schematic diagram of the distribution of traditional full-sampled waveforms and the dimensionality-reduced sparse sampling points extracted by the present invention. Sub-figure B is a schematic diagram of the approximation effect between the reconstructed waveform by the optimal sparse dictionary mapping and the real physical waveform. Detailed Implementation

[0041] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0042] See attached document Figure 1 The present invention provides a multi-circuit power metering box and its control system, which may include: a metering box body, a main busbar disposed inside the metering box body, multi-circuit branch terminals connected to the main busbar, a sensing and acquisition component, an execution component, and a main control system.

[0043] The main busbar includes phase A busbar, phase B busbar, phase C busbar, and neutral busbar. The multi-circuit branch terminal is divided into multiple independent circuits. The first end of each independent circuit is electrically connected to the main busbar via a connecting wire, and the second end of each independent circuit is used to connect to external loads.

[0044] The sensing and acquisition components include a multi-channel analog-to-digital converter (ADC), a low-power broadband signal generator, and an envelope detection circuit. The voltage sampling terminals of the multi-channel ADC are connected in parallel to the main bus, while the current sampling terminals are connected in series to each independent circuit via current transformers.

[0045] The output of the low-power broadband signal generator is connected to the main bus via an isolation coupling circuit. The low-power broadband signal generator is used to output a swept carrier voltage signal with a set frequency range to the main bus.

[0046] The input of the envelope detection circuit is connected to the secondary side of the current transformer in each independent loop. The envelope detection circuit is used to output the envelope voltage signal of the corresponding loop current, and the output of the envelope detection circuit is connected to the external interrupt pin of the main control system.

[0047] The execution components include multiple circuit breakers or solid-state relays. Each circuit breaker or solid-state relay is connected in series in its corresponding independent circuit. The control terminals of the circuit breakers or solid-state relays are connected to the drive output ports of the main control system.

[0048] The main control system is constructed using microcontrollers or digital signal processing devices. Logically, the main control system is divided into a synchronization metering unit, a carrier control unit, a feature linkage mapping unit, a sampling scheduling unit, and a reconstruction operation unit.

[0049] The data bus of the synchronous metering unit is connected to a multi-channel analog-to-digital converter (ADC) to acquire discrete voltage and current data sequences under power frequency conditions. The synchronous metering unit internally includes a phase-locked loop (PLL) module. The PLL module's data input receives the discrete voltage data sequence and is used to calculate the fundamental zero-crossing time of the main bus voltage signal.

[0050] The control port of the carrier control unit is connected to the trigger pin of the low-power broadband signal generator. The data input port of the carrier control unit is connected to the high-frequency output register of the multi-channel analog-to-digital converter.

[0051] The multi-channel analog-to-digital converter (ADC) is physically connected to both the synchronization metering unit and the carrier control unit. The main control system is configured with time-division multiplexing scheduling logic to control the ADC to output sampled data to the carrier control unit at the fundamental zero-crossing point and to output sampled data to the synchronization metering unit at non-fundamental zero-crossing points.

[0052] The data input terminal of the feature linkage mapping unit is connected to the status data output terminal of the carrier control unit. The first data output terminal of the feature linkage mapping unit is connected to the parameter configuration terminal of the sampling scheduling unit, and the second data output terminal of the feature linkage mapping unit is connected to the dictionary configuration terminal of the reconstruction operation unit.

[0053] The control output of the sampling scheduling unit is connected to the sampling frequency configuration register of the multi-channel analog-to-digital converter. The trigger input of the sampling scheduling unit is connected to the output of the envelope detection circuit through the external interrupt pin of the main control system.

[0054] The data input terminal of the reconfiguration unit is connected to the data buffer of the multi-channel analog-to-digital converter. The control output terminal of the reconfiguration unit is connected to the drive output port of the main control system, used to send a trip isolation signal to the execution component.

[0055] See attached document Figure 2 The main control system of this invention coordinates the operation of the multi-channel analog-to-digital converter, the low-power wideband signal generator, and the internal computing units through a preset timing scheduling strategy and state machine logic.

[0056] The main control system is configured to switch between three operating states during the system's operating cycle. These three operating states include: steady-state low-frequency metering state, zero-crossing impedance detection state, and transient disturbance sparse sampling state. The main control system performs state switching based on the time window division of the power frequency cycle and external hardware interrupt signals.

[0057] Under steady-state low-frequency metering conditions, the voltage change rate output by the envelope detection circuit does not trigger an external interrupt to the main control system, and the current system time is not within the fundamental zero-crossing time window of the main bus voltage signal. At this time, the sampling scheduling unit writes a preset low-frequency sampling instruction to the sampling frequency configuration register of the multi-channel analog-to-digital converter. The multi-channel analog-to-digital converter performs sampling at a fixed power frequency Nyquist frequency. The sampled data stream is routed to the synchronous metering unit, which performs the accumulation calculation of fundamental active and reactive energy based on this data stream.

[0058] The synchronous metering unit continuously runs the phase-locked loop (PLL) algorithm under steady-state low-frequency metering conditions. The PLL algorithm calculates the phase angle of the main bus voltage based on the discrete voltage data sequence. When the phase angle crosses zero, the PLL module outputs a zero-crossing synchronization signal and defines a fixed-duration non-metering blind zone time window before and after the zero-crossing point.

[0059] When the system time enters the non-metering blind zone time window, the main control system switches from steady-state low-frequency metering state to zero-crossing impedance detection state. The sampling scheduling unit sends a command to the multi-channel analog-to-digital converter to suspend the current low-frequency sampling via the control bus, and reconfigures the operating frequency of the multi-channel analog-to-digital converter to the impedance sampling frequency in the megahertz range.

[0060] During the zero-crossing impedance detection state, the carrier control unit sends a start level to the trigger pin of the low-power broadband signal generator. The low-power broadband signal generator injects a sweep carrier voltage signal of a preset duration into the main bus. The multi-channel analog-to-digital converter synchronously acquires the high-frequency response current data of each independent loop and routes the high-frequency data stream of this batch to the high-frequency output register of the carrier control unit. After the non-metering blind zone time window ends, the main control system returns to the steady-state low-frequency metering state.

[0061] When a high-frequency transient disturbance occurs in any independent loop, the envelope detection circuit detects the sudden change in the current envelope. If the first derivative of the envelope voltage signal exceeds the dynamic trigger threshold currently set by the feature linkage mapping unit, the envelope detection circuit outputs an interrupt level to the external interrupt pin of the main control system.

[0062] Upon receiving an interrupt level, the main control system responds to a hardware interrupt, forcing a switch from steady-state low-frequency metering or zero-crossing impedance detection to transient disturbance sparse sampling. The sampling scheduling unit overwrites the current configuration register of the multi-channel analog-to-digital converter, writing non-uniform sparse sampling sequence parameters into it.

[0063] Under transient disturbance sparse sampling conditions, the multi-channel analog-to-digital converter performs dimensionality reduction sampling of the voltage and current channels of the independent loop based on hardware instructions of the non-uniform random observation matrix. The unequal-interval discrete data generated by sampling is directly written into the data buffer of the main control system. The reconstruction operation unit reads the data buffer and calls the orthogonal matching pursuit algorithm of the currently configured dictionary of the feature linkage mapping unit to reconstruct the transient waveform data. After the data reconstruction is completed and the interrupt signal is canceled, the main control system resets the state machine and returns to the steady-state low-frequency metering state.

[0064] This embodiment details the technical steps of the main control system for detecting the physical impedance status of multiple loops using a non-metering time window near the zero-crossing point of the power frequency voltage.

[0065] The phase-locked loop (PLL) module within the main control system calculates the phase angle of the power frequency voltage based on the discrete voltage data sequence obtained from the synchronization metering unit. When the phase angle crosses zero, the PLL module marks that moment as the fundamental frequency zero-crossing point. The main control system is based on real-time... Centered on the timeline, a fixed time length is defined. Non-measuring blind zone time window.

[0066] Enter After the non-metering blind zone time window, the carrier control unit outputs a start level to the low-power broadband signal generator. The low-power broadband signal generator then uses hardware to synthesize a multi-frequency swept carrier voltage signal. The signal is injected into the main bus through an isolation coupling circuit. This signal is composed of multiple subcarriers of different frequencies, specifically determined by the following formula:

[0067] ;

[0068] in, For discrete detection frequency points, The total number of preset frequency points; For the first The frequency values ​​of the injected subcarriers; For the corresponding frequency The injected carrier amplitude; For the corresponding frequency The initial phase parameters, It is a cosine function.

[0069] The injected sweep carrier voltage signal propagates to each independent circuit via the main bus and multi-circuit branch terminals. The carrier control unit sends a high-frequency sampling trigger command to the multi-channel analog-to-digital converter (ADC) via the control bus. The ADC synchronously acquires the high-frequency response current generated by each independent circuit. ,in This is the numbering index for independent loops. The carrier control unit outputs information about the multi-channel analog-to-digital converter. and The discrete sampled data stream is written to the data buffer.

[0070] The carrier control unit reads the data stream from the buffer and performs a Discrete Fourier Transform (DFT) operation. The carrier control unit extracts the frequency domain components at specific frequency points using the DFT, and then calculates the loop. At frequency point Complex impedance at The formula for calculating complex impedance is:

[0071] ;

[0072] in, For the swept carrier voltage signal at frequency points Frequency domain transformation value at; For high-frequency response current at frequency point Frequency domain transformation value at; For loop At frequency point The equivalent complex impedance amplitude at the point; For loop At frequency point The equivalent complex impedance phase angle at the point; It is the base of the natural logarithm; It is the imaginary unit.

[0073] The carrier control unit reads the circuit from the non-volatile memory of the main control system. The baseline health phase angle recorded during the equipment calibration phase. The carrier control unit calculates the current phase angle. relative to baseline health angle The algebraic difference is used to generate the frequency of the circuit. Phase drift at point After the calculation is completed, the carrier control unit outputs the phase drift data of each loop across the entire frequency band to the feature linkage mapping unit.

[0074] The feature linkage mapping unit inside the main control system is equipped with a data receiving port to obtain the phase drift data set output by the carrier control unit.

[0075] Feature linkage mapping unit for each independent loop The preset total number of iterations is The system detects all frequency points across the entire frequency band and extracts the maximum absolute value of phase drift at each frequency point in the loop. The feature-linked mapping unit calculates the maximum extreme value of phase drift. The formula is:

[0076] ;

[0077] In the formula, Independent loop At frequency point The phase angle drift at that point.

[0078] A health margin threshold is pre-set in the non-volatile storage area of ​​the feature linkage mapping unit. This threshold characterizes the limiting boundary parameter of high-frequency equivalent impedance variation caused by physical oxidation loosening or insulation carbonization of multi-circuit branch terminals. The feature linkage mapping unit calls the internal digital comparator logic to calculate the maximum extreme value of the phase angle drift. Health margin threshold Perform numerical comparison.

[0079] When the comparison result output by the digital comparator indicates Less than or equal to At that time, the feature linkage mapping unit will correspond to an independent loop. The physical status register is written with standard status flags.

[0080] When the comparison result output by the digital comparator indicates Greater than At that time, the feature linkage mapping unit outputs the independent loop. The physical impedance degradation instruction is executed, and the physical status register of the circuit is overwritten with the degradation warning flag. Simultaneously, the feature linkage mapping unit will include the maximum extreme value of phase angle drift. The data frames for the degradation warning flag are routed and distributed to the input buffers of the sampling scheduling unit and the reconstruction operation unit, respectively, as logical triggering conditions for subsequent system changes to control parameters.

[0081] See attached document Figure 3 The non-volatile memory inside the feature linkage mapping unit is pre-configured with a reference trigger threshold and a mapping sensitivity coefficient. The reference trigger threshold represents the fixed voltage change rate threshold parameter used to trigger an external interruption of the system when the multi-loop branch terminal is in the initial physical calibration state.

[0082] The feature-linked mapping unit obtains the maximum extreme value of phase angle drift calculated based on the pre-processor logic. The feature-linked mapping unit extracts the baseline trigger threshold and mapping sensitivity coefficient from the non-volatile memory, calls the internal arithmetic logic core to perform exponential decay operations, and generates a dynamic trigger threshold for a specific independent loop.

[0083] The formula for calculating the dynamic trigger threshold by the feature linkage mapping unit is:

[0084] ;

[0085] In the formula, Independent loop The dynamically triggered threshold is generated through calculation; The set baseline trigger threshold; This is the mapping sensitivity coefficient; Independent loop The maximum extreme value of phase drift at the detection frequency point across the entire frequency band; For the natural constant An exponential function with base 0.

[0086] Based on this operational logic, when the input phase angle drift reaches its maximum extreme value... As the threshold increases, the feature linkage mapping unit calculates the dynamic triggering threshold of the output. It decreases exponentially.

[0087] The feature linkage mapping unit will calculate the dynamic triggering threshold. The control data is then converted into the corresponding control data word. The feature linkage mapping unit writes this control data word into the threshold configuration register associated with the envelope detection circuit of the independent loop via the internal data bus of the main control system.

[0088] The envelope detection circuit calculates the first derivative of the current loop current envelope voltage signal in real time. The comparator hardware inside the envelope detection circuit compares this first derivative with the dynamically triggered threshold currently stored in the threshold configuration register. The corresponding analog reference level is compared numerically. When the value of the first derivative exceeds the analog reference level, the output level of the envelope detection circuit flips, and an interrupt trigger signal is output to the external interrupt pin of the main control system.

[0089] The non-volatile memory area of ​​the main control system is divided into multiple independent memory areas in the physical address space, including a first memory sector and a second memory sector. The first memory sector contains standard Fourier basis dictionary matrix data. The second memory sector contains nonlinear characteristic basis dictionary matrix data. This nonlinear characteristic basis dictionary matrix contains the basis vector sequence of high-frequency distorted current waveforms recorded under conditions of loose physical wiring and insulation breakdown.

[0090] The feature linkage mapping unit is equipped with a dictionary selection register, the data input of which is connected to the physical status register in the above process. The feature linkage mapping unit reads the currently written flag bit in the physical status register according to a preset clock cycle.

[0091] When the physical status register stores the standard status flag, the feature linkage mapping unit writes the memory start address pointer of the first storage sector to the dictionary selection register through the data bus.

[0092] When the physical status register stores the degradation warning flag, the feature linkage mapping unit executes a forced mapping instruction, overwrites the data in the dictionary selection register through the data bus, and writes the memory start address pointer of the second storage sector to it.

[0093] The process of the feature linkage mapping unit outputting the optimal sparse dictionary matrix for a specific independent loop is determined by the following conditional mapping expression based on the comparison between the maximum extremum of phase drift and the critical threshold of health margin:

[0094] ;

[0095] In the formula, To reconfigure the arithmetic unit for independent loops The optimal sparse dictionary matrix currently configured; This is a standard Fourier basis dictionary matrix read from the first storage sector; This is the nonlinear feature base dictionary matrix read from the second storage sector; Independent loop The maximum extreme value of phase drift at the detection frequency point across the entire frequency band; The health margin threshold is set within the feature linkage mapping unit.

[0096] The control pins of the reconstruction operation unit are connected to the data bus of the dictionary selection register. The reconstruction operation unit internally contains the execution logic for an orthogonal matching pursuit algorithm. When the main control system switches from a steady-state low-frequency metering state to a transient disturbance sparse sampling state, the reconstruction operation unit extracts the basis vector data stream from the corresponding addressed memory sector by reading the current memory address pointer in the dictionary selection register. The reconstruction operation unit loads the extracted basis vector data stream into the operation kernel, using it as the fixed basis matrix parameter for the current transient waveform reconstruction operation cycle.

[0097] See attached document Figure 4 The input of the envelope detection circuit is connected to the secondary side of the current transformer in each independent loop to receive the AC current analog signal from each independent loop. The envelope detection circuit internally includes a full-wave rectifier circuit and a low-pass filter circuit to extract the outer envelope analog voltage of the AC current analog signal and generate the current envelope voltage signal for the corresponding independent loop.

[0098] The envelope detection circuit is followed by an analog differential network connected in series. The analog differential network receives the current envelope voltage signal and outputs the analog voltage value corresponding to the first derivative of the current envelope voltage signal with respect to time in real time.

[0099] The envelope detection circuit's output stage includes a hardware comparator. The non-inverting input of the hardware comparator is connected to the output of the analog differential network, and the inverting input is connected to the output pin of the digital-to-analog converter (DAC). This DAC converts the dynamically triggered threshold stored in the threshold configuration register into the corresponding analog reference level.

[0100] The hardware comparator continuously executes physical level comparison logic, and its mathematical expression is:

[0101] ;

[0102] In the formula, Independent loop extracted for envelope detection circuit The current envelope voltage signal; This is the first derivative of the voltage signal within the current envelope. Configure an independent loop for the register to set the current write threshold. The dynamic trigger threshold.

[0103] When the above inequality condition is met, the output level of the hardware comparator physically flips. The output of the envelope detection circuit outputs an interrupt trigger signal to the external interrupt pin of the main control system.

[0104] After receiving an interrupt trigger signal from an external interrupt pin, the kernel of the main control system initiates the hardware interrupt response timing. The main control system saves the program counter in the current steady-state low-frequency metering state and suspends the current low-frequency data processing thread of the synchronization metering unit.

[0105] The main control system jumps to execute the interrupt service routine, activating the sampling scheduling unit. The sampling scheduling unit addresses the control register block of the multi-channel analog-to-digital converter (ADC) via the main control system's data bus. The sampling scheduling unit overwrites the fixed low-frequency sampling instructions stored in the ADC's sampling frequency configuration register with non-uniform sparse sampling sequence instructions. Through this overwrite operation, the ADC's hardware acquisition logic directly switches from steady-state low-frequency sampling mode to transient disturbance sparse sampling mode.

[0106] The main control system's non-volatile memory pre-stores non-uniform random observation matrix data. This non-uniform random observation matrix is ​​defined as a matrix. .matrix The dimension is .in, This represents the total number of high-frequency full sampling points within a single sampling time window. The actual number of dimensionality reduction sampling points configured, and numerically satisfying... The relationship.

[0107] After the multi-channel analog-to-digital converter enters the transient disturbance sparse sampling mode, the sampling scheduling unit extracts the matrix through the internal bus. The sequence parameters. The sampling scheduling unit will use the matrix. The sequence parameters are converted into the corresponding hardware timer configuration words and written to the sampling clock generation circuit of the multi-channel analog-to-digital converter via the control bus.

[0108] The sampling clock generation circuit inside the multi-channel analog-to-digital converter (ADC) outputs a sampling trigger pulse sequence with non-uniform time intervals based on the aforementioned hardware timer configuration word. The sample-and-hold circuit of the multi-channel ADC receives this trigger pulse sequence and extracts the discrete voltage and current amplitudes of the independent loop analog signal at the corresponding pulse edge.

[0109] Through the aforementioned non-uniform sampling operation controlled by hardware trigger pulses, the multi-channel analog-to-digital converter performs hardware-level dimensionality reduction on the high-frequency fully sampled signal vector that the independent loop should have acquired within the current time window, generating a low-dimensional measurement vector. The high-frequency fully sampled signal vector is defined as... Its dimensions are The actual low-dimensional measurement vector obtained is defined as Its dimensions are .

[0110] The mathematical representation of the dimensionality reduction sparse sampling process is as follows:

[0111] ;

[0112] In the formula, For multi-channel analog-to-digital converters for independent loops The actual output low-dimensional measurement vector; This is a non-uniform random observation matrix read from non-volatile memory; Independent loop The equivalent high-frequency fully sampled signal vector within the corresponding time window.

[0113] After sampling, the multi-channel analog-to-digital converter uses the direct memory access channel inside the main control system to convert the generated low-dimensional measurement vector. The data is transmitted and written to the main control system's data buffer. The main control system then resets the interrupt flag and waits for the reconstructed arithmetic unit to extract and process the low-dimensional measurement vector in the data buffer.

[0114] The reconstruction operation unit inside the main control system includes a data read interface for retrieving low-dimensional measurement vectors written by the multi-channel analog-to-digital converter from the main control system's data buffer. Simultaneously, the reconstruction operation unit extracts the currently selected optimal sparse dictionary matrix and the non-uniform random observation matrix via an internal bus.

[0115] Based on the sparsity principle of signal processing, the equivalent high-frequency fully sampled signal vector can be represented as a linear combination of sparse coefficient vectors on the basis of the optimal sparse dictionary matrix. The logic kernel within the reconstruction unit establishes an observation equation for this linear combination. This observation equation connects the low-dimensional measurement vector, the non-uniform random observation matrix, the optimal sparse dictionary matrix, and the sparse coefficient vector to be solved.

[0116] The algebraic structure of the observation equation is:

[0117] ;

[0118] In the formula, To reconstruct the independent loops read from the data buffer by the arithmetic unit. The low-dimensional measurement vector; This is a non-uniform random observation matrix read from non-volatile memory; The optimal sparse dictionary matrix currently configured for the feature linkage mapping unit; Let be the sparse coefficient vector to be solved.

[0119] To extract the sparse coefficient vector, the reconstructed computation unit invokes the orthogonal matching pursuit algorithm execution engine embedded within it. This engine is configured to solve an optimization problem with norm minimization as the objective function. The engine outputs the estimated sparse coefficient vector through iterative matching computation.

[0120] The mathematical expression for the optimization solution process is:

[0121] ;

[0122] In the formula, This is the estimated sparse coefficient vector obtained by the orthogonal matching pursuit algorithm; Representing vectors of Norm, which is the number of non-zero elements in a vector; Representing vectors Norm; This is the preset reconstruction error tolerance constant.

[0123] After obtaining the estimated sparse coefficient vector, the matrix multiplier array of the reconstructed computation unit performs a dot product operation between the vector and the matrix to generate the recovered high-frequency transient signal vector. The expression for this operation is:

[0124] ;

[0125] In the formula, The recovered high-frequency transient signal vector is ultimately calculated and generated by the reconstruction operation unit.

[0126] After the operation is completed, the reconstruction unit will restore the high-frequency transient signal vector. The result is written to the main control system's output register. The data stream in this register is synchronously exposed to the main control system's external communication interface and protection action control logic. When the reconstructed waveform data triggers a preset hardware fault criterion threshold, the control output terminal of the reconstruction calculation unit outputs a trip isolation level to the control pin of the corresponding circuit breaker or solid-state relay, cutting off the physical connection between the corresponding independent circuit and the main bus.

[0127] See attached document Figure 5 The main control system integrates a hardware direct memory access (DMA) controller and a data routing bus. The source address port of the DMA controller is connected to the high-speed data output register of the multi-channel analog-to-digital converter. The target address port of the DMA controller is configured with multiple independent memory channels, including a first channel pointing to the data buffer of the carrier control unit and a second channel pointing to the data buffer of the reconfiguration unit.

[0128] The main control system is equipped with time-division multiplexing scheduling logic based on hardware flags to control channel switching of the direct memory access controller. The triggering condition of this scheduling logic is jointly determined by the zero-crossing synchronization flag output by the phase-locked loop module and the external interrupt flag output by the envelope detection circuit.

[0129] The logic control core of the main control system continuously reads the status levels of the two flag bits mentioned above. When the system time is within the non-metering blind zone time window centered on the zero-crossing point of the fundamental frequency, the zero-crossing synchronization flag bit is at an active level. At this time, the logic control core sends a channel configuration command to the direct memory access controller, hard-connecting the data stream of the source address port to the first channel. The response current data about the injected swept carrier voltage collected by the multi-channel analog-to-digital converter within this time window is unidirectionally routed to the carrier control unit to perform the aforementioned complex impedance calculation.

[0130] When the system time is outside the non-metering blind zone time window, the zero-crossing synchronization flag is reset to an invalid level. If the envelope detection circuit detects a transient disturbance during this period, the external interrupt flag is set to an active level. The logic control core sends a channel switching instruction to the direct memory access controller, closing the first channel and activating the second channel. In this state, the multi-channel analog-to-digital converter, based on the dimension-reduced discrete data collected by the non-uniform random observation matrix, is unidirectionally routed to the reconstruction operation unit for reconstructing high-frequency transient signals.

[0131] The target address routing switching logic expression for the direct memory access controller is:

[0132] ;

[0133] In the formula, For direct memory access controllers in time The currently active target address channel; The physical base address of the carrier control unit's data buffer (first channel); To reconstruct the physical base address (second channel) of the data buffer of the computing unit; This is the calculated zero-crossing time of the fundamental wave; The set length of the non-metering blind zone time window; This is a Boolean status variable for the external interrupt flag. This indicates an interrupt was triggered.

[0134] Through this physical hardware-level time-division multiplexing control mechanism, the same set of high-speed sampling circuits of the multi-channel analog-to-digital converter is allocated to two independent computing units at different time axis nodes, realizing hardware decoupling and sharing between physical detection signal acquisition and power grid transient disturbance acquisition.

[0135] The carrier control unit inside the main control system is equipped with a self-calibration calculation module and a compensation parameter vector register. Addressing the physical attenuation and phase shift characteristics of the current transformer secondary side and the front-end analog filter circuit of the multi-channel analog-to-digital converter in the megahertz band, the main control system utilizes a known swept-frequency carrier voltage signal injected within the non-metering blind zone time window as the high-frequency calibration excitation source for the hardware transmission link.

[0136] After the multi-channel analog-to-digital converter routes the acquired high-frequency response current digital sequence to the carrier control unit, the self-calibration calculation module extracts the ideal spectral reference data corresponding to the injection parameters of the current low-power broadband signal generator from the non-volatile memory. The self-calibration calculation module performs a discrete Fourier transform on the actually acquired high-frequency response current digital sequence and performs a complex division operation between its frequency domain components and the ideal spectral reference data to calculate the overall physical sensing link system transfer function, including the current transformer and the analog-to-digital conversion channel.

[0137] The expression for calculating the high-frequency attenuation coefficient of the physical sensing link at a specific frequency point by the self-calibration calculation module is as follows:

[0138] ;

[0139] In the formula, For the calculated independent loops At frequency point The physical sensing link system transfer function at the location; The digital sequence of the actual output current of a multi-channel analog-to-digital converter at a given frequency point Frequency domain transformation value at; To inject an ideal reference signal at a frequency point The frequency domain conversion value at that point.

[0140] Self-calibration calculation module extracts The amplitude and phase parameters are used to generate the attenuation coefficient matrix corresponding to each frequency point, and the attenuation coefficient matrix is ​​written into the compensation parameter vector register through the internal bus of the main control system.

[0141] After the reconstruction unit completes the orthogonal matched tracking reconstruction operation of the transient high-frequency signal and generates the initial recovered high-frequency transient signal vector, the reconstruction unit reads the attenuation coefficient matrix from the compensation parameter vector register through the data interface. Using this attenuation coefficient matrix, the reconstruction unit performs an inverse compensation multiplication operation on the initial recovered high-frequency transient signal vector in the frequency domain.

[0142] After reverse compensation, the reconstructed computing unit offsets the hardware attenuation error caused by the physical sensing link to the high-frequency signal amplitude, and calculates the calibrated high-frequency transient signal vector. This calibrated high-frequency transient signal vector is output to the result output register of the main control system for subsequent power quality analysis or circuit breaker tripping determination.

[0143] Specific application examples:

[0144] In a factory building within a large industrial park, a multi-circuit power metering box based on the architecture of this invention was deployed. The main busbar of this distribution box is connected to 10 independent circuits via connecting wires. These components are connected to external loads such as motor drivers, CNC machine tools, and lighting networks. The main control system uses a microcontroller based on the ARM Cortex-M7 core, and the multi-channel analog-to-digital converter supports a sampling rate of up to 5 MSPS. To accommodate both daily power metering and equipment physical health monitoring, the main control system employs time-division multiplexing scheduling logic.

[0145] During equipment operation, the synchronous metering unit continuously tracks the main bus voltage through a phase-locked loop module. When the system detects that the phase angle of the power frequency voltage (50Hz) has crossed zero, it marks the moment of the fundamental frequency zero-crossing. At this point, the main control system defines a time period of... A millisecond-level non-metering dead zone time window. Upon entering this time window, the low-power wideband signal generator injects a swept-frequency carrier voltage signal with a frequency range of 10kHz to 500kHz into the main bus. The high-frequency response current of the multi-channel analog-to-digital converter synchronously acquires loop 3 (connected to the CNC machine tool). The carrier control unit calculates the frequency of loop 3 at 100kHz using discrete Fourier transform. Complex impedance at point ():

[0146] ;

[0147] Due to recent factory vibrations, the terminals of circuit 3 have experienced slight oxidation and physical loosening, affecting the equivalent complex impedance phase angle. A significant shift has occurred. The carrier control unit calculates the maximum extreme value of the phase drift. Determine based on the formula:

[0148] ;

[0149] The system's preset health margin threshold is .because The feature linkage mapping unit immediately overwrites the physical status register of loop 3 with the degradation warning flag.

[0150] Once marked as a degradation warning, the feature linkage mapping unit automatically performs two linkage operations:

[0151] First, the trigger threshold is dynamically lowered to improve sensitivity to potential arcing or insulation breakdown. This is based on the exponential decay formula:

[0152] ;

[0153] The threshold is lowered so that even a tiny first derivative of the envelope (a sudden change in current) can trigger an external hardware interrupt.

[0154] Second, based on the dictionary selection logic, the optimal sparse dictionary matrix is ​​switched to a non-linear feature base dictionary:

[0155] ;

[0156] Several days later, due to further loosening of the wiring terminals, circuit 3 experienced a microsecond-level high-frequency arcing disturbance. The first derivative of the envelope detection circuit output... It instantly exceeded the threshold after dynamic adjustment. The system immediately sends an interrupt signal to the main control system. The main control system suspends low-frequency metering and enters a transient disturbance sparse sampling state. The multi-channel analog-to-digital converter operates based on a non-uniform random observation matrix. Within a set time window, the transient signal that originally required 500 samples is dimensionality-reduced and truncated, retaining only 60 random discrete points to generate a low-dimensional measurement vector. :

[0157] ;

[0158] Subsequently, the reconstructed computation unit invokes the orthogonal matching pursuit algorithm to perform the optimization solution:

[0159] ;

[0160] Finally, the recovered high-frequency transient signal vector is calculated and generated. The waveform characteristics of the arcing fault were confirmed, and the main control system immediately issued a trip command to the execution component, thus preventing an electrical fire.

[0161] See attached document Figure 6 Figure A (top subfigure): In this subfigure, the thick gray solid line represents the traditional fully sampled signal under ideal conditions. In traditional power frequency metering chips, to capture transient waveforms mixed with exponential decay and high-frequency oscillations (such as a mixture of 5kHz and 20kHz components), a continuous megahertz sampling rate must be used, which greatly consumes CPU bus bandwidth and memory resources. The black solid dots in the figure represent the non-uniform random observation matrix used in this invention under transient disturbance sparse sampling conditions. The actual dimensionality-reduced sparse sampling points (i.e., vectors) generated after hardware dimensionality reduction and truncation As can be seen, the number of sampling points is compressed (the dimensionality reduction rate reaches nearly 90%), and they are distributed randomly and non-uniformly on the time axis, thereby reducing the hardware pressure on data caching and transmission.

[0162] Figure B (lower sub-figure): This sub-figure illustrates the effect of the internal reconstruction operation unit of the main control system. The light gray thick solid line represents the full sampling reference background in Figure A. The pure black thin solid line represents the reconstruction operation unit utilizing the orthogonal matching pursuit algorithm and the configured optimal sparse dictionary matrix. The recovered reconstructed signal (i.e., vector) of the present invention ).

[0163] As can be seen from the comparison, although the amount of data input to the algorithm of this invention is relatively small, with the support of the dictionary base, the reconstructed black waveform almost completely envelops and fits the original gray waveform. Whether in the rapid oscillation of the initial stage or in the exponential decay region of the latter half, the waveform features are reproduced with high fidelity. This verifies the practical feasibility of this invention in capturing high-frequency transient fault signals using low-cost hardware sampling rates.

Claims

1. A multi-circuit power metering box, characterized in that, include: Main bus, independent circuit, multi-channel analog-to-digital converter, low-power broadband signal generator, envelope detection circuit and main control system; The low-power broadband signal generator is coupled to the main bus, and the envelope detection circuit and the multi-channel analog-to-digital converter are connected to each independent circuit. The main control system enters the zero-crossing impedance detection state within the non-metering blind zone time window, controls the micro-power broadband signal generator to inject multi-frequency sweep carrier voltage signals, and calculates the phase angle drift of each independent circuit based on the collected response signals, thereby generating a dynamic trigger threshold. The envelope detection circuit extracts the current envelope voltage signal and outputs an interrupt trigger signal when the first derivative of the current envelope voltage signal exceeds the dynamic trigger threshold. The main control system responds to the interrupt trigger signal and switches to the transient disturbance sparse sampling state, controls the multi-channel analog-to-digital converter to perform dimensionality reduction sampling to generate a low-dimensional measurement vector, and reconstructs the low-dimensional measurement vector based on the orthogonal matching pursuit algorithm to recover transient waveform data.

2. The multi-circuit power metering box according to claim 1, characterized in that, The main control system includes a feature linkage mapping unit and a threshold configuration register; The feature linkage mapping unit extracts the maximum extreme value of the phase angle drift, performs an exponential decay operation based on a preset benchmark trigger threshold and the maximum extreme value to generate the dynamic trigger threshold, and writes the dynamic trigger threshold into the threshold configuration register; The envelope detection circuit is equipped with a hardware comparator. The hardware comparator compares the first derivative with the analog reference level corresponding to the dynamic trigger threshold stored in the threshold configuration register, and then flips and outputs the interrupt trigger signal.

3. A multi-circuit power metering box according to claim 2, characterized in that, The main control system also includes a reconfiguration operation unit, a dictionary selection register, and a non-volatile storage area; The feature linkage mapping unit compares the maximum extreme value with the health margin critical threshold. If the maximum extreme value is greater than the health margin critical threshold, a degradation warning flag is output. The non-volatile storage area includes a first storage sector containing a standard Fourier base dictionary matrix and a second storage sector containing a non-linear feature base dictionary matrix. When the feature linkage mapping unit outputs the degradation warning flag, it writes the starting address of the second storage sector to the dictionary selection register; otherwise, it writes the starting address of the first storage sector. The reconstruction operation unit extracts basis vectors based on the starting address, which serve as the optimal sparse dictionary matrix used by the orthogonal matching pursuit algorithm.

4. A multi-circuit power metering box according to claim 1, characterized in that, The main control system has a non-uniform random observation matrix pre-stored inside, and the number of dimensionality-reduced sampling points of the non-uniform random observation matrix is ​​less than the total number of full sampling points; When the main control system enters the transient disturbance sparse sampling state, it writes the sequence parameters of the non-uniform random observation matrix into the sampling frequency configuration register of the multi-channel analog-to-digital converter, and controls the multi-channel analog-to-digital converter to output a sampling trigger pulse sequence with non-uniform time intervals, thereby reducing the dimensionality of the analog signal of the independent loop to generate the low-dimensional measurement vector.

5. A multi-circuit power metering box according to claim 1, characterized in that, The main control system integrates a hardware direct memory access controller; The target address of the direct memory access controller is configured with a first channel and a second channel; The main control system activates the first channel within the non-metering blind zone time window and routes the collected response signal to the carrier control unit data buffer area. When the main control system receives the interrupt trigger signal outside the non-metering blind zone time window, it shuts down the first channel and activates the second channel, routing the low-dimensional measurement vector to the data buffer of the reconstruction computing unit, thereby realizing time-division multiplexing of the physical acquisition channels.

6. A control system for a multi-loop energy metering box, characterized in that, The multi-loop energy metering box according to any one of claims 1-5 includes the following control logic: Within the non-metrological blind zone time window near the fundamental zero-crossing point, the system switches from steady-state low-frequency metrological state to zero-crossing impedance detection state. Under the zero-crossing impedance detection state, a multi-frequency sweep carrier voltage signal is injected and the phase angle drift of each independent circuit is calculated based on the acquired response signal, thereby generating a dynamic trigger threshold. The current envelope voltage signal of each independent loop is extracted in real time, and an interrupt trigger signal is generated when the first derivative of the current envelope voltage signal exceeds the dynamic trigger threshold. In response to the interrupt trigger signal, the system switches to the transient disturbance sparse sampling state and controls the execution of dimensionality reduction sampling to generate a low-dimensional measurement vector. The low-dimensional measurement vector is processed using an orthogonal matching pursuit algorithm to reconstruct and recover transient waveform data.

7. The control system for a multi-loop energy metering box according to claim 6, characterized in that, The logic for calculating the phase drift of each independent loop based on the acquired response signal includes: Perform a discrete Fourier transform to extract the frequency domain components of the response signal, and calculate the complex impedance phase angle of the independent loop at each detection frequency point; Calculate the algebraic difference between the complex impedance phase angle and the reference healthy phase angle to generate the phase angle drift. The maximum extreme value of the phase angle drift is extracted by traversing the entire frequency band and detecting frequency points.

8. The control system for a multi-loop energy metering box according to claim 7, characterized in that, The logic for generating the dynamic trigger threshold includes: Extract the pre-configured baseline trigger threshold and mapping sensitivity coefficient; Perform an exponential decay operation to multiply the baseline trigger threshold by an exponential function with the natural constant as the base, where the exponent of the exponential function is the negative of the product of the mapping sensitivity coefficient and the maximum extremum, to generate the dynamic trigger threshold that decreases exponentially. The control logic also includes: When the maximum extreme value is greater than the preset health margin critical threshold, a degradation warning flag is output, thereby triggering a forced mapping switch of the sparse dictionary matrix.

9. The control system for a multi-loop energy metering box according to claim 6, characterized in that, The logic for processing the low-dimensional measurement vector based on the orthogonal matching pursuit algorithm includes: Obtain the optimal sparse dictionary matrix and non-uniform random observation matrix of the current configuration; An observation equation is established to link the low-dimensional measurement vector, the non-uniform random observation matrix, the optimal sparse dictionary matrix, and the sparse coefficient vector to be solved. Solve the optimization problem with the objective function of minimizing the number of non-zero elements in the sparse coefficient vector to be solved, and output the estimated sparse coefficient vector; Perform a dot product operation between the optimal sparse dictionary matrix and the estimated sparse coefficient vector to generate the transient waveform data.

10. The control system for a multi-loop energy metering box according to claim 9, characterized in that, The control logic also includes a transmission channel compensation step: Extract the ideal spectral reference data of the multi-frequency swept carrier voltage signal, perform complex division operation between it and the frequency domain component of the actual response signal, and calculate the system transfer function of the physical sensing link; Extract the parameters of the system transfer function to generate an attenuation coefficient matrix; After generating the transient waveform data, the attenuation coefficient matrix is ​​used to perform an inverse compensation multiplication operation on the transient waveform data in the frequency domain to output the calibrated waveform data.

Images