Adaptive power direction latching method, system, and program product
Patent Information
- Application Number
- CN202611318102.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-27
- Publication Date
- 2026-10-27
AI Technical Summary
[0004]本申请实施例提供了一种自适应功率方向闭锁方法、系统和程序产品,旨在解决现有技术中因采用单一固定算法而无法兼顾稳态测量精度和暂态抗干扰能力,且在系统频率大幅偏移时易产生计算误差,从而可能导致功率方向误判的技术问题
[0017]本申请实施例,通过实时跟踪系统频率,动态调整计算窗长并对采样值进行相位校正,输出与实时频率同步的同步采样序列,减轻了因系统频率偏移导致的计算误差,提高了在系统频率变化范围内的计算准确性。通过基于频率变化率和功率变化率的双参量联合判据,识别系统的稳态模式和暂态模式,为后续自适应选择与当前工况对应的方向算法提供了依据。基于与当前工况对应的方向算法、同步采样序列及对应窗长确定功率方向,并根据功率方向生成功率方向闭锁信号,使得在暂态过程和稳态工况下均能获得匹配的功率方向判别结果,提升了功率方向判别的准确性和可靠性。
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Figure CN122992813A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of power system relay protection technology, and in particular relates to an adaptive power direction blocking method, system and program product. Background Technology
[0002] With the large-scale integration of distributed photovoltaic, wind power, and other new energy sources into the distribution network, the traditional unidirectional power flow distribution network is transforming into a bidirectional, multi-source network. Low-frequency load shedding serves as a defense against frequency collapse in the power system. If active lines are disconnected, the power deficit will be exacerbated; therefore, a power direction blocking function is required.
[0003] Existing power direction blocking methods for low-frequency load shedding employ a single algorithm. During transient processes, DC offset and harmonic components in the electrical signal cause non-fundamental components to be included in the fundamental component of the power direction calculation, leading to misjudgment of direction. Under steady-state conditions, the attenuation of aperiodic components within a short data window is incomplete, resulting in errors in the calculation of power direction characteristics. Furthermore, during low-frequency load shedding, the system frequency deviates from the rated value, the actual time length corresponding to the fixed data window length deviates from the true electrical cycle, and there is a deviation between the phase reference of the voltage and current sample values and the true phase. Summary of the Invention
[0004] This application provides an adaptive power direction blocking method, system, and program product, which aims to solve the technical problem in the prior art that the use of a single fixed algorithm cannot simultaneously ensure steady-state measurement accuracy and transient anti-interference capability, and is prone to calculation errors when the system frequency shifts significantly, which may lead to misjudgment of power direction.
[0005] In a first aspect, embodiments of this application provide an adaptive power direction blocking method, the method comprising: Acquire the system frequency, voltage sample values, and current sample values of the power system; The steady-state calculation window length and transient calculation window length are adjusted based on the system frequency, and the voltage sample value and the current sample value are phase-corrected based on the system frequency to output a synchronous sampling sequence; The system power of the power system is determined based on the synchronous sampling sequence; The current operating condition of the power system is determined based on the rate of change of the system frequency and the rate of change of the system power. Determine the direction algorithm corresponding to the current working condition; The power direction is determined based on the directional algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state or transient calculation window length corresponding to the current operating condition. A power direction blocking signal is generated based on the power direction.
[0006] In one possible implementation of the first aspect, adjusting the steady-state calculation window length and the transient calculation window length based on the system frequency includes: Obtain the number of full-cycle reference sampling points at the rated frequency; The steady-state calculation window length is obtained by multiplying the number of full-cycle reference sampling points at the rated frequency by the ratio of the rated frequency to the system frequency and then rounding it down. The transient calculation window length is obtained by multiplying the number of full-cycle reference sampling points at the rated frequency by the ratio of the rated frequency to twice the system frequency and then rounding the result.
[0007] In one possible implementation of the first aspect, the step of performing phase correction on the voltage sample value and the current sample value based on the system frequency to output a synchronous sampling sequence includes: Based on the system frequency, the first phase offset of each sampling point of the voltage sample value and the second phase offset of each sampling point of the current sample value are determined respectively. Based on the first phase offset, each sampling point of the voltage sample value is interpolated and resampled to obtain the corrected voltage sample value; Based on the second phase offset, each sampling point of the current sampling value is interpolated and resampled to obtain the corrected current sampling value; The synchronous sampling sequence is composed of the corrected voltage sample value and the corrected current sample value.
[0008] In one possible implementation of the first aspect, determining the current operating condition of the power system based on the frequency change rate of the system frequency and the power change rate of the system power includes: The frequency of the system is differentially divided to determine the rate of frequency change; The power of the system is differentially divided to determine the rate of change of power; When the absolute value of the frequency change rate is greater than or equal to the second frequency change rate threshold, the current operating condition is determined to be a transient mode. When the absolute value of the frequency change rate is greater than or equal to the first frequency change rate threshold and less than the second frequency change rate threshold, if the absolute value of the power change rate is greater than or equal to the first power change rate threshold, the current operating condition is determined to be a transient mode; if the absolute value of the power change rate is less than the first power change rate threshold, the current operating condition is determined to be a steady-state mode. When the absolute value of the frequency change rate is less than the first frequency change rate threshold, if the absolute value of the power change rate is greater than or equal to the second power change rate threshold, the current operating condition is determined to be a transient mode; if the absolute value of the power change rate is less than the second power change rate threshold, the current operating condition is determined to be a steady-state mode. Wherein, the first frequency change rate threshold is less than the second frequency change rate threshold, and the first power change rate threshold is less than the second power change rate threshold.
[0009] In one possible implementation of the first aspect, the algorithm for determining the direction corresponding to the current operating condition includes: When the current operating condition is the steady-state mode, the corresponding direction determination algorithm is the full-cycle Fourier algorithm; When the current operating condition is the transient mode, the corresponding direction algorithm is determined to be the half-cycle integral algorithm.
[0010] In one possible implementation of the first aspect, determining the power direction based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state calculation window length or transient calculation window length corresponding to the current operating condition includes: When the current operating condition is the steady-state mode, the power of the synchronous sampling sequence is calculated based on the full-cycle Fourier algorithm and the steady-state calculation window length to obtain the fundamental positive sequence active power. The power direction is determined based on the sign of the fundamental positive sequence active power; When the current operating condition is the transient mode, the power of the synchronous sampling sequence is calculated based on the half-cycle integral algorithm and the transient calculation window length to obtain the integral feature quantity; The power direction is determined based on the sign of the integral characteristic.
[0011] In one possible implementation of the first aspect, generating a power direction blocking signal based on the power direction includes: Determine the power characteristic quantity corresponding to the power direction; The power characteristic is compared with the forward power threshold and the reverse power threshold; When the power characteristic is greater than or equal to the positive power threshold, it is determined to be positive power, and all rounds of low-frequency load shedding are enabled. When the power characteristic value is greater than the negative value of the reverse power threshold and less than the positive power threshold, it is determined to be a power dead zone, a warning signal is output, and the low-frequency load reduction base wheel is opened. When the power characteristic is less than or equal to the negative value of the reverse power threshold, it is determined to be reverse power, and the low-frequency load reduction output is blocked.
[0012] In one possible implementation of the first aspect, the method further includes: When an abnormal voltage or current sampling value is detected, the transient mode is exited and the full-cycle Fourier algorithm is used.
[0013] Secondly, embodiments of this application provide an adaptive power direction locking system, comprising: The acquisition module is used to acquire the system frequency, voltage sample value, and current sample value of the power system. The adjustment module is used to adjust the steady-state calculation window length and the transient calculation window length based on the system frequency, and to perform phase correction on the voltage sample value and the current sample value based on the system frequency, and output a synchronous sampling sequence; A power determination module is used to determine the system power of the power system based on the synchronous sampling sequence; The operating condition determination module is used to determine the current operating condition of the power system based on the frequency change rate of the system frequency and the power change rate of the system power. The direction algorithm determination module is used to determine the direction algorithm corresponding to the current working condition; The power direction module is used to determine the power direction based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state calculation window length or transient calculation window length corresponding to the current operating condition. The generation module is used to generate a power direction blocking signal based on the power direction.
[0014] Thirdly, embodiments of this application provide a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the adaptive power direction blocking method described in any one of the first aspects above.
[0015] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the adaptive power direction blocking method described in any one of the first aspects above.
[0016] Fifthly, embodiments of this application provide a computer program product that, when run on a computer device, causes the computer device to execute the adaptive power direction blocking method described in any of the first aspects above.
[0017] In this embodiment, by real-time tracking of the system frequency, dynamically adjusting the calculation window length, and performing phase correction on the sampled values, a synchronous sampling sequence synchronized with the real-time frequency is output. This reduces calculation errors caused by system frequency offset and improves calculation accuracy within the system frequency variation range. By using a dual-parameter joint criterion based on the frequency change rate and power change rate, the steady-state and transient modes of the system are identified, providing a basis for subsequent adaptive selection of the direction algorithm corresponding to the current operating condition. Based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the corresponding window length, the power direction is determined, and a power direction blocking signal is generated according to the power direction. This ensures that matching power direction discrimination results can be obtained under both transient and steady-state conditions, improving the accuracy and reliability of power direction discrimination.
[0018] It is understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a schematic flowchart of an embodiment of the adaptive power direction blocking method provided in this application; Figure 2 This is a schematic diagram of the adaptive power direction blocking system provided in the embodiments of this application; Figure 3 This is a schematic diagram of the structure of the computer device provided in the embodiments of this application. Detailed Implementation
[0021] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0022] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.
[0023] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0024] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."
[0025] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0026] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0027] Figure 1 A schematic flowchart of an adaptive power direction blocking method provided in an embodiment of this application is shown.
[0028] S101 acquires the system frequency, voltage sample value, and current sample value of the power system.
[0029] The system frequency refers to the current real-time AC voltage frequency value of the power system.
[0030] Voltage sample values refer to the discrete digital sequence obtained after analog-to-digital conversion of the three-phase voltage of the controlled line.
[0031] Current sampling value refers to the discrete digital sequence obtained after analog-to-digital conversion of the three-phase current of the controlled line.
[0032] In this embodiment of the application, by acquiring system frequency, voltage sampling values and current sampling values, the original data basis is provided for subsequent frequency tracking, phase correction and power calculation.
[0033] S102, adjust the steady-state calculation window length and transient calculation window length based on the system frequency, and perform phase correction on the voltage sample value and the current sample value based on the system frequency to output a synchronous sampling sequence.
[0034] The steady-state calculation window length refers to the number of sampling points included in the data window used for the full-cycle Fourier algorithm in steady-state mode. This window length is dynamically adjusted according to the real-time system frequency to ensure that the data window accurately covers a complete electrical cycle in terms of time length.
[0035] The transient calculation window length refers to the number of sampling points contained in the data window used for the half-cycle integral algorithm in transient mode. This window length is dynamically adjusted according to the real-time system frequency to ensure that the data window accurately covers half an electrical cycle in terms of time length.
[0036] Synchronous sampling sequence refers to the sampling sequence output after the original voltage and current sampling value sequences have undergone phase correction processing based on the real-time system frequency. The position of each sampling point in this sequence on the time axis is electrically aligned with the real-time power grid frequency waveform.
[0037] In this embodiment, the analysis window is aligned with the actual electrical cycle by dynamically adjusting the calculation window length; and the sampling point is located at the corresponding electrical angle by phase correction, providing input data synchronized with the real-time frequency for subsequent power direction calculation.
[0038] In an optional embodiment, adjusting the steady-state calculation window length and the transient calculation window length based on the system frequency in step S102 includes: Step a1: Obtain the number of full-cycle reference sampling points at the rated frequency.
[0039] The number of full-cycle reference sampling points at rated frequency refers to the number of preset sampling points within a complete electrical cycle when the system frequency is the rated frequency. This number is determined by the sampling rate of the device.
[0040] In this embodiment, the reference number of sampling points at the rated frequency is obtained to provide a reference for the subsequent dynamic calculation of the window length based on the real-time frequency.
[0041] Step a2: Multiply the number of full-cycle reference sampling points at the rated frequency by the ratio of the rated frequency to the system frequency and round down to obtain the steady-state calculation window length.
[0042] in, , This represents the length of the steady-state calculation window, in points. This indicates the number of full-cycle reference sampling points at the rated frequency, expressed in points. This indicates the system's rated frequency, measured in Hertz (Hz). This indicates the system's real-time frequency, measured in Hertz (Hz). This indicates the rounding operation.
[0043] In this embodiment, the steady-state calculation window length is made to expand and contract in the opposite direction to the system frequency through proportional calculation, so that the calculation window corresponds to a complete electrical cycle in terms of time length.
[0044] Step a3: Multiply the number of full-cycle reference sampling points at the rated frequency by the ratio of the rated frequency to twice the system frequency, and round down to obtain the transient calculation window length.
[0045] in, , This indicates the length of the transient calculation window, in points. This indicates the number of reference sampling points for the full cycle at the rated frequency; Indicates the system's rated frequency; This indicates the system's real-time frequency.
[0046] In this embodiment, the transient calculation window length is made to expand and contract in the opposite direction to the system frequency through proportional calculation, so that the calculation window corresponds to half an electrical cycle in terms of time length.
[0047] In an optional embodiment, step S102 involves performing phase correction on the voltage and current sample values based on the system frequency and outputting a synchronous sampling sequence, including: Step b1: Based on the system frequency, determine the first phase offset of each sampling point of the voltage sample value and the second phase offset of each sampling point of the current sample value.
[0048] The first phase offset refers to the deviation of the original sampling time of each sampling point in the voltage sample value from the ideal electrical angle corresponding to the real-time system frequency at that time.
[0049] The second phase offset refers to the deviation of the original sampling time of each sampling point in the current sample value from the ideal electrical angle corresponding to the real-time system frequency at that time.
[0050] In this embodiment of the application, the phase offset of each sampling point is calculated to provide a parameter basis for phase correction for subsequent interpolation and resampling.
[0051] Step b2: Interpolate and resample each sampling point of the voltage sample value according to the first phase offset to obtain the corrected voltage sample value.
[0052] The interpolation resampling process employs Lagrange interpolation, constructing a Lagrange interpolation polynomial using several original sampling points near the point to be interpolated, and calculating the function value at the point to be interpolated. The interpolation order is second-order, meaning that interpolation is performed using three points: one before and one after the point to be interpolated.
[0053] In this embodiment, a continuous function is constructed between the original sampling points by interpolation resampling and the voltage value at the ideal synchronization moment is recalculated to eliminate the voltage sampling phase deviation caused by frequency offset.
[0054] Step b3: Interpolate and resample each sampling point of the current sample value according to the second phase offset to obtain the corrected current sample value.
[0055] In this embodiment, a continuous function is constructed between the original sampling points by interpolation resampling and the current value at the ideal synchronization moment is recalculated to eliminate the current sampling phase deviation caused by frequency offset.
[0056] Step b4: The corrected voltage sample value and the corrected current sample value constitute the synchronous sampling sequence.
[0057] In this embodiment, the corrected voltage sample value and the corrected current sample value are combined into a synchronous sampling sequence, which serves as a unified data basis for subsequent power calculation, operating condition identification and direction determination.
[0058] In one specific embodiment of this application, the system frequency is obtained through a software phase-locked loop (PLL). The PLL employs a synchronous rotating coordinate system-based PLL (SRF-PLL), which converts the three-phase voltage into αβ components in a stationary coordinate system via Clark transform, and then into dq components in a rotating coordinate system via Park transform. The q-axis component is controlled to zero by a PI controller in a closed loop. The real-time system phase is obtained by integrating the output of the PI controller, and thus the real-time system frequency is output. Alternatively, a phase-locked loop based on a second-order generalized integrator (SOGI-PLL) can be used. This constructs an orthogonal signal of the input voltage using a second-order generalized integrator, and after positive and negative sequence separation, the system frequency is output through a closed-loop PLL. The device's rated sampling frequency is 24 points per cycle (corresponding to a sampling rate of 1200Hz), and the system's rated frequency is 50Hz. The effective operating range of the PLL covers 45Hz to 55Hz, with a frequency measurement error of no more than 0.01Hz across the entire frequency band. Assuming the system frequency drops to 47Hz, the steady-state calculation window length is adjusted to round(24×50 / 47)=26 points, and the transient calculation window length is adjusted to round(12×50 / 47)=13 points; assuming the system frequency rises to 52Hz, the steady-state calculation window length is adjusted to round(24×50 / 52)=23 points, and the transient calculation window length is adjusted to round(12×50 / 52)=12 points. After correction, the phase calculation error across the entire frequency band from 45Hz to 55Hz is no greater than 0.5°.
[0059] S103, determine the system power of the power system based on the synchronous sampling sequence.
[0060] System power refers to the active power transmitted by the controlled lines of the power system at the current moment.
[0061] In this embodiment, the system power is calculated based on the synchronous sampling sequence, providing a data source for the subsequent calculation of the power change rate.
[0062] S104, Based on the frequency change rate of the system frequency and the power change rate of the system power, determine the current operating condition of the power system.
[0063] The frequency change rate refers to the change in system frequency per unit time, and is used to characterize the degree of dynamic change in system frequency.
[0064] The power change rate refers to the change in system power per unit time, and is used to characterize the degree of dynamic change in system power.
[0065] Current operating condition refers to the classification result of the current operating state of the power system, including steady-state mode and transient mode. Steady-state mode refers to the power system in a state of normal operation or slow change, where the rate of change of system frequency and active power are both below preset thresholds, and no significant electrical disturbances occur. Transient mode refers to the non-steady-state operating state of the power system caused by events such as line faults, large load switching, or generator disconnection, resulting in rapid changes in system frequency or active power.
[0066] In this embodiment, the current operating condition is determined by combining dynamic indicators of two dimensions: frequency change rate and power change rate, providing a decision-making basis for the selection of subsequent adaptive algorithms.
[0067] In an optional embodiment, S104 determines the current operating condition of the power system based on the frequency change rate of the system frequency and the power change rate of the system power, including: Step c1: Differentiate the system frequency to determine the frequency change rate.
[0068] The frequency change rate is calculated using a first-order central difference, where the difference window is the time interval between two adjacent sampling points. , The sampling interval is denoted as .
[0069] In this embodiment of the application, the frequency change rate is obtained by performing a differential operation on the system frequency sequence to quantify the degree of dynamic frequency change.
[0070] Step c2: Differentiate the system power to determine the power change rate.
[0071] The power change rate is calculated using a first-order central difference method, where the difference window is the time interval between two adjacent sampling points. , The sampling interval is denoted as .
[0072] In this embodiment of the application, the power change rate is obtained by performing a differential operation on the system power sequence to quantify the degree of dynamic change of power.
[0073] Step c3: When the absolute value of the frequency change rate is greater than or equal to the second frequency change rate threshold, the current operating condition is determined to be a transient mode.
[0074] The second frequency change rate threshold is a preset frequency change rate boundary value. When the absolute value of the frequency change rate reaches or exceeds this value, it indicates that the system has experienced a frequency disturbance.
[0075] In this embodiment of the application, by setting a second frequency change rate threshold, the system can trigger transient mode determination when frequency disturbance occurs.
[0076] Step c4: When the absolute value of the frequency change rate is greater than or equal to the first frequency change rate threshold and less than the second frequency change rate threshold, if the absolute value of the power change rate is greater than or equal to the first power change rate threshold, the current operating condition is determined to be a transient mode; if the absolute value of the power change rate is less than the first power change rate threshold, the current operating condition is determined to be a steady-state mode.
[0077] The first frequency change rate threshold is a preset frequency change rate boundary value, which is less than the second frequency change rate threshold, and is used to define the range where the frequency change is at a moderate level. The first power change rate threshold is a preset power change rate boundary value, which is used to help determine whether the power change has reached this threshold when the frequency change is at a moderate level.
[0078] In this embodiment of the application, when the frequency change rate is in a moderate range, the power change rate is introduced as an auxiliary criterion to avoid mode misjudgment caused by relying solely on a single frequency index in the critical region.
[0079] Step c5: When the absolute value of the frequency change rate is less than the first frequency change rate threshold, if the absolute value of the power change rate is greater than or equal to the second power change rate threshold, the current operating condition is determined to be a transient mode; if the absolute value of the power change rate is less than the second power change rate threshold, the current operating condition is determined to be a steady-state mode.
[0080] The second power change rate threshold is a preset power change rate boundary value, which is greater than the first power change rate threshold. It is used to determine whether the power change is sufficient to trigger a transient mode when the system frequency is basically stable.
[0081] In this embodiment of the application, when the frequency change rate is at a low level, it is determined to be a transient mode only when the power change rate reaches the second power change rate threshold.
[0082] Wherein, the first frequency change rate threshold is less than the second frequency change rate threshold, and the first power change rate threshold is less than the second power change rate threshold.
[0083] In this embodiment of the application, a gradient judgment logic is formed by setting two levels of thresholds to achieve matching of perturbations of different severity with different judgment rules.
[0084] In one specific embodiment of this application, the first frequency change rate threshold is set to 0.5 Hz / s, and the second frequency change rate threshold is set to 3 Hz / s. The first power change rate threshold is set to 0.1 times the line's rated active power per second, and the second power change rate threshold is set to 0.5 times the line's rated active power per second. The first and second frequency change rate thresholds are set based on the maximum frequency change rate during normal operation of the power system. Under normal operating conditions, the system frequency change rate typically does not exceed 0.5 Hz / s, therefore the first frequency change rate threshold is set to 0.5 Hz / s; however, the frequency change rate caused by severe disturbances such as unit tripping or large load changes typically exceeds 3 Hz / s, therefore the second frequency change rate threshold is set to 3 Hz / s. The first and second power change rate thresholds are set based on the normal load fluctuation range of the controlled line. Under normal operating conditions, the power change rate caused by load fluctuations usually does not exceed 0.1 times the rated power per second, so the first power change rate threshold is set to 0.1 times the rated power per second. When severe disturbances such as large load switching occur, the power change rate usually exceeds 0.5 times the rated power per second, so the second power change rate threshold is set to 0.5 times the rated power per second. A 20ms anti-jitter delay is set for the judgment result. After the operating condition is switched, the new operating condition must be met for more than 20ms before the mode flag can be officially updated.
[0085] S105, determine the direction algorithm corresponding to the current working condition.
[0086] Among them, the direction algorithm refers to the specific calculation method used to calculate the power direction.
[0087] In this embodiment of the application, the corresponding directional algorithm is selected according to the current operating conditions to provide a calculation method that matches the operating conditions for subsequent power direction calculation.
[0088] In one optional embodiment, S105 determines the direction algorithm corresponding to the current operating condition, specifically including: when the current operating condition is the steady-state mode, determining the corresponding direction algorithm as the full-cycle Fourier algorithm; when the current operating condition is the transient mode, determining the corresponding direction algorithm as the half-cycle integral algorithm.
[0089] Among them, the full-cycle Fourier algorithm refers to the calculation method of extracting the fundamental component by performing Fourier decomposition on the sampled data of a complete electrical cycle.
[0090] The half-cycle integral algorithm is a calculation method that uses sampled data from half an electrical cycle to perform instantaneous power integration in order to extract the characteristic quantity of energy flow direction.
[0091] In this embodiment, by matching the full-cycle Fourier algorithm and the half-cycle integral algorithm to the steady-state mode and the transient mode respectively, a differentiated strategy is achieved, which prioritizes high-precision calculation in the steady state and fast response and anti-interference in the transient state.
[0092] S106, determine the power direction based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state calculation window length or transient calculation window length corresponding to the current operating condition.
[0093] Among them, power direction refers to the direction of active power flow in the controlled line, including forward power and reverse power.
[0094] In the embodiments of this application, the power direction is calculated using an algorithm, data window length, and a corrected synchronous sampling sequence that match the current operating conditions.
[0095] In an optional embodiment, S106 determines the power direction based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state calculation window length or transient calculation window length corresponding to the current operating condition, specifically including: Step d1: When the current operating condition is the steady-state mode, power calculation is performed on the synchronous sampling sequence based on the full-cycle Fourier algorithm and the steady-state calculation window length to obtain the fundamental positive sequence active power.
[0096] The fundamental positive-sequence active power refers to the active power value of the fundamental positive-sequence component extracted after decomposing the synchronously sampled sequence within the steady-state calculation window using the full-cycle Fourier algorithm. The formula for calculating the fundamental positive-sequence active power is as follows: ,in, This represents the fundamental positive sequence active power, measured in watts. This represents the fundamental positive-sequence voltage phasor, with units of volts. The conjugate of the fundamental positive sequence current phasor is expressed in amperes. This indicates the operation of extracting the real part. The method for extracting the fundamental positive sequence component is as follows: perform full-cycle Fourier transform on the three-phase voltage and three-phase current respectively, extract the fundamental component of each phase, and then convert the three-phase fundamental components into positive sequence components through the symmetrical component method.
[0097] In this embodiment, the fundamental positive sequence active power is calculated using the full-cycle Fourier algorithm in steady-state mode, and the power measurement results are obtained by utilizing the filtering characteristics of the full-cycle data window of the algorithm.
[0098] Step d2: Determine the power direction based on the sign of the fundamental positive sequence active power.
[0099] In the embodiments of this application, when the fundamental positive sequence active power is positive, it is determined to be positive power, and when the fundamental positive sequence active power is negative, it is determined to be reverse power.
[0100] Step d3: When the current operating condition is the transient mode, power calculation is performed on the synchronous sampling sequence based on the half-cycle integral algorithm and the transient calculation window length to obtain the integral feature quantity.
[0101] The integral characteristic is a value obtained by integrating the instantaneous power of the synchronously sampled sequence within the transient calculation window, and its unit is joules. The sign of this value reflects the direction of energy flow in the system during the transient process.
[0102] In this embodiment, a half-cycle integral algorithm is used to calculate integral characteristic quantities in transient mode. The algorithm's fast response characteristics with a short data window are utilized to obtain the basis for determining the power direction during periods of severe system disturbance.
[0103] Step d4: Determine the power direction based on the sign of the integral characteristic quantity.
[0104] In the embodiments of this application, when the integral characteristic is positive, it is determined to be positive power, and when the integral characteristic is negative, it is determined to be reverse power.
[0105] In one optional embodiment, step d3 specifically includes: Step e1: Determine the period corresponding to the system frequency.
[0106] In this embodiment of the application, the corresponding electrical cycle is calculated based on the real-time system frequency to provide a basis for determining the time length of half a cycle.
[0107] Step e2: Taking the voltage zero-crossing point as the starting time of integration, perform instantaneous power integration of half a cycle on the synchronous sampling sequence to obtain the integral characteristic quantity.
[0108] The voltage zero-crossing point refers to the moment when the AC voltage waveform crosses zero. This moment is a phase reference point that can be repeatedly detected within each electrical cycle. The method for detecting the voltage zero-crossing point is as follows: monitor the sign change of the voltage sample value. When the sign of the voltage value of two adjacent sample points changes from positive to negative or from negative to positive, it is determined that there is a zero-crossing point between the two sample points. The precise moment of the zero-crossing point is determined by linear interpolation.
[0109] In this embodiment of the application, by taking the voltage zero-crossing point as the starting time of integration, a starting reference is provided for the half-cycle integration, thereby reducing the error introduced by the DC component and non-periodic component in the transient signal on the integration result.
[0110] S107, Generate a power direction blocking signal according to the power direction.
[0111] Among them, the power direction blocking signal refers to the control command generated based on the power direction determination result, which is used to control whether the low-frequency load shedding protection device is allowed to output.
[0112] Low-frequency load shedding refers to protective measures that restore system frequency stability by disconnecting a portion of the load when the power system frequency falls below a set threshold. Low-frequency load shedding protection devices are relay protection equipment used to perform low-frequency load shedding functions. Low-frequency load shedding cycles refer to the various action levels of the low-frequency load shedding device, segmented by frequency, including all cycles and the basic cycle.
[0113] In this embodiment, the power direction determination result is converted into a control command for the low-frequency load shedding protection device to achieve the direction locking function.
[0114] In an optional embodiment, S107 generates a power direction blocking signal based on the power direction, specifically including: Step f1: Determine the power characteristic quantity corresponding to the power direction.
[0115] Here, the power characteristic quantity refers to the specific numerical value used to characterize the magnitude and direction of power under the current operating condition. In steady-state mode, the power characteristic quantity is the fundamental positive-sequence active power. In transient mode, the power characteristic quantity is the integral characteristic quantity.
[0116] In this embodiment of the application, the different physical quantities calculated under different modes are unified as power characteristic quantities, providing a unified comparison object for subsequent hierarchical blocking logic.
[0117] Step f2: Compare the power characteristic quantity with the forward power threshold and the reverse power threshold.
[0118] Among them, the forward power threshold is a preset positive active power boundary value used to determine whether the power direction is clearly positive.
[0119] The reverse power threshold is a preset boundary value of the absolute value of reverse active power, used to determine whether the power direction is clearly reversed.
[0120] In this embodiment, the power characteristic quantity is compared with the positive and negative power thresholds to provide a basis for the three-level blocking output.
[0121] Step f3: When the power characteristic quantity is greater than or equal to the positive power threshold, it is determined to be positive power, and all rounds of low-frequency load shedding are enabled.
[0122] In the embodiments of this application, when it is determined to be clear positive power, it indicates that the controlled line is absorbing active power from the main grid and opening all low-frequency load shedding cycles.
[0123] Step f4: When the power characteristic value is greater than the negative value of the reverse power threshold and less than the positive power threshold, it is determined to be a power dead zone, an early warning signal is output, and the low-frequency load reduction base wheel is opened.
[0124] Among them, the power dead zone refers to a range in which the absolute value of the power characteristic quantity is less than a preset threshold, and the power direction is considered to be unclear or unreliable within this range.
[0125] In this embodiment, by setting a power dead zone, when the power is close to zero, it is neither determined to be positive nor negative, but only the basic cycle is opened and an early warning is issued, so as to avoid the frequent switching of the latching logic between opening and latching due to measurement noise or small fluctuations.
[0126] Step f5: When the power characteristic is less than or equal to the negative value of the reverse power threshold, it is determined to be reverse power, and the low-frequency load reduction output is blocked.
[0127] In this embodiment of the application, when it is determined to be clear reverse power, it indicates that the controlled line is sending active power to the grid, and the low-frequency load shedding output is blocked.
[0128] In one specific embodiment of this application, the forward power threshold is set according to the rated power of the controlled line, and is exemplarily taken as 0.05 times the rated power; the absolute value of the reverse power threshold is set according to the minimum load power of the controlled line, and is exemplarily taken as 20% of the minimum load power, so that the dead zone range covers the uncertain range below the minimum operating power of the line.
[0129] In an optional embodiment, the method further includes: When an abnormal voltage or current sampling value is detected, the transient mode is exited and the full-cycle Fourier algorithm is used.
[0130] In this embodiment, when the sampled value is abnormal, the transient mode is forcibly exited and the full-cycle Fourier algorithm is fixedly used. The long data window and filtering characteristics of the full-cycle Fourier algorithm are used to reduce the interference of abnormal sampling points on direction discrimination.
[0131] In an optional embodiment, the step of exiting the transient mode and fixing the full-cycle Fourier algorithm when an abnormal voltage sampling value or an abnormal current sampling value is detected includes: Step g1: When a PT disconnection, CT disconnection, or abnormal sampling value is detected, exit the transient mode and fix the full-cycle Fourier algorithm.
[0132] In this context, "PT disconnection" refers to a situation where a disconnection occurs in the voltage transformer circuit, resulting in abnormal voltage sampling values. "CT disconnection" refers to a situation where a disconnection occurs in the current transformer circuit, resulting in abnormal current sampling values.
[0133] The detection criteria for PT (Potential Transmission Unit) disconnection are: the voltage amplitude of any one of the three phases is lower than 10% of the rated voltage for a duration exceeding 100ms, and the current of that phase is not zero or the voltage difference between that phase and the other two phases exceeds a threshold. Rated voltage refers to the nominal operating voltage value of the controlled circuit.
[0134] The detection criteria for a CT (current transformer) disconnection are: the amplitude of any one phase current is less than 5% of the rated current for more than 100ms, and the voltage of that phase is not zero, or the difference between the current of that phase and the current of the other two phases exceeds a threshold. Rated current refers to the nominal operating current value of the controlled circuit.
[0135] The detection criteria for abnormal sampling values are: the voltage or current sampling value exceeds the preset effective range, or the sampling value shows abnormal characteristics such as continuous invariance or jump amplitude exceeding 50% of the rated value.
[0136] In this embodiment of the application, when a sensor malfunction is detected, the algorithm is switched to the more robust full-cycle Fourier algorithm.
[0137] Step g2: Multiply the absolute values of the forward power threshold and the reverse power threshold by K, where K is greater than 1 and K is an adjustable coefficient.
[0138] Where K is the downgrade processing coefficient, which is dimensionless and has a value greater than 1.
[0139] In this embodiment, the discrimination threshold is raised by multiplying the forward and reverse power thresholds by a coefficient K greater than 1, thereby reducing the direction discrimination sensitivity under abnormal sampling data.
[0140] Step g3: Generate a sampling anomaly alarm signal.
[0141] In this embodiment, an alarm signal is generated to notify maintenance personnel to handle sampling anomalies.
[0142] Step g4: Lock the forced opening function of direction discrimination, retain the protection logic without direction discrimination, and send the sampling abnormality alarm signal.
[0143] In this embodiment of the application, the forced opening function of blocking direction determination during sampling anomalies only retains the basic protection logic that does not depend on the power direction.
[0144] Step g5: After the anomaly disappears, restore the dual-mode operation mode after a delay.
[0145] Among them, the dual-mode operation mode refers to an adaptive operation mode that simultaneously includes steady-state mode and transient mode.
[0146] In this embodiment of the application, after the anomaly disappears, the system is confirmed to have returned to normal after a delay, and then the dual-mode adaptive operation mode is automatically restored.
[0147] In one specific embodiment of this application, the adjustable coefficient K is exemplarily set to 2. The dual-mode operation mode is automatically restored after a 10-second delay following the disappearance of the anomaly.
[0148] In an optional embodiment, the method further includes: Step h1: When the low-frequency load shedding protection device is activated and enters the action delay stage, the current power direction state is latched, and the power direction blocking signal is maintained based on the latched power direction state.
[0149] The action delay phase refers to the waiting period between when the low-frequency load shedding protection device detects that the frequency is lower than the start value and when it issues a trip output.
[0150] In this embodiment of the application, the consistency of decision-making during the delay period is ensured by latching the power direction state.
[0151] Step h2, during the action delay phase, the low-frequency load shedding protection device does not respond to changes in power direction state.
[0152] In this embodiment, changes in the external power direction state are shielded during the action delay phase to prevent the latching logic from repeatedly flipping during the delay period due to system transient fluctuations.
[0153] Step h3: After the load reduction action is completed, the low-frequency load reduction protection device updates the power direction status and restores the mode switching function.
[0154] In this embodiment of the application, the direction status is updated and the mode switching function is restored after the current load reduction action is completed, so as to prepare direction information for subsequent load reduction actions.
[0155] For ease of understanding, in a specific embodiment of this application, it is assumed that in a 10kV distribution network containing distributed photovoltaic power stations, at a certain moment, due to a fault in the remote main grid, the local grid frequency drops from 50Hz and is accompanied by power oscillation.
[0156] In the initial stage of the disturbance (0 to 20 ms), it is assumed that the system frequency begins to decrease, and the rate of frequency change exceeds the second frequency change threshold (the threshold is 3 Hz / s for example). The data acquisition unit collects voltage and current signals, and the frequency tracking and phase correction unit detects the frequency change and outputs the system frequency and the rate of frequency change in real time. At the same time, this unit dynamically adjusts the calculation window length according to the formula and performs Lagrange interpolation resampling on the sampled values to output a synchronous sampling sequence.
[0157] During the operating condition identification and mode switching phase (20 to 30 ms), the operating condition identification unit acquires the absolute value of the frequency change rate. Based on the first rule of the dual-parameter criterion (the absolute value of the frequency change rate is greater than or equal to the second frequency change rate threshold), the current operating condition is determined to be a transient mode. This mode flag, through the mode adaptive switching unit, disables the steady-state direction calculation unit and activates the transient direction calculation unit.
[0158] During the transient power direction calculation phase (30 to 40 ms), the activated transient direction calculation unit uses the voltage zero-crossing point as the integration start time and employs a dynamically adjusted transient calculation window length to perform half-cycle instantaneous power integration on the synchronously sampled sequence, obtaining the integral characteristic. This calculation process is completed within 10 ms. Assuming the calculated integral characteristic is negative at this time, it indicates that power is flowing from the local distribution network to the main grid.
[0159] During the blocking signal generation and timing latching phase (40 to 50 ms), the directional blocking output unit compares the integral characteristic with the reverse power threshold, determines it as reverse power, and generates a signal to block the low-frequency load shedding output. Simultaneously, assuming the low-frequency load shedding protection device detects a frequency lower than the first-stage action value (e.g., 49.5 Hz), it initiates an action delay (assuming a delay of 200 ms). The blocking state is then latched.
[0160] During the mid-stage of the disturbance and the state maintenance phase (50 to 250 ms), during the 200 ms delay of low-frequency load shedding, the grid power oscillates due to system regulation, and may output positive values in subsequent calculation cycles. Due to the state latching mechanism, the directional blocking output unit ignores the new calculation results and maintains the blocking signal output.
[0161] If an abnormal current sampling value is detected during the above process (e.g., CT disconnection), an abnormal operating condition degradation process is triggered: the transient mode is forcibly exited, and the full-cycle Fourier algorithm is fixed; the power discrimination threshold is multiplied by a coefficient K (K is exemplarily taken as 2); and an alarm signal for CT disconnection and directional locking function degradation operation is sent.
[0162] Assuming the load reduction action is completed (or not executed due to locking), the system frequency gradually returns to stability. Both the frequency change rate and the power change rate fall back below the first threshold. The operating condition identification unit re-determines the operating condition as steady-state mode, and the mode adaptive switching unit activates the steady-state direction calculation unit (i.e., the high-precision calculation mode under the full-cycle Fourier algorithm), and the system switches back to steady-state mode.
[0163] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0164] Corresponding to the adaptive power direction blocking method described in the above embodiments, Figure 2 The diagram shows a structural block diagram of an adaptive power direction blocking system provided in an embodiment of this application. For ease of explanation, only the parts related to the embodiments of this application are shown.
[0165] Reference Figure 2 The adaptive power direction locking system includes: The acquisition module is used to acquire the system frequency, voltage sample value, and current sample value of the power system. The adjustment module is used to adjust the steady-state calculation window length and the transient calculation window length based on the system frequency, and to perform phase correction on the voltage sample value and the current sample value based on the system frequency, and output a synchronous sampling sequence; A power determination module is used to determine the system power of the power system based on the synchronous sampling sequence; The operating condition determination module is used to determine the current operating condition of the power system based on the frequency change rate of the system frequency and the power change rate of the system power. The direction algorithm determination module is used to determine the direction algorithm corresponding to the current working condition; The power direction module is used to determine the power direction based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state calculation window length or transient calculation window length corresponding to the current operating condition. The generation module is used to generate a power direction blocking signal based on the power direction.
[0166] It should be noted that the information interaction and execution process between the above modules or components are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, which will not be repeated here.
[0167] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the system can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0168] This application also provides a computer device, which includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor. When the processor executes the computer program, it implements the steps in any of the above method embodiments.
[0169] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in the above-described method embodiments.
[0170] This application provides a computer program product that, when run on a computer device, enables the computer device to execute the steps described in the various method embodiments above.
[0171] Figure 3 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application. Figure 3 As shown, the computer device of this embodiment includes: at least one processor 30 ( Figure 3 (Only one is shown in the diagram), memory 31, and computer program 32 stored in said memory 31 and executable on said at least one processor 30, wherein the processor 30 executes said computer program 32 to implement the steps in any of the above-described adaptive power direction blocking method embodiments.
[0172] The computer device may include, but is not limited to, a processor 30 and a memory 31. Those skilled in the art will understand that... Figure 3 The examples of computer devices are merely examples and do not constitute a limitation on computer devices. They may include more or fewer components than shown in the illustration, or combinations of certain components, or different components. For example, they may also include input / output devices, network access devices, etc.
[0173] The processor 30 may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.
[0174] In some embodiments, the memory 31 may be an internal storage unit of the computer device, such as a hard drive or memory. In other embodiments, the memory 31 may be an external storage device of the computer device, such as a plug-in hard drive, smart media card (SMC), secure digital card (SD), flash card, etc. Furthermore, the memory 31 may include both internal and external storage units of the computer device. The memory 31 is used to store the operating system, applications, bootloader, data, and other programs, such as the program code of the computer program. The memory 31 can also be used to temporarily store data that has been output or will be output.
[0175] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or system capable of carrying computer program code to a system / computer device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, such as a USB flash drive, a portable hard drive, a magnetic disk, or an optical disk.
[0176] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0177] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0178] In the embodiments provided in this application, it should be understood that the disclosed systems / computer devices and methods can be implemented in other ways. For example, the system / computer device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.
[0179] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0180] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. An adaptive power direction blocking method, characterized in that, The method includes: Acquire the system frequency, voltage sample values, and current sample values of the power system; The steady-state calculation window length and transient calculation window length are adjusted based on the system frequency, and the voltage sample value and the current sample value are phase-corrected based on the system frequency to output a synchronous sampling sequence; The system power of the power system is determined based on the synchronous sampling sequence; The current operating condition of the power system is determined based on the rate of change of the system frequency and the rate of change of the system power. Determine the direction algorithm corresponding to the current working condition; The power direction is determined based on the directional algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state or transient calculation window length corresponding to the current operating condition. A power direction blocking signal is generated based on the power direction.
2. The method according to claim 1, characterized in that, The adjustment of the steady-state calculation window length and the transient calculation window length based on the system frequency includes: Obtain the number of full-cycle reference sampling points at the rated frequency; The steady-state calculation window length is obtained by multiplying the number of full-cycle reference sampling points at the rated frequency by the ratio of the rated frequency to the system frequency and then rounding it down. The transient calculation window length is obtained by multiplying the number of full-cycle reference sampling points at the rated frequency by the ratio of the rated frequency to twice the system frequency and then rounding the result.
3. The method according to claim 1, characterized in that, The step of performing phase correction on the voltage and current sample values based on the system frequency and outputting a synchronous sampling sequence includes: Based on the system frequency, the first phase offset of each sampling point of the voltage sample value and the second phase offset of each sampling point of the current sample value are determined respectively. Based on the first phase offset, each sampling point of the voltage sample value is interpolated and resampled to obtain the corrected voltage sample value; Based on the second phase offset, each sampling point of the current sampling value is interpolated and resampled to obtain the corrected current sampling value; The synchronous sampling sequence is composed of the corrected voltage sample value and the corrected current sample value.
4. The method according to claim 1, characterized in that, Determining the current operating condition of the power system based on the frequency change rate of the system frequency and the power change rate of the system power includes: The frequency of the system is differentially divided to determine the rate of frequency change; The power of the system is differentially divided to determine the rate of change of power; When the absolute value of the frequency change rate is greater than or equal to the second frequency change rate threshold, the current operating condition is determined to be a transient mode. When the absolute value of the frequency change rate is greater than or equal to the first frequency change rate threshold and less than the second frequency change rate threshold, if the absolute value of the power change rate is greater than or equal to the first power change rate threshold, the current operating condition is determined to be a transient mode; if the absolute value of the power change rate is less than the first power change rate threshold, the current operating condition is determined to be a steady-state mode. When the absolute value of the frequency change rate is less than the first frequency change rate threshold, if the absolute value of the power change rate is greater than or equal to the second power change rate threshold, the current operating condition is determined to be a transient mode; if the absolute value of the power change rate is less than the second power change rate threshold, the current operating condition is determined to be a steady-state mode. Wherein, the first frequency change rate threshold is less than the second frequency change rate threshold, and the first power change rate threshold is less than the second power change rate threshold.
5. The method according to claim 4, characterized in that, The algorithm for determining the direction corresponding to the current operating condition includes: When the current operating condition is the steady-state mode, the corresponding direction determination algorithm is the full-cycle Fourier algorithm; When the current operating condition is the transient mode, the corresponding direction algorithm is determined to be the half-cycle integral algorithm.
6. The method according to claim 5, characterized in that, The determination of power direction based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state or transient calculation window length corresponding to the current operating condition includes: When the current operating condition is the steady-state mode, the power of the synchronous sampling sequence is calculated based on the full-cycle Fourier algorithm and the steady-state calculation window length to obtain the fundamental positive sequence active power. The power direction is determined based on the sign of the fundamental positive sequence active power; When the current operating condition is the transient mode, the power of the synchronous sampling sequence is calculated based on the half-cycle integral algorithm and the transient calculation window length to obtain the integral feature quantity; The power direction is determined based on the sign of the integral characteristic.
7. The method according to claim 6, characterized in that, The step of generating a power direction blocking signal based on the power direction includes: Determine the power characteristic quantity corresponding to the power direction; The power characteristic is compared with the forward power threshold and the reverse power threshold; When the power characteristic is greater than or equal to the positive power threshold, it is determined to be positive power, and all rounds of low-frequency load shedding are enabled. When the power characteristic value is greater than the negative value of the reverse power threshold and less than the positive power threshold, it is determined to be a power dead zone, a warning signal is output, and the low-frequency load reduction base wheel is opened. When the power characteristic is less than or equal to the negative value of the reverse power threshold, it is determined to be reverse power, and the low-frequency load reduction output is blocked.
8. The method according to claim 5, characterized in that, The method further includes: When an abnormal voltage or current sampling value is detected, the transient mode is exited and the full-cycle Fourier algorithm is used.
9. An adaptive power direction locking system, characterized in that, include: The acquisition module is used to acquire the system frequency, voltage sample value, and current sample value of the power system. The adjustment module is used to adjust the steady-state calculation window length and the transient calculation window length based on the system frequency, and to perform phase correction on the voltage sample value and the current sample value based on the system frequency, and output a synchronous sampling sequence; A power determination module is used to determine the system power of the power system based on the synchronous sampling sequence; The operating condition determination module is used to determine the current operating condition of the power system based on the frequency change rate of the system frequency and the power change rate of the system power. The direction algorithm determination module is used to determine the direction algorithm corresponding to the current working condition; The power direction module is used to determine the power direction based on the direction algorithm corresponding to the current operating condition, the synchronous sampling sequence, and the steady-state calculation window length or transient calculation window length corresponding to the current operating condition. The generation module is used to generate a power direction blocking signal based on the power direction.
10. A computer program product, characterized in that, Includes a computer program that, when run, implements the method as described in any one of claims 1 to 8.