Power supply device

Abstract

This application discloses a power supply device comprising a controller and multiple power boards connected to the controller. The controller evenly distributes the target total current and dynamically selects target power boards matching the number of channels for parallel control. Thus, when different target total current values ​​are required, only the number of channels (i.e., the number of target power boards) needs to be increased, enabling the power supply device to achieve a wide range of output currents to meet different charging and discharging current requirements. This overcomes the limitation of needing to redevelop existing high-power power supplies, enabling the serialization of power supply devices, reducing the types of power boards, effectively reducing R&D costs, and shortening the R&D cycle. Furthermore, reusing power boards improves the stability of the power supply device, facilitating its large-scale development.

Description

Technical Field

[0001] This application relates to electronic circuit technology, and to, but is not limited to, a power supply device. Background Technology

[0002] Formation and capacity testing equipment is a crucial piece of equipment in the lithium-ion battery production process, primarily used for charge-discharge activation, capacity testing, and performance sorting of batteries. The power module, as the main executing component of the formation and capacity testing equipment, provides precise charge-discharge voltage and current to the batteries.

[0003] With the increasing variety of lithium batteries and the ever-expanding range of charging and discharging current requirements, a single power supply can no longer meet the diverse charging and discharging needs. However, existing high-power power supplies require the development of entirely new power supplies for every 100A increase in output current, making it difficult to standardize power supplies. Furthermore, the wide variety of power supply boards significantly increases R&D costs, extends development cycles, and reduces stability, thus hindering the large-scale development of power supplies. Summary of the Invention

[0004] In view of this, the power supply device provided in this application embodiment can output a wide range of currents, reduce research and development costs, and facilitate the large-scale development of power supplies. The power supply device provided in this application embodiment is implemented as follows: The power supply device provided in this application embodiment includes: a controller and a plurality of power boards connected to the controller; The controller determines the target average current based on the target total current and the number of channels sent by the host computer, selects one or more target power boards from the plurality of power boards whose number matches the number of channels, and outputs a pulse signal with a target duty cycle to each target power board based on the target average current. The target power board outputs the target average current according to the pulse signal of the target duty cycle, so that the total current output by the one or more target power boards is the target total current.

[0005] In this embodiment of the application, the power supply device includes: a controller and a plurality of power boards connected to the controller; the controller determines a target average current based on the target total current sent by the host computer and the number of channels, selects one or more target power boards from the plurality of power boards whose number matches the number of channels, and outputs a pulse signal with a target duty cycle to each target power board based on the target average current; the target power board outputs the target average current based on the pulse signal with the target duty cycle, so that the total current output by one or more target power boards is the target total current.

[0006] Based on this, the controller evenly distributes the target total current and dynamically selects target power boards that match the number of channels for parallel control. Thus, when different target total current values ​​are required, simply increasing the number of channels (i.e., increasing the number of target power boards) allows the power supply to achieve a wide range of output currents to meet different charging and discharging current demands. This overcomes the limitation of needing to redevelop existing high-power power supplies, enabling the serialization of power supply devices, reducing the types of power boards, and effectively lowering R&D costs and shortening the development cycle. Furthermore, reusing power boards improves the stability of the power supply, facilitating its large-scale development.

[0007] In some possible embodiments, the controller outputs a pulse signal with a target duty cycle to each of the target power boards based on the target average current, including: Triggered by the pulse width modulation counter corresponding to the main target power board, the sampling voltage and sampling current are obtained from each of the target power boards, wherein the main target power board is any one of the one or more target power boards; A voltage closed-loop calculation is performed based on the sampled voltage and the preset voltage to obtain the reference current; The target set current is determined from the reference current and the target average current; Based on the target set current and the sampled current, a current closed-loop calculation is performed to generate a pulse signal with the target duty cycle.

[0008] In this embodiment, under the triggering of the pulse width modulation counter corresponding to the main target power board, the sampled voltage and sampled current are obtained from the target power board. A reference current is obtained through voltage closed-loop calculation based on the sampled voltage and a preset voltage, and the target set current is determined from the reference current and the target average current. Furthermore, a target duty cycle pulse signal is generated through current closed-loop calculation based on the target set current and the sampled current. This embodiment employs a dual closed-loop control architecture combining an outer voltage loop and an inner current loop. The outer voltage loop precisely adjusts the output voltage of the target power board, ensuring the output voltage remains stable at the target charging / discharging voltage; the inner current loop enables equal current sharing among the target power boards, allowing the power supply to meet both charging / discharging voltage requirements and parallel current sharing operation of multiple power boards. Simultaneously, under the triggering of the pulse width modulation counter of the main target power board, voltage and current are sampled at fixed times to ensure complete synchronization of the sampling times of each target power board.

[0009] In some possible embodiments, the controller performs voltage closed-loop calculations based on the sampled voltage and a preset voltage to obtain a reference current, including: Calculate the voltage difference between the sampled voltage and the preset voltage; A first calculation result is obtained by performing a proportional calculation based on the voltage difference and a preset proportional coefficient. The second calculation result is obtained by integrating the voltage difference and the preset integration coefficient. A third calculation result is obtained by performing a differential calculation based on the voltage difference and the preset differential coefficient; The sum of the first calculation result, the second calculation result, and the third calculation result is determined as the reference current.

[0010] In this embodiment, a PID algorithm is used to perform closed-loop calculations on the sampled voltage and the preset voltage to achieve precise control of the outer voltage loop. The proportional element enables rapid adjustment response, the integral element eliminates steady-state voltage deviation, and the derivative element effectively suppresses voltage oscillations during dynamic processes. The coordinated operation of the proportional, integral, and derivative elements ensures that the output voltage accurately tracks the preset voltage. Furthermore, the reference current output from the voltage loop calculation is adapted to the voltage-current dual-loop control architecture, providing a reasonable and safe current limiting reference for the subsequent current closed loop.

[0011] In some possible embodiments, the controller determines the target set current from the reference current and the target average current, including: If the reference current is less than the target average current, the reference current is determined as the target set current; If the reference current is greater than or equal to the target average current, the target average current is determined as the target set current.

[0012] In this embodiment, by comparing the reference current and the target average current and taking the smaller value as the target set current, dual constraints of voltage regulation and current sharing are achieved. When there is a deviation in the output voltage, the reference current takes precedence to ensure voltage regulation accuracy; when current sharing is required, the target average current is used as the target set current to ensure that multiple target power boards share the current in parallel. This not only prevents the output current of a single target power board from exceeding its allocated limit and prevents overload of the target power board, but also achieves coordinated control of voltage regulation and parallel current sharing, improving the safety and reliability of the power supply under different operating conditions.

[0013] In some possible embodiments, the controller determines the target set current from the reference current and the target average current, including: Obtain the state parameters of the target power board, the state parameters including at least one of temperature parameters, device aging parameters, and historical current stress parameters; Based on the state parameters, determine the correction coefficient corresponding to the target power board; The threshold current corresponding to the target power board is obtained based on the target average current and the correction coefficient. If the reference current is less than the threshold current, the reference current is determined as the target set current; If the reference current is greater than or equal to the threshold current, the threshold current is determined as the target set current.

[0014] In this embodiment, by acquiring the state parameters of the target power board and determining the correction coefficient based on the state parameters, the target average current is corrected using the correction coefficient to obtain the threshold current. This allows for the dynamic customization of the upper limit of the current for each target power board to match its actual health state, breaking the limitation of fixed current sharing in existing solutions. Furthermore, by comparing the reference current with the threshold current and taking the smaller value as the target set current, the output current of each target power board can be forcibly limited to the safe threshold of its current state, effectively avoiding the "weakest link" effect in parallel current sharing where "weak boards" are damaged by overload. This differentiated current limiting mechanism based on board state not only ensures the safe operation of the power supply under harsh conditions but also promotes a more balanced distribution of thermal and electrical stress among the target power boards, delaying device aging and significantly improving the service life and operational reliability of the power supply.

[0015] In some possible embodiments, the controller performs a current closed-loop calculation based on the target set current and the sampled current to generate a pulse signal for the target duty cycle, including: Calculate the current difference between the target set current and the sampled current; The fourth calculation result is obtained by performing a proportional calculation based on the current difference and a preset proportional coefficient; The fifth calculation result is obtained by integrating the current difference and the preset integration coefficient. Based on the current difference and the preset differential coefficient, a differential calculation is performed to obtain the sixth calculation result; The sum of the fourth calculation result, the fifth calculation result, and the sixth calculation result is determined as the pulse signal of the target duty cycle.

[0016] In this embodiment, a PID algorithm is used to perform closed-loop calculations on the sampled current and the target set current to achieve precise control of the inner current loop. Specifically, the proportional element responds quickly to current deviations, the integral element eliminates steady-state current deviations, and the derivative element effectively suppresses current fluctuations and oscillations. The proportional, integral, and derivative elements work together to ensure the output current accurately tracks the target set current. Furthermore, the current loop outputs a pulse signal with the target duty cycle, enabling real-time adjustment of the target power board. Combined with the constraints of the preceding voltage outer loop, this achieves coordinated control of voltage regulation and parallel current sharing across multiple power boards, effectively suppressing current surges caused by load disturbances, reducing dynamic stress on power devices, and further improving the control accuracy and dynamic stability of the power supply's charging and discharging process.

[0017] In some possible embodiments, when there are multiple target power boards, the controller configures a reference time base before determining the target average current. The reference time base is used to control the pulse width modulation units corresponding to the multiple target power boards to share the same time base.

[0018] In this embodiment of the application, under the condition of multiple target power boards connected in parallel, before determining the target average current, a reference time base is configured so that the pulse width modulation units corresponding to the multiple target power boards share the same time base, thereby achieving timing synchronization and alignment of the pulse signals, avoiding phase shift caused by the independent operation of each pulse width modulation unit, and reducing the current ripple and crosstalk of the parallel output.

[0019] In some possible embodiments, when the controller outputs multiple target duty cycle pulse signals, it controls the pulse width modulation counters corresponding to the multiple target power boards to reset at the same time according to a synchronization signal, so as to align the phases of the multiple target duty cycle pulse signals.

[0020] In this embodiment of the application, when multiple target duty cycle pulse signals are output, the controller controls the pulse width modulation counters corresponding to the multiple target power boards to reset at the same time according to the synchronization signal, so as to ensure that the starting point of each pulse width modulation counter is consistent and the phase of the pulse signals of multiple target duty cycles is aligned.

[0021] In some possible embodiments, the controller detects the operating status of the plurality of target power boards, and when there is a first power board in a working state and a second power board in a non-working state among the plurality of target power boards, controls the first power board to be in the non-working state, the operating status including the working state and the non-working state.

[0022] In this embodiment, the controller detects the operating status of multiple target power boards. When a first power board in a working state and a second power board in a non-working state exist simultaneously among the multiple target power boards, the first power board is switched to a non-working state. This achieves state interlocking protection for multiple target power boards in parallel, avoiding current distribution imbalance, inter-module circulating current, and power board overload caused by partial operation and partial shutdown of power boards put into operation in the same batch. It also prevents power devices in the power boards from being damaged due to abnormal operating conditions, thereby improving the fault protection capability and operational safety of the power supply device.

[0023] In some possible embodiments, the controller determines the target average current based on the target total current and the number of channels sent by the host computer, including: Calculate the ratio of the target total current to the number of channels; The ratio is determined as the target average current.

[0024] In this embodiment, the target average current is determined by calculating the ratio of the target total current to the number of channels, thus achieving precise and even distribution of the target total current among the target power boards. This allocation logic is simple and efficient, with low computational overhead, facilitating the controller to quickly issue current sharing commands. Simultaneously, this uniform current distribution mechanism lays a solid foundation for parallel current sharing control of multiple power boards, helping to balance the output load of each power board, preventing overload of individual power boards due to uneven current distribution, and reducing stress differences among components within each power board. Therefore, it comprehensively ensures the safety and stability of the power supply device under parallel operation. Attached Figure Description

[0025] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with this application and, together with the specification, serve to explain the technical solutions of this application.

[0026] Figure 1 This is a schematic diagram of the power supply device provided in the embodiments of this application; Figure 2 A schematic diagram showing the arrangement of multiple power boards inside the housing, as provided in an embodiment of this application; Figure 3 A schematic diagram of the interface distribution of the power board provided in an embodiment of this application; Figure 4 Schematic diagram of the interface distribution of the controller provided in the embodiments of this application Figure 1 ; Figure 5 Schematic diagram of the interface distribution of the controller provided in the embodiments of this application Figure 2 ; Figure 6 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 1 ; Figure 7 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 2 ; Figure 8 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 3 ; Figure 9 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 4 ; Figure 10 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 5 . Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the specific technical solutions of this application will be further described in detail below with reference to the accompanying drawings of the embodiments of this application. The following embodiments are used to illustrate this application, but are not intended to limit the scope of this application.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0029] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0030] It should be noted that the terms "first, second, third" used in the embodiments of this application are used to distinguish similar or different objects and do not represent a specific order of objects. It can be understood that "first, second, third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0031] With the increasing variety of lithium batteries and the continuous increase in charging and discharging current, the demand for charging and discharging current in formation and capacity testing equipment has become more diverse, and a single power supply can no longer meet the diverse charging and discharging needs.

[0032] Existing high-power power supplies require the development of entirely new power supplies for every 100A increase in output current, making it difficult to standardize power supplies. Furthermore, the wide variety of power boards in power supplies results in high R&D costs, long development cycles, and poor stability, thus hindering the large-scale development of power supplies.

[0033] In view of this, embodiments of this application provide a power supply device, which includes: a controller and a plurality of power boards connected to the controller; the controller determines a target average current based on the target total current sent by the host computer and the number of channels, selects one or more target power boards from the plurality of power boards whose number matches the number of channels, and outputs a pulse signal with a target duty cycle to each target power board based on the target average current; the target power boards output the target average current according to the pulse signal with the target duty cycle, so that the total current output by one or more target power boards is the target total current.

[0034] Based on this, the controller evenly distributes the target total current and dynamically selects target power boards that match the number of channels for parallel control. Thus, when different target total current values ​​are required, simply increasing the number of channels (i.e., increasing the number of target power boards) allows the power supply to achieve a wide range of output currents to meet different charging and discharging current demands. This overcomes the limitation of needing to redevelop existing high-power power supplies, enabling the serialization of power supply devices, reducing the types of power boards, and effectively lowering R&D costs and shortening the development cycle. Furthermore, reusing power boards improves the stability of the power supply, facilitating its large-scale development.

[0035] To make the objectives and technical solutions of this application clearer and more intuitive, the signal detection circuit provided in the embodiments of this application will be explained in detail below with reference to the accompanying drawings.

[0036] Reference Figure 1 , Figure 1 This is a schematic diagram of the power supply device provided in an embodiment of this application. Figure 1 As shown, the power supply device may include: a controller 110 and a plurality of power boards 120 connected to the controller 110.

[0037] The controller 110 and multiple power boards 120 are all housed within the enclosure, and the power boards 120 are arranged in a multi-layer layout within the enclosure. For example, when the number of power boards is four, a two-layer layout can be used, such as... Figure 2 As shown, there are two power boards in the first and second layers of the enclosure. Power board a and power board b are installed in the first layer, and power board c and power board d are installed in the second layer.

[0038] In some examples, the enclosure adopts a standard industrial box-type structure. The enclosure has multiple slots matching the number of power boards, with each slot for independently mounting one power board. In addition, the enclosure integrates multiple interfaces, including: a power output interface for outputting current, an auxiliary power input interface for connecting to an auxiliary power supply, a first input interface for connecting to the main power supply, a first temperature sampling interface for acquiring battery temperature, a first voltage sampling interface for acquiring battery voltage, and a first communication interface for data interaction with a host computer.

[0039] For example, the voltage of the main input power supply is, for instance, 700V.

[0040] Each of the multiple power boards 120 uses a uniform size and electrical interface specification. (Refer to...) Figure 3 , Figure 3 This is a schematic diagram of the interface distribution of the power board provided in an embodiment of this application, as shown below. Figure 3 As shown, the power board is equipped with: a positive power output interface, used as the positive output terminal of the power supply device; a negative power output interface, used as the negative output terminal of the power supply device; a second input interface, used to connect the input power supply voltage; and a first electrical signal interface, used to transmit low-power signals such as sampling voltage, sampling current, and control signals.

[0041] Accordingly, refer to Figure 4 , Figure 4 Schematic diagram of the interface distribution of the controller provided in the embodiments of this application Figure 1 ,like Figure 4 As shown, the first surface of the controller 110 is provided with multiple power interfaces and multiple second electrical signal interfaces, matching the number of power boards 120. These power interfaces and second electrical signal interfaces are used to connect to the multiple power boards 120 to enable signal interaction between the controller 110 and each power board. Furthermore, referring to… Figure 5 , Figure 5 Schematic diagram of the interface distribution of the controller provided in the embodiments of this application Figure 2 ,like Figure 5 As shown, the second side of the controller 110 is provided with: a 700V input interface, a fan control interface, an auxiliary power supply interface, a second voltage sampling interface, a second temperature sampling interface, and a second communication interface.

[0042] In some examples, each power board includes a DC-DC converter and an LLC resonant converter.

[0043] The 700V high-voltage DC power is connected to the main input power supply of the enclosure, providing input power voltage for multiple power boards 120. Each power board performs a first voltage conversion on the high-voltage DC power through a DC-DC converter to obtain the converted high-voltage DC power, and then performs a second voltage conversion on the converted high-voltage DC power through an LLC resonant converter to obtain the required target charging and discharging voltage.

[0044] In some examples, the controller includes a main control chip, an overvoltage protection circuit, a first sampling circuit, and an operational amplifier isolation circuit. Exemplarily, the main control chip is, for example, a digital signal processor (DSP). In one example, the DC-DC converter includes a second sampling circuit, an overcurrent protection circuit, a MOS driver circuit, and a MOS power transistor. Exemplarily, the DC-DC converter is a buck converter or a boost converter.

[0045] In some embodiments, the power supply device further includes a heat sink.

[0046] The heatsink employs an air-cooled architecture and includes two independently controlled fans. The fans are positioned perpendicular to the controller 110. This airflow design ensures that the airflow carries away the heat generated by the power devices on the power board. Simultaneously, it prevents the airflow from blowing heat from the power devices directly onto the controller 110, thereby preventing thermal interference to the control and sampling chips within the controller 110.

[0047] During the operation of the power supply unit, the controller 110 works in conjunction with multiple power boards 120, and the specific control process is as follows: Please see Figure 6 , Figure 6 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 1 .like Figure 6 As shown, the control flow may include the following steps: Step 201: The controller determines the target average current based on the target total current and the number of channels sent by the host computer, selects one or more target power boards from multiple power boards whose number matches the number of channels, and outputs a pulse signal with the target duty cycle to each target power board based on the target average current.

[0048] Here, "channel number" refers to the actual number of channels in operation, i.e., the number of power boards in working condition. "Target average current" refers to the average current required to output from each power board in working condition. When the controller selects multiple target power boards, these boards are connected in parallel via copper busbars.

[0049] The controller performs control calculations based on the target average current to obtain the target duty cycle and outputs a pulse signal of the target duty cycle.

[0050] The controller transmits the target duty cycle pulse signal to each target power board through the second electrical signal interface.

[0051] Step 202: The target power board outputs the target average current according to the pulse signal of the target duty cycle, so that the total current output by one or more target power boards is the target total current.

[0052] The target power board adjusts the switching of the MOS power transistors in the DC-DC converter according to the pulse signal to output an output current equal to the target average current. The total current obtained by adding the output currents of all target power boards equals the target total current.

[0053] For example, assuming the target total current is 300A and the number of channels is 3, the controller determines the target average current to be 100A. Based on this, the controller selects 3 target power boards from multiple power boards and outputs pulse signals with the target duty cycle calculated based on 100A. Each target power board outputs an output current of 100A according to the pulse signal with the target duty cycle, which is the target average current. The sum of the output currents of the 3 target power boards is the total current of 300A, thus enabling the power supply device to output the target total current that meets the requirements.

[0054] Based on the above control logic, it can be seen that the target duty cycle of the pulse signal determines the output current of each power board. This application controls the target average current output of each board and outputs the target total current by superimposing the currents of single or multiple boards, thereby achieving parallel current sharing output of power boards. This not only realizes parallel current sharing output of multiple power boards, but also achieves linear expansion of the total current by increasing the number of target power boards, thus meeting the output requirements of different power levels.

[0055] Furthermore, this embodiment employs a single controller to centrally control the target average current output of one or more target power boards, using the total current output of the one or more target power boards as the target total current, thereby achieving parallel current sharing output of the power boards. Based on this, the architecture can significantly reduce the number of controllers and eliminate the parallel operation method that relies on external communication lines for data interaction. This effectively eliminates transmission delays and signal interference caused by external communication, significantly improving the real-time performance, multi-board synchronization, and overall anti-interference capability of the power supply device during parallel operation.

[0056] In this embodiment of the application, the power supply device includes: a controller and a plurality of power boards connected to the controller; the controller determines a target average current based on the target total current sent by the host computer and the number of channels, selects one or more target power boards from the plurality of power boards whose number matches the number of channels, and outputs a pulse signal with a target duty cycle to each target power board based on the target average current; the target power board outputs the target average current based on the pulse signal with the target duty cycle, so that the total current output by one or more target power boards is the target total current.

[0057] Based on this, the controller evenly distributes the target total current and dynamically selects target power boards that match the number of channels for parallel control. Thus, when different target total current values ​​are required, simply increasing the number of channels (i.e., increasing the number of target power boards) allows the power supply to achieve a wide range of output currents to meet different charging and discharging current demands. This overcomes the limitation of needing to redevelop existing high-power power supplies, enabling the serialization of power supply devices, reducing the types of power boards, and effectively lowering R&D costs and shortening the development cycle. Furthermore, reusing power boards improves the stability of the power supply, facilitating its large-scale development.

[0058] In some embodiments, please refer to Figure 7 , Figure 7 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 2 .like Figure 7 As shown, the process of the controller outputting a pulse signal with a target duty cycle to each target power board based on the target average current in step 201 above may include: Step 301: Under the triggering of the pulse width modulation counter corresponding to the main target power board, the controller obtains the sampling voltage and sampling current from each target power board.

[0059] The primary target power board can be any one of one or more target power boards.

[0060] In the case of a single target power board, that target power board is the master target power board. In the case of multiple target power boards, any one of the target power boards is the master target power board, and the other target power boards are slave target power boards.

[0061] By utilizing the trigger timing of the pulse width modulation (PWM) counter corresponding to the main target power board, the sampling voltage and sampling current can be obtained from the target power board, ensuring that the sampling timing of each target power board is completely synchronized.

[0062] The sampled voltage is used to characterize the magnitude of the output voltage of the target power board. The sampled current is used to characterize the magnitude of the actual output current of the target power board.

[0063] For example, the number of target power boards is three, namely, a first target power board, a second target power board, and a third target power board, with the first target power board selected as the main target power board. In this way, sampling is triggered every time the pulse width modulation counter of the first target power board reaches zero, so that the first target power board, the second target power board, and the third target power board simultaneously acquire the sampled voltage and sampled current at the zero point of the count.

[0064] Step 302: The controller performs voltage closed-loop calculation based on the sampled voltage and the preset voltage to obtain the reference current.

[0065] Among them, voltage closed-loop calculation refers to the outer loop (voltage loop) in voltage-current dual-loop control. The reference current is obtained by calculating the sampled voltage and the preset voltage through the PID algorithm, which can ensure the stability of the output voltage of the target power board.

[0066] Step 303: The controller determines the target set current from the reference current and the target average current.

[0067] Specifically, by performing logic processing or limiting on the reference current and the target average current, the target set current is obtained to ensure that the output voltage of the target power board can meet the voltage regulation requirements. At the same time, it ensures that the target power board can output an output current equal to the target average current.

[0068] Step 304: The controller performs current closed-loop calculation based on the target set current and the sampled current to generate a pulse signal for the target duty cycle.

[0069] Among them, current closed-loop calculation refers to the inner loop (current loop) in voltage-current dual-loop control, which uses a PID algorithm to calculate the target duty cycle from the target set current and the sampled current, and generates a pulse signal for the target duty cycle.

[0070] In this embodiment, under the triggering of the pulse width modulation counter corresponding to the main target power board, the sampled voltage and sampled current are obtained from the target power board. A reference current is obtained through voltage closed-loop calculation based on the sampled voltage and a preset voltage, and the target set current is determined from the reference current and the target average current. Furthermore, a target duty cycle pulse signal is generated through current closed-loop calculation based on the target set current and the sampled current. This embodiment employs a dual closed-loop control architecture combining an outer voltage loop and an inner current loop. The outer voltage loop precisely adjusts the output voltage of the target power board, ensuring the output voltage remains stable at the target charging / discharging voltage; the inner current loop enables equal current sharing among the target power boards, allowing the power supply to meet both charging / discharging voltage requirements and parallel current sharing operation of multiple power boards. Simultaneously, under the triggering of the pulse width modulation counter of the main target power board, voltage and current are sampled at fixed times to ensure complete synchronization of the sampling times of each target power board.

[0071] In some embodiments, please refer to Figure 8 , Figure 8 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 3 .like Figure 8 As shown, the implementation process of step 302 above may include: Step 401: The controller calculates the voltage difference between the sampled voltage and the preset voltage.

[0072] The voltage difference is used to characterize the deviation between the output voltage of the target power board and the preset voltage.

[0073] Step 402: The controller performs proportional calculations based on the voltage difference and a preset proportional coefficient to obtain the first calculation result.

[0074] The first calculation result is obtained by multiplying the voltage difference by a preset proportional coefficient. The proportional (P) element can quickly adjust according to the magnitude of the deviation; the larger the deviation, the stronger the proportional adjustment effect.

[0075] Step 403: The controller performs integral calculation based on the voltage difference and the preset integral coefficient to obtain the second calculation result.

[0076] The voltage difference is integrated and multiplied by a preset integration coefficient to obtain the second calculation result. The integration (I) step can accumulate historical deviations, effectively eliminate steady-state voltage errors, and make the output voltage closer to the preset voltage.

[0077] Step 404: The controller performs differential calculations based on the voltage difference and preset differential coefficients to obtain the third calculation result.

[0078] The process involves differentiating the voltage difference and multiplying it by a preset differential coefficient to obtain the third calculation result. This differential (D) step allows for the prediction of voltage error trends, effectively suppressing voltage fluctuations and oscillations.

[0079] Step 405: The controller determines the sum of the first calculation result, the second calculation result, and the third calculation result as the reference current.

[0080] In this embodiment, a PID algorithm is used to perform closed-loop calculations on the sampled voltage and the preset voltage to achieve precise control of the outer voltage loop. The proportional element enables rapid adjustment response, the integral element eliminates steady-state voltage deviation, and the derivative element effectively suppresses voltage oscillations during dynamic processes. The coordinated operation of the proportional, integral, and derivative elements ensures that the output voltage accurately tracks the preset voltage. Furthermore, the reference current output from the voltage loop calculation is adapted to the voltage-current dual-loop control architecture, providing a reasonable and safe current limiting reference for the subsequent current closed loop.

[0081] In some embodiments, the implementation process of step 303 above may include: when the reference current is less than the target average current, the controller determines the reference current as the target set current; when the reference current is greater than or equal to the target average current, the controller determines the target average current as the target set current.

[0082] When the reference current is less than the target average current, it means the output voltage has stabilized, and the reference current calculated by the voltage loop is relatively small. In this case, the reference current is used as the target set current to prevent excessively high output current and prioritize accurate and stable output voltage. When the reference current is greater than or equal to the target average current, it means the voltage loop outputs a larger current to maintain voltage stability, i.e., the reference current is larger. In this case, the target average current is used as the target set current, causing the target power boards to output according to the evenly distributed current command, ensuring current sharing when multiple target power boards are connected in parallel.

[0083] In this embodiment, by comparing the reference current and the target average current and taking the smaller value as the target set current, dual constraints of voltage regulation and current sharing are achieved. When there is a deviation in the output voltage, the reference current takes precedence to ensure voltage regulation accuracy; when current sharing is required, the target average current is used as the target set current to ensure that multiple target power boards share the current in parallel. This not only prevents the output current of a single target power board from exceeding its allocated limit and prevents overload of the target power board, but also achieves coordinated control of voltage regulation and parallel current sharing, improving the safety and reliability of the power supply under different operating conditions.

[0084] In some embodiments, Figure 9 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 4 .like Figure 9 As shown, the implementation process of step 303 above may include: Step 501: The controller acquires the status parameters of the target power board.

[0085] The state parameters include at least one of temperature parameters, device aging parameters, and historical current stress parameters.

[0086] The temperature parameter is used to characterize the heat dissipation conditions or ambient temperature of the target power board. When heat dissipation is poor or the ambient temperature is high, the current carrying capacity of core components such as MOSFETs in the target power board will decrease significantly.

[0087] Among them, the device aging parameters are used to characterize the degree of performance degradation of components in the target power board. The performance of components degrades with increasing usage time.

[0088] Among them, the historical current stress parameter is used to characterize the degree of fatigue accumulation of internal components of the target power board. Target power boards that are subjected to high current impacts for a long time have higher fatigue levels of internal components and a correspondingly lower safety margin.

[0089] Step 502: The controller determines the correction coefficient corresponding to the target power board based on the state parameters.

[0090] The correction factor is typically a decimal between 0 and 1. The better the condition of the target power board, the closer the correction factor is to 1; the worse the condition of the target power board (e.g., excessively high temperature), the smaller the correction factor.

[0091] For example, when the temperature parameters of the target power board are too high, the correction factor is, for example, 0.8.

[0092] Step 503: The controller obtains the threshold current corresponding to the target power board based on the target average current and the correction coefficient.

[0093] In one example, the product of the target mean current and the correction factor is determined as the threshold current.

[0094] For a target power board in poor condition, the threshold current will be less than the target average current; for a target power board in good condition, the threshold current will be equal to or close to the target average current.

[0095] Step 504: When the reference current is less than the threshold current, the controller determines the reference current as the target set current.

[0096] When the reference current is less than the threshold current, it means that the reference current has not reached the upper limit of the target power board's current (i.e., the threshold current), and the reference current is determined as the target set current.

[0097] Step 505: When the reference current is greater than or equal to the threshold current, the controller determines the threshold current as the target set current.

[0098] When the reference current is greater than or equal to the threshold current, it means that the reference current exceeds the current limit of the target power board, and the threshold current is determined as the target set current.

[0099] In this embodiment, by acquiring the state parameters of the target power board and determining the correction coefficient based on the state parameters, the target average current is corrected using the correction coefficient to obtain the threshold current. This allows for the dynamic customization of the upper limit of the current for each target power board to match its actual health state, breaking the limitation of fixed current sharing in existing solutions. Furthermore, by comparing the reference current with the threshold current and taking the smaller value as the target set current, the output current of each target power board can be forcibly limited to the safe threshold of its current state, effectively avoiding the "weakest link" effect in parallel current sharing where "weak boards" are damaged by overload. This differentiated current limiting mechanism based on board state not only ensures the safe operation of the power supply under harsh conditions but also promotes a more balanced distribution of thermal and electrical stress among the target power boards, delaying device aging and significantly improving the service life and operational reliability of the power supply.

[0100] In some embodiments, Figure 10 A schematic diagram of the operation of the power supply device provided in the embodiments of this application. Figure 5 .like Figure 10 As shown, the implementation process of step 305 above may include: Step 601: The controller calculates the current difference between the target set current and the sampled current.

[0101] The current difference is used to characterize the deviation between the output current of the target power board and the target set current.

[0102] Step 602: The controller performs proportional calculations based on the current difference and the preset proportional coefficient to obtain the fourth calculation result.

[0103] The fourth calculation result is obtained by multiplying the current difference by a preset proportional coefficient. The proportional (P) element can quickly adjust according to the magnitude of the deviation; the larger the deviation, the stronger the proportional adjustment effect.

[0104] Step 603: The controller performs integral calculations based on the current difference and the preset integral coefficient to obtain the fifth calculation result.

[0105] The calculation involves integrating the current difference and multiplying it by a preset integration coefficient to obtain the fifth result. The integration (I) step accumulates historical deviations, effectively eliminating steady-state current errors and making the output current closer to the target set current.

[0106] Step 604: The controller performs differential calculations based on the current difference and preset differential coefficients to obtain the sixth calculation result.

[0107] The process involves differentiating the current difference and multiplying it by a preset differential coefficient to obtain the sixth calculation result. This differential (D) step allows for the prediction of current error trends, effectively suppressing sudden current changes and oscillations, and improving dynamic response performance.

[0108] Step 605: The controller determines the sum of the fourth calculation result, the fifth calculation result, and the sixth calculation result as the pulse signal of the target duty cycle.

[0109] In this embodiment, a PID algorithm is used to perform closed-loop calculations on the sampled current and the target set current to achieve precise control of the inner current loop. Specifically, the proportional element responds quickly to current deviations, the integral element eliminates steady-state current deviations, and the derivative element effectively suppresses current fluctuations and oscillations. The proportional, integral, and derivative elements work together to ensure the output current accurately tracks the target set current. Furthermore, the current loop outputs a pulse signal with the target duty cycle, enabling real-time adjustment of the target power board. Combined with the constraints of the preceding voltage outer loop, this achieves coordinated control of voltage regulation and parallel current sharing across multiple power boards, effectively suppressing current surges caused by load disturbances, reducing dynamic stress on power devices, and further improving the control accuracy and dynamic stability of the power supply's charging and discharging process.

[0110] In some embodiments, when there are multiple target power boards, the controller configures a reference time base before determining the target average current.

[0111] The reference time base is used to control the pulse width modulation units corresponding to multiple target power boards to share the same time base.

[0112] Since each target power board has its own corresponding pulse width modulation unit for generating pulse signals, when multiple target power boards are connected in parallel, by configuring a reference time base, the pulse width modulation units corresponding to each target power board can count synchronously under the reference time base, so that the clock frequency of each pulse width modulation unit is the same, and the timing synchronization of each pulse signal is guaranteed.

[0113] In this embodiment of the application, under the condition of multiple target power boards connected in parallel, before determining the target average current, a reference time base is configured so that the pulse width modulation units corresponding to the multiple target power boards share the same time base, thereby achieving timing synchronization and alignment of the pulse signals, avoiding phase shift caused by the independent operation of each pulse width modulation unit, and reducing the current ripple and crosstalk of the parallel output.

[0114] In some embodiments, when outputting pulse signals of multiple target duty cycles, the controller controls the pulse width modulation counters corresponding to the multiple target power boards to reset at the same time according to the synchronization signal, so as to align the phases of the pulse signals of the multiple target duty cycles.

[0115] Since the pulse width modulation (PWM) counters increment from 0 and generate pulse signals based on the count values, the controller, according to the synchronization signal, controls each PWM counter to simultaneously reset to zero and restart counting. This simultaneous reset ensures that the rising edges (i.e., the starting phases) of the pulse signals for multiple target duty cycles are aligned, achieving complete synchronization of the pulse signals for multiple target duty cycles. Furthermore, based on the configured reference time base, this further enables synchronized output of pulse signals for each target duty cycle, eliminating the phase offset problem of pulse signals when multiple target power boards operate in parallel. This effectively reduces output current ripple and circulating current interference between target power boards, improves current sharing control in parallel operation of multiple target power boards, and enhances the output stability of the power supply under charging and discharging conditions.

[0116] In this embodiment of the application, when multiple target duty cycle pulse signals are output, the controller controls the pulse width modulation counters corresponding to the multiple target power boards to reset at the same time according to the synchronization signal, so as to ensure that the starting point of each pulse width modulation counter is consistent and the phase of the pulse signals of multiple target duty cycles is aligned.

[0117] In some embodiments, the controller detects the operating status of multiple target power boards, and when a first power board in an operating state and a second power board in a non-operating state exist simultaneously among the multiple target power boards, the controller controls the first power board to be in a non-operating state.

[0118] The operating status includes working status and non-working status.

[0119] Specifically, when multiple target power boards simultaneously have a first power board in a working state and a second power board in a non-working state, that is, when the operating states of multiple target power boards are inconsistent, the first power board in a working state is shut down, so that all target power boards are in a non-working state, causing the entire power supply device to stop outputting, avoiding severe current distribution imbalance, overload of a single target power board, generation of inter-module circulating current, and damage to the MOS power transistors in the target power board.

[0120] In some examples, when the first power board is in an inactive state, the controller outputs an alarm signal to indicate that the operating states of multiple target power boards are inconsistent.

[0121] Before the multiple target power boards are connected in parallel for current sharing, they are initialized to put each target power board into a standby state. In addition, the controller also detects fault information, output information, and operating modes of the multiple target power boards.

[0122] In this embodiment, the controller detects the operating status of multiple target power boards. When a first power board in a working state and a second power board in a non-working state exist simultaneously among the multiple target power boards, the first power board is switched to a non-working state. This achieves state interlocking protection for multiple target power boards in parallel, avoiding current distribution imbalance, inter-module circulating current, and power board overload caused by partial operation and partial shutdown of power boards put into operation in the same batch. It also prevents power devices in the power boards from being damaged due to abnormal operating conditions, thereby improving the fault protection capability and operational safety of the power supply device.

[0123] In some embodiments, the process of the controller in step 201 determining the target average current based on the target total current and the number of channels sent by the host computer may include: calculating the ratio of the target total current to the number of channels; and determining the ratio as the target average current.

[0124] The target average current refers to the rated output current of each target power board.

[0125] In this embodiment, the target total current that the power supply device needs to output is evenly distributed to the target power boards that match the number of channels, with each target power board receiving the same current, so as to achieve parallel current sharing.

[0126] For example, when the target total current is, for example, 400A and the number of channels is, for example, 4, the target average current is 100A, that is, each target power board is allocated 100A of output current.

[0127] In this embodiment, the target average current is determined by calculating the ratio of the target total current to the number of channels, thus achieving precise and even distribution of the target total current among the target power boards. This allocation logic is simple and efficient, with low computational overhead, facilitating the controller to quickly issue current sharing commands. Simultaneously, this uniform current distribution mechanism lays a solid foundation for parallel current sharing control of multiple power boards, helping to balance the output load of each power board, preventing overload of individual power boards due to uneven current distribution, and reducing stress differences among components within each power board. Therefore, it comprehensively ensures the safety and stability of the power supply device under parallel operation.

[0128] It should be understood that although the steps in the above flowcharts are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the above flowcharts may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0129] It should be understood that the phrases "one embodiment," "an embodiment," or "some embodiments" mentioned throughout the specification mean that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment," "in one embodiment," or "in some embodiments" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely for descriptive purposes and do not represent the superiority or inferiority of the embodiments. The descriptions of the various embodiments above tend to emphasize the differences between the various embodiments; their similarities or commonalities can be referred to mutually, and for the sake of brevity, they will not be repeated here.

[0130] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three kinds of relationships. For example, object A and / or object B can represent three situations: object A exists alone, object A and object B exist simultaneously, and object B exists alone.

[0131] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0132] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0133] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power supply device characterized by comprising: The power supply device includes: a controller and multiple power boards connected to the controller; The controller determines the target average current based on the target total current and the number of channels sent by the host computer, selects one or more target power boards from the plurality of power boards whose number matches the number of channels, and outputs a pulse signal with a target duty cycle to each target power board based on the target average current. The target power board outputs the target average current according to the pulse signal of the target duty cycle, so that the total current output by the one or more target power boards is the target total current; The controller, using the target average current as a reference, outputs a pulse signal with a target duty cycle to each target power board, including: Triggered by the pulse width modulation counter corresponding to the main target power board, the sampling voltage and sampling current are obtained from each of the target power boards, wherein the main target power board is any one of the one or more target power boards; A voltage closed-loop calculation is performed based on the sampled voltage and the preset voltage to obtain the reference current; The target set current is determined from the reference current and the target average current; Based on the target set current and the sampled current, a current closed-loop calculation is performed to generate a pulse signal with the target duty cycle.

2. The power supply device according to claim 1, characterized in that, The controller performs voltage closed-loop calculations based on the sampled voltage and the preset voltage to obtain a reference current, including: Calculate the voltage difference between the sampled voltage and the preset voltage; A first calculation result is obtained by performing a proportional calculation based on the voltage difference and a preset proportional coefficient. The second calculation result is obtained by integrating the voltage difference and the preset integration coefficient. A third calculation result is obtained by performing a differential calculation based on the voltage difference and the preset differential coefficient; The sum of the first calculation result, the second calculation result, and the third calculation result is determined as the reference current.

3. The power supply device according to claim 1, characterized in that, The controller determines the target set current from the reference current and the target average current, including: If the reference current is less than the target average current, the reference current is determined as the target set current; If the reference current is greater than or equal to the target average current, the target average current is determined as the target set current.

4. The power supply device according to claim 1, characterized in that, The controller determines the target set current from the reference current and the target average current, including: Obtain the state parameters of the target power board, the state parameters including at least one of temperature parameters, device aging parameters, and historical current stress parameters; Based on the state parameters, determine the correction coefficient corresponding to the target power board; The threshold current corresponding to the target power board is obtained based on the target average current and the correction coefficient. If the reference current is less than the threshold current, the reference current is determined as the target set current; If the reference current is greater than or equal to the threshold current, the threshold current is determined as the target set current.

5. The power supply device according to claim 1, characterized in that, The controller performs current closed-loop calculation based on the target set current and the sampled current to generate a pulse signal for the target duty cycle, including: Calculate the current difference between the target set current and the sampled current; The fourth calculation result is obtained by performing a proportional calculation based on the current difference and a preset proportional coefficient; The fifth calculation result is obtained by integrating the current difference and the preset integration coefficient. Based on the current difference and the preset differential coefficient, a differential calculation is performed to obtain the sixth calculation result; The sum of the fourth calculation result, the fifth calculation result, and the sixth calculation result is determined as the pulse signal of the target duty cycle.

6. The power supply device according to claim 1, characterized in that, When there are multiple target power boards, the controller configures a reference time base before determining the target average current. The reference time base is used to control the pulse width modulation units corresponding to the multiple target power boards to share the same time base.

7. The power supply device according to claim 6, characterized in that, When the controller outputs multiple target duty cycle pulse signals, it controls the pulse width modulation counters corresponding to the multiple target power boards to reset at the same time according to the synchronization signal, so as to align the phases of the multiple target duty cycle pulse signals.

8. The power supply device according to claim 1, characterized in that, The controller detects the operating status of the plurality of target power boards, and when there is a first power board in a working state and a second power board in a non-working state among the plurality of target power boards, it controls the first power board to be in the non-working state, the operating status including the working state and the non-working state.

9. The power supply device according to any one of claims 1-8, characterized in that, The controller determines the target average current based on the target total current and the number of channels sent by the host computer, including: Calculate the ratio of the target total current to the number of channels; The ratio is determined as the target average current.

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