Energy transfer based dc link capacitor discharge

Abstract

The present disclosure relates to energy transfer based discharging of a DC link capacitor. A motor drive system is disclosed. The motor drive system includes a DC link capacitor coupled to a DC voltage bus, a motor, and an inverter coupled to the DC voltage bus and including a first phase coupled to a first winding of the motor, a second phase coupled to a second winding of the motor, and a third phase coupled to a third winding of the motor. The motor drive system further includes a control circuit configured to drive a high side switch of the first phase of the inverter with a high side PWM signal and drive a low side switch of the second phase of the inverter to be in a conductive state for a transfer period, and to drive the high side switch of the first phase to be in a non-conductive state and the low side switch of the second phase to be in the conductive state for a discharge period after the transfer period.

Description

[0001] priority

[0002] This application claims the benefit of Provisional Patent Application No. 63 / 793,967, filed on April 24, 2025, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates in general to inverter systems, and more particularly to the discharge of DC link capacitors in inverter systems. Background Technology

[0004] In electric vehicles, a three-phase inverter system drives an electric motor to provide the vehicle's primary power source. The inverter system can be powered by a high-voltage battery, for example, operating at 400V or 800V. Inverter systems typically employ large energy storage capacitors, known as DC link capacitors, to maintain the desired bus voltage and smooth any switching-related ripple on the bus lines.

[0005] The shutdown of the drive system can be initiated by various events, such as a detected collision or a simple vehicle shutdown. During shutdown, for safety purposes, the high-voltage battery can be isolated from the rest of the inverter system. However, the DC link capacitor can remain charged at a high voltage. Various safety requirements stipulate that the high-voltage charge stored on the DC link capacitor must be discharged within a specified time. For example, the U.S. Federal Motor Vehicle Safety Standard (FMVSS) requires that, under certain circumstances, the voltage on the DC link capacitor must be discharged to less than 60V within 5 seconds after shutdown.

[0006] Some conventional inverter systems employ a discharge path through a high-voltage rated transistor coupled in series with a high-wattage resistor. The inventors of the embodiments of this disclosure have recognized that such high-voltage rated transistors and high-wattage resistors can be bulky, require thermal management, and increase the manufacturing cost of the system. Other conventional inverter systems employ a discharge path directly through a high-voltage and high-power rated transistor, thereby creating a high-current short-circuit path over a short duration. However, the inventors of the embodiments of this disclosure have also recognized that the high current flowing through such discharge transistors can reduce their lifetime as this discharge operation is repeated periodically. Embodiments of this disclosure address one or more of these challenges. Summary of the Invention

[0007] The examples in this paper implement a motor drive system configured to use energy transfer to discharge a DC link capacitor.

[0008] According to one embodiment, a motor drive system includes: (i) a DC link capacitor coupled to a DC voltage bus; (ii) a motor including a first winding, a second winding, and a third winding; (iii) an inverter coupled to the DC voltage bus and including: a first phase coupled to the first winding of the motor; a second phase coupled to the second winding of the motor; and a third phase coupled to the third winding of the motor; and (iv) a control circuit coupled to control the inverter, wherein the control circuit is configured to: drive the high-side switch of the first phase of the inverter and drive the low-side switch of the second phase of the inverter to an on state during a transfer period using a high-side PWM signal; and after the transfer period, drive the high-side switch of the first phase to an off state and drive the low-side switch of the second phase to an on state during a discharge period. In some embodiments, the control circuit is configured to transition from the transfer period to the discharge period in response to a monitoring circuit detecting that the voltage of the DC link capacitor has fallen below a voltage threshold. In other embodiments, the control circuit is configured to transition from the transfer period to the discharge period in response to the expiration of a predetermined time of the transfer period. In the same or different embodiments, the high-side PWM signal has a fixed pulse width. In the same or different embodiments, the control circuit is also configured to drive the low-side switch of the first phase of the inverter during the transfer period using a low-side PWM signal, which is the inverted signal of the high-side PWM signal. In the same or different embodiments, the control circuit is also configured to drive the low-side switch of the third phase of the inverter to an on state during both the transfer period and the discharge period. In the same or different embodiments, the high-side PWM signal and the duration of the transfer period are configured such that the peak current through any winding of the motor is insufficient to induce a prime mover.

[0009] According to another embodiment, a control circuit for a motor drive system includes: an input configured to receive a discharge command; and a plurality of outputs configured to control the switching of an inverter powered by a DC voltage bus and coupled to a motor. The control circuit is configured to: in response to the discharge command, drive the high-side switch of a first phase of the inverter and the low-side switch of a second phase of the inverter to an on state during a transition period using a high-side PWM signal; and after the transition period, drive the high-side switch of the first phase to an off state and the low-side switch of the second phase to an on state during a discharge period. In some embodiments, the control circuit is configured to transition from the transition period to the discharge period in response to a monitoring circuit detecting that the DC voltage bus has fallen below a voltage threshold. In other embodiments, the control circuit is configured to transition from the transition period to the discharge period in response to the expiration of a predetermined time of the transition period. In the same or different embodiments, the high-side PWM signal has a fixed pulse width. In the same or different embodiments, the control circuit is further configured to drive the low-side switch of the first phase of the inverter during the transfer period using a low-side PWM signal, the low-side PWM signal being the inverted signal of the high-side PWM signal. In the same or different embodiments, the control circuit is further configured to drive the low-side switch of the third phase of the inverter to an ON state during both the transfer period and the discharge period. In the same or different embodiments, the high-side PWM signal and the duration of the transfer period are configured such that the peak current through any winding of the motor is insufficient to induce the prime mover.

[0010] Another embodiment provides a method for controlling the operation of a motor drive system, the method comprising: (i) transferring energy from a DC link capacitor to the windings of the motor during a transfer period by driving a high-side switch of a first phase of an inverter coupled to the motor and a low-side switch of a second phase of the inverter to an on state using a high-side PWM signal; and (ii) releasing energy from the windings of the motor during a discharge period following the transfer period by driving the high-side switch of the first phase to an off state and the low-side switch of the second phase to an on state. In some embodiments, the method further comprises transitioning from the transfer period to the discharge period in response to detecting that the voltage of the DC link capacitor has fallen below a voltage threshold. In other embodiments, the method further comprises transitioning from the transfer period to the discharge period in response to the expiration of a predetermined time of the transfer period. In the same or different embodiments, the high-side PWM signal has a fixed pulse width. In the same or different embodiments, the method further includes driving the low-side switch of the first phase of the inverter with a low-side PWM signal, which is the inverted signal of the high-side PWM signal, during the transfer period. In the same or different embodiments, the method further includes driving the low-side switch of the third phase of the inverter to an ON state during both the transfer period and the discharge period. In the same or different embodiments, the peak current through the motor windings remains below a current threshold for sensing prime movers during the transfer period. Attached Figure Description

[0011] A more complete understanding of this embodiment can be obtained by referring to the following description taken in conjunction with the accompanying drawings, in which similar reference numerals indicate similar features.

[0012] Figure 1 A schematic diagram of a motor drive system according to an embodiment of the present disclosure is shown.

[0013] Figure 2 A graph illustrating waveforms within a motor drive system according to an embodiment of the present disclosure is shown.

[0014] Figure 3 A schematic diagram of a motor drive system according to an embodiment of the present disclosure is shown.

[0015] Figure 4 A graph illustrating waveforms within a motor drive system according to an embodiment of the present disclosure is shown.

[0016] Figure 5 A method for controlling the operation of a motor drive system according to an embodiment of the present disclosure is illustrated. Detailed Implementation

[0017] Details of one or more embodiments are set forth in the following description and accompanying drawings. Other features will be apparent from the description, the drawings, and the claims. The disclosed embodiments should not be construed as or otherwise used to limit the scope of this disclosure, including the claims. Furthermore, those skilled in the art will understand that the following description has broad application, and the discussion of any embodiment is intended to be an example of that embodiment and is not intended to imply that the scope of this disclosure, including the claims, is limited to that embodiment.

[0018] Various terms are used to refer to specific system components. Different companies may use different names to refer to a component, and this disclosure is not intended to distinguish between components with different names but the same form and function. In the following discussion and in the claims, the terms "comprising" and "including" are used in an open form, and therefore, these terms should be interpreted as meaning "including but not limited to". Furthermore, the terms "coupled" or "coupled" are intended to cover indirect or direct connections. Thus, if a first device is coupled to or coupled to a second device, the connection between the first device and the second device can be achieved through a direct connection or through an indirect connection via other devices and connectors.

[0019] Furthermore, although terms such as “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. Terms such as “first” and “second” may be used only to distinguish one element from another. For example, a first element may be named a second element, and similarly, a second element may be named a first element, without departing from the scope of this disclosure. Moreover, the identification of a “first” element does not necessarily require the presence of a “second” element. As used herein, the term “and / or” includes any and all combinations of one or more of the associated entries listed.

[0020] Figure 1 A schematic diagram of a motor drive system 100 according to an embodiment of the present disclosure is illustrated. The motor drive system 100 may be implemented in any suitable manner according to the operation described herein. In some embodiments, the motor drive system 100 may include a battery 110, contacts 111 and 112, a DC link capacitor 115, a monitoring circuit 116, a control circuit 120, high-side gate drivers 131-133, low-side gate drivers 141-143, an inverter 150, and a motor 180.

[0021] The motor drive system 100 may be powered by a battery 110. The battery 110 may be a high-voltage battery configured to supply power to the inverter 150 and ultimately to the motor 180 to generate prime mover power for, for example, an electric vehicle. The battery 110 may be configured to operate, for example, at 400V or 800V. During operation of the electric vehicle, contacts 111 and 112 may be operated in a closed state to couple the battery 110 across the DC voltage bus VBUS and system ground GND. A DC link capacitor 115 may be coupled to the DC voltage bus VBUS. Specifically, the DC link capacitor 115 may be coupled across the DC voltage bus VBUS and system ground GND. The DC link capacitor 115 may be a large energy storage capacitor that smooths any transient ripple that would otherwise occur on the VBUS, for example, due to switching of the inverter 150. In some embodiments, the DC link capacitor 115 may have a large capacitance in the range of 200μF, 500μF, 1000μF, 1500μF, or greater.

[0022] In some implementations, motor 180 may be a three-phase electric motor. For example, motor 180 may include a first winding L1, a second winding L2, and a third winding L3. Figure 1 As shown, each of the first winding L1, the second winding L2, and the third winding L3 may have a first terminal coupled to be driven by the corresponding phase of the inverter 150 and a second terminal coupled to the common node 181.

[0023] Inverter 150 may be coupled to a DC voltage bus VBUS. Specifically, inverter 150 may be coupled between the DC voltage bus VBUS and system ground GND, and thus may draw power from the DC voltage bus VBUS to drive motor 180. In some embodiments, inverter 150 may be a three-phase inverter. For example, inverter 150 may include: a first phase 151 coupled to a first winding L1 of motor 180 at switching node SW1; a second phase 152 coupled to a second winding L2 of motor 180 at switching node SW2; and a third phase 153 coupled to a third winding L3 of motor 180 at switching node SW3.

[0024] like Figure 1 As shown, the first phase 151 may include a high-side switch 161 coupled between VBUS and SW1, and a low-side switch 171 coupled between SW1 and GND. The second phase 152 may include a high-side switch 162 coupled between VBUS and SW2, and a low-side switch 172 coupled between SW2 and GND. Furthermore, the third phase 153 may include a high-side switch 163 coupled between VBUS and SW3, and a low-side switch 173 coupled between SW3 and GND.

[0025] like Figure 1 As depicted, in some embodiments, the high-side switches 161-163 and low-side switches 171-173 may each be implemented as n-type metal-oxide-semiconductor field-effect transistors (n-type MOSFETs or NMOS transistors). In some embodiments, the high-side switches 161-163 and low-side switches 171-173 may be NMOS transistors formed of silicon carbide (SiC) semiconductor material. In other embodiments, the high-side switches 161-163 and low-side switches 171-173 may be formed of other semiconductor materials, such as silicon (Si) or any other semiconductor material suitable for high-power and high-voltage operation of inverter 150. Although Figure 1 An embodiment in which high-side switches 161-163 and low-side switches 171-173 are implemented as NMOS transistors is illustrated, but high-side switches 161-163 and low-side switches 171-173 can also be implemented using any other suitable transistor type. For example, high-side switches 161-163 and low-side switches 171-173 can also be implemented as insulated-gate bipolar transistors (IGBTs), for example, formed of silicon (Si) or silicon carbide (SiC) or any other semiconductor material suitable for high-power and high-voltage operation of inverter 150. In some embodiments, high-side switches 161-163 and low-side switches 171-173 may each be formed on their own semiconductor die and individually packaged as discrete transistors. In other embodiments, high-side switches 161-163 and low-side switches 171-173 may be formed on the same semiconductor die or on separate semiconductor dies and co-packaged in a single-die or multi-die power module package.

[0026] The control circuit 120 may be implemented in any suitable manner according to the operation described herein. The control circuit 120 may be implemented using software, digital circuitry, analog circuitry, or any suitable combination thereof. For example, in some embodiments, the control circuit 120 may be implemented using a microcontroller unit (MCU) including a digital core, software, memory, and any suitable analog peripherals for interfacing with other components of the motor drive system 100.

[0027] like Figure 1As shown, control circuitry 120 can be coupled to control inverter 150. For example, the control circuitry may include multiple outputs (OUT_HS1, OUT_HS2, OUT_HS3, OUT_LS1, OUT_LS2, and OUT_LS3) configured to control the switching of inverter 150, which can then be coupled to drive motor 180. For example, OUT_HS1 may be configured to drive high-side switch 161 via high-side gate driver 131, and OUT_LS1 may be configured to drive low-side switch 171 via low-side gate driver 141. Similarly, OUT_HS2 may be configured to drive high-side switch 162 via high-side gate driver 132, and OUT_LS2 may be configured to drive low-side switch 172 via low-side gate driver 142. Furthermore, OUT_HS3 may be configured to drive high-side switch 163 via high-side gate driver 133, and OUT_LS3 may be configured to drive low-side switch 173 via low-side gate driver 143.

[0028] like Figure 1 As shown, high-side gate drivers 131-133 can convert high-side control signals HS1, HS2, and HS3 from control circuit 120 into high-side gate drive signals GATE_HS1, GATE_HS2, and GATE_HS3 suitable for directly driving the corresponding gates of high-side switches 161-163. For example, high-side gate drivers 131-133 may include level shifting circuitry and buffering circuitry adapted to directly drive the gates of high-side switches 161-163 to turn these switches on and off at high speed. Similarly, low-side gate drivers 141-143 can convert low-side control signals LS1, LS2, and LS3 from control circuit 120 into low-side gate drive signals GATE_LS1, GATE_LS2, and GATE_LS3 suitable for directly driving the corresponding gates of low-side switches 171-173. For example, the low-side gate drivers 141-143 may include level shifting circuitry and buffer circuitry adapted to directly drive the gates of the low-side switches 171-173 to turn them on and off at high speed. In some embodiments, the high-side gate drivers 131-133 and the low-side gate drivers 141-143 may be implemented in conjunction with, for example... Figure 1The control circuit 120 shown is a separate circuit. In other embodiments, the high-side gate drivers 131-133 and the low-side gate drivers 141-143 may be directly integrated within the control circuit 120. Since the high-side gate drivers 131-133 and the low-side gate drivers 141-143 convert control signals from the control circuit 120 into gate drive signals applied to the gates of the high-side switches 161-163 and the low-side switches 171-173, for the purposes of this disclosure, these high-side switches 161-163 and low-side switches 171-173 may be referred to as being driven by the control circuit 120 or by the corresponding high-side gate drivers 131-133 and low-side gate drivers 141-143.

[0029] Control circuit 120 may include a drive input terminal DRV_IN. During operation of the electric vehicle in which the motor drive system 100 is implemented, control circuit 120 may receive a drive signal DRIVE, which instructs control circuit 120 how to drive inverter 150 (and thus ultimately drive motor 180) to provide the power required by the electric vehicle. Motor drive system 100 may be de-energized in response to certain conditions. For example, when the electric vehicle is switched off, or in the event of a detected collision, contacts 111 and 112 may be forced open to isolate the DC voltage bus VBUS and system ground GND from battery 110. As described in further detail below, control circuit 120 may also receive a discharge command DCD to initiate a controlled discharge of DC link capacitor 115. This discharge improves safety by removing the high voltage present on VBUS when the electric vehicle is switched off.

[0030] like Figure 1 As shown, the control circuit 120 may include an input terminal DCD_IN, which is configured to receive a discharge command DCD. As described in further detail below, the control circuit 120 may drive a specific switch of the inverter 150 in a certain mode to first transfer energy stored as voltage on the DC link capacitor 115 to magnetic flux stored in the windings of the motor 180, and then release that energy from the windings of the motor 180. Figure 2 A graph illustrating the waveforms within the motor drive system 100 during these energy transfer and discharge phases is provided.

[0031] In response to the discharge command DCD, the control circuit 120 can drive the high-side switch 161 of the first phase 151 of the inverter 150 using the high-side PWM signal, and can also drive the low-side switch 172 of the second phase 152 of the inverter 150 to the ON state. For example, as Figure 2As shown, in response to the logic high level of the discharge command DCD at time t1, the control circuit 120 can use the high-side PWM signal to drive (via the high-side gate driver 131) the gate (GATE_HS1) of the high-side switch 161 to achieve the desired effect during the transition period t from time t1 to time t2. TSFR The high-side switch 161 is repeatedly turned on and off during this period. In some embodiments, the high-side PWM signal may have a fixed pulse width. In some embodiments, this fixed pulse width may be programmable and therefore can be set by a system-level designer based on certain parameters, such as the voltage and capacitance of the DC link capacitor 115 and any safety requirements specifying how quickly the voltage of the DC link capacitor 115 must decrease after the motor drive system 100 is powered off.

[0032] During this transfer period t TSFR During this period, the control circuit 120 can also use the low-side PWM signal to drive the low-side switch 171 of the first phase 151 of the inverter 150, where the low-side PWM signal is the inverted signal of the high-side PWM signal. For example, as Figure 2 As shown, in response to the logic high level of the discharge command DCD at time t1, the control circuit 120 can use the low-side PWM signal to drive (via low-side gate driver 141) the gate (GATE_LS1) of the low-side switch 171 to achieve the desired effect during the transition period t from time t1 to time t2. TSFR During this period, the low-side switch 171 is repeatedly turned on and off. Similarly... Figure 2 As shown, the low-side PWM signal driving the gate (GATE_LS1) of the low-side switch 171 can be the inverted signal of the high-side PWM signal driving the gate (GATE_HS1) of the high-side switch 161. Therefore, during the transition period t from time t1 to time t2... TSFR During this period, the high-side switch 161 and the low-side switch 162 can be turned on and off alternately. In some embodiments, the high-side PWM signal and the low-side PWM signal that drive the high-side switch 161 and the low-side switch 171 respectively can be configured to not overlap to prevent the high and uncontrolled shoot-through current that might occur if both the high-side switch 161 and the low-side switch 171 are kept on at the same time.

[0033] By alternately turning the high-side switch 161 and the low-side switch 171 on and off relative to each other, and by keeping the low-side switch 172 on, the control circuit 120 effectively uses the first winding L1 and the second winding L2 of the motor 180 as inductors for the buck converter, with the output shorted to system ground GND. For example, when the high-side switch 161 is on, the low-side switch 171 is off, and the low-side switch 172 is on, a discharge path can be formed from the DC link capacitor 115, through the high-side switch 161, through the first winding L1 and the second winding L2 of the motor 180, and through the low-side switch 172 to system ground GND. During this first PWM state, current can flow from the DC link capacitor 115 to system ground GND via the discharge path, thereby reducing the voltage held on the DC voltage bus VBUS by the DC link capacitor 115. Furthermore, the value of the current can increase with the increase of the magnetic flux stored in the inductance of the first winding L1 and the second winding L2. Therefore, the energy stored as voltage on the DC voltage bus VBUS by the DC link capacitor 115 can be transferred to the magnetic flux stored by the first winding L1 and the second winding L2.

[0034] Conversely, when the high-side switch 161 is in the off state, the low-side switch 171 is in the on state, and the low-side switch 172 is in the on state, the following can be formed: Figure 1 The freewheeling path is shown. During this second PWM state, the freewheeling path allows current to recirculate from system ground GND through low-side switch 171, through the first winding L1 and the second winding L2, and through low-side switch 172. The voltage drop across the resistors caused by the current through low-side switches 172 and 171 provides a small negative voltage across the first winding L1 and the second winding L2. This negative voltage causes the recirculated current through the freewheeling path to decrease at a rate proportional to the negative voltage drop during the second PWM state.

[0035] Although the low-side switch 171 is described above as being in the transfer period t TSFR During this period, it is driven by the low-side PWM signal, but in some implementations, the low-side switch 171 can be used during the transition period t. TSFR During this period, it remains in the off state. In this implementation, the recirculating current of the freewheeling path can flow through the body diode of the low-side switch 171 during the second PWM state, instead of through the MOSFET channel of the low-side switch 171. The additional voltage drop caused by the current flowing through the body diode of the low-side switch 171 instead of the MOSFET channel can provide an additional negative voltage drop across the first winding L1 and the second winding L2, thereby causing the recirculating current through the freewheeling path to decrease at a faster rate during the second PWM state.

[0036] During the transition period t from time t1 to time t2 TSFR Subsequently, the control circuit 120 can discharge during the period t spanning from time t2 to time t3. DIS The high-side switch 161 of the first phase 151 is driven to the off state, and the low-side switch 172 of the second phase 152 of the inverter 150 is driven to the on state. During this discharge period t DIS During this period, the control circuit 120 may optionally drive the low-side switch 171 to the ON state. The resistive voltage drop caused by the current flowing through the low-side switches 172 and 171 provides a small negative voltage drop across the first winding L1 and the second winding L2. This negative voltage causes the recirculating current through the freewheeling path to decrease at a rate proportional to the negative voltage drop. Figure 3 As shown, the discharge period t DIS It can be designed to have a sufficiently long time interval to allow the recirculating current through the freewheeling path to dissipate to zero.

[0037] Although the low-side switch 171 is described above as being in the discharge period t from time t2 to time t3 DIS During this period, it is driven to be in the on state, but in some implementations, the low-side switch 171 can be in the discharge period t. DIS During this period, it remains in the off state. In this implementation, the recirculating current in the freewheeling path can flow through the body diode of the low-side switch 171 instead of through the MOSFET channel. The additional voltage drop caused by the current flowing through the body diode of the low-side switch 171 instead of the MOSFET channel can provide an additional negative voltage drop across the first winding L1 and the second winding L2, thereby causing the recirculating current through the freewheeling path to decrease at a faster rate.

[0038] During the discharge period t DIS During this period, the larger voltage drop across the body diode of the low-side switch 171, rather than the MOSFET channel, allows for faster discharge of the magnetic flux stored in the first winding L1 and the second winding L2, but at the cost of more heat generation. Therefore, system designers can select the discharge period t based on a balance between timing and thermal considerations. DIS During this period, the low-side switch 171 is driven to be in the on or off state. In some embodiments, during the discharge period t DIS The option to drive the low-side switch 171 to an on or off state during this period can be programmable (e.g., based on a programmable memory or register in the control circuitry 120). In some embodiments, during the transition period t TSFR The option to drive the low-side switch 171 using the low-side PWM signal or alternatively drive the low-side switch to the off state can be similarly programmable.

[0039] In some implementations, the control circuit 120 may be configured to respond to the transfer period t TSFR The scheduled time expires to transfer from the period t TSFR Transition to discharge period t DIS The predetermined time can be set long enough to allow the voltage of the DC link capacitor 115 on the DC voltage bus VBUS to drop to the voltage threshold V. DCTH The following describes an implementation where the predetermined time can be programmable, allowing system-level designers to set the transition period t based on, for example, the voltage level of VBUS during operation and the capacitance of DC link capacitor 115. TSFR It is flexible at times.

[0040] In other embodiments, the control circuit 120 may be configured to respond to the monitoring circuit detecting that the voltage of the DC link capacitor 115 has dropped to a voltage threshold V. DCTH The following will be based on the transition period t TSFR Transition to discharge period t DIS For example, such as Figure 1 As shown, resistors 117 and 118 can form a voltage divider configured to output a voltage signal proportional to VBUS. Monitoring circuit 116 can monitor the voltage signal proportional to VBUS and can detect when VBUS drops to a voltage threshold V. DCTH The following signals are sent to the control circuit. In some implementations, the voltage threshold V... DCTH It can be, for example, 60V. In response to monitoring circuit 116, control circuit 120 can then control the voltage from the transition period t. TSFR The driving mode changes to the discharge period t DIS The driving mode.

[0041] The pulse width modulation scheme described in this paper has several advantages over systems that rely solely on the turn-on and discharge paths of one or more transistors in the inverter circuit. For example, by using the transfer time t TSFR During this period, the high-side PWM signal drives the high-side switch 161 and the low-side switch 172 to be in the on state. The control circuit 120 can control the high-side switch 161 to be in the on state during the transition period t. TSFR During this period, the DC link capacitor 115 on the DC voltage bus VBUS is discharged at a controlled rate, while the current through the first winding L1 and the second winding L2 increases. Furthermore, contrary to driving the high-side switch 161 to a continuously on state, during the transition period t... TSFR Pulse width modulation of the high-side switch 161 during this period can disperse the thermal stress borne by the high-side switch 161 over a longer time period, thereby reducing the transfer time t. TSFR Thermal strain on the device during the period.

[0042] Motor 180 can be configured such that during operation of the electric vehicle, a minimum drive current needs to be applied by each of the three phases of inverter 150 to the corresponding windings L1, L2, and L3 of motor 180 to induce prime mover in motor 180. During the transfer period t TSFR During this period, the peak current through any winding of motor 180 can be less than the minimum drive current required to induce the prime mover in motor 180. Furthermore, the discharge current through the first winding L1 and the second winding L2 ( Figure 1 ), or the discharge current that flows through the first winding L1 and is shunt between the second winding L2 and the third winding L3 ( Figure 3 ) will be in the transfer period t TSFR During this period, the flow occurs simultaneously, rather than in three equally spaced phases as applied by the inverter 150 to the motor 180 during normal operation of the electric vehicle. Furthermore, during the discharge period t... DIS During this period, the recirculating current flowing through the winding in the freewheeling path will also flow through the winding simultaneously, instead of flowing through the winding in three equally spaced phases. Therefore, when the motor drive system 100 is de-energized, the motor drive system 100 can use the winding of the motor 180 to help discharge the DC link capacitor 115 on the DC voltage bus VBUS without generating any unwanted prime mover in the motor 180.

[0043] Figure 3 A schematic diagram of a motor drive system 300 according to an embodiment of the present disclosure is illustrated. The motor drive system 300 can be implemented in any suitable manner according to the operation described herein. In some embodiments, the motor drive system 300 may include a battery 110, contacts 111 and 112, a DC link capacitor 115, a monitoring circuit 116, a control circuit 120, high-side gate drivers 131-133, low-side gate drivers 141-143, an inverter 150, and a motor 180, each of which may be associated with the above-described embodiments. Figure 1 It is implemented and operated in a similar manner to that described in the motor drive system 100.

[0044] Furthermore, the implementation of the control circuit 120 in the motor drive system 300 can also be configured to, during the transfer period t TSFR During the period and during the discharge period t DIS During this period, the low-side switch 173 of the third phase 153 of the inverter 150 is driven into the ON state. For example, as Figure 4 As shown, during the transition period t TSFR During the period and during the discharge period t DIS During this period, the gate (GATE_LS3) of low-side switch 173 can be kept high in a similar manner to the gate (GATE_LS2) of low-side switch 172. Therefore, return to reference. Figure 3In the first PWM state (see above) Figure 1 The discharge path formed during the described period may include two parallel branches, including a first branch through the second winding L2 and the low-side switch 172 of the second phase 152, and a second branch through the third winding L3 and the low-side switch 173 of the third phase 153. Similarly, during the transfer period t TSFR The second PWM state (see above) Figure 1 (Description) During and also during the discharge period t DIS The follow-through path formed during this period may include two parallel branches, including a first branch through the second winding L2 and the low-side switch 172 of the second phase 152, and a second branch through the third winding L3 and the low-side switch 173 of the third phase 153.

[0045] By utilizing parallel branches, the current that would normally flow through the second winding L2 can be shunt between the second winding L2 and the third winding L3. Similarly, the current that would normally flow through the low-side switch 172 can be shunt between the low-side switch 172 and the low-side switch 173. Therefore, the current during the transfer period t can be reduced. TSFR and discharge period t DIS During this period, the low-side switch 172 would normally withstand electrical and thermal strain.

[0046] Figure 5 A method for controlling the operation of a motor drive system according to an embodiment of the present disclosure is illustrated. Method 500 can be performed by any suitable mechanism, such as a separate control circuit 120 or a combination of a control circuit with other elements of motor drive system 100 and motor drive system 300. Method 500 can utilize... Figure 5 The steps shown in the diagram can be performed in fewer or more steps. Furthermore, steps in method 500 can be omitted, repeated, executed in parallel, or combined with... Figure 5 The steps shown may be executed in different orders or recursively. As an example, steps 506 and / or 512 may be omitted. One or more steps of method 500, although shown in order, may be executed simultaneously or in a reordered manner. As an example, step 506 may be optional and may be executed concurrently with step 504. As another example, step 512 may be executed concurrently with steps 504-510.

[0047] Step 502 may include receiving a discharge command to discharge the DC link capacitor. For example, as referenced above. Figure 1 As described, the control circuit 120 can receive a discharge command DCD, which instructs the control circuit 120 to control the discharge of the DC link capacitor 115.

[0048] Step 504 may include transferring energy from the DC link capacitor to the motor windings during the transfer period by driving the high-side switch of the first phase of the inverter coupled to the motor using a high-side PWM signal and driving the low-side switch of the second phase of the inverter to an on state. For example, as referenced above Figure 1 and Figure 2 As described, the control circuit 120 can operate during the transfer period t TSFR During this period, the high-side switch 161 of the first phase 151 of the inverter 150 is driven (via the high-side gate driver 131) using a high-side PWM signal. The control circuit 120 can also drive the low-side switch 172 of the second phase 152 of the inverter 150 to the ON state (via the low-side gate driver 142). This is achieved by turning the high-side switch 161 on and off, and by controlling the transition period t... TSFR During this period, the low-side switch 172 is kept on, and the control circuit 120 effectively uses the first winding L1 and the second winding L2 of the motor 180 as the inductors of the buck converter, with the output shorted to system ground GND. Therefore, during the transfer period t TSFR During this period, the energy stored as voltage on the DC voltage bus VBUS by the DC link capacitor 115 can be transferred to the magnetic flux stored by the first winding L1 and the second winding L2.

[0049] Step 506 may include driving the low-side switch of the first phase of the inverter during the transfer period using a low-side PWM signal, which is the inverted signal of the high-side PWM signal. For example, as referenced above... Figure 1 As described, the control circuit 120 can optionally be used during the transition period t. TSFR During this period, the low-side switch 171 of the first phase 151 of the inverter 150 is driven (via the low-side gate driver 141) using a low-side PWM signal. The low-side PWM signal driving the low-side switch 171 may be an inverted signal of the high-side PWM signal driving the high-side switch 161, so as to turn the high-side switch 161 and the low-side switch 171 on and off in an alternating manner with respect to each other.

[0050] Step 508 may include transitioning from the transfer period to the discharge period. For example, as referenced above. Figure 1 and Figure 2 As described, in some implementations, the control circuit 120 may respond to the transfer period t TSFR (exist Figure 2 The expiration of the scheduled time (from time t1 to time t2) is used to transition from the transition period t. TSFR Transition to discharge period t DIS As mentioned above. Figure 2As described, in other embodiments, control circuit 120 may respond to monitoring circuit 116 detecting that the voltage of the DC link capacitor has dropped to a voltage threshold V. DCTH The following will be based on the transition period t TSFR Transition to discharge period t DIS .

[0051] Step 510 may include releasing energy from the motor windings during a discharge period following the transfer period by driving the high-side switch of the first phase to the off state and driving the low-side switch of the second phase to the on state. For example, as referenced above. Figure 1 and Figure 2 As described, the control circuit 120 can achieve the following during the transfer period t by driving the low-side switch 172 of the second phase 152 to the on state while driving the high-side switch 161 of the first phase 151 to the off state. TSFR The subsequent discharge period t DIS During this period, energy is controlled to be released from the windings of motor 180. During this discharge period t... DIS During this period, the recirculating current through the freewheeling path can decrease at a rate proportional to the voltage drop across the low-side switch 172 and the low-side switch 171, thereby discharging the magnetic flux in the windings L1 and L2 of the motor 180.

[0052] Step 512 may include driving the low-side switch of the third phase of the inverter to the ON state during the transfer period and during the discharge period. For example, as referenced above. Figure 3 and Figure 4 As described, control circuitry 120 can drive low-side switch 173 of the third phase 153 of inverter 150 to an ON state (via low-side gate driver 143), similar to low-side switch 172 of the second phase 152 of inverter. By creating a parallel current path through both low-side switch 172 and low-side switch 173, the current during the transfer period t can be reduced. TSFR and discharge period t DIS During this period, the low-side switch 172 would normally withstand electrical and thermal strain.

[0053] Although examples have been described above, other modifications and variations may be made from this disclosure without departing from the spirit and scope of these examples. The description of the various embodiments above exemplifies the principles of the invention. Based on the above disclosure, many variations and modifications will become apparent to those skilled in the art. The following claims are intended to encompass all such variations and modifications.

Claims

1. A method for controlling the operation of a motor drive system, the method comprising: Energy is transferred from the DC link capacitor to the motor windings during the transfer period by using a high-side PWM signal to drive the high-side switch of the first phase of the inverter coupled to the motor and driving the low-side switch of the second phase of the inverter to be in the on state. as well as Energy is released from the motor windings during the discharge period following the transfer period by driving the high-side switch of the first phase to the off state and driving the low-side switch of the second phase to the on state.

2. The method of claim 1, further comprising transitioning from the transfer period to the discharge period in response to detecting that the voltage of the DC link capacitor has fallen below a voltage threshold.

3. The method of claim 1, further comprising transitioning from the transfer period to the discharge period in response to the expiration of a predetermined time of the transfer period.

4. The method according to claim 1, further comprising driving a low-side switch of the first phase of the inverter with a low-side PWM signal during the transfer period, wherein the low-side PWM signal is the inverse of the high-side PWM signal.

5. The method of claim 1, further comprising driving the low-side switch of the third phase of the inverter to an on state during the transfer period and during the discharge period.

6. The method of claim 1, wherein the high-side PWM signal has a fixed pulse width.

7. The method of claim 1, wherein the peak current through the winding of the motor during the transfer period is insufficient to induce a driving force in the motor.

8. A motor drive system, the motor drive system comprising: DC link capacitor, the DC link capacitor being coupled to a DC voltage bus; A motor, the motor comprising a first winding, a second winding and a third winding; An inverter, coupled to the DC voltage bus, includes: The first phase is coupled to the first winding of the motor; The second phase, coupled to the second winding of the motor; and The third phase, which is coupled to the third winding of the motor; A control circuit, coupled to control the inverter, wherein the control circuit is configured to: During the transfer period, the high-side switch of the first phase of the inverter is driven by the high-side PWM signal, and the low-side switch of the second phase of the inverter is driven to the on state; and After the transfer period, during the discharge period, the high-side switch of the first phase is driven to the off state and the low-side switch of the second phase is driven to the on state.

9. The motor drive system of claim 8, wherein the control circuit is configured to transition from the transfer period to the discharge period in response to the monitoring circuit detecting that the voltage of the DC link capacitor has fallen below a voltage threshold.

10. The motor drive system of claim 8, wherein the control circuit is configured to transition from the transfer period to the discharge period in response to the expiration of a predetermined time of the transfer period.

11. The motor drive system of claim 8, wherein the control circuit is further configured to drive the low-side switch of the first phase of the inverter during the transfer period using a low-side PWM signal, the low-side PWM signal being the inverse of the high-side PWM signal.

12. The motor drive system of claim 8, wherein the control circuit is further configured to drive the low-side switch of the third phase of the inverter to an on state during the transfer period and during the discharge period.

13. The motor drive system of claim 8, wherein the duration of the high-side PWM signal and the transition period is configured such that the peak current through any winding of the motor is insufficient to sense the prime mover.

14. A control circuit for a motor drive system, the control circuit comprising: The input terminal is configured to receive a discharge command; and Multiple output terminals, configured to control the switching of an inverter powered by a DC voltage bus and coupled to a motor; and The control circuit is configured as follows: In response to the discharge command, during the transfer period, the high-side switch of the first phase of the inverter is driven by the high-side PWM signal and the low-side switch of the second phase of the inverter is driven to be in the on state. as well as After the transfer period, during the discharge period, the high-side switch of the first phase is driven to the off state and the low-side switch of the second phase is driven to the on state.

15. The control circuit of claim 14, wherein the control circuit is configured to transition from the transfer period to the discharge period in response to a monitoring circuit detecting that the DC voltage bus has fallen below a voltage threshold.

16. The control circuit of claim 14, wherein the control circuit is configured to transition from the transfer period to the discharge period in response to the expiration of a predetermined time of the transfer period.

17. The control circuit of claim 14, wherein the control circuit is further configured to drive the low-side switch of the first phase of the inverter during the transfer period using a low-side PWM signal, the low-side PWM signal being the inverted signal of the high-side PWM signal.

18. The control circuit of claim 14, wherein the control circuit is further configured to drive the low-side switch of the third phase of the inverter to an on state during the transfer period and during the discharge period.

19. The control circuit of claim 14, wherein the duration of the high-side PWM signal and the transition period is configured such that the peak current through any winding of the motor is insufficient to sense the prime mover.

20. The control circuit of claim 14, wherein the high-side PWM signal has a fixed pulse width.

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