A self-powered dual-mode multiplexing surge suppression circuit and system

Abstract

The application relates to the field of power electronics, in particular to a self-powered dual-mode multiplexing surge suppression circuit and system. The circuit comprises a floating ground voltage stabilizing sub-circuit, a switching sub-circuit, a control sub-circuit, a mode switching sub-circuit, a power sub-circuit and a power rectifier bridge. When AC power is applied, the floating ground voltage stabilizing sub-circuit generates an auxiliary voltage, at this time, the control sub-circuit does not generate a control signal, and the mode switching sub-circuit enters a surge suppression mode; at the same time when AC power is applied, the power rectifier bridge converts AC power into DC power input to the power sub-circuit, and the power sub-circuit generates a bus voltage; when the bus voltage gradually rises to a preset threshold, the control sub-circuit makes the switching sub-circuit conductive, so that the auxiliary voltage is input to the mode switching sub-circuit through the switching sub-circuit, the mode switching sub-circuit enters a full-conduction switching mode, and the power sub-circuit is efficiently and stably conducted, thereby improving the stability of the low-conduction-loss surge suppression circuit.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a self-powered dual-mode multiplexing surge suppression circuit and system. Background Technology

[0002] In AC / DC switching power supplies, the large-capacity bus capacitor connected in parallel at the input terminal is nearly short-circuited at the moment of power-on. The resulting surge current can easily damage the rectifier bridge, blow fuses, or even cause the system to trip. Therefore, surge suppression devices must be connected in series in the charging circuit. As power supply application environments become increasingly complex, the industry's requirements for surge suppression solutions in terms of control simplicity, operational stability, and long-term reliability are increasing.

[0003] Existing surge suppression technologies mainly include passive device solutions (power resistors, NTC thermistors), relay bypass solutions, and active constant current / constant power solutions. Passive solutions suffer from overheating burnout, hot restart failure, and poor wide-temperature characteristics; relay solutions are bulky, generate mechanical noise, and are prone to arcing and erosion of contacts, resulting in insufficient reliability under frequent switching; while active constant current / constant power solutions can achieve precise current limiting, the control circuit usually requires an independent auxiliary power supply, and the power MOSFET still needs to be continuously turned on to transfer load current in steady state, so conduction losses cannot be eliminated. If additional relays or parallel bypass MOSFETs are added to reduce these losses, it will lead to complex control, more points of failure, and unpredictable problems, resulting in low circuit stability. Summary of the Invention

[0004] The present invention aims to provide a self-powered dual-mode multiplexing surge suppression circuit and system to solve the above-mentioned technical problems and improve the stability of low conduction loss surge suppression circuit.

[0005] To solve the above-mentioned technical problems, the present invention provides a self-powered dual-mode multiplexing surge suppression circuit, including a floating ground regulated power supply sub-circuit, a switching sub-circuit, a control sub-circuit, a mode switching sub-circuit, a power sub-circuit, and a power rectifier bridge; The first input terminal of the power rectifier bridge serves as the AC L-line interface, the second input terminal of the power rectifier bridge serves as the AC N-line interface, the positive output terminal of the power rectifier bridge is electrically connected to the input terminal of the power sub-circuit, and the negative output terminal of the power rectifier bridge is electrically connected to the negative output terminal of the power sub-circuit. The first input terminal of the floating ground regulated power supply sub-circuit is electrically connected to the first input terminal of the power rectifier bridge, the second input terminal of the floating ground regulated power supply sub-circuit is electrically connected to the second input terminal of the power rectifier bridge, the first output terminal of the floating ground regulated power supply sub-circuit is electrically connected to the input terminal of the switching sub-circuit, and the second output terminal of the floating ground regulated power supply sub-circuit is electrically connected to the positive output terminal of the power sub-circuit. The output terminal of the switch sub-circuit is electrically connected to the control terminal of the mode switching sub-circuit, the control input terminal of the switch sub-circuit is electrically connected to the first output terminal of the control sub-circuit, and the control output terminal of the switch sub-circuit is electrically connected to the second output terminal of the control sub-circuit. The input terminal of the control sub-circuit is electrically connected to the positive output terminal of the power sub-circuit; The input terminal of the mode switching sub-circuit is electrically connected to the control output terminal of the power sub-circuit, and the output terminal of the mode switching sub-circuit is electrically connected to the control input terminal of the power sub-circuit. The drive control terminal of the power sub-circuit is electrically connected to the first output terminal of the floating ground regulated power supply sub-circuit. When AC power is applied, the floating ground regulated power supply subcircuit generates an auxiliary voltage. At this time, the control subcircuit does not generate a control signal, and the mode switching subcircuit enters the surge suppression mode. When AC power is applied, the power rectifier bridge converts the AC power into DC power and inputs it to the power sub-circuit, which then generates a bus voltage. When the bus voltage gradually rises to a preset threshold, the control sub-circuit turns on the switching sub-circuit, thereby inputting the auxiliary voltage to the mode switching sub-circuit through the switching sub-circuit. The mode switching sub-circuit then enters a fully on switching mode, thereby enabling the power sub-circuit to conduct efficiently and steadily.

[0006] This invention achieves surge suppression mode by having the floating ground regulated power supply subcircuit generate an auxiliary voltage after AC power-on, before the mode switching subcircuit is controlled by the control subcircuit. Simultaneously with AC power-on, the AC power is converted to DC power by the power rectifier bridge, and the power subcircuit generates a bus voltage. When the bus voltage gradually rises to a preset threshold, the control subcircuit controls the switching subcircuit to conduct, thereby inputting the auxiliary voltage to the mode switching subcircuit. The mode switching subcircuit then enters a fully conducting switching mode, enabling the power subcircuit to conduct efficiently and steadily. This invention utilizes two modes of the mode switching subcircuit to simultaneously achieve surge suppression and full conduction functions without introducing additional components or circuits. Therefore, the circuit is simple and effectively avoids the problems of numerous fault points and difficult troubleshooting caused by complex circuits, improving the stability of the low-conduction-loss surge suppression circuit.

[0007] Furthermore, the mode switching sub-circuit includes a first NMOS transistor and a first resistor, wherein: The gate of the first NMOS transistor serves as the control terminal of the mode switching sub-circuit, the drain of the first NMOS transistor serves as the input terminal of the mode switching sub-circuit, and the source of the first NMOS transistor serves as the output terminal of the mode switching sub-circuit. The first end of the first resistor is electrically connected to the gate of the first NMOS transistor, and the second end of the first resistor is electrically connected to the source of the first NMOS transistor.

[0008] In the above scheme, when AC power is applied, the first NMOS transistor is pulled down to the off state by the first resistor, thereby the mode switching sub-circuit enters the surge suppression mode; when the bus voltage rises to a preset threshold, the control sub-circuit controls the switching sub-circuit to pull up the gate voltage of the NMOS transistor, the mode switching sub-circuit enters the fully on switching mode, the first NMOS transistor short-circuits the second resistor and the first NPN transistor, so that the charging current in the power sub-circuit flows through the first NMOS transistor.

[0009] It should be noted that the first NMOS transistor is connected in parallel across the second resistor and the first NPN transistor. Its drain-source voltage Vds is equal to the sum of the voltage drop across the second resistor V_Rcs and the voltage drop across the first NPN transistor Vbe1. This Vds is clamped by the first Zener diode. Therefore, the first NMOS transistor can be a low-voltage NMOS transistor with extremely low on-resistance and high current capacity, significantly reducing cost and conduction losses.

[0010] Furthermore, the power sub-circuit includes a second NMOS transistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a bus capacitor, and a wide-temperature stabilization module, wherein: The drain of the second NMOS transistor serves as the input terminal of the power sub-circuit, the source of the second NMOS transistor is electrically connected to the first terminal of the second resistor, and the gate of the second NMOS transistor is electrically connected to the second terminal of the fifth resistor. The second terminal of the second resistor is electrically connected to the first terminal of the wide-temperature stable module; The first end of the third resistor is electrically connected to the first end of the second resistor, and the second end of the third resistor is electrically connected to the second end of the fourth resistor; The first end of the fourth resistor is electrically connected to the drain of the second NMOS transistor, and the second end of the fourth resistor is electrically connected to the third end of the wide-temperature stable module. The first end of the fifth resistor is electrically connected to the first end of the fourth resistor, and the second end of the fifth resistor is electrically connected to the fourth end of the wide-temperature stable module. The second terminal of the wide-temperature stabilization module is electrically connected to the positive terminal of the bus capacitor; The positive terminal of the bus capacitor serves as the positive output terminal of the power sub-circuit, and the negative terminal of the bus capacitor serves as the negative output terminal of the power sub-circuit.

[0011] Furthermore, the wide-temperature stabilization module includes a first NPN transistor, a second NPN transistor, and a first Zener diode, wherein: The collector of the first NPN transistor serves as the first terminal of the wide-temperature stabilization module, the emitter of the first NPN transistor serves as the second terminal of the wide-temperature stabilization module, and the base and collector of the first NPN transistor are electrically connected. The base of the second NPN transistor serves as the third terminal of the wide-temperature stability module, the emitter of the second NPN transistor is electrically connected to the cathode of the first Zener diode, and the collector of the second NPN transistor serves as the fourth terminal of the wide-temperature stability module. The anode of the first Zener diode is electrically connected to the emitter of the first NPN transistor.

[0012] In the above scheme, after AC power is applied, the power rectifier bridge converts the AC power into DC power Vin. At this time, the bus voltage Vbus is equal to 0V, and the drain-source voltage difference of the second NMOS transistor is at its maximum (close to Vin). The third and fourth resistors sample the voltage across the drain and source of the second NMOS transistor and feed it back to the base of the second NPN transistor, controlling the conduction level of the second NPN transistor and limiting the initial charging current to a safe level. The charging current flows through the second NMOS transistor, the second resistor, and the first NPN transistor to charge the bus capacitor. As the bus voltage Vbus on the bus capacitor gradually increases, the voltage difference across the second NMOS transistor gradually decreases, the feedback effect of the third and fourth resistors weakens, and the charging current is precisely set by the first Zener diode.

[0013] The first and second NPN transistors are of the same type, preferably dual transistors in the same package (such as the BC847BD in an SOT-363 package). The two dies are integrated on the same substrate, with highly consistent process parameters and good thermal coupling. The charging current is determined by the voltage balance of two parallel branches: the first branch is the series connection of the second NPN transistor's Vbe2 and the voltage Vzd of the first Zener diode; the second branch is the series connection of the voltage drop V_Rcs across the second resistor and the Vbe1 of the first NPN transistor. During steady-state operation, the voltages at the terminals of the two branches are equal. ; Organized ; When the ambient temperature changes, the drift amplitudes of Vbe1 and Vbe2 are equal and their directions are the same, thus canceling each other out in the equation. ; This ensures that the voltage across the second resistor is determined solely by the voltage Vzd of the first Zener diode, which has an extremely low temperature coefficient, maintaining high stability across the entire temperature range. During normal startup, temperature-compensated precise constant current charging is achieved. Under conditions of high voltage differential or output short circuit, the system automatically switches to an approximate constant power mode, automatically reducing the charging current and keeping the instantaneous power consumption of the power transistor within a preset safe range.

[0014] Furthermore, the power sub-circuit also includes a third Zener diode, wherein: The anode of the third Zener diode is electrically connected to the source of the second NMOS transistor, and the cathode of the third Zener diode is electrically connected to the gate of the second NMOS transistor.

[0015] Furthermore, the power sub-circuit also includes a seventh resistor, wherein: The first end of the seventh resistor is electrically connected to the gate of the second NMOS transistor, and the second end of the seventh resistor is electrically connected to the first output terminal of the floating ground regulated power supply sub-circuit.

[0016] In the above scheme, the third Zener diode implements normal driving protection and transient abnormal protection in the circuit.

[0017] Normal drive protection: When the mode switching sub-circuit enters the fully on switch mode, the second NPN transistor is turned off, and the auxiliary power supply Vcc charges the gate of the second NMOS transistor through the seventh resistor. The third Zener diode precisely clamps the gate-source voltage Vgs of the second NMOS transistor at a preset safe value (such as 15V), ensuring that the second NMOS transistor is deeply saturated while preventing the gate oxide layer from being damaged due to overvoltage.

[0018] Transient anomaly protection: Under any abnormal operating conditions (such as improper control timing causing the second NPN transistor to unexpectedly turn off at the initial stage of power-on), the third Zener diode can immediately clamp the Vgs of the second NMOS transistor within a safe range, providing a hardware-level last line of defense.

[0019] Furthermore, the floating ground regulated power supply sub-circuit includes an isolation module, a signal rectifier bridge, a sixth resistor, a second Zener diode, and a third capacitor, wherein: The first input terminal of the isolation module serves as the first input terminal of the floating ground regulated power supply sub-circuit, the second input terminal of the isolation module serves as the second input terminal of the floating ground regulated power supply sub-circuit, the first output terminal of the isolation module is electrically connected to the first input terminal of the signal rectifier bridge, and the second output terminal of the isolation module is electrically connected to the second input terminal of the signal rectifier bridge. The positive output terminal of the signal rectifier bridge is electrically connected to the first terminal of the sixth resistor, and the negative output terminal of the signal rectifier bridge serves as the second output terminal of the floating ground regulated power supply sub-circuit. The second end of the sixth resistor serves as the first output terminal of the floating ground regulated power supply sub-circuit. The cathode of the second Zener diode is electrically connected to the second terminal of the sixth resistor, and the anode of the second Zener diode is electrically connected to the negative output terminal of the signal rectifier bridge. The first terminal of the third capacitor is electrically connected to the cathode of the second Zener diode, and the second terminal of the third capacitor is electrically connected to the anode of the second Zener diode.

[0020] Furthermore, the isolation module includes a first capacitor and a second capacitor, wherein: The first terminal of the first capacitor serves as the first input terminal of the isolation module, and the second terminal of the first capacitor serves as the first output terminal of the isolation module. The first end of the second capacitor serves as the second input terminal of the isolation module, and the second end of the second capacitor serves as the second output terminal of the isolation module.

[0021] The above solution draws power directly from the AC input using dual capacitors as isolation modules and supplies power to the switch sub-circuit in a floating manner. There is no need to introduce an additional isolation transformer or independent auxiliary power supply module. The dual capacitor structure also forms a capacitive isolation barrier, which enables electrical isolation between the subsequent circuit and the AC side, and allows the output auxiliary voltage reference ground to be freely floated on the bus voltage.

[0022] Furthermore, the switching sub-circuit includes an isolation optocoupler, wherein: The first pin of the isolation optocoupler serves as the control input terminal of the switching sub-circuit, the second pin of the isolation optocoupler serves as the control output terminal of the switching sub-circuit, the third pin of the isolation optocoupler serves as the output terminal of the switching sub-circuit, and the fourth pin of the isolation optocoupler serves as the input terminal of the switching sub-circuit.

[0023] In the above scheme, the switching on and off of the first NMOS transistor is controlled by an isolation optocoupler, achieving electrical isolation between the collector and emitter sides of the optocoupler and the control sub-circuit side, preventing false turn-on or false turn-off caused by signal fluctuation crosstalk. Furthermore, the switching sub-circuit can also implement the switching function in various ways, including but not limited to RC delay networks, voltage detection triggering, and microcontroller control, enabling flexible application of switch control.

[0024] The present invention also provides a self-powered dual-mode multiplexing surge suppression system, including the self-powered dual-mode multiplexing surge suppression circuit, an AC power supply, and a load; The L line of the AC power supply is electrically connected to the first input terminal of the power rectifier bridge of the self-powered dual-mode multiplexed surge suppression circuit, and the N line of the AC power supply is electrically connected to the second input terminal of the power rectifier bridge of the self-powered dual-mode multiplexed surge suppression circuit. The load is electrically connected to the positive output terminal of the power sub-circuit of the self-powered dual-mode multiplexed surge suppression circuit.

[0025] This invention achieves surge suppression mode by having the floating ground regulated power supply subcircuit generate an auxiliary voltage after AC power-on, before the mode switching subcircuit is controlled by the control subcircuit. Simultaneously with AC power-on, the AC power is converted to DC power by the power rectifier bridge, and the power subcircuit generates a bus voltage. When the bus voltage gradually rises to a preset threshold, the control subcircuit controls the switching subcircuit to conduct, thereby inputting the auxiliary voltage to the mode switching subcircuit. The mode switching subcircuit then enters a fully conducting switching mode, enabling the power subcircuit to conduct efficiently and steadily. This invention utilizes two modes of the mode switching subcircuit to simultaneously achieve surge suppression and full conduction functions without introducing additional components or circuits. Therefore, the circuit is simple and effectively avoids the problems of numerous fault points and difficult troubleshooting caused by complex circuits, improving the stability of the low-conduction-loss surge suppression circuit. Attached Figure Description

[0026] Figure 1 This is a structural diagram of a self-powered dual-mode multiplexed surge suppression circuit provided in an embodiment of the present invention; Figure 2 This is a structural diagram of a self-powered dual-mode multiplexed surge suppression circuit provided in an embodiment of the present invention; Figure 3 A waveform diagram of a self-powered dual-mode multiplexed surge suppression circuit in surge suppression mode, provided for an embodiment of the present invention; Figure 4 A waveform diagram of a key node during mode switching of a self-powered dual-mode multiplexed surge suppression circuit provided in an embodiment of the present invention; Figure 5 This is a structural diagram of a self-powered dual-mode multiplexing surge suppression system provided in an embodiment of the present invention. Detailed Implementation

[0027] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] Please see Figure 1 and Figure 2This embodiment provides a self-powered dual-mode multiplexing surge suppression circuit, including a floating ground regulated power supply sub-circuit, a switching sub-circuit, a control sub-circuit, a mode switching sub-circuit, a power sub-circuit, and a power rectifier bridge BR1; The first input terminal of the power rectifier bridge BR1 serves as the AC L-line interface, the second input terminal of the power rectifier bridge BR1 serves as the AC N-line interface, the positive output terminal of the power rectifier bridge BR1 is electrically connected to the input terminal of the power sub-circuit, and the negative output terminal of the power rectifier bridge BR1 is electrically connected to the negative output terminal of the power sub-circuit. The first input terminal of the floating ground regulated power supply sub-circuit is electrically connected to the first input terminal of the power rectifier bridge BR1, the second input terminal of the floating ground regulated power supply sub-circuit is electrically connected to the second input terminal of the power rectifier bridge BR1, the first output terminal of the floating ground regulated power supply sub-circuit is electrically connected to the input terminal of the switching sub-circuit, and the second output terminal of the floating ground regulated power supply sub-circuit is electrically connected to the positive output terminal of the power sub-circuit. The output terminal of the switch sub-circuit is electrically connected to the control terminal of the mode switching sub-circuit, the control input terminal of the switch sub-circuit is electrically connected to the first output terminal of the control sub-circuit, and the control output terminal of the switch sub-circuit is electrically connected to the second output terminal of the control sub-circuit. The input terminal of the control sub-circuit is electrically connected to the positive output terminal of the power sub-circuit; The input terminal of the mode switching sub-circuit is electrically connected to the control output terminal of the power sub-circuit, and the output terminal of the mode switching sub-circuit is electrically connected to the control input terminal of the power sub-circuit. The drive control terminal of the power sub-circuit is electrically connected to the first output terminal of the floating ground regulated power supply sub-circuit. When AC power is applied, the floating ground regulated power supply subcircuit generates an auxiliary voltage. At this time, the control subcircuit does not generate a control signal, and the mode switching subcircuit enters the surge suppression mode. When AC power is applied, the power rectifier bridge BR1 converts the AC power into DC power and inputs it to the power sub-circuit, which then generates a bus voltage. When the bus voltage gradually rises to a preset threshold, the control sub-circuit turns on the switching sub-circuit, thereby inputting the auxiliary voltage to the mode switching sub-circuit through the switching sub-circuit. The mode switching sub-circuit then enters a fully on switching mode, thereby enabling the power sub-circuit to conduct efficiently and steadily.

[0029] In this embodiment, after AC power is applied, the floating ground regulated power supply subcircuit generates an auxiliary voltage. Before the mode switching subcircuit is controlled by the control subcircuit, it enters the surge suppression mode. Simultaneously with AC power application, the AC power is converted into DC power by the power rectifier bridge. The power subcircuit generates a bus voltage. When the bus voltage gradually rises to a preset threshold, the control subcircuit controls the switching subcircuit to conduct, thereby inputting the auxiliary voltage to the mode switching subcircuit. The mode switching subcircuit then enters a full-conduction switching mode, enabling the power subcircuit to conduct efficiently and steadily. This achieves both surge suppression and full-conduction functions using the two modes of the mode switching subcircuit, without the need for additional components or circuits. Therefore, the circuit is simple and can effectively avoid the problems of multiple fault points and difficulty in troubleshooting caused by complex circuits, thus improving the stability of the low-conduction-loss surge suppression circuit.

[0030] In one embodiment, the mode switching sub-circuit includes a first NMOS transistor Q2 and a first resistor R5, wherein: The gate of the first NMOS transistor Q2 serves as the control terminal of the mode switching sub-circuit, the drain of the first NMOS transistor Q2 serves as the input terminal of the mode switching sub-circuit, and the source of the first NMOS transistor Q2 serves as the output terminal of the mode switching sub-circuit. The first end of the first resistor R5 is electrically connected to the gate of the first NMOS transistor Q2, and the second end of the first resistor R5 is electrically connected to the source of the first NMOS transistor Q2.

[0031] In the above embodiment, when AC power is applied, the first NMOS transistor Q2 is pulled down to the off state by the first resistor R5, thereby the mode switching sub-circuit enters the surge suppression mode; when the bus voltage rises to a preset threshold, the control sub-circuit controls the switching sub-circuit to pull up the gate voltage of the first NMOS transistor Q2, the mode switching sub-circuit enters the fully on switching mode, the first NMOS transistor Q2 short-circuits the second resistor Rcs and the first NPN transistor Q3, so that the charging current in the power sub-circuit flows through the first NMOS transistor Q2.

[0032] It should be noted that the first NMOS transistor Q2 is connected in parallel across the second resistor Rcs and the first NPN transistor Q3. Its drain-source voltage Vds is equal to the sum of the voltage drop across the second resistor Rcs, V_Rcs, and the voltage drop across the first NPN transistor Q3, Vbe1. This Vds is clamped by the first Zener diode ZD2. Therefore, the first NMOS transistor Q2 can be a low-voltage NMOS transistor with extremely low on-resistance and high current capacity, significantly reducing cost and conduction losses.

[0033] In one embodiment, the power sub-circuit includes a second NMOS transistor Q1, a second resistor Rcs, a third resistor R2, a fourth resistor R3, a fifth resistor R4, a bus capacitor Cbus, and a wide-temperature stabilization module, wherein: The drain of the second NMOS transistor Q1 serves as the input terminal of the power sub-circuit, the source of the second NMOS transistor Q1 is electrically connected to the first terminal of the second resistor Rcs, and the gate of the second NMOS transistor Q1 is electrically connected to the second terminal of the fifth resistor R4. The second terminal of the second resistor Rcs is electrically connected to the first terminal of the wide-temperature stable module; The first end of the third resistor R2 is electrically connected to the first end of the second resistor Rcs, and the second end of the third resistor R2 is electrically connected to the second end of the fourth resistor R3. The first end of the fourth resistor R3 is electrically connected to the drain of the second NMOS transistor Q1, and the second end of the fourth resistor R3 is electrically connected to the third end of the wide-temperature stable module. The first end of the fifth resistor R4 is electrically connected to the first end of the fourth resistor R3, and the second end of the fifth resistor R4 is electrically connected to the fourth end of the wide-temperature stable module. The second terminal of the wide-temperature stable module is electrically connected to the positive terminal of the bus capacitor Cbus; The positive terminal of the bus capacitor Cbus serves as the positive output terminal of the power sub-circuit, and the negative terminal of the bus capacitor Cbus serves as the negative output terminal of the power sub-circuit.

[0034] In one embodiment, the wide-temperature stabilization module includes a first NPN transistor Q3, a second NPN transistor Q4, and a first Zener diode ZD2, wherein: The collector of the first NPN transistor Q3 serves as the first terminal of the wide-temperature stabilization module, the emitter of the first NPN transistor Q3 serves as the second terminal of the wide-temperature stabilization module, and the base and collector of the first NPN transistor Q3 are electrically connected. The base of the second NPN transistor Q4 serves as the third terminal of the wide-temperature stabilization module, the emitter of the second NPN transistor Q4 is electrically connected to the cathode of the first Zener diode ZD2, and the collector of the second NPN transistor Q4 serves as the fourth terminal of the wide-temperature stabilization module. The anode of the first Zener diode ZD2 is electrically connected to the emitter of the first NPN transistor.

[0035] In the above embodiment, after AC power is applied, the power rectifier bridge BR1 converts the AC power into DC power Vin. At this time, the bus voltage Vbus is equal to 0V, and the drain-source voltage difference of the second NMOS transistor Q1 is at its maximum (close to Vin). The third resistor R2 and the fourth resistor R3 sample the voltage across the drain and source of the second NMOS transistor Q1 and feed it back to the base of the second NPN transistor Q4, controlling the conduction level of the second NPN transistor Q4 and limiting the initial charging current to a safe level. The charging current flows through the second NMOS transistor Q1, the second resistor Rcs, and the first NPN transistor Q3 to charge the bus capacitor Cbus. As the bus voltage Vbus on the bus capacitor Cbus gradually increases, the voltage difference across the second NMOS transistor Q1 gradually decreases, the feedback effect of the third resistor R2 and the fourth resistor R3 weakens, and the charging current is precisely set by the first Zener diode ZD2.

[0036] In this circuit, the first NPN transistor Q3 and the second NPN transistor Q4 are NPN transistors of the same model, preferably dual transistors in the same package (such as the BC847BD in an SOT-363 package). The two dies are integrated on the same substrate, with highly consistent process parameters and good thermal coupling. The charging current is determined by the voltage balance of two parallel branches: the first branch is the series connection of Vbe2 of the second NPN transistor Q4 and Vzd of the first Zener diode ZD2; the second branch is the series connection of the voltage drop V_Rcs across the second resistor Rcs and Vbe1 of the first NPN transistor Q3. During steady-state operation, the voltages at the terminals of the two branches are equal, i.e. ; Organized ; When the ambient temperature changes, the drift amplitudes of Vbe1 and Vbe2 are equal and their directions are the same, thus canceling each other out in the equation. ; This ensures that the voltage across the second resistor Rcs is determined solely by the voltage Vzd of the first Zener diode ZD2, which has an extremely low temperature coefficient, maintaining high stability across the entire temperature range. During normal startup, temperature-compensated precise constant current charging is achieved. Under conditions of high voltage differential or output short circuit, the system automatically switches to an approximate constant power mode, automatically reducing the charging current and keeping the instantaneous power consumption of the power transistor within a preset safe range.

[0037] Please see Figure 3 A is the drive signal of the second NMOS transistor Q1, B is the power consumption of the second NMOS transistor Q1, and C is the bus voltage Vbus on the bus capacitor Cbus. This figure reflects that when the bus voltage rises to a certain value, the power consumption on Q1 will decrease to close to 0.

[0038] Please see Figure 4 D is the control signal Control Load of the second NMOS transistor Q1, E is the drain-source voltage Vds of the first NMOS transistor Q2, F is the drive voltage of the second NMOS transistor Q1, G is the power consumption of the second NMOS transistor Q1, and H is the bus voltage Vbus on the bus capacitor Cbus.

[0039] In the first 0.1 seconds, the power sub-circuit operates (Q1 peak power < 4W). When the bus voltage rises to a certain value, the Control Load signal is activated, and Q2 turns on, shorting Rcs and Q3, thus causing Q1 to fully turn on, realizing the process from surge initiation to full-conduction switching. After a certain delay (usually implemented by a program, enable pin, or delay circuit), the load is connected, approximately 0.2 seconds in the diagram. At this time, the bus voltage Vbus shows typical operating ripple.

[0040] In one embodiment, the power sub-circuit further includes a third Zener diode ZD3, wherein: The anode of the third Zener diode ZD3 is electrically connected to the source of the second NMOS transistor Q1, and the cathode of the third Zener diode ZD3 is electrically connected to the gate of the second NMOS transistor Q1.

[0041] In one embodiment, the power sub-circuit further includes a seventh resistor R6, wherein: The first end of the seventh resistor R6 is electrically connected to the gate of the second NMOS transistor Q1, and the second end of the seventh resistor R6 is electrically connected to the first output terminal of the floating ground regulated power supply sub-circuit.

[0042] In the above embodiments, the third Zener diode implements normal driving protection and transient abnormal protection in the circuit.

[0043] Normal drive protection: When the mode switching sub-circuit enters the fully on switch mode, the second NPN transistor Q4 is turned off, and the auxiliary power supply Vcc charges the gate of the second NMOS transistor Q1 through the seventh resistor R6. The third Zener diode ZD3 precisely clamps the gate-source voltage Vgs of the second NMOS transistor Q1 at a preset safe value (such as 15V), ensuring that the second NMOS transistor Q1 is deeply saturated while preventing the gate oxide layer from being damaged due to overvoltage.

[0044] Transient anomaly protection: Under any abnormal operating conditions (such as improper control timing causing the second NPN transistor Q4 to be unexpectedly cut off at the initial stage of power-on), the third Zener diode ZD3 can immediately clamp the Vgs of the second NMOS transistor Q1 within a safe range, providing the last line of defense at the hardware level.

[0045] In one embodiment, the floating ground regulated power supply sub-circuit includes an isolation module, a signal rectifier bridge, a sixth resistor R1, a second Zener diode ZD1, and a third capacitor Cc, wherein: The first input terminal of the isolation module serves as the first input terminal of the floating ground regulated power supply sub-circuit, the second input terminal of the isolation module serves as the second input terminal of the floating ground regulated power supply sub-circuit, the first output terminal of the isolation module is electrically connected to the first input terminal of the signal rectifier bridge, and the second output terminal of the isolation module is electrically connected to the second input terminal of the signal rectifier bridge. The positive output terminal of the signal rectifier bridge is electrically connected to the first terminal of the sixth resistor R1, and the negative output terminal of the signal rectifier bridge serves as the second output terminal of the floating ground regulated power supply sub-circuit. The second end of the sixth resistor R1 serves as the first output terminal of the floating ground regulated power supply sub-circuit. The cathode of the second Zener diode ZD1 is electrically connected to the second terminal of the sixth resistor R1, and the anode of the second Zener diode ZD1 is electrically connected to the negative output terminal of the signal rectifier bridge. The first end of the third capacitor Cc is electrically connected to the cathode of the second Zener diode ZD1, and the second end of the third capacitor Cc is electrically connected to the anode of the second Zener diode ZD1.

[0046] The typical voltage for selecting the first Zener diode ZD2 is 1.24V, the typical voltage for selecting the second Zener diode ZD1 is 12V, and the typical voltage for selecting the third Zener diode ZD3 is 15V.

[0047] In one embodiment, the isolation module includes a first capacitor C1 and a second capacitor C2, wherein: The first end of the first capacitor C1 serves as the first input terminal of the isolation module, and the second end of the first capacitor C1 serves as the first output terminal of the isolation module. The first end of the second capacitor C2 serves as the second input terminal of the isolation module, and the second end of the second capacitor C2 serves as the second output terminal of the isolation module.

[0048] In this embodiment, dual capacitors are used as isolation modules to directly draw power from the AC input and power the switching sub-circuit in a floating manner. There is no need to introduce an additional isolation transformer or independent auxiliary power supply module. The dual capacitor structure also forms a capacitive isolation barrier, which enables electrical isolation between the subsequent circuit and the AC side, and allows the output auxiliary voltage reference ground to be freely floated on the bus voltage.

[0049] In one embodiment, the switching sub-circuit includes an isolation optocoupler PC1, wherein: The first pin of the isolation optocoupler PC1 serves as the control input terminal of the switching sub-circuit, the second pin of the isolation optocoupler PC1 serves as the control output terminal of the switching sub-circuit, the third pin of the isolation optocoupler PC1 serves as the output terminal of the switching sub-circuit, and the fourth pin of the isolation optocoupler PC1 serves as the input terminal of the switching sub-circuit.

[0050] In this embodiment, the switching on and off of the first NMOS transistor is controlled by an isolation optocoupler, achieving electrical isolation between the collector and emitter sides of the optocoupler and the control sub-circuit side, preventing false turn-on or false turn-off caused by signal fluctuation crosstalk. The specific model of the isolation optocoupler in this embodiment is OR-3H7. Furthermore, the switching sub-circuit can also implement the switching function in various ways, including but not limited to RC delay networks, voltage detection triggering, and microcontroller control, enabling flexible application of switch control.

[0051] Please see Figure 5 This embodiment also provides a self-powered dual-mode multiplexing surge suppression system, including the self-powered dual-mode multiplexing surge suppression circuit, an AC power supply, and a load; The L line of the AC power supply is electrically connected to the first input terminal of the power rectifier bridge of the self-powered dual-mode multiplexed surge suppression circuit, and the N line of the AC power supply is electrically connected to the second input terminal of the power rectifier bridge of the self-powered dual-mode multiplexed surge suppression circuit. The load is electrically connected to the positive output terminal of the power sub-circuit of the self-powered dual-mode multiplexed surge suppression circuit.

[0052] In this embodiment, after AC power is applied, the floating ground regulated power supply subcircuit generates an auxiliary voltage. Before the mode switching subcircuit is controlled by the control subcircuit, it enters the surge suppression mode. Simultaneously with AC power application, the AC power is converted into DC power by the power rectifier bridge. The power subcircuit generates a bus voltage. When the bus voltage gradually rises to a preset threshold, the control subcircuit controls the switching subcircuit to conduct, thereby inputting the auxiliary voltage to the mode switching subcircuit. The mode switching subcircuit then enters a full-conduction switching mode, enabling the power subcircuit to conduct efficiently and steadily. This achieves both surge suppression and full-conduction functions using the two modes of the mode switching subcircuit, without the need for additional components or circuits. Therefore, the circuit is simple and can effectively avoid the problems of multiple fault points and difficulty in troubleshooting caused by complex circuits, thus improving the stability of the low-conduction-loss surge suppression circuit.

[0053] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A self-powered dual-mode multiplexed surge suppression circuit, characterized in that, It includes a floating ground regulated power supply sub-circuit, a switching sub-circuit, a control sub-circuit, a mode switching sub-circuit, a power sub-circuit, and a power rectifier bridge; The first input terminal of the power rectifier bridge serves as the AC L-line interface, the second input terminal of the power rectifier bridge serves as the AC N-line interface, the positive output terminal of the power rectifier bridge is electrically connected to the input terminal of the power sub-circuit, and the negative output terminal of the power rectifier bridge is electrically connected to the negative output terminal of the power sub-circuit. The first input terminal of the floating ground regulated power supply sub-circuit is electrically connected to the first input terminal of the power rectifier bridge, the second input terminal of the floating ground regulated power supply sub-circuit is electrically connected to the second input terminal of the power rectifier bridge, the first output terminal of the floating ground regulated power supply sub-circuit is electrically connected to the input terminal of the switching sub-circuit, and the second output terminal of the floating ground regulated power supply sub-circuit is electrically connected to the positive output terminal of the power sub-circuit. The output terminal of the switch sub-circuit is electrically connected to the control terminal of the mode switching sub-circuit, the control input terminal of the switch sub-circuit is electrically connected to the first output terminal of the control sub-circuit, and the control output terminal of the switch sub-circuit is electrically connected to the second output terminal of the control sub-circuit. The input terminal of the control sub-circuit is electrically connected to the positive output terminal of the power sub-circuit; The input terminal of the mode switching sub-circuit is electrically connected to the control output terminal of the power sub-circuit, and the output terminal of the mode switching sub-circuit is electrically connected to the control input terminal of the power sub-circuit. The drive control terminal of the power sub-circuit is electrically connected to the first output terminal of the floating ground regulated power supply sub-circuit. When AC power is applied, the floating ground regulated power supply subcircuit generates an auxiliary voltage. At this time, the control subcircuit does not generate a control signal, and the mode switching subcircuit enters the surge suppression mode. When AC power is applied, the power rectifier bridge converts the AC power into DC power and inputs it to the power sub-circuit, which then generates a bus voltage. When the bus voltage gradually rises to a preset threshold, the control sub-circuit turns on the switching sub-circuit, thereby inputting the auxiliary voltage to the mode switching sub-circuit through the switching sub-circuit. The mode switching sub-circuit then enters a fully on switching mode, thereby enabling the power sub-circuit to conduct efficiently and steadily.

2. The self-powered dual-mode multiplexing surge suppression circuit according to claim 1, characterized in that, The mode switching sub-circuit includes a first NMOS transistor and a first resistor; Wherein, the gate of the first NMOS transistor serves as the control terminal of the mode switching sub-circuit, the drain of the first NMOS transistor serves as the input terminal of the mode switching sub-circuit, and the source of the first NMOS transistor serves as the output terminal of the mode switching sub-circuit. The first end of the first resistor is electrically connected to the gate of the first NMOS transistor, and the second end of the first resistor is electrically connected to the source of the first NMOS transistor.

3. The self-powered dual-mode multiplexing surge suppression circuit according to claim 1, characterized in that, The power sub-circuit includes a second NMOS transistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a bus capacitor, and a wide-temperature stabilization module; In this circuit, the drain of the second NMOS transistor serves as the input terminal of the power sub-circuit, the source of the second NMOS transistor is electrically connected to the first terminal of the second resistor, and the gate of the second NMOS transistor is electrically connected to the second terminal of the fifth resistor. The second terminal of the second resistor is electrically connected to the first terminal of the wide-temperature stable module; The first end of the third resistor is electrically connected to the first end of the second resistor, and the second end of the third resistor is electrically connected to the second end of the fourth resistor; The first end of the fourth resistor is electrically connected to the drain of the second NMOS transistor, and the second end of the fourth resistor is electrically connected to the third end of the wide-temperature stable module. The first end of the fifth resistor is electrically connected to the first end of the fourth resistor, and the second end of the fifth resistor is electrically connected to the fourth end of the wide-temperature stable module. The second terminal of the wide-temperature stabilization module is electrically connected to the positive terminal of the bus capacitor; The positive terminal of the bus capacitor serves as the positive output terminal of the power sub-circuit, and the negative terminal of the bus capacitor serves as the negative output terminal of the power sub-circuit.

4. The self-powered dual-mode multiplexing surge suppression circuit according to claim 3, characterized in that, The wide-temperature stable module includes a first NPN transistor, a second NPN transistor, and a first Zener diode; Wherein, the collector of the first NPN transistor serves as the first terminal of the wide-temperature stabilization module, the emitter of the first NPN transistor serves as the second terminal of the wide-temperature stabilization module, and the base and collector of the first NPN transistor are electrically connected. The base of the second NPN transistor serves as the third terminal of the wide-temperature stability module, the emitter of the second NPN transistor is electrically connected to the cathode of the first Zener diode, and the collector of the second NPN transistor serves as the fourth terminal of the wide-temperature stability module. The anode of the first Zener diode is electrically connected to the emitter of the first NPN transistor.

5. A self-powered dual-mode multiplexed surge suppression circuit according to claim 3, characterized in that, The power sub-circuit also includes a third Zener diode; The anode of the third Zener diode is electrically connected to the source of the second NMOS transistor, and the cathode of the third Zener diode is electrically connected to the gate of the second NMOS transistor.

6. The self-powered dual-mode multiplexing surge suppression circuit according to claim 3, characterized in that, The power sub-circuit also includes a seventh resistor; The first end of the seventh resistor is electrically connected to the gate of the second NMOS transistor, and the second end of the seventh resistor is electrically connected to the first output terminal of the floating ground regulated power supply sub-circuit.

7. The self-powered dual-mode multiplexing surge suppression circuit according to claim 1, characterized in that, The floating ground regulated power supply sub-circuit includes an isolation module, a signal rectifier bridge, a sixth resistor, a second Zener diode, and a third capacitor; Wherein, the first input terminal of the isolation module serves as the first input terminal of the floating ground regulated power supply sub-circuit, the second input terminal of the isolation module serves as the second input terminal of the floating ground regulated power supply sub-circuit, the first output terminal of the isolation module is electrically connected to the first input terminal of the signal rectifier bridge, and the second output terminal of the isolation module is electrically connected to the second input terminal of the signal rectifier bridge; The positive output terminal of the signal rectifier bridge is electrically connected to the first terminal of the sixth resistor, and the negative output terminal of the signal rectifier bridge serves as the second output terminal of the floating ground regulated power supply sub-circuit. The second end of the sixth resistor serves as the first output terminal of the floating ground regulated power supply sub-circuit. The cathode of the second Zener diode is electrically connected to the second terminal of the sixth resistor, and the anode of the second Zener diode is electrically connected to the negative output terminal of the signal rectifier bridge. The first terminal of the third capacitor is electrically connected to the cathode of the second Zener diode, and the second terminal of the third capacitor is electrically connected to the anode of the second Zener diode.

8. A self-powered dual-mode multiplexed surge suppression circuit according to claim 7, characterized in that, The isolation module includes a first capacitor and a second capacitor; Wherein, the first end of the first capacitor serves as the first input terminal of the isolation module, and the second end of the first capacitor serves as the first output terminal of the isolation module; The first end of the second capacitor serves as the second input terminal of the isolation module, and the second end of the second capacitor serves as the second output terminal of the isolation module.

9. A self-powered dual-mode multiplexed surge suppression circuit according to claim 1, characterized in that, The switching sub-circuit includes an isolation optocoupler; Wherein, the first pin of the isolation optocoupler serves as the control input terminal of the switching sub-circuit, the second pin of the isolation optocoupler serves as the control output terminal of the switching sub-circuit, the third pin of the isolation optocoupler serves as the output terminal of the switching sub-circuit, and the fourth pin of the isolation optocoupler serves as the input terminal of the switching sub-circuit.

10. A self-powered dual-mode multiplexing surge suppression system, characterized in that, Includes the self-powered dual-mode multiplexed surge suppression circuit, AC power supply, and load as described in any one of claims 1-9; The L line of the AC power supply is electrically connected to the first input terminal of the power rectifier bridge of the self-powered dual-mode multiplexed surge suppression circuit, and the N line of the AC power supply is electrically connected to the second input terminal of the power rectifier bridge of the self-powered dual-mode multiplexed surge suppression circuit. The load is electrically connected to the positive output terminal of the power sub-circuit of the self-powered dual-mode multiplexed surge suppression circuit.

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