A bidirectional ac-dc converter integrated control method and integrated control device

Abstract

The application discloses a bidirectional ACDC converter integrated control method and an integrated control device. The DC bus voltage, the AC power grid voltage and the AC current are sampled, a voltage loop output value is obtained through PI calculation of a DC bus voltage error value, the voltage loop output value is greater than 0, the inverter mode is switched to, otherwise the rectifier mode is switched to; in the inverter mode, the AC current error is calculated and sent to a four-way resonance filter, the sum of the four-way resonance filter output and the sine reference current is superimposed to obtain a target current and sent to a current inner loop PI device, and the output quantity and the power grid voltage feedforward quantity are superimposed to be used for calculating the inverter PWM duty ratio; in the rectifier mode, the DCM current correction coefficient is calculated and the current is corrected, the corrected current is used as the feedback quantity of the PFC current inner loop PI device and the current error is calculated, the current error is sent to the PFC current inner loop PI device, the output quantity and the power grid voltage feedforward component are superimposed to be used for calculating the PFC PWM duty ratio, and the duty ratio is used for generating a full-bridge driving signal.

Description

Technical Field

[0001] This invention belongs to the field of electrical control technology, and particularly relates to an integrated control method and integrated control device for a bidirectional AC / DC converter with resonant harmonic compensation and DCM current adaptive correction. Background Technology

[0002] A bidirectional AC / DC converter is a key power electronic device connecting the AC power grid and the DC bus, enabling bidirectional power transfer between rectification mode (PFC mode, AC to DC) and inverter mode (DC to AC). A typical single-phase bidirectional AC / DC converter employs a full-bridge (H-bridge) topology, coupled with an LCL or L-type filter inductor. This topology offers advantages such as simple circuit structure, high power density, and flexible bidirectional power flow control at the 5.5kW power level.

[0003] Currently, the control schemes for bidirectional AC / DC converters suffer from the following problems: 1) Grid current harmonics: In inverter mode, due to dead-time effects, switching transistor nonlinearity, and the influence of grid voltage background harmonics, significant odd-order harmonic components, such as the 3rd (150Hz), 5th (250Hz), 7th (350Hz), and 9th (450Hz) harmonics, are generated in the inverter output current. This leads to steady-state errors in the proportional-integral (PI) controller's tracking of the AC signal and makes it impossible to effectively suppress harmonic disturbances at specific frequencies. Existing harmonic suppression schemes mostly employ single-resonant controllers or repetitive controllers, which have limited effectiveness in simultaneously suppressing multiple harmonic frequencies and involve complex parameter tuning.

[0004] 2) Mode switching impact issues; bidirectional AC / DC converters need to frequently switch between PFC mode and inverter mode. For example, in a photovoltaic energy storage system, the inverter feeds power to the grid when photovoltaic power is abundant during the day, and draws power from the grid for rectification at night or on cloudy days. Traditional switching methods are mostly based on external commands or independent mode detection circuits. During the switching process, current surges, voltage overshoots, and even oscillations are prone to occur, leading to increased stress on the switching transistors and reduced system reliability. There is a lack of a natural and smooth switching mechanism based on voltage loop output.

[0005] 3) Current detection accuracy issues in discontinuous conduction mode (DCM): Under light load or high instantaneous grid voltage, bidirectional AC / DC converters inevitably enter DCM, where the inductor current returns to zero in each switching cycle. Traditional average current control schemes assume the converter always operates in continuous conduction mode (CCM). In DCM, the current sampling value cannot accurately reflect the actual average current, leading to decreased control accuracy, worsened power factor, and current waveform distortion. Moreover, existing DCM compensation schemes often rely on complex mode detection circuits or offline calibration, making online adaptive operation across the entire operating range difficult.

[0006] The problems mentioned above are not independent of each other. Harmonic distortion of the current waveform can interfere with the calculation accuracy of the DCM correction coefficient; transient impacts during mode switching can affect system stability; and the degradation of control accuracy under DCM can lead to performance deterioration near the mode switching point. Currently, no one has integrated harmonic compensation, mode switching, and DCM correction into a unified design and optimization method for the control of bidirectional AC / DC converters. Summary of the Invention

[0007] The purpose of this invention is to provide an integrated control method for bidirectional AC / DC converters with resonant harmonic compensation and DCM current adaptive correction, which has comprehensive performance of low harmonics, high efficiency and smooth switching.

[0008] To achieve the above objectives, the present invention adopts the following technical solution:

[0009] A bidirectional AC-DC converter integrated control method includes the following steps:

[0010] Step S1: Sample the DC bus voltage, AC grid voltage, and AC current;

[0011] Step S2: Perform proportional-integral calculation based on the DC bus voltage error value to obtain the voltage loop output value. Determine the mode of the bidirectional AC-DC converter based on the sign of the voltage loop output value. If the voltage loop output value is greater than 0, it is determined that the converter should switch to inverter mode. If the voltage loop output value is less than or equal to 0, it is determined that the converter should switch to rectifier mode. Perform mode switching based on the determination result.

[0012] Step S3: After switching to inverter mode, KR harmonic compensation is performed in inverter mode: calculate the AC current error, send the AC current error to four parallel IIR resonant filters respectively, calculate the sum of the outputs of the four resonant filters as the harmonic compensation amount, superimpose the harmonic compensation amount and the sinusoidal reference current to obtain the compensated target current, send the target current to the current inner loop proportional integrator, superimpose the output of the current inner loop proportional integrator with the grid voltage feedforward amount for PWM duty cycle calculation, and output the inverter PWM duty cycle;

[0013] Step S4: After switching to rectification mode, DCM current correction is performed in rectification mode: calculate the DCM current correction coefficient, correct the current based on the DCM current correction coefficient, use the corrected current as the feedback quantity of the PFC current inner loop proportional integrator, calculate the current error based on the feedback quantity, send the current error to the PFC current inner loop proportional integrator, add the output quantity of the PFC current inner loop proportional integrator to the grid voltage feedforward component, use it for PFC PWM duty cycle calculation, and output the PFC PWM duty cycle.

[0014] Step S5: Generate the corresponding full-bridge drive signal based on the duty cycle calculated in step S3 or step S4.

[0015] In some embodiments, in step S2, the DC bus voltage error value ΔV = Vbus - Vbus_ref, where Vbus is the DC bus voltage and Vbus_ref is the DC bus reference voltage.

[0016] In some embodiments, in step S2, the mode switching determination is performed according to the following steps:

[0017] S201. Obtain the current MPPT tracking status. If the MPPT tracking status is less than the preset threshold, set the voltage loop output value to zero and reset the voltage outer loop proportional integrator to keep it running in rectification mode.

[0018] S202. If the MPPT tracking status is greater than or equal to the preset threshold, and the voltage loop output value is greater than 0, while the DC bus voltage is less than 340V, the voltage loop output value is set to zero, and the voltage outer loop proportional integrator is reset, and the system continues to operate in rectification mode.

[0019] S203. When neither of the above two suppression conditions is met, the mode is determined directly based on the sign of the voltage loop output value. If the voltage loop output value is greater than 0, it is determined to switch to inverter mode. If the voltage loop output value is less than or equal to 0, it is determined to switch to rectifier mode.

[0020] In some embodiments, in step S2, the following smooth transition mechanism is performed when switching modes:

[0021] S5. Set the mode_swapping flag;

[0022] S6. When the bidirectional AC / DC converter needs to switch modes, the smooth transition mechanism is activated through the mode_swapping flag. First, the sign change of the voltage loop output value is detected to determine which mode to switch to; then the mode_swapping flag is set, the current loop integrator to be exited is reset, and the mode variable is updated to the mode to be switched. After the mode variable update is completed, the PWM duty cycle transitions from the old mode to the new mode; the mode_swapping flag is reset.

[0023] In some embodiments, in step S3, the AC current error ac_current_err = ac_current_ref - ac_current_raw, where ac_current_ref is the sinusoidal reference current and ac_current_raw is the sampled AC current.

[0024] The target current ac_current_target = ac_current_ref + kr_total, where kr_total is the harmonic compensation amount.

[0025] In some embodiments, when the calculated sinusoidal reference current is greater than +35.35A, the sinusoidal reference current is clamped at +35.35A; when the calculated sinusoidal reference current is less than -35.35A, the sinusoidal reference current is clamped at -35.35A.

[0026] In some embodiments, the resonant filters are: 3rd resonant filter, 5th resonant filter, 7th resonant filter and 9th resonant filter.

[0027] In some embodiments, in step S4, the DCM current correction coefficient K = Vbus × Duty / (Vbus - |Vgrid|), where Vbus is the DC bus voltage, Duty is the output duty cycle of the current PFC inner loop proportional integrator, and Vgrid is the AC grid voltage.

[0028] The corrected current raw_avg = K × ac_current_raw, where ac_current_raw is the sampled AC current;

[0029] Current error ac_err = ac_current_ref - raw_avg.

[0030] In some embodiments, during calculation, the voltage error Vbus - |Vgrid| is clamped to 0.1V when it is less than 0.1V, and clamped to 1.0 when the calculated K value is greater than 1.0.

[0031] The present invention also provides an integrated control device for a bidirectional AC-DC converter, comprising:

[0032] A bidirectional AC / DC converter unit is connected between the AC power grid and the DC bus to realize bidirectional power conversion of rectification and inversion;

[0033] An analog-to-digital conversion sampling module used to sample AC grid voltage, AC current and DC bus voltage in each control cycle;

[0034] A phase-locked loop module used to acquire the phase, frequency, and polarity of the grid voltage;

[0035] A mode decision switching module used to calculate the voltage loop output value and determine whether to switch to inverter mode or rectifier mode based on the sign of the voltage loop output value;

[0036] The KR multi-resonant harmonic compensation module is used for harmonic compensation in inverter mode. The KR multi-resonant harmonic compensation module sends the AC current error to four parallel IIR resonant filters, and the sum of the outputs of the four resonant filters is used as the harmonic compensation amount and superimposed on the sinusoidal reference current to obtain the target current. The target current is output by the current inner loop proportional integrator and then superimposed with the grid voltage feedforward amount for PWM duty cycle calculation, and the inverter PWM duty cycle is output.

[0037] A DCM current correction module is used for DCM current correction in rectification mode. The DCM current correction module calculates the DCM current correction coefficient K online, multiplies the sampled AC current by K and uses it as the feedback quantity of the PFC current inner loop proportional integrator. The current error is calculated based on the feedback quantity and sent to the PFC current inner loop proportional integrator. The output quantity of the PFC current inner loop proportional integrator is superimposed with the grid voltage feedforward component and used for PFC PWM duty cycle calculation, and the PFC PWM duty cycle is output.

[0038] In some embodiments, a mode switching control module is further included for setting the mode_swapping flag and resetting the corresponding mode current loop integrator to achieve a smooth transition during mode switching.

[0039] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the aforementioned bidirectional AC-DC converter integrated control method.

[0040] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the aforementioned bidirectional AC-DC converter integrated control method.

[0041] As can be seen from the above technical solutions, the method of the present invention automatically determines the rectification mode or the inverter mode based on the output value sign (vloop.output) of the voltage outer loop proportional integrator, realizing a natural, smooth, and shock-free switching between the rectification mode and the inverter mode, with a switching time of less than 1 millisecond. At the same time, in the inverter mode, a four-way parallel IIR resonant filter is used to selectively compensate for the current harmonics. The harmonic compensation is superimposed on the reference current, effectively suppressing the 3rd, 5th, 7th, and 9th grid current harmonics and reducing the total harmonic distortion (THD) to below 3%. In the rectification mode, the DCM current correction coefficient K is calculated online to map the DCM current to the CCM equivalent, realizing full conduction mode adaptation. This makes the current control accuracy equivalent to the CCM mode under light load and even DCM boundary conditions, and optimizes efficiency across the entire load range.

[0042] This invention innovatively integrates bidirectional voltage loop sign switching, multi-resonant harmonic compensation, and DCM current correction into a unified control framework, achieving a synergistic effect of 1+1+1>3. KR clean waveform improves DCM coefficient accuracy, DCM correction ensures continuous performance at switching points, and Vloop decision coordinates resource allocation. This enables the system to simultaneously possess comprehensive performance of low harmonics, high efficiency, and smooth switching across the entire operating range. The system achieves a full-load THD of less than 3%, an efficiency of 96.1%, a mode switching time of less than 1 millisecond, and seamless DCM to CCM coverage across the entire load range. This invention is applicable to applications requiring high power quality, high efficiency, and bidirectional power flow, such as photovoltaic energy storage inverters, battery formation equipment, uninterruptible power supplies (UPS), V2G (vehicle-to-grid) bidirectional charging piles, and microgrid interconnection converters. Attached Figure Description

[0043] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a system architecture diagram of a grid-connected power electronic system employing the bidirectional AC-DC converter integrated control method of the present invention;

[0045] Figure 2 This is a flowchart of the bidirectional AC-DC converter integrated control method of the present invention;

[0046] Figure 3 This is a comparison chart of the test results for the method of the present invention.

[0047] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings. Detailed Implementation

[0048] The present invention will now be described in detail with reference to the accompanying drawings. In describing the embodiments of the present invention, for ease of explanation, the drawings illustrating the device structure will be partially enlarged, not according to general proportions. Furthermore, the schematic diagrams are merely examples and should not be construed as limiting the scope of protection of the present invention. It should be noted that the drawings are simplified and use non-precise proportions, intended only to facilitate and clearly illustrate the embodiments of the present invention. Additionally, in the description of this application, terms such as "first" and "second" are used only to distinguish descriptions and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Terms such as "positive," "negative," "bottom," "upper," "lower," "front," "rear," "left," and "right" indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, not indicating or implying that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention.

[0049] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can also refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0050] Applications requiring bidirectional power flow, such as photovoltaic-storage bidirectional converters, power storage converters (PCS), uninterruptible power supplies (UPS), and on-board chargers (OBC) for electric vehicles, necessitate bidirectional AC / DC converters that can switch between inverter and rectification modes. For example... Figure 1 As shown, the grid-connected power electronic system using the integrated control method of the present invention includes a bidirectional AC / DC converter, an AC grid interface, an EMI filter, a DC bus capacitor, a grid relay, a microcontroller, a DC bus voltage sampling circuit for acquiring DC bus voltage, and an AC grid voltage sampling circuit for acquiring AC grid voltage.

[0051] In practical applications, the AC mains interface provides the electrical interface for grid-connected power supply and drawdown, rated at 220VAC / 50Hz, with an allowable range of 170VAC to 280VAC. The AC mains interface connects to a 220V / 50Hz single-phase AC mains. The EMI filter includes a common-mode inductor and safety capacitors. The bidirectional AC-DC converter can be a single-phase full-bridge bidirectional AC-DC converter, consisting of an H-bridge topology composed of four power MOSFETs or IGBTs, with a switching frequency of 20kHz. The DC bus capacitor bank consists of multiple electrolytic capacitors connected in parallel, rated at 420VDC, with capacitance values ​​ranging from 470μF to 940μF.

[0052] The microcontroller can employ a Cortex-M4 core with a clock frequency of 200MHz. It integrates a pulse width modulation (PWM) module, an analog-to-digital converter (ADC) module, and a floating-point unit (FPU). The PWM module can be a high-resolution PWM module (HRPWM) with a resolution 16 times the base frequency. The ADC module triggers sampling at a fixed frequency with a sampling rate of no less than 1MSPS and a trigger frequency of 20kHz (corresponding to a control cycle of 50 microseconds), unaffected by changes in the PWM switching frequency. The ADC module samples the DC bus voltage, AC grid voltage, and AC current in each control cycle. The microcontroller also integrates a phase-locked loop (SPLL) module, a voltage outer-loop proportional-integral (PII) module, a KR multi-resonant harmonic compensation module, a DCM current correction module, and a current loop calculation module. The SPLL module, based on a second-order generalized integrator (SOGI) and a notch filter, is used to extract the phase, frequency, and quadrature components of the grid voltage in real time. The voltage outer-loop PII uses the DC bus voltage as the control target, and its output vloop.output serves as the mode criterion and AC current amplitude reference. The KR multi-resonant harmonic compensation module is used for KR harmonic compensation. The DCM current correction module is used for DCM current correction. The current loop calculation module selects different current control paths according to the current mode. The PWM module converts the duty cycle into a PWM comparison value. These program modules constitute the control architecture of the control system using the control method of this invention. The system state is managed by a finite state machine, and the state transition path is: initialization → idle → grid-connected operation (including three sub-states: phase-locked loop operation, relay activation, and free operation) → fault / shutdown.

[0053] like Figure 2 As shown, the bidirectional AC-DC converter integrated control method of this embodiment includes the following steps:

[0054] Step S1: In each fixed-frequency control cycle, the ADC module samples the DC bus voltage Vbus, AC grid voltage Vac, and AC current Iac (the sampled voltage and current are instantaneous values); the typical value for each control cycle is 50 microseconds, corresponding to a sampling frequency of 20kHz; at the same time, the phase-locked loop module tracks the phase and frequency of the AC grid voltage and detects the grid voltage polarity (positive half-cycle / negative half-cycle).

[0055] Step S2: The voltage outer loop proportional-integral converter performs proportional-integral calculations based on the DC bus voltage error value to obtain the voltage loop output value. The mode of the bidirectional AC-DC converter is determined based on the sign of the voltage loop output value, and the mode is switched.

[0056] The DC bus voltage error value ΔV = Vbus - Vbus_ref, where Vbus is the DC bus voltage and Vbus_ref is the DC bus reference voltage;

[0057] The sign of the voltage loop output value vloop.output indicates the power flow demand. A positive value (greater than 0) indicates that the DC bus voltage is too high, the DC bus has sufficient or excess energy, and power needs to be fed into the AC grid to release energy. A non-positive value (less than or equal to 0) indicates that the DC bus voltage is too low, and power needs to be absorbed from the AC grid to replenish energy. Based on this, in this step, the sign of the voltage loop output value is used as the basis for judging the mode switching of the bidirectional AC-DC converter. When the voltage loop output value is greater than 0, it is determined that the bidirectional AC-DC converter should switch to inverter mode (grid_mode). When the voltage loop output value is less than or equal to 0, it is determined that the bidirectional AC-DC converter should switch to rectifier mode (pfc_mode).

[0058] For example, when the DC bus is connected to photovoltaic modules and there is sufficient sunlight, the photovoltaic power will cause the DC bus voltage to rise above the DC bus voltage reference value. The DC bus voltage error value is positive, and the voltage outer loop proportional-integral converter output vloop.output is positive, indicating that power needs to be fed to the grid. The bidirectional AC-DC converter should switch to inverter mode. When the load connected to the DC bus consumes power, the DC bus voltage drops below the DC bus voltage reference value. The DC bus voltage error value is negative, and the voltage loop proportional-integral converter output vloop.output is negative, indicating that power needs to be drawn from the grid. The bidirectional AC-DC converter should switch to rectification mode.

[0059] In practical photovoltaic-storage applications, the DC bus typically connects the load (photovoltaic modules) and the energy storage device (storage battery). The operating status of the MPPT (Maximum Power Point Tracking) algorithm directly affects the dynamic behavior of the DC bus voltage. If the system is allowed to enter inverter mode before the MPPT tracking process is complete, i.e., before the photovoltaic maximum power point is found or during the initial scanning phase, the unstable photovoltaic operating point may cause severe fluctuations or even a collapse of the DC bus voltage. To avoid this, preferably, this embodiment introduces the MPPT tracking status and the DC bus voltage as auxiliary decision conditions for mode switching after obtaining the voltage loop output value, determining whether to perform mode switching. The specific steps are as follows:

[0060] S201. Obtain the current MPPT tracking status. If the MPPT tracking status is less than the preset threshold, force the voltage loop output value to zero and reset the voltage outer loop proportional integrator (i.e., clear the integration term vloop.i_part of the voltage outer loop proportional integrator to zero). The system remains in rectification mode and is not allowed to enter inverter mode.

[0061] When the MPPT tracking state mppt.state is less than the preset threshold mppt_mode_traverse, it indicates that maximum power point tracking has not yet been completed or is in the initial scanning phase. In other words, MPPT tracking has not yet been completed. At this time, even if the voltage loop output value is greater than zero, it is forcibly set to zero to prevent DC bus voltage runaway such as DC bus voltage drop or power oscillation due to accidental entry into inverter mode. mppt_mode_traverse represents the "traversal scan" state in the MPPT state machine (enumeration value 2). When mppt.state < mppt_mode_traverse, it is determined that MPPT is not completed, and the inverter mode is blocked to ensure that the DC bus voltage is stabilized first during the system startup and MPPT scanning phases.

[0062] S202. If the MPPT tracking status is greater than or equal to the preset threshold (i.e., MPPT tracking is complete), and the voltage loop output value is greater than 0, while the DC bus voltage Vbus is less than 340V, the voltage loop output value is forcibly set to zero, and the voltage outer loop proportional-integral converter is reset. The system remains in rectification mode and is not allowed to enter inverter mode. This step can prevent the system from entering inverter mode when the DC bus voltage is insufficient, and avoid feeding power to the grid when the DC bus voltage is too low, which would cause excessive feeding current or grid connection failure.

[0063] S203. When neither of the above two suppression conditions is met, the mode is determined directly based on the sign of the voltage loop output value. That is, if the voltage loop output value is greater than 0, it is determined to switch to inverter mode; if the voltage loop output value is less than or equal to 0, it is determined to switch to rectifier mode.

[0064] In the preferred embodiment, the above three auxiliary decision-making conditions further comprehensively determine the mode switching based on MPPT tracking state constraints and DC bus voltage constraints. First, the MPPT tracking state is used as the judgment criterion. When the MPPT tracking state is less than a preset threshold, it indicates that the photovoltaic maximum power point tracking is in the initial scanning stage or has not yet been completed. In this stage, regardless of the sign of vloop.output, the system performs the following protection measures: 1. If vloop.output is greater than 0, it is forcibly set to zero and the voltage outer loop proportional integrator is reset, blocking the possibility of entering inverter mode from the root; 2. The system mode remains unchanged in rectification mode, continuously drawing power from the grid in rectification mode to maintain the stability of the DC bus voltage, providing a stable DC bus platform for MPPT tracking; when the MPPT tracking state reaches or exceeds the preset threshold, it indicates that MPPT tracking has been completed. When the photovoltaic modules are operating at maximum power point, the sign of vloop.output can accurately reflect the supply and demand balance of DC bus power. Therefore, mode switching can be determined based on the sign-based self-judgment logic, combined with the DC bus voltage as a criterion. When MPPT tracking is complete and vloop.output is greater than 0 (indicating a switch to inverter mode), the DC bus voltage Vbus is further checked. If Vbus is less than 340V, it indicates that the DC bus voltage is significantly low. Forcing the switch to inverter mode to feed power to the grid would further reduce the DC bus voltage, increase the feed current, and potentially trigger undervoltage protection or grid connection failure. Therefore, the system forcibly sets vloop.output to zero, preventing the switch to inverter mode, and continues to absorb power from the grid in rectification mode to charge the DC bus until Vbus rises above 340V.

[0065] Bidirectional AC / DC converters lack an effective smooth transition mechanism during mode switching, which can easily lead to current surges, voltage overshoots, or sudden changes in PWM duty cycle at the moment of switching, affecting the safe operation of the system and the reliability of power devices. To address this issue further, a mode_swapping smooth transition mechanism is used during mode switching to clear the current loop integrator and output value of the mode to be exited, ensuring a shock-free switch between PFC mode and Grid mode. The specific steps are as follows:

[0066] S204. Set the mode_swapping flag bit. This flag bit is used in the PWM output logic to temporarily freeze or smoothly transition the generation of the PWM drive signal.

[0067] S205. When the bidirectional AC / DC converter needs to switch modes, such as from inverter mode to rectifier mode or from rectifier mode to inverter mode, the smooth transition mechanism is activated by the mode_swapping flag. The smooth transition mechanism includes the following steps: First, detect the sign change of the voltage loop output value, then set the mode_swapping flag, reset the current loop integrator of the mode to be exited (that is, clear the integral term and output term of the current loop integrator of the mode to be exited), then update the mode variable, the PWM duty cycle transitions from the old mode (mode to be exited) to the new mode, and clear the mode_swapping flag.

[0068] For example, when the voltage loop output value is greater than 0, and the bidirectional AC / DC converter needs to switch from rectification mode to inverter mode, mode_swapping is set to true. Then, the integral and output terms of the PFC current loop integrator are cleared to zero, and the mode variable is updated to inverter mode. Control is transferred to the grid_mode branch in the current loop calculation module of the controller. The resonant control module performs resonant control, and the inverter PWM calculation module takes over the PWM output. Then, mode_swapping is reset to false, realizing a smooth transition from the old mode to the new mode. The system operates stably in inverter mode.

[0069] When the voltage loop output value is less than or equal to 0, and the bidirectional AC / DC converter needs to switch from inverter mode to rectification mode, mode_swapping is set to true. Then, the integral and output terms of the Grid current loop integrator are cleared to zero, and the inverter output enable flag oen_flag is set to false to ensure that the inverter output drive signal is safely turned off before switching to rectification mode. The mode variable is then updated to rectification mode, and control is transferred to the pfc_mode branch in the current loop calculation module of the controller. The current loop calculation module and the PFC PWM calculation module take over the control. The current loop calculation module is a conventional functional module of the bidirectional AC / DC converter and is not an innovation of this invention, so it will not be described in detail here.

[0070] The mode_swapping flag toggles over the next four control cycles (approximately 200 microseconds). During this period, the PWM output smoothly transitions through a specific soft-start sequence (first shutting down the output, then restarting with a lower duty cycle). The AC current reference value is set to zero during the transition to avoid current surges. After the transition is complete, mode_swapping returns to false, and normal current loop control resumes. The current loop integrator is cleared and the mode_swapping flag is used to ensure that no current / voltage surges occur during the switching between the old and new modes, achieving a smooth transition without impact.

[0071] The integral term of the current loop may accumulate a large number of historical values. If these historical values ​​are not cleared and the mode is switched directly, they may affect the initialization of related variables or state machines, even though they will no longer be used directly. The above-mentioned mode_swapping smooth transition mechanism clears the integral and output terms of the PFC / Grid current loop integrator. Through the synergistic effect of clearing the current loop integrator and the mode_swapping flag, it is ensured that no current surge, voltage overshoot, or sudden change in PWM duty cycle occurs during the mode switching process, and the switching stress of the power device is maintained within the safe operating range. The core idea of ​​this smooth transition mechanism is to clear the integral and output terms of the current loop integrator to be exited before formally updating the mode variables, so as to prevent historical accumulated values ​​from interfering with the control of the new mode.

[0072] In summary, the smoothness of mode switching benefits from: First, the voltage loop output value is the output of the voltage outer loop proportional-integral converter, which has a large inertia and slow-changing characteristic, and will not undergo abrupt changes when the grid or load conditions change, thus the mode decision itself is "soft"; Second, the current loop integrator reset eliminates historical accumulated errors, avoiding the impact of the integrator starting from an erroneous state after switching; Third, the mode_swapping transition sequence is completed within 4 control cycles (200 microseconds), much faster than the grid frequency cycle (20 milliseconds), and the current transient during the transition is much smaller than the rated value. The measured mode switching time is less than 0.8 milliseconds, and the DC bus voltage fluctuation during the switching process is less than 1%.

[0073] Step S3: After switching to inverter mode, perform KR harmonic compensation in inverter mode as follows:

[0074] The AC current error is calculated and fed into four parallel IIR resonant filters. The sum of the outputs of the four resonant filters is used as the harmonic compensation. The harmonic compensation is then superimposed with the sinusoidal reference current to obtain the compensated target current. The target current is fed into the current inner loop proportional-integral (PII). The output of the current inner loop PII is superimposed with the grid voltage feedforward and, after being limited (±1.0), used for PWM duty cycle calculation. The inverter PWM duty cycle is then output. The grid voltage feedforward is 0.80 × (1 − |Vgrid| / Vbus_ref), where Vgrid is the sampled AC grid voltage (Vac) and Vbus_ref is the DC bus reference voltage. The PWM duty cycle calculation uses a conventional method, and this invention does not improve the calculation process, so it will not be elaborated here.

[0075] The AC current error ac_current_err = ac_current_ref - ac_current_raw, where ac_current_ref is the sinusoidal reference current, ac_current_raw is the sampled AC current (Iac), and the sinusoidal reference current is the instantaneous value of the sinusoidal reference current calculated based on the voltage loop output value. ac_current_ref = vloop.output × GRID_MAX_POWER / Vrms × q, where vloop.output is the voltage loop output value, and GRID_MAX_POWER... Here, Vrms is the effective value of the AC grid voltage, and q is the proportional coefficient, which is 1.414 in this embodiment. To prevent excessive AC current from damaging power devices or triggering grid overcurrent protection, the calculated sinusoidal reference current is limited by upper and lower limits. The upper and lower limit clamping protection restricts the current to within ±35.35A. In specific applications, when the calculated sinusoidal reference current is greater than +35.35A, it is clamped to +35.35A; when the calculated sinusoidal reference current is less than -35.35A, it is clamped to -35.35A. The ±35.35A limit corresponds to an effective value of 25A (25 × 1.414 = 35.35). This limit matches the rated power of the 5.5kW / 220V system and provides an appropriate overload margin.

[0076] The target current ac_current_target = ac_current_ref + kr_total, where kr_total is the harmonic compensation amount, which is the sum of the outputs of the four resonant filters;

[0077] After processing the AC current error (AC current error multiplied by 2), the signal is fed into four resonant filters. The four resonant filters are: 3rd resonant filter (center frequency 150Hz), 5th resonant filter (center frequency 250Hz), 7th resonant filter (center frequency 350Hz) and 9th resonant filter (center frequency 450Hz).

[0078] Each resonant filter has its own independent feedback coefficient (A coefficient) and feedforward coefficient (B coefficient) to achieve selective amplification at a specific frequency. The A coefficient of the resonant filter is used to achieve the selectivity of the resonant frequency, determining the pole position of the filter, i.e., the frequency and bandwidth of the resonant peak. The B coefficient is used to achieve gain and phase compensation, determining the zero position of the filter. The A / B coefficients of the four resonant filters are designed for 150Hz, 250Hz, 350Hz and 450Hz respectively. They can be calculated offline using the filter design toolbox of MATLAB or Python, stored in the program memory as floating-point constants, and loaded when the microcontroller is powered on and initialized. The core difference equation of the resonant filter is: Y[n] = A_part + B_part, where A_part = Σ(A[i] × Y[ni]), B_part = Σ(B[i] × X[ni]), i=0,...,4, A[i] represents the A coefficient of the i-th resonant filter, B[i] represents the B coefficient of the i-th resonant filter, and X[0,...,4] and Y[0,...,4] are the state variables of the resonant filter;

[0079] KR harmonic compensation is only performed in inverter mode. When the system exits inverter mode (such as when switching to rectification mode or when a fault occurs), the state variables (X[0,...,4], Y[0,...,4]) and accumulators (A_part, B_part) of all IIR resonant filters are cleared to ensure that the system starts from a zero initial state when entering inverter mode again, thus preventing historical states from interfering with subsequent operation. Utilizing the single-precision floating-point operation capability of the FPU, the four-channel IIR filtering takes about 8 microseconds on a 200MHz Cortex-M4, which is much less than the 50-microsecond control cycle.

[0080] Step S4: After switching to rectification mode, perform DCM current correction in rectification mode as follows:

[0081] The DCM current correction coefficient is calculated, and the current is corrected based on the DCM current correction coefficient. The corrected current is used as the feedback quantity of the PFC current inner loop proportional-integral converter. The current error is calculated based on the feedback quantity and sent to the PFC current inner loop proportional-integral converter. The output quantity of the PFC current inner loop proportional-integral converter is superimposed with the grid voltage feedforward component and subjected to amplitude limiting processing for PFC PWM duty cycle calculation. The PFC PWM duty cycle is then output. The calculation of the FPC PWM duty cycle is a conventional method, and this invention does not improve the calculation process, so it will not be described in detail here.

[0082] DCM current correction coefficient K = Vbus × Duty / (Vbus - |Vgrid|), where Vbus is the DC bus voltage, (Vbus - |Vgrid|) is the voltage error, and Duty is the output duty cycle of the current PFC inner loop proportional integrator. Duty is directly output by the PFC current inner loop proportional integrator, rather than being ultimately applied to the PWM duty cycle, in order to avoid the delay and error introduced by the PWM duty cycle gradual rise process, thereby ensuring the high real-time performance and accuracy of the correction coefficient.

[0083] Furthermore, during calculation, when the voltage error (Vbus - |Vgrid|) is less than 0.1V, it is clamped to 0.1V to prevent division by zero overflow; when the calculated K value is greater than 1.0, it is clamped to 1.0.

[0084] The corrected current raw_avg = K × ac_current_raw, where ac_current_raw is the sampled AC current;

[0085] Current error ac_err = ac_current_ref - raw_avg;

[0086] The formula for the DCM current correction factor is based on the equivalent relationship between the average inductor current under DCM and CCM. It maps the instantaneous current sampled under DCM to the equivalent average current under CCM. Under CCM, the average inductor current is equal to the instantaneous value of the sampled current. Under DCM, the inductor current has a zero-return interval within one switching cycle, and the instantaneous value of the sampled current is not equal to the actual average current - the actual average current is less than the instantaneous value of the sampled current. By introducing a correction factor K (K≤ 1.0) in the PFC current inner loop proportional integrator, the sampled current under DCM is multiplied by K and then equivalent to the average current under CCM, so that the same set of PI parameters and feedforward structure can cover the entire operating conditions of DCM and CCM.

[0087] The DCM current correction factor automatically degrades in the following situations: when |Vgrid| is much smaller than Vbus (low instantaneous grid voltage), the voltage error is large, the K value approaches Duty, and the correction effect is significant (heavy load DCM region); when |Vgrid| is close to Vbus (high instantaneous grid voltage), the voltage error is small, and K may be calculated to a value greater than 1.0. After being clamped to 1.0, the correction effect degrades to no correction (i.e., treated as CCM; the converter usually operates in CCM when the instantaneous voltage is high). Therefore, the DCM current correction factor naturally has an "adaptive" characteristic: it provides strong correction when DCM is deep, and automatically reduces or even exits correction when CCM or DCM is shallow.

[0088] DCM current correction is activated only under rectification. In inverter mode, current control is achieved through the KR harmonic compensation path and does not involve DCM correction. During the mode switching transition, the normal integral update of the PFC current inner loop proportional integrator is suspended by the mode_swapping flag to prevent the integrator error from accumulating due to the uncertain state during the transition.

[0089] Step S5: Based on the duty cycle calculated in step S3 or S4, generate the corresponding full-bridge drive signal through the PWM module. Generating the drive signal based on the duty cycle and the grid voltage polarity is a conventional method in this field, and this invention does not improve upon it; therefore, it will not be elaborated upon here.

[0090] In some embodiments, the voltage outer loop proportional-integral (PII) is an incremental PPI, whose output exhibits a gradually changing characteristic, preventing abrupt changes and ensuring smooth mode switching. When it is detected that the MPPT module has not yet completed maximum power point tracking, vloop.output is forced to be non-positive, and the system remains in rectification mode to ensure a stable DC bus voltage. Once MPPT tracking is complete and vloop.output is greater than 0 and the DC bus voltage is not lower than 340V, the system is allowed to switch to inverter mode.

[0091] In some embodiments, the parameters of the resonant filter are tuned according to the following steps:

[0092] a. Determine the target resonant frequency fn = n × fgrid, n = 3, 5, 7, 9, fgrid = 50Hz;

[0093] b. Set the quality factor Q of the resonant filter. The quality factor Q can be 5 to 10. A higher Q value corresponds to a narrower resonant bandwidth and higher frequency selectivity, but a slower dynamic response; a lower Q value corresponds to a wider resonant bandwidth and faster dynamic response, but a slightly weaker suppression of non-target frequencies; after experimental optimization, Q is set to 8 in this embodiment.

[0094] c. Second-order IIR coefficients are generated using digital filter design tools. The resonant filter can work effectively in the range of power grid frequency from 49.5Hz to 50.5Hz and is robust to small deviations in power grid frequency.

[0095] In some embodiments, the voltage outer loop proportional-integral converter is tuned as follows: kp is 0.5 to 1.5, and ki is 0.01 to 0.05. A slower voltage loop response (small ki) is beneficial for the smoothness of mode switching. Slow changes in vloop.output mean a low mode switching frequency and less frequent switching due to transient disturbances. However, an excessively slow response will affect the recovery speed of the DC bus voltage. After compromise optimization, in this embodiment, kp = 3.5 and ki = 0.45.

[0096] The PFC current loop proportional-integral converter uses different parameter sets during the positive and negative half-cycles of the grid voltage to compensate for the asymmetry in the inductor charging and discharging path during grid polarity switching. At the instant of polarity switching (when positive_cnt changes from 0 to 1 or negative_cnt changes from 0 to 1), kp and ki are set to faster values ​​(kp=4.2, ki=0.1221) to accelerate the polarity transition; during steady-state operation, the standard parameter set is used. This differentiated parameter design further reduces current distortion at the polarity switching point.

[0097] In some embodiments, the lower limit of the voltage error for the DCM correction coefficient is set to 0.1V, determined based on the system voltage level (420V bus) and ADC resolution (12-bit, corresponding to approximately 0.1V / LSB at a suitable voltage divider ratio). This prevents division-to-zero overflow and ensures reasonable correction behavior when Vgrid is close to Vbus. When adapting to different voltage levels (such as an 800V DC bus system), this lower limit should be adjusted proportionally. The upper limit clamp of K to 1.0 ensures that the correction only attenuates and does not amplify, avoiding overcorrection issues under CCM.

[0098] The system adapts to different power grid conditions: input voltage range 170VAC to 280VAC, frequency range 47Hz to 53Hz. The phase-locked loop (PLL) module can complete phase locking within one power grid cycle (approximately 20ms). When the power grid frequency deviates, the center frequency of the KR resonant filter also shifts (because the resonant frequency is determined by the A / B coefficients and is set to a fixed frequency), resulting in a slight decrease in harmonic suppression. Therefore, an optional enhancement scheme is to adjust the IIR coefficients in real time based on the power grid frequency measured by the PLL module. However, within the normal power grid frequency range of 50Hz ± 0.5Hz, a fixed coefficient design already meets the performance requirement of THD < 3%.

[0099] To verify the performance of the integrated control method of this invention, the inventors conducted full-condition tests on a 5.5kW prototype. The results are summarized as follows: Full-load inverter operation (5.5kW, 380VDC→220VAC): THD=2.3%, efficiency=96.1%, output voltage THD<1.5%. Full-load rectification operation (5.5kW, 220VAC→420VDC): power factor=0.993, efficiency=95.8%, DC bus voltage ripple<5Vpp. Rectifier mode to inverter mode switching: switching time 0.8ms, AC current overshoot<1.5A (4.2% of rated peak 35.35A), DC bus voltage drop recovery time<3ms. Inverter mode to rectification mode switching: switching time 0.75ms, no reverse spike in AC current, DC bus voltage overshoot<0.8%. Light load rectification condition (550W, 10% load, DCM region): efficiency 91.8%, power factor 0.978, an efficiency improvement of 5.3 percentage points compared to the pure PFM solution. Performance improvement comparison between the method of this invention and traditional methods is as follows: Figure 3 As shown, Figure 3 The system comprises four sub-figures: Sub-figure a compares current THD, showing a bar chart comparison of no compensation (8.5%), PI only (6.2%), 3 / 5 KR only (4.1%), and the method of this invention (2.3%); Sub-figure b compares system efficiency, showing a bar chart comparison of traditional bidirectional AC-CDC (93.5%), PFC only (94.8%), PFC + inverter KR (95.2%), and the method of this invention (96.1%); Sub-figure c compares mode switching time, showing traditional hard switching (8.2ms), mode_swap only (3.5ms), and the method of this invention (0.8ms); Sub-figure d is a summary table of overall performance.

[0100] Test results demonstrate that the method of this invention directly determines bidirectional mode switching by the sign of the voltage loop output value, eliminating the need for additional mode detection circuitry and external switching commands. The `mode_swapping` flag, combined with the integrator reset mechanism, ensures a smooth and shock-free mode switching process from rectification to inversion or vice versa, with a switching time of less than 1 millisecond. During switching, the DC bus voltage overshoot is less than 1%, and there are no abnormal AC current spikes. The gating mechanism based on the MPPT state and DC bus voltage conditions ensures that mode switching occurs under safe system conditions.

[0101] Secondly, the method of this invention selectively compensates for the 3rd, 5th, 7th, and 9th harmonics (KR harmonic compensation) using four parallel IIR resonant filters, reducing THD from 8.5% without compensation to 2.3%, a reduction of 73%. Compared to a scheme that only compensates for the 3rd and 5th harmonics (THD approximately 4.1%), the additional compensation for the 7th and 9th harmonics further reduces THD by 43%. Each resonant filter has independent A / B coefficients, allowing for flexible parameter tuning, and the computational complexity of the algorithm is controllable. On a 200MHz Cortex-M4 processor, the four-channel filtering calculation can be completed in approximately 8 microseconds.

[0102] Furthermore, during DCM current correction, the DCM current correction coefficient K is calculated online in real time, accurately mapping the current sampling value in DCM mode to the equivalent average current in CCM. This allows the PFC current loop to share the same set of PI parameters and feedforward structure in both DCM and CCM modes, eliminating the need to switch control strategies based on the conduction mode. Under light load conditions (10% of rated load), the system efficiency reaches 91.8%, an improvement of 5.3 percentage points compared to the 86.5% efficiency of the pure PFM solution under the same load.

[0103] The integrated control method of this invention achieves synergistic effects through three collaborative mechanisms: mode switching based on the sign of the voltage loop output value, KR harmonic compensation, and DCM current correction.

[0104] Collaborative Mechanism 1: KR Clean Waveform Improves the Calculation Accuracy of DCM Current Correction Coefficient. The calculation of the DCM current correction coefficient K depends on the sampled grid voltage Vgrid and DC bus voltage Vbus. In inverter mode, if the current harmonic content is high, the harmonic current will generate a harmonic voltage drop across the grid impedance, causing harmonic ripple to be superimposed on the Vgrid sampled by the ADC module, thus affecting the accurate calculation of Vgrid. KR harmonic compensation reduces THD to 2.3%, significantly reducing harmonic pollution in grid voltage sampling and providing cleaner grid voltage information for the calculation of the DCM current correction coefficient in rectification mode. Although KR harmonic compensation operates in inverter mode and DCM current correction operates in rectification mode, seemingly without overlap, the clean waveform history provides a good initial state for PFC control after the system switches between the two modes.

[0105] Collaborative Mechanism 2: DCM Current Accuracy Ensures Continuous Performance at Mode Switching Points. Mode switching points (vloop.output ≈ 0) typically correspond to medium load conditions, where the converter may operate near the boundary between CCM and DCM. Without DCM current correction, the current control accuracy in rectifier mode decreases under DCM, resulting in a "step" in control performance near the mode switching point—poor control accuracy on the PFC side while normal control accuracy on the inverter side. This asymmetry can lead to cumulative performance degradation in applications with frequent bidirectional switching (such as cloudy weather in photovoltaic energy storage systems). DCM current correction eliminates the accuracy loss on the PFC side, ensuring symmetrical and continuous control accuracy on both sides of the switching point, resulting in a smoother switching process.

[0106] Coordination Mechanism 3: Mode switching based on voltage loop output value sign, unified coordination to achieve optimal resource allocation. Voltage loop output value sign mode switching serves as the top-level coordination mechanism, naturally allocating control resources based on the physical meaning of the voltage loop output: when inversion is required, the system activates KR harmonic compensation (trading computational complexity for power quality), while DCM current correction remains inactive (saving the real-time computational overhead of the K coefficient); when rectification is required, the system activates DCM current correction (ensuring current accuracy across all operating conditions), while the KR resonant filter remains inactive. This division of labor ensures that the system only runs the control algorithm required for the current mode at any given time, keeping the total computational load within a controllable range. On a 200MHz Cortex-M4 processor, the control algorithm in inverter mode (SPLL + Vloop PI + KR × 4 + Iloop PI + Feedforward) takes approximately 25 microseconds in total; the control algorithm in rectifier mode (SPLL + Vloop PI + DCM K calculation + PFC Iloop PI + Feedforward) takes approximately 18 microseconds in total, both within the 50-microsecond control cycle time budget.

[0107] The three collaborative mechanisms mentioned above support and cooperate with each other within a unified control framework, resulting in comprehensive performance improvements that cannot be achieved by independent technologies. Specifically: KR resonant harmonic compensation significantly reduces current waveform distortion in inverter mode. The clean current waveform provides more accurate state feedback for the voltage loop proportional-integrator, enabling vloop.output to more accurately reflect the true demand of the DC bus voltage, thereby optimizing the timing of mode switching. The DCM current correction coefficient ensures the current control accuracy of the rectification mode across the entire DCM and CCM range, making the control performance near the mode switching point continuous and consistent, eliminating the switching shock caused by current accuracy jumps at the DCM / CCM boundary in traditional solutions. Voltage loop sign mode switching, as a top-level coordination mechanism, automatically selects either inverter mode (with KR compensation enabled) or PFC mode (with DCM correction enabled) based on the system state, ensuring that the two control strategies perform their respective functions without conflict. The organic integration of the three achieves comprehensive performance indicators such as: full-load THD < 3%, mode switching time < 1 millisecond, seamless adaptive control across the entire load range (from DCM to CCM), and full-load efficiency of 96.1%.

[0108] Furthermore, the unified feedforward + PI architecture reduces system complexity. Whether in inverter mode (feedforward = Vgrid / Vbus + iloop.output) or PFC mode (feed_forward + pfc_iloop.output), the output stage adopts a unified "feedforward + PI output" architecture. This consistency simplifies the implementation of the PWM data calculation layer. Both modes share the same limiting (limiting ±1.0 or 0.01 to 0.98) and the same PWM comparison value calculation logic, reducing code complexity and potential defect risks. The unified architecture also makes future functional expansion (such as adding new modulation strategies) more convenient.

[0109] The present invention also provides an integrated control system for a bidirectional AC / DC converter with resonant harmonic compensation and DCM adaptive correction, comprising:

[0110] A bidirectional AC / DC converter unit is connected between the AC power grid and the DC bus to realize bidirectional power conversion of rectification and inversion;

[0111] An analog-to-digital conversion sampling module (ADC module) is used to sample the AC grid voltage Vac, AC current Iac and DC bus voltage Vbus in each control cycle.

[0112] A phase-locked loop module used to acquire the phase, frequency, and polarity of the grid voltage;

[0113] A mode decision switching module used to calculate the voltage loop output value and determine whether to switch to inverter mode or rectifier mode based on the sign of the voltage loop output value;

[0114] The KR multi-resonant harmonic compensation module is used for harmonic compensation in inverter mode. The KR multi-resonant harmonic compensation module sends the AC current error to four parallel IIR resonant filters, and the sum of the outputs of the four resonant filters is used as the harmonic compensation amount and superimposed on the sinusoidal reference current to obtain the target current. The target current is output by the current inner loop proportional integrator and then superimposed on the grid voltage feedforward amount for PWM duty cycle calculation, and the inverter PWM duty cycle is output.

[0115] The DCM current correction module is used for DCM current correction in rectification mode. The DCM current correction module calculates the DCM current correction coefficient K online, multiplies the sampled AC current by K and uses it as the feedback quantity of the PFC current inner loop proportional integrator. The current error is calculated based on the feedback quantity and sent to the PFC current inner loop proportional integrator. The output quantity of the PFC current inner loop proportional integrator is superimposed with the grid voltage feedforward component for PFC PWM duty cycle calculation and outputs the PFC PWM duty cycle.

[0116] In some embodiments, a mode switching control module is further included for setting the mode_swapping flag and resetting the corresponding mode current loop integrator to achieve a smooth transition during mode switching.

[0117] The KR multi-resonant harmonic compensation module contains four independent second-order IIR resonant filters, each with independent A / B coefficients, targeting resonant frequencies of 150Hz, 250Hz, 350Hz, and 450Hz respectively. The KR multi-resonant harmonic compensation module is activated only when the system is in inverter mode.

[0118] The DCM current correction module uses the direct output of the PFC current inner loop proportional-integral converter as the duty cycle parameter to calculate the correction coefficient K online. When K > 1.0, the clamping value is 1.0; when Vbus - |Vgrid| < 0.1V, the denominator clamping value is 0.1V. The DCM current correction module is only activated when the system is in rectification mode.

[0119] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the integrated control method of the foregoing embodiments.

[0120] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the integrated control method of the foregoing embodiments.

[0121] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An integrated control method for a bidirectional AC-DC converter, characterized in that, Includes the following steps: Step S1: Sample the DC bus voltage, AC grid voltage, and AC current; Step S2: Perform proportional-integral calculation based on the DC bus voltage error value to obtain the voltage loop output value. Determine the mode of the bidirectional AC-DC converter based on the sign of the voltage loop output value. If the voltage loop output value is greater than 0, it is determined that the converter should switch to inverter mode. If the voltage loop output value is less than or equal to 0, it is determined that the converter should switch to rectifier mode. Perform mode switching based on the determination result. Step S3: After switching to inverter mode, KR harmonic compensation is performed in inverter mode: calculate the AC current error, send the AC current error to four resonant filters respectively, calculate the sum of the outputs of the four resonant filters as the harmonic compensation amount, superimpose the harmonic compensation amount and the sinusoidal reference current to obtain the compensated target current, send the target current to the current inner loop proportional integrator, superimpose the output of the current inner loop proportional integrator with the grid voltage feedforward amount for PWM duty cycle calculation, and output the inverter PWM duty cycle; Step S4: After switching to rectification mode, DCM current correction is performed in rectification mode: calculate the DCM current correction coefficient, correct the current based on the DCM current correction coefficient, use the corrected current as the feedback quantity of the PFC current inner loop proportional integrator, calculate the current error based on the feedback quantity, send the current error to the PFC current inner loop proportional integrator, add the output quantity of the PFC current inner loop proportional integrator to the grid voltage feedforward component, use it for PFC PWM duty cycle calculation, and output the PFC PWM duty cycle. Step S5: Generate the corresponding full-bridge drive signal based on the duty cycle calculated in step S3 or step S4.

2. The bidirectional AC-DC converter integrated control method as described in claim 1, characterized in that: In step S2, the DC bus voltage error value ΔV = Vbus - Vbus_ref, where Vbus is the DC bus voltage and Vbus_ref is the DC bus reference voltage.

3. The bidirectional AC-DC converter integrated control method as described in claim 1, characterized in that: In step S2, the mode switching determination is performed according to the following steps: S201. Obtain the current MPPT tracking status. If the MPPT tracking status is less than the preset threshold, set the voltage loop output value to zero and reset the voltage outer loop proportional integrator to keep it running in rectification mode. S202. If the MPPT tracking status is greater than or equal to the preset threshold, and the voltage loop output value is greater than 0, while the DC bus voltage is less than 340V, the voltage loop output value is set to zero, and the voltage outer loop proportional integrator is reset, and the system continues to operate in rectification mode. S203. When neither of the above two suppression conditions is met, the mode is determined directly based on the sign of the voltage loop output value. If the voltage loop output value is greater than 0, it is determined to switch to inverter mode. If the voltage loop output value is less than or equal to 0, it is determined to switch to rectifier mode.

4. The bidirectional AC-DC converter integrated control method as described in claim 1, characterized in that: In step S2, the following smooth transition mechanism is executed during mode switching: S5. Set the mode_swapping flag; S6. When the bidirectional AC / DC converter needs to switch modes, the smooth transition mechanism is activated through the mode_swapping flag. First, the sign change of the voltage loop output value is detected to determine which mode to switch to; then the mode_swapping flag is set, the current loop integrator to be exited is reset, and the mode variable is updated to the mode to be switched. After the mode variable update is completed, the PWM duty cycle transitions from the old mode to the new mode; the mode_swapping flag is reset.

5. The bidirectional AC-CDC converter integrated control method as described in claim 1, characterized in that: In step S3, the AC current error ac_current_err = ac_current_ref - ac_current_raw, where ac_current_ref is the sinusoidal reference current and ac_current_raw is the sampled AC current; The target current ac_current_target = ac_current_ref + kr_total, where kr_total is the harmonic compensation amount.

6. The bidirectional AC-DC converter integrated control method as described in claim 5, characterized in that: When the calculated sinusoidal reference current is greater than +35.35A, clamp the sinusoidal reference current to +35.35A; when the calculated sinusoidal reference current is less than -35.35A, clamp the sinusoidal reference current to -35.35A.

7. The bidirectional AC-DC converter integrated control method as described in claim 1, characterized in that: The resonant filters are: 3rd resonant filter, 5th resonant filter, 7th resonant filter and 9th resonant filter.

8. The bidirectional AC-DC converter integrated control method as described in claim 1, characterized in that: In step S4, the DCM current correction coefficient K = Vbus × Duty / (Vbus - |Vgrid|), where Vbus is the DC bus voltage, Duty is the output duty cycle of the current PFC inner loop proportional integrator, and Vgrid is the AC grid voltage. The corrected current raw_avg = K × ac_current_raw, where ac_current_raw is the sampled AC current; Current error ac_err = ac_current_ref - raw_avg.

9. The bidirectional AC-DC converter integrated control method as described in claim 8, characterized in that: During calculation, the voltage error Vbus - |Vgrid| is clamped to 0.1V when it is less than 0.1V, and clamped to 1.0 when the calculated K value is greater than 1.

0.

10. A bidirectional AC-DC converter integrated control device, characterized in that, include: A bidirectional AC / DC converter unit is connected between the AC power grid and the DC bus to realize bidirectional power conversion of rectification and inversion; An analog-to-digital conversion sampling module used to sample AC grid voltage, AC current and DC bus voltage in each control cycle; A phase-locked loop module used to acquire the phase, frequency, and polarity of the grid voltage; A mode decision switching module used to calculate the voltage loop output value and determine whether to switch to inverter mode or rectifier mode based on the sign of the voltage loop output value; The KR multi-resonant harmonic compensation module is used for harmonic compensation in inverter mode. The KR multi-resonant harmonic compensation module sends the AC current error to four parallel IIR resonant filters, and the sum of the outputs of the four resonant filters is used as the harmonic compensation amount and superimposed on the sinusoidal reference current to obtain the target current. The target current is output by the current inner loop proportional integrator and then superimposed with the grid voltage feedforward amount for PWM duty cycle calculation, and the inverter PWM duty cycle is output. A DCM current correction module is used for DCM current correction in rectification mode. The DCM current correction module calculates the DCM current correction coefficient K online, multiplies the sampled AC current by K and uses it as the feedback quantity of the PFC current inner loop proportional integrator. The current error is calculated based on the feedback quantity and sent to the PFC current inner loop proportional integrator. The output quantity of the PFC current inner loop proportional integrator is superimposed with the grid voltage feedforward component and used for PFC PWM duty cycle calculation, and the PFC PWM duty cycle is output.

11. The bidirectional AC-DC converter integrated control device as described in claim 10, characterized in that: It also includes a mode switching control module for setting the mode_swapping flag and resetting the corresponding mode current loop integrator to achieve a smooth transition during mode switching.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, it implements the bidirectional AC-DC converter integrated control method as described in any one of claims 1 to 9.

13. A computer program product, comprising a computer program, characterized in that: When the computer program is executed by the processor, it implements the bidirectional AC-DC converter integrated control method as described in any one of claims 1 to 9.

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