A silicon carbide-based electrolytic capacitor-free variable frequency motor drive system and a control method thereof

Abstract

The application relates to the technical field of variable frequency motor driving control, and particularly discloses a silicon carbide-based electrolytic capacitor-free variable frequency motor driving system and a control method thereof. The system collects the instantaneous value of a direct-current bus voltage in each pulse width modulation cycle in real time, carries out filtering processing, dynamically calculates the modulation ratio of the current cycle by using the filtered bus voltage to generate a phase bridge arm duty cycle signal, and finally outputs a driving signal to a silicon carbide three-phase inverter module, fundamentally solving the problems of electrolytic capacitor failure, power module heat dissipation difficulty and power factor compensation dependence on a PFC circuit in a traditional variable frequency range hood driving system. Since a small-capacity film capacitor is used to replace a large-capacity electrolytic capacitor and is matched with a silicon carbide power device, the system can stably operate under the condition of omitting the PFC circuit and the radiator, not only eliminating the safety hazards of electrolytic capacitor high-temperature failure and liquid leakage explosion, but also greatly reducing the volume and hardware cost of the driving system.

Description

Technical Field

[0001] This invention relates to the field of variable frequency motor drive control technology, specifically to a silicon carbide-based electrolytic capacitor-free variable frequency motor drive system and its control method. Background Technology

[0002] With the continuous development of motor frequency conversion control technology, frequency conversion drive systems have been widely used in the field of household appliances. Among them, frequency conversion range hoods, as the core equipment of modern kitchens, have drive system performance that directly affects the energy efficiency, operational reliability, and service life of the entire machine. Currently, frequency conversion range hood drive systems on the market generally adopt the classic topology of rectifier bridge, large-capacity electrolytic capacitor, and inverter. The large-capacity aluminum electrolytic capacitor is connected in parallel to the DC bus output terminal of the rectifier module. Its charging and discharging characteristics smooth the pulsating voltage after rectification, so that the DC bus voltage is maintained at a relatively stable level, thereby ensuring the accuracy of the inverter output voltage. Due to its advantages of large capacity and low cost, aluminum electrolytic capacitor has long been the preferred solution for the DC bus filtering stage in small and medium power frequency conversion drive systems.

[0003] However, aluminum electrolytic capacitors are inherently components with a limited lifespan. They contain an electrolyte that gradually evaporates or undergoes chemical changes under the combined influence of an electric field and temperature, leading to a decrease in capacitance and an increase in equivalent series resistance. This lifespan degradation is particularly pronounced in high-temperature environments. The drive system of a variable frequency range hood is located inside the casing above the cooktop. This space contains not only the heat generated by the motor but also the rising hot fumes during cooking. The operating temperature is much higher than that of ordinary industrial frequency converters, significantly shortening the actual lifespan of the electrolytic capacitors, often far below the designed lifespan of the entire range hood. Furthermore, electrolytic capacitors suffer from poor low-temperature characteristics, exhibiting significant capacitance decay in cold environments, affecting the system's low-temperature start-up performance. In addition to the lifespan issue of electrolytic capacitors, traditional silicon-based IGBT power devices experience significant switching and conduction losses during switching. The confined space inside a range hood and extremely limited heat dissipation conditions typically require additional heat sinks and forced air cooling. Even so, the power module still faces reliability risks such as insulation aging and solder layer detachment.

[0004] To address the aforementioned issues, electrolytic capacitor-free drive technology replaces large-capacity electrolytic capacitors with small-capacity film capacitors, fundamentally eliminating the short lifespan of electrolytic capacitors. While film capacitors offer excellent frequency characteristics and temperature stability, their extremely limited energy storage capacity causes the DC bus voltage to no longer remain constant. Instead, it exhibits severe fluctuations synchronized with grid power pulsations, with ripple peak-to-peak values ​​approaching the average DC voltage. These significant fluctuations in bus voltage directly impact the accuracy of the inverter's output voltage. The modulation ratio of space vector pulse width modulation (SVM) is a key parameter determining output voltage accuracy. Traditional motor control algorithms assume a constant DC bus voltage during modulation ratio calculations. However, when the actual bus voltage fluctuates significantly, if modulation is still performed based on a constant bus voltage, the actual output voltage vector will deviate from the target value, directly leading to increased stator current harmonics, torque pulsation, and speed fluctuations. Meanwhile, when the bus voltage drops, the reference voltage vector may exceed the output capability range under the current bus voltage, leading to current loop malfunction. The LC resonant circuit formed by the grid-side filter inductor and film capacitor is prone to resonance amplification at specific frequencies. If not suppressed, this can cause resonance amplification or even system oscillation, seriously threatening the stable operation of the drive system. Therefore, how to solve the voltage modulation inaccuracy problem under large bus voltage fluctuations through the control algorithm itself without increasing hardware costs is a crucial issue that urgently needs to be addressed for the widespread application of electrolytic capacitor-free drive technology. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a silicon carbide-based electrolytic capacitor-free variable frequency motor drive system and its control method, which can effectively solve the problems mentioned in the background technology.

[0006] To achieve the above objectives, the present invention provides the following technical solution: The first aspect of the present invention provides a control method for a silicon carbide-based electrolytic capacitor-free variable frequency motor, comprising: S1. Acquiring instantaneous values ​​of DC bus voltage within each pulse width modulation cycle, and filtering the instantaneous values ​​of DC bus voltage to generate a filtered bus voltage; S2. Dynamically calculating the modulation ratio of the current cycle based on the filtered bus voltage, and analyzing the duty cycle signal of each phase bridge arm through the modulation ratio; the modulation ratio is directly proportional to the amplitude of the reference voltage vector, and inversely proportional to the filtered bus voltage; S3. Outputting a drive signal to a silicon carbide three-phase inverter module through the duty cycle signal to control the motor operation.

[0007] Preferably, the specific process for acquiring the instantaneous value of the DC bus voltage is as follows: The grid voltage phase is obtained through a phase-locked loop (PLL). Based on the grid voltage phase, the peak and trough times of the bus voltage within each pulse width modulation cycle are determined. The peak and trough times are simultaneously used as sampling times to collect the peak and trough values ​​of the bus voltage. The deviation between the time interval between the peak and trough values ​​of the bus voltage and the theoretical time interval is used to generate a phase correction value, which is fed back to the output of the PLL to correct the phase shift at the sampling time.

[0008] Preferably, the instantaneous value of the DC bus voltage is filtered to generate a filtered bus voltage, specifically as follows: The peak value and valley value of the bus voltage are filtered to generate peak filter value and valley filter value, and the bus voltage fluctuation amplitude is calculated using the peak filter value and valley filter value. The minimum and maximum values ​​of the filtered bus voltage are determined based on the bus voltage fluctuation amplitude.

[0009] Preferably, the torque compensation current amplitude is calculated based on the bus voltage fluctuation amplitude, and the torque compensation current amplitude is inversely proportional to the product of the number of motor pole pairs, permanent magnet flux linkage, and electric angular velocity; the torque compensation current amplitude is superimposed on the quadrature axis current setpoint at a preset grid frequency, and the initial phase angle of the AC component superimposed on the quadrature axis current setpoint is dynamically adjusted according to the phase delay of the filtered bus voltage; the phase delay is obtained by filtering the difference between the bus voltage phase and the grid voltage phase at the current sampling time.

[0010] Preferably, the magnitude of the reference voltage vector is compared with the magnitude of the maximum output voltage vector corresponding to the filtered bus voltage: If the magnitude of the reference voltage vector is greater than the magnitude of the maximum output voltage vector, then the magnetic weakening current component is calculated based on the minimum value of the filtered bus voltage. The magnetic weakening current component is then superimposed on the direct-axis current setpoint to reduce the magnitude of the reference voltage vector until the magnitude of the reference voltage vector is no greater than the magnitude of the maximum output voltage vector. The minimum magnitude of the bus voltage in the next pulse width modulation cycle is estimated based on the instantaneous rate of change of the filtered bus voltage. If the minimum magnitude is lower than a preset depth threshold, then the magnetic weakening current component is increased to the target value of the magnetic weakening current corresponding to the minimum magnitude.

[0011] Preferably, before dynamically calculating the modulation ratio of the current cycle, the derivative of the instantaneous value of the DC bus voltage with respect to time is calculated, a damping compensation voltage is generated based on the derivative value and the amplitude of the bus voltage fluctuation, and the damping compensation voltage is superimposed on the direct-axis reference voltage to suppress the resonant amplification excited by the bus voltage fluctuation.

[0012] Preferably, after acquiring the instantaneous value of the DC bus voltage, the filtered bus voltage is compared with a preset protection voltage threshold, which includes a preset overvoltage threshold and a preset undervoltage threshold. If the filtered bus voltage is greater than the preset overvoltage threshold, or the filtered bus voltage is less than the preset undervoltage threshold, a protection action is triggered and the drive signal output is blocked. The positive offset between the preset overvoltage threshold and the rated bus voltage is greater than the negative offset between the preset undervoltage threshold and the rated bus voltage.

[0013] A second aspect of the present invention provides a silicon carbide-based electrolytic capacitor-free variable frequency motor drive system, comprising: a rectifier module for converting AC input into pulsating DC voltage; a thin-film capacitor connected to the output terminal of the rectifier module; a silicon carbide three-phase inverter module connected to the output terminal of the thin-film capacitor, comprising a three-phase full-bridge topology composed of a preset number of silicon carbide power switching transistors; a permanent magnet synchronous motor connected to the output terminal of the silicon carbide three-phase inverter module; and a control unit connected to the control terminal of the silicon carbide three-phase inverter module for executing the control method.

[0014] Compared with the prior art, the embodiments of the present invention have at least the following advantages or beneficial effects: (1) This invention provides a silicon carbide-based electrolytic capacitor-free variable frequency motor drive system and its control method. By real-time acquisition and filtering of the instantaneous value of DC bus voltage in each pulse width modulation cycle, the modulation ratio of the current cycle is dynamically calculated using the filtered bus voltage to generate the duty cycle signal of each phase bridge arm. Finally, the drive signal is output to the silicon carbide three-phase inverter module. This fundamentally solves the problems of easy failure of electrolytic capacitors, difficulty in heat dissipation of power modules, and reliance on PFC circuit to compensate for power factor in traditional variable frequency range hood drive systems. Since small-capacity film capacitors are used to replace large-capacity electrolytic capacitors and are combined with silicon carbide power devices, the system can operate stably without PFC circuit and heat sink. This not only eliminates the safety hazards of high temperature failure and leakage explosion of electrolytic capacitors, but also greatly reduces the size and hardware cost of the drive system. At the same time, the high switching frequency characteristics and high temperature resistance of silicon carbide devices enable the entire control architecture to adapt to the harsh working environment inside the range hood, and the overall reliability of the system is significantly improved.

[0015] (2) This invention obtains the phase of the grid voltage through a phase-locked loop and determines the peak and trough times of the bus voltage within each pulse width modulation period. Both are used as sampling times to collect the peak and trough values ​​of the bus voltage. At the same time, the time interval deviation between the peak and trough values ​​is used to generate a phase correction amount and feed it back to the output of the phase-locked loop, thereby realizing dynamic correction of the phase offset at the sampling time. On this basis, the collected peak and trough values ​​of the bus voltage are further filtered to generate peak filter values ​​and trough filter values. Based on this, the bus voltage fluctuation amplitude is calculated and the minimum and maximum values ​​of the filtered bus voltage are determined. The synergistic effect of the two enables the system to accurately capture the extreme characteristics of the voltage waveform and correct the sampling phase deviation in a timely manner under the condition of severe bus voltage fluctuation without electrolytic capacitors. Compared with the conventional scheme that only performs simple ADC sampling, this technology greatly improves the accuracy and real-time performance of bus voltage detection, providing a highly reliable voltage data foundation for subsequent modulation ratio calculation, torque compensation, field weakening control and active damping control, and ensuring the stable execution of the entire control algorithm under extreme voltage fluctuation conditions.

[0016] (3) When the reference voltage vector amplitude exceeds the maximum output voltage vector amplitude, this invention calculates the field weakening current component based on the minimum value of the filtered bus voltage and superimposes it onto the direct-axis current setpoint to reduce the reference voltage vector amplitude. Simultaneously, it innovatively utilizes the instantaneous rate of change of the filtered bus voltage to predict the minimum amplitude of the bus voltage in the next pulse width modulation cycle. If this minimum amplitude is lower than a preset depth threshold, the field weakening current component is further increased to the target value corresponding to the minimum amplitude. This forward-looking field weakening control mechanism breaks through the limitation of traditional field weakening control relying solely on current voltage feedback. Using the bus voltage change rate as a prediction basis, the depth of bus voltage drop in the future cycle can be judged in advance, and the magnitude of the weak magnetic current can be actively adjusted accordingly. This effectively prevents problems such as motor runaway or increased torque pulsation caused by insufficient inverter output voltage due to sudden bus voltage drop. It is especially suitable for dynamic conditions such as range hood start-up and sudden load increase. Without increasing the capacitance of the thin film capacitor, it significantly enhances the system's robustness and dynamic response capability under deep bus voltage fluctuation conditions, giving full play to the combined performance of the high-frequency switching advantages of silicon carbide power devices and the miniaturized and low-cost advantages of the electrolytic capacitor-free architecture. Attached Figure Description

[0017] The present invention will be further described with reference to the accompanying drawings, but the embodiments in the drawings do not constitute any limitation on the present invention. For those skilled in the art, other drawings can be obtained based on the following drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the method steps of the present invention.

[0019] Figure 2 This is a schematic diagram of the system module connections of the present invention. Detailed Implementation

[0020] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0021] Reference Figure 1 The diagram shows a flowchart of the method steps of the present invention. The first aspect of the present invention provides a method for controlling a capacitorless variable frequency motor based on silicon carbide, comprising: S1. Acquiring instantaneous values ​​of DC bus voltage within each pulse width modulation cycle, and filtering the instantaneous values ​​of the DC bus voltage to generate a filtered bus voltage; S2. Dynamically calculating the modulation ratio of the current cycle based on the filtered bus voltage, and analyzing the duty cycle signal of each phase arm through the modulation ratio; the modulation ratio is directly proportional to the amplitude of the reference voltage vector, and inversely proportional to the filtered bus voltage; S3. Outputting a drive signal to the silicon carbide three-phase inverter module through the duty cycle signal to control the motor operation.

[0022] In this embodiment, each pulse width modulation cycle refers to each PWM cycle during the continuous operation of the control algorithm (for example, at a 16kHz carrier frequency, the duration of each pulse width modulation cycle is 62.5μs); the current cycle is the PWM cycle currently performing control calculations.

[0023] It should be noted that the modulation ratio of the current cycle is dynamically calculated based on the filtered bus voltage. The specific calculation process is as follows: modulation ratio m(t) = √3 × ||Vref|| / udc(t), where udc(t) is the filtered bus voltage, ||Vref|| is the magnitude of the reference voltage vector, and t represents the continuous time variable. The duty cycle signal of each phase bridge arm is analyzed using the modulation ratio. Specifically, the components Vα and Vβ of the reference voltage vector in the stationary α-β coordinate system (stationary two-phase orthogonal coordinate system) are used. Vα and Vβ are the α-axis and β-axis components of the reference voltage vector in the α-β coordinate system, respectively. Combined with the filtered bus voltage udc(t), these components are substituted into the duty cycle calculation formula of the SVPWM algorithm to obtain the conduction duty cycles Ta, Tb, and Tc on the three-phase bridge arms (i.e., the conduction duty cycles of the transistors on the U-phase, V-phase, and W-phase bridge arms). The three-phase bridge arms refer to the U-phase, V-phase, and W-phase bridge arms in the silicon carbide three-phase inverter module. Each phase bridge arm consists of... It consists of two silicon carbide power switches connected in series; the modulation ratio is proportional to the magnitude of the reference voltage vector and inversely proportional to the filtered bus voltage. The magnitude of the reference voltage vector represents the magnitude of the motor stator voltage vector in the α-β plane during the current control cycle, i.e., ||Vref||=√(Vd²+Vq²), where Vd is the d-axis (direct axis) voltage component and Vq is the q-axis (quadrature axis) voltage component. The d-axis and q-axis voltages output from the current loop PI regulator are obtained by inverse Park transformation, and their values ​​are stored in the registers or RAM of the control unit (such as the APM32F035 motor control MCU).

[0024] It should also be noted that the duty cycle signal is used to output a drive signal to the silicon carbide three-phase inverter module to control the operation of the motor. The drive signal is a high-level or low-level logic signal of the PWM wave, which is used to control the conduction and turn-off of each silicon carbide power switch. The duty cycle signal determines the proportion of the conduction time of each bridge arm in each PWM cycle, and thus determines the average voltage vector applied to the three-phase windings of the motor, thereby realizing the field-oriented control of the motor.

[0025] Specifically, the process of acquiring the instantaneous value of the DC bus voltage is as follows: The phase of the grid voltage is obtained by a phase-locked loop. The peak and trough times of the bus voltage within each pulse width modulation period are determined based on the phase of the grid voltage. The peak and trough times are simultaneously used as sampling times to collect the peak and trough values ​​of the bus voltage.

[0026] It should be explained that the phase-locked loop (PLL) obtains the phase angle of the grid voltage by detecting the zero-crossing point of the grid-side voltage or by using a hardware capture circuit. Specifically, the PLL samples the AC input voltage, performs coordinate transformation and PI regulation, and outputs a sine / cosine value that is in phase and frequency with the grid voltage, thus obtaining the grid voltage phase. Based on the grid voltage phase, the peak and trough times of the bus voltage within each pulse width modulation cycle are determined. Specifically, the bus voltage is a pulsating waveform after full-wave rectification, with its peak corresponding to the peak value of the grid voltage absolute value (i.e., sin(ωt) = ±1), and its trough corresponding to the zero-crossing point of the grid voltage (i.e., sin(ωt) = 0). Peak times are corresponding to grid voltage phases of 90° and 270°, and trough times are corresponding to grid voltage phases of 0° and 180°. The peak and trough values ​​of the bus voltage are simultaneously used as instantaneous values, together constituting a part of the instantaneous value of the DC bus voltage. That is, by performing ADC sampling at these two key moments, the extreme characteristics of the bus voltage waveform are accurately captured.

[0027] The deviation between the time interval between the peak and valley values ​​of the bus voltage (i.e., the time from adjacent valley to peak or peak to valley) and the theoretical time interval of half a power grid cycle is calculated. This deviation represents the synchronization error between the current sampling clock and the actual phase of the power grid. Based on this deviation, the phase angle of the phase-locked loop (PLL) output is finely adjusted (e.g., by converting the deviation signal into a phase correction value through a PI regulator and superimposing it on the PLL output angle). A phase correction value is generated and fed back to the output of the PLL to correct the phase offset at the sampling time. Specifically, the phase correction value is accumulated in the phase accumulator of the PLL so that subsequent sampling times can accurately align with the peak and valley positions, avoiding inaccurate detection of extreme bus voltage values ​​due to sampling phase offset.

[0028] Since the time interval between the peak and trough of the bus voltage is theoretically equal to half a grid cycle (10ms for a 50Hz grid), by comparing this measured time interval with the theoretical value, the drift of the ADC sampling time relative to the grid phase can be monitored and compensated in real time, ensuring the accuracy of the sampling of the peak and trough values ​​of the bus voltage in each subsequent PWM cycle, thereby providing an accurate voltage reference for modulation ratio calculation. The theoretical time interval of half a grid cycle is defined as 1 / (2f), where f is the grid frequency, obtained from the grid frequency output of the phase-locked loop.

[0029] Furthermore, the instantaneous value of the DC bus voltage is filtered to generate a filtered bus voltage, specifically as follows: The peak and valley values ​​of the bus voltage are filtered separately. Specifically, a first-order IIR low-pass digital filter is used, with a transfer function of y(n) = α × x(n) + (1-α) × y(n-1), where α is the filter coefficient (in this example, at a sampling frequency of 16kHz, α = 0.8), y(n) is the filtered value output in the nth sampling period, i.e., the current output value after filtering, and x(n) is the original sampled value input in the nth sampling period. The bus voltage instantaneous value (peak or valley) of the next sample is taken, y(n-1) is the filtered value output in the (n-1)th sampling period, that is, the filtered output value of the previous time (historical value), and n is the sequence number of the discrete sampling sequence, representing the nth PWM period or the nth ADC sampling; peak and valley filtered values ​​are generated, and the bus voltage fluctuation amplitude is calculated using the peak and valley filtered values. The specific calculation process is to subtract the valley filtered value from the peak filtered value to obtain the fluctuation amplitude Δudc=u dcpf -u dcvf , where u dcpf It is the filtered value of the peak bus voltage, u dcvf This is the filtered value of the bus voltage valley; the minimum and maximum values ​​of the filtered bus voltage are determined based on the bus voltage fluctuation amplitude, specifically by taking the filtered bus voltage udc at the current sampling time. filtered Its minimum value is udc min =udc filtered -Δudc / 2, its maximum value is udc max =udc filtered +Δudc / 2, thereby enabling dynamic prediction of the upper and lower boundaries of the bus voltage.

[0030] Specifically, the torque compensation current amplitude is calculated based on the bus voltage fluctuation amplitude. The calculation process is based on the power balance principle, dividing the amplitude of the second harmonic power pulsation, Pripple, by 1.5 × p × ψf × ωe, i.e., Iqac = Pripple / (1.5 × p × ψf × ωe), where Iqac represents the AC component amplitude of the q-axis (quadrature axis) torque compensation current. Pripple is approximately equal to the product of the bus voltage fluctuation amplitude and the average bus voltage divided by the equivalent load resistance; the torque compensation current amplitude is calculated based on the bus voltage fluctuation amplitude and the average bus voltage. The amplitude of the torque compensation current is inversely proportional to the product of the number of motor pole pairs, the permanent magnet flux linkage, and the electric angular velocity. The number of motor pole pairs p is the number of permanent magnet pole pairs of the motor rotor, which is obtained from the motor nameplate or parameter identification results. The permanent magnet flux linkage ψf is the flux linkage amplitude generated by the permanent magnet, which is obtained through motor parameter identification (such as no-load back EMF measurement). The electric angular velocity ωe is the electrical angular velocity of the motor rotor, which is equal to the product of the mechanical angular velocity and the number of pole pairs, and is estimated in real time by a position / velocity observer (such as a sliding mode observer or a Luneburg observer).

[0031] The torque compensation current amplitude is superimposed on the quadrature axis current setpoint at twice the grid frequency, specifically by constructing an AC compensation component iqac. comp =Iqac×sin(2ωt+φ), where ω is the grid angular frequency (output by the phase-locked loop) and φ is the phase compensation angle; add this AC component directly to the DC component Iqdc of the q-axis current reference to obtain the final q-axis current reference value iqref=Iqdc+iqac comp The grid frequency is 50Hz or 60Hz, obtained by detecting the grid-side voltage through a phase-locked loop; the quadrature axis (q-axis) is a coordinate axis perpendicular to the rotor magnetic field direction in a synchronous rotating coordinate system, and its current setpoint iqref directly determines the motor's output torque; and the initial phase angle of the AC component superimposed on the quadrature axis current setpoint is dynamically adjusted according to the phase delay of the filtered bus voltage. Specifically, using the grid phase angle corresponding to the bus voltage sampling time as a reference, the phase of the actual bus voltage fluctuation is determined by using the peak and valley positions of the filtered bus voltage, and the phase delay is used as the superimposed component sin(2ωt+φ+θ). delay θ in ) delay By adjusting θ online delay Align the phase of the compensation current with the phase of the bus power pulsation to achieve optimal torque compensation.

[0032] The phase delay is obtained by low-pass filtering the difference between the phase of the bus voltage and the phase of the grid voltage at the current sampling moment. The current sampling moment refers to the moment when the bus voltage ADC is sampled within the current PWM cycle, that is, the moment when the control program reads the instantaneous value of the bus voltage. The phase difference is obtained by comparing the time difference between the zero-crossing point of the current sampled bus voltage waveform and the zero-crossing point of the grid voltage phase output by the phase-locked loop, and multiplying it by the grid angular frequency. The phase delay is obtained by performing a first-order low-pass filter (cutoff frequency of about 50Hz) on the difference to smooth the noise.

[0033] By accurately extracting the phase information of the bus voltage fluctuation and dynamically adjusting the phase angle of the torque compensation component, the compensation current is always synchronized with the grid power pulsation in the opposite direction. This maximizes the suppression of speed pulsation and electromagnetic torque pulsation caused by bus voltage fluctuation, allowing the motor to maintain smooth operation even without electrolytic capacitors. Especially for applications like range hoods that have high requirements for vibration and noise, this can significantly reduce mechanical noise caused by second-harmonic torque pulsation.

[0034] Furthermore, the magnitude of the reference voltage vector is compared with the maximum output voltage vector magnitude corresponding to the current filtered bus voltage. The maximum output voltage vector magnitude corresponding to the filtered bus voltage refers to the magnitude of the filtered bus voltage udc at the currently sampled value. filteredBelow, SVPWM uses the maximum fundamental voltage amplitude that can be output in the linear modulation region, i.e., udc filtered / √3, if the modulation region is taken into account, the upper limit can be extended to (2×udc) filtered However, this method prioritizes operation in the linear modulation region to reduce harmonics.

[0035] If the magnitude of the reference voltage vector is not greater than the magnitude of the maximum output voltage vector, it indicates that the current voltage command is in the linear modulation region. There is no need to start field weakening control. The existing d-axis current setpoint (usually 0 or the field weakening current base value) remains unchanged, and subsequent SVPWM modulation continues to be executed.

[0036] If the magnitude of the reference voltage vector is greater than the magnitude of the maximum output voltage vector, then the field weakening current component is calculated based on the minimum value of the filtered bus voltage. The specific calculation process is based on the voltage limit circle equation. Under the condition of neglecting the stator resistance voltage drop in steady state, we have (ωe×Ld×id+ωe×ψf)²+(ωe×Lq×iq)²≤(udc) min / √3)², where id refers to the d-axis (direct axis) current, that is, the component of the stator current vector along the d-axis in the synchronous rotating coordinate system; Lq is the q-axis (quadrature axis) inductance, that is, the inductance parameter of the motor stator winding in the q-axis direction, which is an inherent parameter of the motor body and can be obtained through parameter identification or manufacturer data; iq is the q-axis (quadrature axis) current, that is, the component of the stator current vector along the q-axis in the synchronous rotating coordinate system; by solving for id and taking the direction that reduces the reference voltage, the field weakening current component id is obtained. weakening =(ωe×ψf-udc min / √3) / (ωe×Ld), where udc min The minimum value of the current filtered bus voltage is given, and Ld is the d-axis inductance (obtained through parameter identification). The weak magnetic current component is superimposed on the direct-axis current setpoint to reduce the magnitude of the reference voltage vector until the magnitude of the reference voltage vector is not greater than the magnitude of the maximum output voltage vector.

[0037] ID weakening As a negative current superimposed on the original d-axis current given value idref base (Usually 0 or the base value used for MTPA), i.e., idref = idref base +id weakening , where id weakening The value is negative. By increasing the negative d-axis current, a demagnetizing effect is generated, which reduces the induced electromotive force of the permanent magnet flux in the stator winding, thereby reducing the required output voltage amplitude. The direct axis is the d-axis, which is the coordinate axis in the synchronous rotating coordinate system that coincides with the direction of the rotor magnetic field. Its current setpoint idref is used to control the excitation state of the motor.

[0038] The instantaneous rate of change of the filtered bus voltage at the current moment represents the amplitude and direction of the bus voltage change per unit time, i.e., dudc / dt. This rate of change is obtained by subtracting the previous sampled value from the current sampled value and then dividing by the PWM period. dudc refers to the infinitesimal change in the bus voltage, and dt is the corresponding infinitesimal change in time. The minimum amplitude of the bus voltage in the next PWM period is estimated; that is, if the current bus voltage is in a decreasing trend (dudc / dt < 0), the minimum amplitude udc in the next period is predicted. pred ≈udc filtered +(dudc / dt)×Ts, where Ts is the PWM period; if it is in an upward trend, then take the current filter value as the minimum amplitude; if the minimum amplitude is lower than the preset depth threshold, then increase the field weakening current component to the field weakening current target value corresponding to the minimum amplitude, and use the estimated udc pred UDC in the substitution formula min Recalculate the target value of the weak magnetic current: idpred = (ωe × ψf - udc) pred / √3) / (ωe×Ld)and directly update the current idref to the target value, thereby increasing the field weakening depth in advance; where the target value of the field weakening current refers to the d-axis current setpoint that matches the estimated minimum bus voltage and can ensure that the voltage command does not overshoot; if the minimum amplitude is not lower than the preset depth threshold, the original field weakening component remains unchanged; where the preset depth threshold represents the minimum safe boundary to which the bus voltage is allowed to drop, for example, it can be set to 60% of the rated bus voltage to prevent the inverter output voltage from being insufficient and causing runaway; this threshold is read in advance from the non-volatile memory (NVM) or parameter configuration area of ​​the control unit.

[0039] Specifically, before dynamically calculating the modulation ratio of the current cycle, the differential value of the instantaneous DC bus voltage with respect to time is also calculated. In other words, the instantaneous rate of change of the bus voltage, dudc / dt, is calculated to reflect the real-time fluctuation trend of the bus voltage. A damping compensation voltage is generated based on the differential value and the amplitude of the bus voltage fluctuation. The specific generation process involves multiplying the differential value by a preset damping coefficient k. damp The compensation voltage Vd is obtained. comp =k damp ×(dudc / dt); The damping compensation voltage is superimposed on the direct-axis reference voltage, i.e., Vd comp The d-axis voltage setpoint V superimposed on the output of the current loop PI regulator dref This forms the final d-axis voltage command Vd used for the inverse Park transformation. final =V dref +Vd comp Vd finalThis refers to the d-axis voltage command value that ultimately participates in the inverse Park transformation, in order to increase system damping at the LC resonant frequency and suppress the resonant amplification caused by bus voltage fluctuations.

[0040] The time is a continuous time variable, and the differential value is obtained by discretizing the bus voltage signal over continuous time. Its magnitude directly reflects the rate of bus voltage fluctuation and is a key indicator reflecting the LC resonance state. When the system experiences LC resonance, the bus voltage will exhibit high-frequency oscillation components, and the dudc / dt value will increase. The oscillation components can be effectively counteracted by the feedback effect of the damping compensation voltage.

[0041] Active damping control, without adding any passive damping components (such as series resistors), introduces a virtual resistance effect at the LC resonant frequency using a software algorithm. This effectively suppresses the resonant amplification phenomenon that may be caused by the LC resonant circuit composed of the grid-side filter inductor and film capacitor, ensuring stable operation of the system under large bus voltage fluctuations. This damping compensation voltage, superimposed on the d-axis voltage, indirectly affects the reference voltage vector amplitude in subsequent SVPWM modulation, making the modulation ratio calculation based on the damped voltage command, thereby further improving the accuracy of the voltage output and system stability.

[0042] Furthermore, after acquiring the instantaneous value of the DC bus voltage, the filtered bus voltage is compared with a preset protection voltage threshold. The preset protection voltage threshold includes a preset overvoltage threshold and a preset undervoltage threshold, which are extracted from the parameter storage area inside the control unit. The preset overvoltage threshold is the upper limit value set to avoid bus capacitors and power devices from breakdown due to overvoltage. For example, it can be set to 420V for a 450V system. The preset undervoltage threshold is the lower limit value set to avoid insufficient driving capability and motor runaway due to low voltage. For example, it can be set to 150V.

[0043] If the filtered bus voltage is greater than the preset overvoltage threshold, or the filtered bus voltage is less than the preset undervoltage threshold, it indicates that the system is currently in an overvoltage or undervoltage abnormal state. Continued operation may cause device damage or motor runaway. In this case, a protection action is triggered and the drive signal output is blocked.

[0044] If the filtered bus voltage is between the preset overvoltage threshold and the preset undervoltage threshold, the system is in the normal operating voltage range, does not trigger protection, and continues to execute subsequent control procedures.

[0045] The positive offset between the preset overvoltage threshold and the rated bus voltage is greater than the negative offset between the preset undervoltage threshold and the rated bus voltage. The rated bus voltage refers to the theoretical DC bus voltage value of the system under rated AC input (i.e., AC input effective value × √2, for example, 220VAC corresponds to approximately 310VDC), which is extracted from the parameter configuration database of the control unit. The offset represents the absolute value of the difference between the threshold and the rated bus voltage. The positive offset is greater than the negative offset because the bus voltage rises faster during motor deceleration and regeneration, leaving a larger safety margin.

[0046] It provides a reliable safety boundary for large and rapid fluctuations in bus voltage in electrolytic capacitor-free systems. The combination of overvoltage and undervoltage protection with real-time bus voltage monitoring ensures that the system can enter a safe state in a timely manner under extreme voltage conditions, avoids damage to silicon carbide power devices, and improves the safety and reliability of the system.

[0047] Reference Figure 2 The diagram shown is a schematic of the system module connection of the present invention. The second aspect of the present invention provides a silicon carbide-based electrolytic capacitor-free variable frequency motor drive system, including a rectifier module, a thin film capacitor, a silicon carbide three-phase inverter module, a permanent magnet synchronous motor, a control unit, and a parameter configuration database.

[0048] The second aspect of this invention provides a silicon carbide-based electrolytic capacitor-free variable frequency motor drive system, which also includes a parameter configuration database for storing various control parameters such as preset overvoltage threshold, preset undervoltage threshold, preset depth threshold, damping coefficient, and rated bus voltage. For example, the preset overvoltage threshold and preset undervoltage threshold are obtained after bench calibration based on the withstand voltage of the selected film capacitor and the breakdown voltage of the silicon carbide power device, combined with the safety margin in the actual application. They are stored in the non-volatile storage area of ​​the database and are loaded into RAM by the control unit when the system is powered on for use by the control algorithm. The system also supports online updates via serial communication protocol. The other values ​​are similar to the preset depth threshold, and the specific values ​​will vary depending on the actual system power level, the capacitance of the selected film capacitor, and the motor parameters. This example does not impose any special limitations on these values. Furthermore, this parameter configuration database can be a parameter storage area partitioned in the host computer configuration software or E²PROM memory in the prior art, and parameter reading, writing, and management can be performed through standard communication interfaces (such as UART, I²C, CAN).

[0049] The AC input terminal of the rectifier module is connected to the AC power grid. The DC output terminal of the rectifier module is connected in parallel with the thin-film capacitor. The output terminal of the thin-film capacitor is connected to the DC input terminal of the silicon carbide three-phase inverter module. The three-phase AC output terminal of the silicon carbide three-phase inverter module is connected to the three-phase stator winding of the permanent magnet synchronous motor. The voltage sampling terminal of the control unit is connected to both ends of the thin-film capacitor to collect the bus voltage. The current sampling terminal of the control unit is connected to the phase line between the silicon carbide three-phase inverter module and the motor to collect the phase current. The PWM drive signal output terminal of the control unit is connected to the gate control terminal of each silicon carbide power switch in the silicon carbide three-phase inverter module. In addition, the parameter configuration database is connected to the control unit through an internal bus (such as SPI or I²C).

[0050] The rectifier module is used to convert AC input into pulsating DC voltage.

[0051] A film capacitor is connected to the output terminal of the rectifier module. Its capacitance value is smaller than that of a traditional electrolytic capacitor. Specifically, it is a 4-20μF metallized polypropylene film capacitor. In this example, 10μF / 450V is preferred.

[0052] A silicon carbide three-phase inverter module is connected to the output terminal of the thin-film capacitor. It consists of a preset number of silicon carbide power switching transistors forming a three-phase full-bridge topology. In this example, the three-phase full-bridge topology is formed by six silicon carbide power switching transistors (e.g., 650V / 60mΩ SiCMOSFET).

[0053] A permanent magnet synchronous motor is connected to the output terminal of the silicon carbide three-phase inverter module.

[0054] The control unit is connected to the control terminal of the silicon carbide three-phase inverter module and is used to execute the control method.

[0055] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for controlling a capacitorless variable frequency motor based on silicon carbide, characterized in that, include: S1. Acquire the instantaneous value of DC bus voltage within each pulse width modulation cycle, and filter the instantaneous value of DC bus voltage to generate the filtered bus voltage; S2. Calculate the modulation ratio of the current cycle dynamically based on the filtered bus voltage, and analyze the duty cycle signal of each phase arm through the modulation ratio; The modulation ratio is directly proportional to the magnitude of the reference voltage vector, and the modulation ratio is inversely proportional to the filtered bus voltage. S3. The duty cycle signal is used to output a drive signal to the silicon carbide three-phase inverter module to control the motor operation.

2. The method for controlling a capacitorless variable frequency motor based on silicon carbide according to claim 1, characterized in that: The specific process for acquiring the instantaneous value of the DC bus voltage is as follows: The phase of the grid voltage is obtained by a phase-locked loop. The peak and trough times of the bus voltage in each pulse width modulation period are determined based on the phase of the grid voltage. The peak and trough times are used as sampling times to collect the peak and trough values ​​of the bus voltage. The deviation between the time interval between the peak value and the valley value of the bus voltage and the theoretical time interval is used to generate a phase correction value, which is then fed back to the output of the phase-locked loop to correct the phase shift at the sampling time.

3. The method for controlling a capacitorless variable frequency motor based on silicon carbide according to claim 2, characterized in that: The instantaneous value of the DC bus voltage is filtered to generate a filtered bus voltage, specifically as follows: The peak value and valley value of the bus voltage are filtered to generate peak filter value and valley filter value, and the bus voltage fluctuation amplitude is calculated using the peak filter value and valley filter value. The minimum and maximum values ​​of the filtered bus voltage are determined based on the bus voltage fluctuation amplitude.

4. The method for controlling a capacitorless variable frequency motor based on silicon carbide according to claim 3, characterized in that: The torque compensation current amplitude is calculated based on the bus voltage fluctuation amplitude, and the torque compensation current amplitude is inversely proportional to the product of the number of motor pole pairs, permanent magnet flux linkage, and electric angular velocity. The torque compensation current amplitude is superimposed on the quadrature axis current given value at a preset grid frequency, and the initial phase angle of the AC component superimposed on the quadrature axis current given value is dynamically adjusted according to the phase delay of the filtered bus voltage. The phase delay is obtained by filtering the difference between the bus voltage phase and the grid voltage phase at the current sampling time.

5. The method for controlling a capacitorless variable frequency motor based on silicon carbide according to claim 4, characterized in that: The magnitude of the reference voltage vector is compared with the magnitude of the maximum output voltage vector corresponding to the filtered bus voltage. If the magnitude of the reference voltage vector is greater than the magnitude of the maximum output voltage vector, then the field weakening current component is calculated based on the minimum value of the filtered bus voltage, and the field weakening current component is superimposed on the direct axis current setpoint to reduce the magnitude of the reference voltage vector until the magnitude of the reference voltage vector is not greater than the magnitude of the maximum output voltage vector. By using the instantaneous rate of change of the filtered bus voltage, the minimum amplitude of the bus voltage in the next pulse width modulation cycle is estimated. If the minimum amplitude is lower than a preset depth threshold, the magnetic weakening current component is increased to the magnetic weakening current target value corresponding to the minimum amplitude.

6. The method for controlling a capacitorless variable frequency motor based on silicon carbide according to claim 1, characterized in that: Before dynamically calculating the modulation ratio of the current cycle, the derivative of the instantaneous value of the DC bus voltage with respect to time is also calculated. A damping compensation voltage is generated based on the derivative value and the amplitude of the bus voltage fluctuation. The damping compensation voltage is then superimposed on the direct-axis reference voltage to suppress the resonant amplification caused by the bus voltage fluctuation.

7. The method for controlling a capacitorless variable frequency motor based on silicon carbide according to claim 6, characterized in that: After acquiring the instantaneous value of the DC bus voltage, the filtered bus voltage is compared with a preset protection voltage threshold, which includes a preset overvoltage threshold and a preset undervoltage threshold. If the filtered bus voltage is greater than the preset overvoltage threshold, or the filtered bus voltage is less than the preset undervoltage threshold, then a protection action is triggered and the drive signal output is blocked. The positive offset between the preset overvoltage threshold and the rated bus voltage is greater than the negative offset between the preset undervoltage threshold and the rated bus voltage.

8. A silicon carbide-based electrolytic capacitor-free variable frequency motor drive system, employing any one of the silicon carbide-based electrolytic capacitor-free variable frequency motor control methods as described in claims 1-7, characterized in that: include: A rectifier module is used to convert AC input into pulsating DC voltage; A thin-film capacitor is connected to the output terminal of the rectifier module; A silicon carbide three-phase inverter module is connected to the output terminal of the thin-film capacitor and consists of a preset number of silicon carbide power switching transistors forming a three-phase full-bridge topology. A permanent magnet synchronous motor is connected to the output terminal of the silicon carbide three-phase inverter module; The control unit is connected to the control terminal of the silicon carbide three-phase inverter module and is used to execute the control method.

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