Redundant motor drive circuit with active fault isolation

Abstract

The present application relates to the technical field of motor drive control, and especially relates to a redundant motor drive circuit with active fault isolation function, comprising: a first bridge arm: comprising a first MOS tube Q1 and a second MOS tube Q2 connected in series; a second bridge arm: comprising a third MOS tube Q3 and a fourth MOS tube Q4 connected in series; a third bridge arm: comprising a fifth MOS tube Q5 and a sixth MOS tube Q6 connected in series; a fourth bridge arm: comprising a seventh MOS tube Q7 and an eighth MOS tube Q8 connected in series; wherein the first bridge arm and the second bridge arm constitute a first parallel bridge arm group, and the third bridge arm and the fourth bridge arm constitute a second parallel bridge arm group. The present application solves the technical problems that the existing direct current motor drive circuit cannot isolate short circuit fault, the redundancy is completely invalid under short circuit fault, and the driving power supply is complex.

Description

Technical Field

[0001] This invention relates to the field of motor drive control technology, and in particular to a redundant motor drive circuit with active fault isolation function. Background Technology

[0002] In DC motor drive systems, the H-bridge circuit is the most basic topology, consisting of four power MOSFETs forming two half-bridges. Motor forward and reverse rotation and speed control are achieved by controlling the on / off state of each MOSFET. However, in practical engineering applications, power MOSFETs operate under harsh environments of high voltage, high current, and high-frequency switching, making them prone to short-circuit or open-circuit faults due to overvoltage, overcurrent, and overheating. If a MOSFET in one bridge arm experiences a short-circuit fault, it will cause a direct short circuit to the bus, generating a huge short-circuit current. This can not only damage the drive circuit itself but also potentially burn out the motor and cause serious consequences such as fires.

[0003] To improve system reliability, redundancy design is widely adopted. Common redundancy schemes include: parallel redundancy of dual H-bridges, and redundancy of spare bridge arms. Among them, the spare bridge arm redundancy scheme adds one or more spare bridge arms, and switches the failed bridge arm to the spare bridge arm in the event of a failure, so as to maintain the continued operation of the system.

[0004] The existing circuit adds a redundant arm next to each H-bridge, and the redundant arm is composed of two MOSFETs connected in series. The midpoint of the redundant arm is connected to the motor via a bidirectional thyristor; When an open-circuit fault occurs in the main bridge arm, the control system triggers a bidirectional thyristor to connect a redundant arm to the circuit, replacing the faulty bridge arm and achieving fault-tolerant operation for open-circuit faults.

[0005] However, this circuit has the following fundamental technical defects: (1) Inability to isolate short-circuit faults. A bidirectional thyristor is a semi-controlled device. Once a bidirectional thyristor is broken down due to overvoltage or overcurrent, its internal PN junction will experience an irreversible short-circuit failure. At this time, even if the gate trigger signal is removed, the device will remain in a short-circuit state and cannot be turned off. This means that if a MOSFET in a certain main bridge arm experiences a short-circuit fault, the short-circuit current will flow directly through the bidirectional thyristor to the motor and power supply. The redundant arm will not only fail to provide isolation, but will also exacerbate the spread of the fault.

[0006] (2) Redundancy completely fails under short-circuit faults. Since the redundant isolation devices in this circuit do not have the ability to actively turn off, when a short-circuit fault occurs, which is the most necessary for redundancy intervention in the system, the redundant arm becomes the channel for the fault current, causing the system to completely collapse and failing to achieve the purpose of "fault tolerance". Therefore, this circuit can only deal with open-circuit faults and is powerless against short-circuit faults.

[0007] (3) Complex drive power supply. The circuit does not have an optimized drive power supply design, and usually requires a separate drive power supply for the redundant arm, which increases the system cost and complexity.

[0008] Therefore, it is necessary to provide a new redundant motor drive circuit with active fault isolation function to solve the above-mentioned technical problems. Summary of the Invention

[0009] The main objective of this invention is to provide a redundant motor drive circuit with active fault isolation function, aiming to solve the technical problems of existing DC motor drive circuits being unable to isolate short-circuit faults, complete redundancy failure under short-circuit faults, and complex drive power supplies.

[0010] To achieve the above objectives, the present invention proposes a redundant motor drive circuit with active fault isolation function, comprising: First bridge arm: includes a first MOSFET and a second MOSFET connected in series. The drain of the first MOSFET is connected to the positive bus, and the source of the second MOSFET is connected to the negative bus. The source of the first MOSFET and the drain of the second MOSFET are connected to form the midpoint of the first bridge arm. The second bridge arm consists of a third MOSFET and a fourth MOSFET connected in series. The drain of the third MOSFET is connected to the positive bus, and the source of the fourth MOSFET is connected to the negative bus. The source of the third MOSFET and the drain of the fourth MOSFET are connected to form the midpoint of the second bridge arm. The third bridge arm consists of a fifth MOSFET and a sixth MOSFET connected in series. The drain of the fifth MOSFET is connected to the positive bus, and the source of the sixth MOSFET is connected to the negative bus. The source of the fifth MOSFET and the drain of the sixth MOSFET are connected to form the midpoint of the third bridge arm. The fourth bridge arm consists of a seventh MOSFET and an eighth MOSFET connected in series. The drain of the seventh MOSFET is connected to the positive bus, and the source of the eighth MOSFET is connected to the negative bus. The source of the seventh MOSFET and the drain of the eighth MOSFET are connected to form the midpoint of the fourth bridge arm. The first bridge arm and the second bridge arm form the first parallel bridge arm group, and the third bridge arm and the fourth bridge arm form the second parallel bridge arm group.

[0011] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that the midpoint of the first bridge arm is led out and connected to the first main electrode of the ninth MOS transistor. The midpoint of the second bridge arm is led out and connected to the first main electrode of the tenth MOS transistor; The midpoint of the third bridge arm is led out and connected to the first main electrode of the eleventh MOS transistor; The midpoint of the fourth bridge arm is led out and connected to the first main electrode of the twelfth MOS transistor.

[0012] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that the second main electrode of the ninth MOS transistor and the second main electrode of the tenth MOS transistor are connected to each other to form a first motor connection terminal for connecting the first terminal of the DC motor. The second main electrode of the eleventh MOSFET is connected to the second main electrode of the twelfth MOSFET to form the second motor connection terminal, which is used to connect the second terminal of the DC motor.

[0013] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that the gates of the first MOS transistor to the eighth MOS transistor respectively receive PWM control signals from an external controller to generate the working states of forward rotation, reverse rotation, speed regulation, and braking of the drive motor.

[0014] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that the gates of the ninth to twelfth MOS transistors respectively receive independent isolation control signals for independently controlling the conduction and turn-off of each lead-out MOS transistor.

[0015] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that the ninth to twelfth MOS transistors are all N-channel metal-oxide-semiconductor field-effect transistors, the drain of each MOS transistor is connected to the midpoint of the bridge arm, the source is connected to the motor connection terminal, and the gate is turned on when connected to a high level.

[0016] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that the ninth to twelfth MOS transistors are P-channel metal-oxide-semiconductor field-effect transistors, and the corresponding control logic levels are inverted.

[0017] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that the first bridge arm and the second bridge arm in the first parallel bridge arm group share the same DC bus power supply, and the third bridge arm and the fourth bridge arm in the second parallel bridge arm group share the same DC bus power supply; the two parallel bridge arm groups share the same bus power supply, or use independent bus power supplies respectively.

[0018] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that it also includes a drive power supply, which supplies power to the gate drive circuits of all MOSFETs.

[0019] A further improvement of the redundant motor drive circuit with active fault isolation function of the present invention is that it also includes a current sampling resistor, one end of which is connected to the negative bus V- network and the other end is connected to GND, for detecting the bus current.

[0020] The technical solution of the present invention has the following beneficial effects: The redundant motor drive circuit with active fault isolation function provided by this invention utilizes the fully controllable characteristics of MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). After a bridge arm MOSFET is short-circuited, the gate controls the rapid turn-off of the midpoint-leading MOSFET, cutting off the fault current path and achieving true short-circuit fault isolation. The unselected backup bridge arm, due to the three transistors connected in series, experiences lower overvoltage stress and is less prone to damage, ensuring the redundancy backup remains effective at critical moments. This invention also possesses the ability to isolate open-circuit faults, enabling system derating. The switching time of the MOSFETs is in the nanosecond to microsecond range, far faster than relay solutions, allowing isolation to be completed before short-circuit current causes damage. This solves the technical problems of existing DC motor drive circuits, such as the inability to isolate short-circuit faults, complete redundancy failure under short-circuit faults, and complex drive power supplies. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0022] Figure 1 This is a circuit diagram of the redundant motor drive circuit with active fault isolation function of the present invention.

[0023] Explanation of icon numbers: Q1, First MOSFET; Q2, Second MOSFET; Q3, Third MOSFET; Q4, Fourth MOSFET; Q5, Fifth MOSFET; Q6, Sixth MOSFET; Q7, Seventh MOSFET; Q8, Eighth MOSFET; Q9, Ninth MOSFET; Q10, Tenth MOSFET; Q11, Eleventh MOSFET; Q12, Twelfth MOSFET; V+, Positive busbar; V-, Negative busbar; R1, Current sampling resistor; M+, First motor connection terminal; M-, Second motor connection terminal. Detailed Implementation

[0024] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0025] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0026] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0027] In this invention, unless otherwise explicitly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0028] Furthermore, the technical solutions of the various embodiments of the present invention can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0029] like Figure 1 As shown, this invention proposes a redundant motor drive circuit with active fault isolation function. (a) Main power topology: It includes the first MOSFET Q1 to the eighth MOSFET Q8, forming four bridge arms, specifically: The first bridge arm consists of a first MOSFET Q1 (upper MOSFET) and a second MOSFET Q2 (lower MOSFET) connected in series. The drain of the first MOSFET Q1 is connected to the positive bus V+, and the source of the second MOSFET Q2 is connected to the negative bus V- (or grounded through a sampling resistor). The source of the first MOSFET Q1 and the drain of the second MOSFET Q2 are connected to form the midpoint of the first bridge arm. The second bridge arm consists of a third MOSFET Q3 (upper MOSFET) and a fourth MOSFET Q4 (lower MOSFET) connected in series. The drain of the third MOSFET Q3 is connected to the positive bus V+, and the source of the fourth MOSFET Q4 is connected to the negative bus V-. The source of the third MOSFET Q3 and the drain of the fourth MOSFET Q4 are connected to form the midpoint of the second bridge arm. The third bridge arm consists of a fifth MOSFET Q5 (upper MOSFET) and a sixth MOSFET Q6 (lower MOSFET) connected in series. The drain of the fifth MOSFET Q5 is connected to the positive bus V+, and the source of the sixth MOSFET Q6 is connected to the negative bus V-. The source of the fifth MOSFET Q5 and the drain of the sixth MOSFET Q6 are connected to form the midpoint of the third bridge arm. The fourth bridge arm consists of the seventh MOSFET Q7 (upper MOSFET) and the eighth MOSFET Q8 (lower MOSFET) connected in series. The drain of the seventh MOSFET Q7 is connected to the positive bus V+, and the source of the eighth MOSFET Q8 is connected to the negative bus V-. The source of the seventh MOSFET Q7 and the drain of the eighth MOSFET Q8 are connected to form the midpoint of the fourth bridge arm. The first and second bridge arms form the first parallel bridge arm group (the upper transistors of both are connected to V+, and the lower transistors are connected to V-, but the midpoints are independently led out), and the third and fourth bridge arms form the second parallel bridge arm group. Under normal operating conditions, only one bridge arm from the first parallel bridge arm group and one bridge arm from the second parallel bridge arm group are selected to form an H-bridge drive motor, while the MOSFETs led out from the midpoints of the remaining bridge arms are in the off state.

[0030] When a short-circuit fault occurs in the MOSFET of the selected bridge arm, the short-circuit fault current path is isolated by turning off the MOSFET connected to the midpoint of the faulty bridge arm. After isolating the short-circuit fault, redundancy switching is achieved by turning on the MOSFET connected to the midpoint of the spare bridge arm and reconfiguring the control signal of the spare bridge arm.

[0031] (II) Midpoint Drawout and Isolation Structure: The midpoint of the first bridge arm (i.e. the connection point between the source of Q1 and the drain of Q2) is led out and connected to the first main electrode (drain or source, depending on the device type) of the ninth MOS transistor Q9. The midpoint of the second bridge arm is led out and connected to the first main electrode of the tenth MOS transistor Q10; The midpoint of the third bridge arm is led out and connected to the first main electrode of the eleventh MOS transistor Q11; The midpoint of the fourth bridge arm is led out and connected to the first main electrode of the twelfth MOSFET Q12.

[0032] The second main electrode of the ninth MOSFET Q9 is connected to the second main electrode of the tenth MOSFET Q10 to form the first motor connection terminal M+, which is used to connect to the first terminal of the DC motor. The second main electrode of the eleventh MOSFET Q11 is connected to the second main electrode of the twelfth MOSFET Q12 to form the second motor connection terminal M-, which is used to connect the second terminal of the DC motor.

[0033] The gates of the ninth MOSFET Q9 to the twelfth MOSFET Q12 are used to receive isolation control signals to achieve independent turn-on or turn-off.

[0034] (III) Control signal connection: The gates of the first MOSFET Q1 to the eighth MOSFET Q8 respectively receive PWM control signals from an external controller (such as an MCU, DSP or a dedicated driver chip) to generate the working states of the drive motor, such as forward rotation, reverse rotation, speed adjustment, braking, etc.

[0035] The gates of the ninth MOSFET Q9 to the twelfth MOSFET Q12 each receive independent isolation control signals (e.g., from the GPIO port of the same controller) to independently control the turn-on and turn-off of each MOSFET.

[0036] Preferably, the ninth MOSFET Q9 to the twelfth MOSFET Q12 are all N-channel metal-oxide-semiconductor field-effect transistors (enhancement-mode MOSFETs). The drain of each MOSFET is connected to the midpoint of the bridge arm, the source is connected to the motor connection terminal (M+ or M-), and the gate is turned on when connected to a high level.

[0037] As an alternative, the ninth MOSFET Q9 to the twelfth MOSFET Q12 can also be P-channel metal-oxide-semiconductor field-effect transistors (enhancement-mode MOSFETs), with the corresponding control logic levels inverted.

[0038] Preferably, the first and second arms in the first parallel bridge arm group share the same DC bus power supply (V+, V-), and the third and fourth arms in the second parallel bridge arm group share the same DC bus power supply; the two parallel bridge arm groups share the same bus power supply, or each uses an independent bus power supply.

[0039] Furthermore, it also includes a drive power supply (e.g., 15V or 12V) that powers the gate drive circuits of all MOSFETs, eliminating the need for separate drive power supplies for redundant arms and simplifying circuit design.

[0040] Furthermore, the redundant motor drive circuit with active fault isolation function also includes a current sampling resistor R1, one end of which is connected to the negative bus V- network (V- or GND reference point), and the other end is connected to system ground GND, used to detect the bus current and provide a basis for short-circuit fault detection. The resistance value of this resistor is typically in the milliohm range (e.g., 10mΩ).

[0041] Furthermore, the redundant motor drive circuit with active fault isolation function also includes a controller, which outputs PWM control signals to the gates of the first to eighth MOS transistors and outputs isolation control signals to the gates of the ninth to twelfth MOS transistors.

[0042] (a) Normal working mode: When the system is operating normally, only one pair of parallel bridge arms (e.g., the first bridge arm in the first parallel bridge arm group and the third bridge arm in the second parallel bridge arm group) is used to form a complete H-bridge drive motor. Taking "selecting the first bridge arm (first MOSFET Q1, second MOSFET Q2) and the third bridge arm (fifth MOSFET Q5, sixth MOSFET Q6)" as an example: Control signal configuration: The first MOSFET Q1, the second MOSFET Q2, the fifth MOSFET Q5, and the sixth MOSFET Q6 operate according to the standard H-bridge timing sequence (for example, when the motor rotates forward, the first MOSFET Q1 and the sixth MOSFET Q6 are turned on, and the second MOSFET Q2 and the fifth MOSFET Q5 are turned off; when rotating in reverse, the second MOSFET Q2 and the fifth MOSFET Q5 are turned on, and the first MOSFET Q1 and the sixth MOSFET Q6 are turned off; during braking, all power transistors are turned off or synchronous rectification is used). Isolation control signals: Gate high level (on) of MOSFET Q9 (ninth MOSFET), gate high level (on) of MOSFET Q11 (eleventh MOSFET). The gate of the tenth MOSFET Q10 is low (off), and the gate of the twelfth MOSFET Q12 is low (off).

[0043] Current path (taking forward rotation as an example): V+ (positive busbar) → First MOSFET Q1 (upper MOSFET) → Midpoint of first bridge arm → Ninth MOSFET Q9 (conducting) → M+ → DC motor winding → M- → Eleventh MOSFET Q11 (conducting) → Midpoint of third bridge arm → Sixth MOSFET Q6 (lower MOSFET) → V- (negative busbar).

[0044] At this time, the second bridge arm (third MOSFET Q3, fourth MOSFET Q4) and the fourth bridge arm (seventh MOSFET Q7, eighth MOSFET Q8) are completely idle, and the tenth MOSFET Q10 and twelfth MOSFET Q12, which are led out from the midpoint, are both in the off state. Therefore, the second bridge arm and the fourth bridge arm are electrically isolated from the motor.

[0045] (ii) Active isolation of short-circuit faults: Suppose that the first MOSFET Q1 in the first bridge arm that is in operation experiences a drain-source short circuit fault (this is one of the most common and dangerous types of faults in motor drives).

[0046] After the fault occurs, the drain and source of the first MOSFET Q1 are in a low-resistance short-circuit state. If no isolation measures are taken, the current of the positive bus V+ will flow to the negative bus through the short-circuited first MOSFET Q1, the conducting ninth MOSFET Q9, the motor, the eleventh MOSFET Q11, and the sixth MOSFET Q6, forming a huge short-circuit current, which may burn out the motor and the circuit.

[0047] The circuit structure of the present invention allows the following operation: once the control system detects a short-circuit fault in the first MOSFET Q1 (e.g., by monitoring the bus current, bridge arm midpoint voltage, or drain-source voltage of the first MOSFET Q1), it immediately pulls the gate voltage of the ninth MOSFET Q9 down to below the threshold voltage, thereby rapidly turning off the ninth MOSFET Q9.

[0048] After the ninth MOSFET Q9 is turned off, the current flowing from the positive bus through the short-circuited first MOSFET Q1 is blocked by the ninth MOSFET Q9 after reaching the midpoint of the first bridge arm, and cannot continue to flow to the motor and the negative bus. The fault current path is physically cut off.

[0049] At the same time, the control system can keep the tenth MOSFET Q10 and the twelfth MOSFET Q12 in the off state and prepare to switch the motor to another set of parallel bridge arms (such as the second bridge arm and the fourth bridge arm) to continue driving.

[0050] Existing bidirectional thyristors are easily broken down and remain in a short-circuit state under short-circuit current impacts, making them unable to be turned off and thus unable to achieve the aforementioned active isolation. This invention, however, uses a MOSFET (Q9), whose fully controllable characteristics allow for active turn-off via a gate signal after a short circuit occurs, which is crucial for achieving short-circuit fault isolation.

[0051] (III) Redundancy handover: After the short-circuit fault of the first MOSFET Q1 is isolated, the system can perform redundancy switching: Turn off all the outgoing MOSFETs in the fault group (the ninth MOSFET Q9, the eleventh MOSFET Q11) and the undamaged power transistors in the fault group (the second MOSFET Q2, etc.). Turn on the lead-out MOSFETs of the backup group (tenth MOSFET Q10 and twelfth MOSFET Q12); The PWM control signals of the second bridge arm (third MOSFET Q3, fourth MOSFET Q4) and the fourth bridge arm (seventh MOSFET Q7, eighth MOSFET Q8) are reconfigured to enable them to operate in H-bridge mode, thus driving the motor to continue running.

[0052] (iv) Overpressure stress protection: Another implicit benefit of this invention lies in the balancing of overvoltage stress. Under motor freewheeling or regenerative braking conditions, the motor generates an induced electromotive force, which is superimposed on the bus voltage, causing overvoltage stress on the power MOSFET.

[0053] For a working bridge arm group (e.g., the first bridge arm and the third bridge arm): the induced voltage between the motor connection terminals M+ and M- is shared by two series-connected MOSFETs (e.g., the first MOSFET Q1 and the ninth MOSFET Q9, or the sixth MOSFET Q6 and the eleventh MOSFET Q11), with each MOSFET bearing approximately half of the voltage.

[0054] For non-operational spare bridge arm groups (e.g., the second and fourth bridge arms): Since the tenth MOSFET Q10 and twelfth MOSFET Q12, which are at their midpoints, are in the off state, the two MOSFETs of the spare bridge arm (the third MOSFET Q3 and the fourth MOSFET Q4 or the seventh MOSFET Q7 and the eighth MOSFET Q8) and the off-state MOSFET (the tenth MOSFET Q10 or the twelfth MOSFET Q12) form a branch with three MOSFETs connected in series. The induced voltage is shared by all three transistors, with each transistor bearing a lower voltage.

[0055] Therefore, the standby bridge arm experiences less overpressure stress in standby mode than the working bridge arm, resulting in a lower probability of failure. This characteristic ensures the effectiveness of redundancy backup—when the working bridge arm fails due to overpressure, the standby bridge arm is likely to remain intact.

[0056] (v) Simplified drive power supply: Since all isolated MOSFETs (MOSFETs Q9 through Q12) are low-side controlled (their sources are all connected to the motor terminal or GND reference point), they can use the same drive power supply (e.g., 15V) as the main power transistors. This invention eliminates the need for separate isolated power supplies for redundant arms, further reducing system complexity and cost.

[0057] Example 1: Reference Figure 1 This embodiment provides a redundant motor drive circuit with active isolation function for short-circuit faults.

[0058] Component selection and parameters: The first MOSFET Q1 through the twelfth MOSFET Q12 are all N-channel power MOSFETs, such as the Infineon IPB180N10S4-02 (100V / 180A), packaged in a TO-263 package. Lower or higher voltage / current models can also be selected depending on the motor power.

[0059] R1: Surface mount resistor, 10mΩ, 2512 package, 1% accuracy, used for bus current sampling.

[0060] Bus voltage: V+=48V, V=0V (GND). Bus capacitor (not shown in the figure) is connected in parallel between V+ and V-, with a typical capacitance of 1000μF.

[0061] Drive power supply: A single 15V power supply powers the gate drive circuits of all MOSFETs. The gate drive of the first MOSFET Q1 to the eighth MOSFET Q8 can be provided by a half-bridge driver chip (such as IR2104 or IRS2186). The gate drive of the ninth MOSFET Q9 to the twelfth MOSFET Q12 can be directly provided by the controller GPIO after level conversion (because the source voltage of the ninth MOSFET Q9 to the twelfth MOSFET Q12 is floating relative to GND, but does not exceed the motor terminal voltage, bootstrap or isolated drive can be used, but the single power supply design of this invention allows the use of a simple bootstrap circuit).

[0062] Normal operating mode (taking forward motor rotation as an example): Controller output: The gate of the first MOSFET Q1 is active high (50% duty cycle), the gate of the sixth MOSFET Q6 is always high (or in phase with PWM), and the gates of the second MOSFET Q2 and the fifth MOSFET Q5 are low. Gate of MOSFET Q9: High level; Gate of MOSFET Q11: High level; Gate of the tenth MOSFET Q10: low level; Gate of the twelfth MOSFET Q12: low level.

[0063] Current path: Positive bus V+ → First MOSFET Q1 (conducting) → Ninth MOSFET Q9 (conducting) → M+ → Motor → M → Eleventh MOSFET Q11 (conducting) → Sixth MOSFET Q6 (conducting) → Resistor R1 → GND. The motor rotates forward.

[0064] Active isolation of short-circuit fault (short-circuit fault of first MOSFET Q1): Suppose that the drain-source short circuit of the first MOSFET Q1 occurs during operation. The controller detects an abnormal increase in the bus current (e.g., exceeding the preset threshold of 50A) through the current sampling resistor R1, and at the same time monitors that the voltage at the midpoint of the bridge arm is close to V+ (normally it should be a PWM chopper waveform, and after the short circuit it should be constant V+). Based on the combined results, the controller determines that the first MOSFET Q1 is short-circuited.

[0065] The controller will immediately perform the following actions: Set the gate signal of the ninth MOSFET Q9 to low level, and the ninth MOSFET Q9 will be turned off; At the same time, the gate signal of the first MOSFET Q1 is set to a low level (although the first MOSFET Q1 is short-circuited, forcing it to a low level can avoid drive conflicts). The drive signals for the eleventh MOSFET Q11 and the sixth MOSFET Q6 remain unchanged, but since the ninth MOSFET Q9 has been turned off, the current path is cut off and the short-circuit current stops.

[0066] Redundancy switching: After confirming that the short-circuit fault of the first MOSFET Q1 has been isolated, the controller performs redundancy switching: Turn off the ninth MOSFET Q9 and the eleventh MOSFET Q11 (when the eleventh MOSFET Q11 is turned off, the sixth MOSFET Q6 is also turned off); Turn on the tenth MOSFET Q10 and the twelfth MOSFET Q12; Reconfigure the second and fourth bridge arms: the third MOSFET Q3 and the eighth MOSFET Q8 are used as the upper and lower transistors of the H-bridge (for example, the third MOSFET Q3 is connected to PWM, and the eighth MOSFET Q8 is always high), and the fourth MOSFET Q4 and the seventh MOSFET Q7 are used as another set of upper and lower transistors (the fourth MOSFET Q4 is turned off, the seventh MOSFET Q7 is turned off or configured as needed).

[0067] The new current path is: V+ → third MOSFET Q3 → tenth MOSFET Q10 → M+ → motor → M- → twelfth MOSFET Q12 → eighth MOSFET Q8 → R1 → GND. The motor continues to rotate forward.

[0068] The entire fault detection, isolation, and reconfiguration process can be completed in tens of microseconds to milliseconds (depending on the detection algorithm and software response), which is much faster than relay solutions (milliseconds to tens of milliseconds).

[0069] Example 2 (a variation using a P-channel MOSFET): This embodiment is basically the same as Embodiment 1, except that: the ninth MOSFET Q9 to the twelfth MOSFET Q12 are P-channel MOSFETs. In this case, the first main electrode of the ninth MOSFET Q9 to the twelfth MOSFET Q12 is the source, and the second main electrode is the drain. The midpoint of the bridge arm is connected to the source, and the motor connection terminal is connected to the drain.

[0070] The control logic is inverted accordingly: when conduction is required, the gate is connected to a low level; when de-conduction is required, the gate is connected to a high level (relative to the source). The rest of the operating principle is exactly the same.

[0071] The advantage of P-channel MOSFETs is that the drive circuit can be simpler (because the source is connected to the midpoint of the bridge arm, the gate drive voltage can be directly provided by the controller without bootstrapping). However, the on-resistance of P-channel MOSFETs is usually slightly higher than that of N-channel devices of the same specifications, and the cost is also slightly higher. Designers can choose according to their specific needs.

[0072] Example 3 (Specific implementation of a single driving power supply): This embodiment details how to achieve "only one drive power supply required".

[0073] Main power supply: 48V DC bus (V+, V-).

[0074] Auxiliary power supply: A DC-DC step-down module (such as LM2596-15) is used to convert 48V to +15V as the power supply for all gate drive circuits.

[0075] For the first MOSFET Q1 through the eighth MOSFET Q8 (the upper and lower transistors), a bootstrap half-bridge driver chip (such as IR2104) is used. The VCC of the IR2104 is connected to +15V, and COM is connected to GND. The bootstrap diode and bootstrap capacitor are connected according to standard circuitry. In this way, the drive voltage for the upper transistor is provided by the bootstrap capacitor, eliminating the need for a separate isolated power supply.

[0076] For MOSFETs Q9 through Q12 (midpoint leads), since the sources of Q9 and Q10 are connected to M+, the voltage of M+ varies between 0 and V+. To drive Q9 (N-channel), the gate voltage needs to be at least 10V higher than the source voltage. A simple charge pump or a bootstrap method similar to a half-bridge driver can be used: treat Q9 and Q10 as a half-bridge, with M+ as the midpoint, and use a half-bridge driver chip (such as the IR2104) to drive Q9 and Q10. Its high-side output is connected to the gate of Q9, and its low-side output is connected to the gate of Q10. The chip's VCC is also connected to +15V, and its COM is connected to M- (or GND, depending on the actual voltage range). Since the voltage range of M+ and M- is known, by appropriately selecting a reference point, all MOSFETs can be driven by a single 15V power supply.

[0077] Example 4 (Integration of Fault Detection Circuit): This invention does not limit the specific short-circuit fault detection method, but for ease of implementation, this embodiment provides an optional detection circuit: A resistor R1 (10mΩ, 2512 package) is connected in series between the negative bus V- and GND. The voltage across R1 reflects the bus current.

[0078] The voltage signal is amplified by an operational amplifier (such as LM358) and then sent to the ADC input of the controller.

[0079] The controller (e.g., STM32F103) reads the bus current at a sampling rate of 10kHz to 100kHz. When the bus current exceeds a preset threshold (e.g., 3 times the normal operating current) and lasts for more than 2μs, it is determined to be a short circuit fault.

[0080] Simultaneously, the controller also monitors the voltage at the midpoint of each bridge arm (which is then fed into the ADC after voltage division by resistors). If the voltage at the midpoint of a bridge arm is abnormal (for example, it remains close to V+ during the PWM shutdown of the upper transistor), it assists in determining whether the corresponding upper transistor is short-circuited.

[0081] Once the fault location is confirmed (e.g., Q1 short circuit), the controller immediately pulls the gate signal of the corresponding MOSFET Q9 low (outputting a low level via GPIO) to complete the isolation.

[0082] The above description is only a preferred embodiment of the present invention and does not limit the scope of the present invention. All equivalent structural transformations made under the concept of the present invention using the description and drawings of the present invention, or direct / indirect applications in other related technical fields, are included within the protection scope of the present invention.

Claims

1. A redundant motor drive circuit with active fault isolation function, characterized in that, include: First bridge arm: includes a first MOSFET (Q1) and a second MOSFET (Q2) connected in series. The drain of the first MOSFET (Q1) is connected to the positive bus (V+), and the source of the second MOSFET (Q2) is connected to the negative bus (V-). The source of the first MOSFET (Q1) and the drain of the second MOSFET (Q2) are connected to form the midpoint of the first bridge arm. The second bridge arm consists of a third MOSFET (Q3) and a fourth MOSFET (Q4) connected in series. The drain of the third MOSFET (Q3) is connected to the positive bus (V+), and the source of the fourth MOSFET (Q4) is connected to the negative bus (V-). The source of the third MOSFET (Q3) and the drain of the fourth MOSFET (Q4) are connected to form the midpoint of the second bridge arm. The third bridge arm consists of a fifth MOSFET (Q5) and a sixth MOSFET (Q6) connected in series. The drain of the fifth MOSFET (Q5) is connected to the positive bus (V+), and the source of the sixth MOSFET (Q6) is connected to the negative bus (V-). The source of the fifth MOSFET (Q5) and the drain of the sixth MOSFET (Q6) are connected to form the midpoint of the third bridge arm. The fourth bridge arm consists of a seventh MOSFET (Q7) and an eighth MOSFET (Q8) connected in series. The drain of the seventh MOSFET (Q7) is connected to the positive bus (V+), and the source of the eighth MOSFET (Q8) is connected to the negative bus (V-). The source of the seventh MOSFET (Q7) and the drain of the eighth MOSFET (Q8) are connected to form the midpoint of the fourth bridge arm. The first bridge arm and the second bridge arm form the first parallel bridge arm group, and the third bridge arm and the fourth bridge arm form the second parallel bridge arm group.

2. The redundant motor drive circuit with active fault isolation function according to claim 1, characterized in that, The midpoint of the first bridge arm is led out and connected to the first main electrode of the ninth MOS transistor (Q9); The midpoint of the second bridge arm is led out and connected to the first main electrode of the tenth MOS transistor (Q10); The midpoint of the third bridge arm is led out and connected to the first main electrode of the eleventh MOS transistor (Q11); The midpoint of the fourth bridge arm is led out and connected to the first main electrode of the twelfth MOS transistor (Q12).

3. The redundant motor drive circuit with active fault isolation function according to claim 2, characterized in that, The second main electrode of the ninth MOSFET (Q9) and the second main electrode of the tenth MOSFET (Q10) are connected to each other to form the first motor connection terminal (M+), which is used to connect the first terminal of the DC motor. The second main electrode of the eleventh MOSFET (Q11) is connected to the second main electrode of the twelfth MOSFET (Q12) to form the second motor connection terminal (M-), which is used to connect the second terminal of the DC motor.

4. The redundant motor drive circuit with active fault isolation function according to claim 3, characterized in that, The gates of the first MOSFET (Q1) to the eighth MOSFET (Q8) respectively receive PWM control signals from the external controller to generate the forward rotation, reverse rotation, speed regulation, and braking working states of the drive motor.

5. The redundant motor drive circuit with active fault isolation function according to claim 4, characterized in that, The gates of the ninth MOSFET (Q9) to the twelfth MOSFET (Q12) receive independent isolation control signals, which are used to independently control the turn-on and turn-off of each MOSFET.

6. The redundant motor drive circuit with active fault isolation function according to claim 2, characterized in that, The ninth MOSFET (Q9) to the twelfth MOSFET (Q12) are all N-channel metal-oxide-semiconductor field-effect transistors. The drain of each MOSFET is connected to the midpoint of the bridge arm, the source is connected to the motor connection terminal, and the gate is turned on when connected to a high level.

7. The redundant motor drive circuit with active fault isolation function according to claim 2, characterized in that, The ninth MOSFET (Q9) to the twelfth MOSFET (Q12) are P-channel metal-oxide-semiconductor field-effect transistors, and the corresponding control logic levels are inverted.

8. The redundant motor drive circuit with active fault isolation function according to claim 1, characterized in that, In the first parallel bridge arm group, the first and second bridge arms share the same DC bus power supply, and in the second parallel bridge arm group, the third and fourth bridge arms share the same DC bus power supply; the two parallel bridge arm groups share the same bus power supply, or each uses an independent bus power supply.

9. The redundant motor drive circuit with active fault isolation function according to claim 1, characterized in that, It also includes a drive power supply for powering the gate drive circuits of the first MOS transistor (Q1) to the twelfth MOS transistor (Q12).

10. The redundant motor drive circuit with active fault isolation function according to claim 1, characterized in that, It also includes a current sampling resistor, one end of which is connected to the negative bus and the other end is connected to GND, for detecting the bus current.

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