A temperature compensation circuit for a crystal oscillator based on current function generation

Abstract

This invention relates to a temperature compensation circuit for a crystal oscillator based on current function generation, comprising: a temperature detection circuit for outputting a temperature indication voltage linearly related to temperature changes and generating multiple reference voltages; a function generation circuit, including a fourth-order current generation circuit and a fifth-order current generation circuit, for generating fourth-order and fifth-order currents respectively based on the multiple reference voltages; a current synthesis and current-to-voltage conversion circuit for adding the fourth-order and fifth-order currents and converting them into a nonlinear compensation voltage signal; and a voltage superposition circuit for superimposing the nonlinear compensation voltage signal with the temperature indication voltage to generate a compensation voltage signal. In this invention, by introducing fourth-order and fifth-order high-order temperature compensation mechanisms, the frequency stability and compensation accuracy of the crystal oscillator over a wide temperature range are effectively improved.

Description

Technical Field

[0001] This invention belongs to the field of frequency control and temperature compensation technology, specifically relating to a temperature compensation circuit for a crystal oscillator based on current function generation. Background Technology

[0002] A crystal oscillator is a frequency source that provides a reference signal and is widely used in modern communication, navigation systems, and various precision electronic instruments. With the development of technology, electronic systems have increasingly higher performance requirements for frequency sources. However, the frequency stability of crystal oscillators is significantly affected by ambient temperature, making high-precision temperature-compensated crystal oscillators one of the current research hotspots.

[0003] Traditional analog temperature compensation circuits typically utilize only cubic functions to compensate for the tangential temperature characteristics of crystal resonators. However, with increasingly stringent requirements for frequency stability, the nonlinear characteristics of crystals as a function of temperature become more complex, rendering cubic compensation alone insufficient to cover higher-order temperature drift errors. Furthermore, existing analog compensation schemes often employ multiple analog multipliers in series, leading to complex circuit structures, high power consumption, and amplified noise at each stage, severely degrading the oscillator's phase noise. Existing voltage-domain conditioning circuits also readily introduce additional nonlinear distortion, limiting further improvements in compensation accuracy. Therefore, developing a simplified fourth- or fifth-order compensation scheme is of significant practical value. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a crystal oscillator temperature compensation circuit based on current function generation. The technical problem to be solved by this invention is achieved through the following technical solution: This invention provides a crystal oscillator temperature compensation circuit based on current function generation, comprising: The temperature detection circuit is used to output a temperature indication voltage that is linearly related to temperature changes, and to generate a variety of reference voltages. The function generation circuit, connected to the temperature detection circuit, includes a fourth-order current generation circuit and a fifth-order current generation circuit, used to generate fourth-order current and fifth-order current respectively based on the multiple reference voltages. A current synthesis and current-to-voltage conversion circuit, connected to the function generation circuit, is used to add the fourth-order and fifth-order currents and convert them into a nonlinear compensated voltage signal; and... A voltage superposition circuit is connected to the current synthesis and current-to-voltage conversion circuit and the temperature detection circuit, respectively, and is used to superimpose the nonlinear compensation voltage signal with the temperature indication voltage to generate a compensation voltage signal.

[0005] In one embodiment of the present invention, the temperature detection circuit includes a bandgap reference circuit and a primary voltage generation circuit. The bandgap reference circuit is used to generate a variety of reference voltages that do not change with temperature, and the primary voltage generation circuit is used to output a temperature indication voltage that is linearly related to temperature.

[0006] In one embodiment of the present invention, the temperature detection circuit includes: MOSFETs M1, M2, M3, M4, M5, M6, M7, and M8; resistors R1, R2, and R3; transistors Q1 and Q2; operational amplifier OP1; and voltage divider resistor R. 4_1 Voltage divider resistor R 4_2 Voltage divider resistor R 4_3 Voltage divider resistor R 4_4 Voltage divider resistor R 4_5 Voltage divider resistor R 4_6 MOSFET M CS1 and MOSFET M CS2 ; The sources of MOSFETs M1, M5, M6, M7, and M8 are connected to the power supply voltage terminal V. DD The gate of MOSFET M1 is connected to the drain of MOSFET M1 and the source of MOSFET M2. The gate of MOSFET M2 is connected to the drain of MOSFET M2, the drain of MOSFET M3, and the gate of MOSFET M4; the gate of MOSFET M3 receives a reference voltage V. BG The drain of MOSFET M4 is connected to the gates of MOSFETs M5, M6, M7, and M8, and the output of operational amplifier OP1. The drain of MOSFET M5 is connected to one end of resistor R3, the emitter of transistor Q1, and the non-inverting input of operational amplifier OP1. The drain of MOSFET M6 is connected to one end of resistor R2, one end of resistor R1, and the inverting input of operational amplifier OP1, and outputs a temperature indication voltage V. CT The other end of resistor R2 is connected to the emitter of transistor Q2; the base of transistor Q1 is connected to the base of transistor Q2 and to ground GND; voltage divider resistor R 4_1 Voltage divider resistor R 4_2 Voltage divider resistor R 4_3 Voltage divider resistor R 4_4 Voltage divider resistor R 4_5 Voltage divider resistor R 4_6 The MOSFET M7 is connected in series, and the drain of the MOSFET M7 is connected to a voltage divider resistor R. 4_1 One end of the MOSFET is connected to the gate of MOSFET M3; the drain of MOSFET M8 is connected to the gate of MOSFET M4.CS1 The drain and output bias voltage V BUP ; MOS transistor M CS1 The source of the MOSFET is connected to the M CS2 The drain and gate and the output bias voltage V BDN ; The source of MOSFET M3, the source of MOSFET M4, the other end of resistor R3, the collector of transistor Q1, the collector of transistor Q2, the other end of resistor R1, and the voltage divider resistor R 4_6 The other end, MOSFET M CS2 The source terminal is connected to the ground terminal GND; MOSFET M7 and voltage divider resistor R 4_1 Output reference voltage V BG Voltage divider resistor R 4_1 and voltage divider resistor R 4_2 Output reference voltage V REFH2 Voltage divider resistor R 4_2 and voltage divider resistor R 4_3 Output reference voltage V REFH1 Voltage divider resistor R 4_3 and voltage divider resistor R 4_4 Output reference voltage V REFM Voltage divider resistor R 4_4 and voltage divider resistor R 4_5 Output reference voltage V REFL1 Voltage divider resistor R 4_5 and voltage divider resistor R 4_6 Output reference voltage V REFL2 .

[0007] In one embodiment of the present invention, the fourth-power current generating circuit includes differential amplifier A, differential amplifier B, differential amplifier C and differential amplifier D; Differential amplifiers A, B, C, and D each include a differential pair of transistors, a source negative feedback resistor, and a stacked NMOS tail current transistor. In the stacked NMOS tail current transistor, the source of one transistor is grounded, and the gate of the stacked NMOS tail current transistor is controlled by the bias voltage output from the temperature detection circuit. The drain is connected to the source negative feedback resistor. In each differential pair, the gate of one transistor receives the temperature indication voltage, the drain is connected to node N1, and the output is a combined current I. POUT The gate input of another transistor corresponds to the reference voltage, its drain is connected to node N2, and it outputs a combined current I. NOUT ; The reference voltages input to the differential amplifiers A, B, C, and D increase sequentially. In the differential amplifier C, the width-to-length ratio of the stacked NMOS tail current transistor is twice that of the stacked NMOS tail current transistor in other differential amplifiers, and the resistance value of the source negative feedback resistor is greater than that of the source negative feedback resistor in other differential amplifiers.

[0008] In one embodiment of the present invention, the fourth-power current generating circuit further includes a bias current branch; The bias current branch includes a MOSFET M G Resistance R G and with resistance R G A connected stacked NMOS tail current transistor; wherein, the MOS transistor M G The gate input corresponds to the reference voltage, the drain is connected to the node N2, and the source is connected to the resistor R. G The drain of the stacked NMOS tail current transistor is connected to the ground; the source of the stacked NMOS tail current transistor is grounded, and the gate is controlled by the bias voltage output by the temperature detection circuit. The differential amplifier A, the differential amplifier B, and the MOS transistor M G The gate voltage, the reference voltage input to the differential amplifier C, and the differential amplifier D increase sequentially, and the MOS transistor M... G The reference voltage at the gate input is equal to the value of the temperature indication voltage at the reference temperature.

[0009] In one embodiment of the present invention, the fourth-power current generating circuit further includes a current replication unit, the current replication unit including an operational amplifier OP2 and a resistor R. L1 Resistance R L2 and MOSFET M9; The resistor R L1 Connected to node N1 and power supply voltage terminal V DD Between; the resistor R L2 Connected to the power supply voltage terminal V DD Between the source of the MOS transistor M9 and the resistor R L1 The resistance value and the resistance R L2 The resistance values ​​are equal; The non-inverting input of operational amplifier OP2 is connected to node N1, the inverting input is connected to the source of MOSFET M9, and the output is connected to the gate of MOSFET M9; the drain of MOSFET M9 is connected to node N2, and the output current I... OUT4 =I POUT -I NOUT .

[0010] In one embodiment of the present invention, the fifth-power current generating circuit further includes, in addition to the fourth-power current generating circuit, a differential amplifier E and a differential amplifier F. Both differential amplifier E and differential amplifier F include differential pair transistors, source negative feedback resistors, and stacked NMOS tail current transistors connected to the source negative feedback resistors. In each stacked NMOS tail current transistor, the source of one transistor is grounded, and the gate of the stacked NMOS tail current transistor is controlled by the bias voltage output from the temperature detection circuit. The drain is connected to the source negative feedback resistor. In each differential pair transistor, the gate of one transistor receives the temperature indication voltage, the drain is connected to node N1, and the output is a combined current I. POUT The gate input of another transistor corresponds to the reference voltage, its drain is connected to node N2, and it outputs a combined current I. NOUT ; The reference voltages input to the differential amplifiers E, A, B, D, and F increase sequentially, and the reference voltage input to the differential amplifier B is equal to that input to the differential amplifier C.

[0011] In one embodiment of the present invention, the current synthesis and current-to-voltage conversion circuit includes an operational amplifier OP3 and a variable resistor R. V ; The non-inverting input terminal of the operational amplifier OP3 receives a reference voltage V. BG The fifth-power current I is input at the inverting input terminal. OUT5 The variable resistor R V One end is input with the fourth power current I OUT4 The inverting input of the operational amplifier OP3 is connected to the variable resistor R. V The input terminal of the operational amplifier OP3 is connected to the variable resistor R; the output terminal of the operational amplifier OP3 is connected to the variable resistor R. V The other end outputs a nonlinear compensation voltage signal V. OUT .

[0012] In one embodiment of the present invention, the voltage superposition circuit includes resistors R1, R2, and R... f and operational amplifier OP4; The resistor R2 and the resistor R f The resistor is connected in series; one end of the resistor R1 receives the temperature indication voltage, and the other end is connected to the inverting input of the operational amplifier OP4 and is also connected to the resistor R2 and the resistor R... f Between; the nonlinear compensation voltage signal is input to one end of the resistor R2; the reference voltage V is input to the non-inverting input terminal of the operational amplifier OP4. BG The output terminal is connected to the resistor R.f The output terminal outputs a compensation voltage signal V. C .

[0013] Compared with the prior art, the beneficial effects of the present invention are as follows: The crystal oscillator temperature compensation circuit of this invention effectively improves the frequency stability and compensation accuracy of the crystal oscillator over a wide temperature range by introducing fourth and fifth-order high-order temperature compensation mechanisms. Under different temperature conditions, the temperature compensation voltage has a good frequency compensation effect on the crystal oscillator. As the temperature changes, the relative frequency deviation caused by the temperature compensation voltage and the frequency deviation of the crystal resonator with temperature compensate for each other, thereby achieving relatively good temperature compensation performance. The residual relative frequency deviation results after mutual superposition show that the frequency stability of this temperature-compensated crystal oscillator can reach ±0.6ppm in the temperature range of -40~85℃, achieving good frequency temperature stability. Attached Figure Description

[0014] Figure 1 A schematic diagram of a crystal oscillator temperature compensation circuit based on current function generation is provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the temperature detection circuit structure provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the fourth-power current generating circuit provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the fifth-power current generating circuit provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the current synthesis and current-to-voltage conversion circuit provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the voltage superposition circuit provided in an embodiment of the present invention. Detailed Implementation

[0015] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0016] Example 1 Please see Figure 1 , Figure 1 This is a schematic diagram of a crystal oscillator temperature compensation circuit based on current function generation, provided in an embodiment of the present invention. The crystal oscillator temperature compensation circuit employs a direct synthesis scheme of higher-order function currents based on multiple differential pairs, introducing fourth- and fifth-order current generation mechanisms to eliminate residual higher-order temperature drift. Through the direct synthesis and conversion mechanism of higher-order currents, high-precision compensation is achieved over a wide temperature range while simplifying the circuit structure.

[0017] The crystal oscillator temperature compensation circuit includes: a temperature detection circuit, a function generation circuit, a current synthesis and current-to-voltage conversion circuit, and a voltage superposition circuit. The output of the temperature detection circuit is connected to the function generation circuit, used to output a temperature indication voltage that is linearly related to temperature changes, and to generate multiple reference voltages. The function generation circuit is connected to the temperature detection circuit and the current synthesis and current-to-voltage conversion circuit, including a fourth-order current generation circuit and a fifth-order current generation circuit, used to generate fourth-order and fifth-order currents based on multiple reference voltages respectively. The current synthesis and current-to-voltage conversion circuit is connected to the function generation circuit and the voltage superposition circuit, used to add the fourth-order and fifth-order currents and convert them into a nonlinear compensation voltage signal. The voltage superposition circuit is connected to both the current synthesis and current-to-voltage conversion circuit and the temperature detection circuit, used to superimpose the nonlinear compensation voltage signal with the temperature indication voltage to generate the final compensation voltage signal.

[0018] Please see Figure 2 , Figure 2 This is a schematic diagram of a temperature detection circuit structure provided in an embodiment of the present invention.

[0019] The temperature detection circuit includes a bandgap reference circuit and a primary voltage generation circuit. The bandgap reference circuit generates various reference voltages that do not change with temperature. The primary voltage generation circuit outputs a temperature indication voltage V that is linearly related to temperature. CT .

[0020] The temperature detection circuit includes: MOSFETs M1, M2, M3, M4, M5, M6, M7, and M8; resistors R1, R2, and R3; transistors Q1 and Q2; operational amplifier OP1; and voltage divider resistor R. 4_1 Voltage divider resistor R 4_2 Voltage divider resistor R 4_3 Voltage divider resistor R 4_4 Voltage divider resistor R 4_5 Voltage divider resistor R 4_6 MOSFET M CS1 and MOSFET M CS2 .

[0021] The sources of MOSFETs M1, M5, M6, M7, and M8 are connected to the power supply voltage terminal V. DD The gate of MOSFET M1 is connected to the drain of MOSFET M1 and the source of MOSFET M2; the gate of MOSFET M2 is connected to the drain of MOSFET M2, the drain of MOSFET M3, and the gate of MOSFET M4; the gate of MOSFET M3 receives the reference voltage V. BGThe drain of MOSFET M4 is connected to the gates of MOSFETs M5, M6, M7, and M8, and the output of operational amplifier OP1. The drain of MOSFET M5 is connected to one end of resistor R3, the emitter of transistor Q1, and the non-inverting input of operational amplifier OP1. The drain of MOSFET M6 is connected to one end of resistor R2, one end of resistor R1, and the inverting input of operational amplifier OP1, and outputs a temperature indication voltage V. CT The other end of resistor R2 is connected to the emitter of transistor Q2; the base of transistor Q1 is connected to the base of transistor Q2 and to ground GND; voltage divider resistor R 4_1 Voltage divider resistor R 4_2 Voltage divider resistor R 4_3 Voltage divider resistor R 4_4 Voltage divider resistor R 4_5 Voltage divider resistor R 4_6 In series, the drain of MOSFET M7 is connected to a voltage divider resistor R. 4_1 One end of the MOSFET is connected to the gate of MOSFET M3; the drain of MOSFET M8 is connected to the gate of MOSFET M4. CS1 The drain and output bias voltage V BUP ; MOS transistor M CS1 The source of the MOSFET is connected to the M CS2 The drain and gate and the output bias voltage V BDN The source of MOSFET M3, the source of MOSFET M4, the other end of resistor R3, the collector of transistor Q1, the collector of transistor Q2, the other end of resistor R1, and the voltage divider resistor R. 4_6 The other end, MOSFET M CS2 The source of the transistor is connected to ground (GND); MOSFET M7 and voltage divider resistor R 4_1 Output reference voltage V BG Voltage divider resistor R 4_1 and voltage divider resistor R 4_2 Output reference voltage V REFH2 Voltage divider resistor R 4_2 and voltage divider resistor R 4_3 Output reference voltage V REFH1 Voltage divider resistor R 4_3 and voltage divider resistor R 4_4 Output reference voltage V REFM Voltage divider resistor R 4_4 and voltage divider resistor R 4_5 Output reference voltage V REFL1 Voltage divider resistor R 4_5 and voltage divider resistor R 4_6 Output reference voltage V REFL2 .

[0022] In this embodiment, the bandgap reference circuit consists of a current mirror M7 and a long series of voltage divider resistors (R). 4_1 To R 4_6 The circuit is composed of resistors whose current ratios (Q1 and Q2) are designed so that the total current flowing through the series of resistors can achieve a zero temperature coefficient at a certain core temperature. The voltage at each tap is determined by the ratio of the resistor values, and they strictly satisfy the following relationship according to their potential from top to bottom: .

[0023] The function generation circuit mainly includes fourth-order and fifth-order current generation circuits, which are composed of multiple differential pairs, resistors and operational amplifiers.

[0024] Please see Figure 3 , Figure 3 This is a schematic diagram of the fourth-order current generation circuit provided in an embodiment of the present invention. The fourth-order current generation circuit includes differential amplifier A, differential amplifier B, differential amplifier C, and differential amplifier D; differential amplifiers A, B, C, and D each include a differential pair transistor, a source negative feedback resistor, and a stacked NMOS tail current transistor; wherein, the source of one transistor in the stacked NMOS tail current transistor is grounded, and the gate of the stacked NMOS tail current transistor is controlled by the bias voltage output by the temperature detection circuit, and the drain is connected to the source negative feedback resistor; in each differential pair transistor, the gate of one transistor receives the temperature indication voltage, the drain is connected to node N1, and the output is a combined current I. POUT The gate input of the other transistor corresponds to the reference voltage, its drain is connected to node N2, and its output is the combined current I. NOUT The reference voltages input to differential amplifiers A, B, C, and D increase sequentially. In differential amplifier C, the width-to-length ratio of the stacked NMOS tail current transistor is twice that of the stacked NMOS tail current transistors in the other differential amplifiers, and the resistance value of the source negative feedback resistor is greater than that of the source negative feedback resistor in the other differential amplifiers.

[0025] Specifically, amplifier A consists of differential pair transistors. , Source negative feedback resistor , and stacked NMOS tail current transistor , Composition; Amplifier B consists of differential pair transistors , Source negative feedback resistor , and stacked NMOS tail current transistor , Composition; Amplifier C consists of differential pair transistors , Source negative feedback resistor , and stacked NMOS tail current transistor , Composition; Amplifier D consists of differential pair transistors , Source negative feedback resistor , and stacked NMOS tail current transistor , Composition. The source of each stacked NMOS tail current transistor is grounded, and the two gates forming the current mirror are biased by voltage. , Control; the drains are connected to the sources of the differential pair transistors via their respective source negative feedback resistors. For the differential input gate voltage of each differential amplifier, the negative temperature coefficient voltage generated by the input temperature detection circuit is denoted as... The other end is input with a specific reference voltage, denoted as follows: , , , The relationship between the various reference voltages is as follows: The four differential pairs have a total of four current branches, among which... , , , The drain is connected to receive the flow. Node current , , , , The drain is connected to receive the flow. Node current The DC bias current of each amplifier is adjusted through the aspect ratio of this current mirror. The bias tail current transistor of amplifier C... , Its aspect ratio is twice that of other amplifiers. Furthermore, the source resistance is simultaneously increased. and This allows for a larger output current value and linear range for amplifier C, thereby effectively eliminating the first term in the total current.

[0026] Furthermore, the fourth-power current generation circuit also includes a bias current branch; the bias current branch includes a MOSFET M G Resistance R G and with resistance R G Connected stacked NMOS tail current transistor , Among them, MOS transistor M G The reference voltage corresponding to the gate input The drain is connected to node N2, and the source is connected to resistor R. G Connected to the drain of the stacked NMOS tail current transistor; the source of the stacked NMOS tail current transistor is grounded, forming the two gates of the current mirror, which are biased by the temperature detection circuit output bias voltage. , Separate control of: Differential Amplifier A, Differential Amplifier B, and MOSFET M G The reference voltages at the gate, differential amplifier C, and differential amplifier D increase sequentially, i.e. Among them, MOS transistor M G The reference voltage at the gate input equal to reference temperature Lower temperature indication voltage The value of .

[0027] Output current curve and , Superimposing these curves can produce a curve that approximates a quartic function, which is related to... and The center voltage is axisymmetric. Considering its concave-convex nature differs from even-order curves, two sets of current curves are introduced in the design. and To correct the output current curve from arrive ,from arrive The unevenness of the surface makes it closer to a fourth-order function. The circuit experiences a larger current in the central temperature range, therefore, [the following is introduced]... The transistor outputs a fixed bias current, eliminating unnecessary constant terms in the total output current. This circuit can achieve an approximate fourth-power current-voltage function relationship.

[0028] Furthermore, the fourth-power current generation circuit also includes a current replication unit, which includes an operational amplifier OP2 and a resistor R. L1 Resistance R L2 and MOSFET M9; resistor R L1 Connected to node N1 and power supply voltage terminal V DD Between; resistance R L2 Connected to the power supply voltage terminal V DD The resistor R between the source and the MOSFET M9; L1 The resistance value and resistance R L2 The resistance values ​​are equal; the non-inverting input of operational amplifier OP2 is connected to node N1, the inverting input is connected to the source of MOSFET M9, and the output is connected to the gate of MOSFET M9; the drain of MOSFET M9 is connected to node N2, and the output current I... OUT4 .

[0029] Specifically, in order to output a precise fourth-power current, Flow through nodes Resistance between the power supply and the power source The voltage input is connected to the non-inverting input of the two-stage operational amplifier OP2, and a resistor is connected between the inverting input of OP2 and the power supply. The gate of transistor M9 is connected to the output terminal of OP2, the source of M9 is connected to the power supply, and the drain is connected to... OP2 controls M9, in (equal Precise current replication is achieved on the device, thereby enabling the output current to be accurately replicated. The current is a current that varies with the voltage in the form of a fourth power function.

[0030] Please see Figure 4 , Figure 4 This is a schematic diagram of the fifth-order current generating circuit provided in an embodiment of the present invention. The fifth-order current generating circuit, based on the fourth-order current generating circuit, further includes differential amplifier E and differential amplifier F, thereby forming six pairs of differential circuits A to F.

[0031] Differential amplifiers E and F both include a differential pair of transistors, a source negative feedback resistor, and a stacked NMOS tail current transistor connected to the source negative feedback resistor. Differential amplifier E includes a differential pair of transistors. and Source negative feedback resistor and Stacked NMOS tail current transistor and The amplifier F includes differential pair transistors. and Source negative feedback resistor and Stacked NMOS tail current transistor and .

[0032] In this configuration, the source of one transistor in the stacked NMOS tail current transistor is grounded, and the gate of the stacked NMOS tail current transistor is controlled by the bias voltage output from the temperature detection circuit. The drain is connected to the source negative feedback resistor. In each differential pair transistor, the gate of one transistor receives the temperature indication voltage, the drain is connected to node N1, and the output is the combined current I. POUT The gate input of the other transistor corresponds to the reference voltage, its drain is connected to node N2, and its output is the combined current I. NOUT Specifically, the input differential pair transistor of E. and The gates are respectively connected to , F's input differential pair transistor pipe and The gates are respectively connected to , ; , The drain end and , , , The drain end is connected to Node, combined current is ; , The drain end and , , , , The drain end is connected to Node, combined current is .

[0033] The reference voltages input to differential amplifiers E, A, B, C, D, and F are respectively... It can be understood that the reference voltages input to differential amplifier B and differential amplifier C are equal, and both are input to... And the input reference voltage satisfies the following relationship: .

[0034] Similar to the fourth-power current generation circuit described above, by rationally designing the current ratio and reference voltage value in the fifth-power current generation circuit, and superimposing the output currents of the six differential pairs (A to F), a current that exhibits a fifth-power function of temperature change is obtained. Also similar to the fourth-power current generation circuit, the output current of the differential amplifier C is used to eliminate the first-power term in the total current.

[0035] Please see Figure 5 , Figure 5 This is a schematic diagram of the current synthesis and current-to-voltage conversion circuit provided in an embodiment of the present invention. The temperature-compensated current is generated by the fourth and fifth power current function generation circuits. After processing by the current synthesis and current-to-voltage conversion circuit, the fourth and fifth power currents are added together and converted into a nonlinear compensated voltage signal. .

[0036] Specifically, the current synthesis and current-to-voltage conversion circuit includes operational amplifier OP3 and variable resistor R. V The non-inverting input of operational amplifier OP3 receives a reference voltage V. BG The inverting input terminal receives a fifth-power current I. OUT5 Variable resistor R V One end is input with a fourth power current I OUT4A variable resistor R is connected to the inverting input of operational amplifier OP3. V The input terminal of the operational amplifier OP3 is connected to a variable resistor R. V The other end outputs a nonlinear compensation voltage signal V. OUT .

[0037] Please see Figure 6 , Figure 6 This is a schematic diagram of the voltage superposition circuit provided in an embodiment of the present invention. The voltage superposition circuit will... Linear voltage output by voltage and temperature detection circuit The summation ultimately produces a compensation voltage signal that is output to the voltage-controlled crystal oscillator. This enables temperature compensation for crystal oscillators over a wide temperature range.

[0038] Specifically, the voltage superposition circuit includes resistors R1, R2, and R... f And operational amplifier OP4; resistor R2 and resistor R f Series connection; one end of resistor R1 is connected to the temperature indication voltage, and the other end is connected to the inverting input of operational amplifier OP4 and then to resistors R2 and R... f Between; one end of resistor R2 is input with a nonlinear compensation voltage signal; the non-inverting input of operational amplifier OP4 is input with a reference voltage V. BG The output terminal is connected to a resistor R. f The output terminal outputs a compensation voltage signal V. C .

[0039] The crystal oscillator temperature compensation circuit based on current function generation provided in this embodiment uses fourth and fifth-order high-order function generation circuits to achieve high-precision temperature compensation for the controlled crystal oscillator. The function generation circuit module is mainly designed based on the nonlinear transduction relationship between the input voltage and output current of the differential amplifier. The fifth-order term originates from the Taylor expansion of the differential pair's large-signal transmission equation; the fourth-order term is synthesized by shifting and superimposing the output currents of multiple branches.

[0040] For the fifth term, Figure 4 Let's take differential amplifier A as an example. Its differential pair transistors are... , The structure is such that the drain currents of the two transistors are denoted as I. D1 with I D2 The tail current of the differential pair is I0, therefore:

[0041] The input differential voltage of the two transistors is the temperature sensing voltage. With reference voltage Difference:

[0042]

[0043] Where, μ p Let β be the hole mobility. Define the transconductance factor β = μ. p C ox W / L. (From V) SG,1 V SG,2 =ΔV id Solving the equations simultaneously with the above current relationships, we can obtain the large-signal transfer characteristics of the differential pair:

[0044] Expand the radical to the fifth order using Taylor series:

[0045] It can be seen that the output current of a single-stage differential pair affects ΔV id The expansion strictly contains only odd-order terms, and the coefficients of the first, third, and fifth-order terms are entirely determined by β and I0. Therefore, the fifth-order temperature compensation component required by this invention can be directly extracted from the differential output of differential amplifier A after mirroring. By connecting multiple differential amplifiers in parallel and cross-connecting their outputs, and by configuring the bias current and width-to-length ratio of different differential pairs, the first and third-order terms are made zero, thereby retaining and extracting the higher-order fifth-order nonlinear terms.

[0046] For the fourth term, two internal difference branches with reference voltages symmetrical about the center value are selected: one branch with voltage V REFL1 For reference, a line starting with V REFH1 For reference, both are relative to the center reference voltage V. REF0 The offsets are respectively V0 and +V0. The difference pair of the two branches at input V CT Under the same conditions, this is equivalent to shifting the same odd function left and right by V0 along the horizontal axis respectively. After flipping the differential output of one branch and connecting it to N1, we get:

[0047] Among them I odd (V) = a1V + a3V 3 +a5V 5 + For a single-branch Lucid function component, the coefficients of each order are given by the expansion in Section 1.

[0048] Expanding using the binomial theorem, all odd-power cross terms cancel each other out, while even-power cross terms are retained and doubled. The current at node N1 then consists only of even-function components.

[0049] in, For constant terms,

[0050] This invention further introduces two reference voltages V biased to the outermost side. REFL2 V REFH2 The outer difference branch, whose input pairs are in |ΔV id | When the depth is small, the cutoff occurs only when the temperature shift causes V to be smaller. CT It only enters the amplification region and injects significant current when it enters the neighborhood of its reference voltage. The equivalent contribution of the outer branch can be written as:

[0051] Its current merges with the internal branch at node N2. By designing the dimensions of each branch input pair so that K2′ ≈ K2, the quadratic term can be precisely canceled at the merging point, retaining only the fourth term, thereby achieving fourth-order feature fitting.

[0052] Furthermore, since the linear transconductance range of the differential amplifier determines the dynamic range of temperature compensation, negative feedback resistors were added to the sources of both differential pair transistors to expand the circuit's linear fitting capability over a wide temperature range. The generated temperature compensation current... Subsequently, it is converted into a high-order compensated voltage signal through direct current synthesis and current-to-voltage conversion circuit. Finally, the higher-order compensation voltage is added to the linear voltage output by the temperature detection circuit using an adder circuit. The values ​​are added proportionally to generate the final required control voltage. This enables high-precision temperature compensation for the controlled end of crystal oscillation.

[0053] This embodiment's crystal oscillator temperature compensation circuit effectively improves the frequency stability and compensation accuracy of the crystal oscillator over a wide temperature range by introducing fourth and fifth-order high-order temperature compensation mechanisms. Under different temperature conditions, the temperature compensation voltage provides good frequency compensation for the crystal oscillator. As the temperature changes, the relative frequency deviation introduced by the temperature compensation voltage and the frequency deviation of the crystal resonator with temperature compensate for each other, thus achieving relatively good temperature compensation performance. The residual relative frequency deviation results after mutual superposition show that, within the temperature range of -40~85℃, the frequency stability of this temperature-compensated crystal oscillator can reach ±0.6ppm, achieving good frequency temperature stability.

[0054] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A temperature compensation circuit for a crystal oscillator based on current function generation, characterized in that, include: The temperature detection circuit is used to output a temperature indication voltage that is linearly related to temperature changes, and to generate a variety of reference voltages. The function generation circuit, connected to the temperature detection circuit, includes a fourth-order current generation circuit and a fifth-order current generation circuit, used to generate fourth-order current and fifth-order current respectively based on the multiple reference voltages. A current synthesis and current-to-voltage conversion circuit, connected to the function generation circuit, is used to add the fourth-order current and the fifth-order current and convert them into a nonlinear compensation voltage signal. as well as, A voltage superposition circuit is connected to the current synthesis and current-to-voltage conversion circuit and the temperature detection circuit, respectively, and is used to superimpose the nonlinear compensation voltage signal with the temperature indication voltage to generate a compensation voltage signal.

2. The crystal oscillator temperature compensation circuit based on current function generation according to claim 1, characterized in that, The temperature detection circuit includes a bandgap reference circuit and a primary voltage generation circuit. The bandgap reference circuit is used to generate a variety of reference voltages that do not change with temperature, and the primary voltage generation circuit is used to output a temperature indication voltage that is linearly related to temperature.

3. The crystal oscillator temperature compensation circuit based on current function generation according to claim 2, characterized in that, The temperature detection circuit includes: MOSFETs M1, M2, M3, M4, M5, M6, M7, and M8; resistors R1, R2, and R3; transistors Q1 and Q2; operational amplifier OP1; and voltage divider resistor R. 4_1 Voltage divider resistor R 4_2 Voltage divider resistor R 4_3 Voltage divider resistor R 4_4 Voltage divider resistor R 4_5 Voltage divider resistor R 4_6 MOSFET M CS1 and MOSFET M CS2 ; The sources of MOSFETs M1, M5, M6, M7, and M8 are connected to the power supply voltage terminal V. DD The gate of MOSFET M1 is connected to the drain of MOSFET M1 and the source of MOSFET M2. The gate of MOSFET M2 is connected to the drain of MOSFET M2, the drain of MOSFET M3, and the gate of MOSFET M4; the gate of MOSFET M3 receives a reference voltage V. BG The drain of MOSFET M4 is connected to the gates of MOSFETs M5, M6, M7, and M8, and the output of operational amplifier OP1. The drain of MOSFET M5 is connected to one end of resistor R3, the emitter of transistor Q1, and the non-inverting input of operational amplifier OP1. The drain of MOSFET M6 is connected to one end of resistor R2, one end of resistor R1, and the inverting input of operational amplifier OP1, and outputs a temperature indication voltage V. CT The other end of resistor R2 is connected to the emitter of transistor Q2; the base of transistor Q1 is connected to the base of transistor Q2 and to ground GND; voltage divider resistor R 4_1 Voltage divider resistor R 4_2 Voltage divider resistor R 4_3 Voltage divider resistor R 4_4 Voltage divider resistor R 4_5 Voltage divider resistor R 4_6 In series, the drain of MOSFET M7 is connected to a voltage divider resistor R. 4_1 One end of the MOSFET is connected to the gate of MOSFET M3; the drain of MOSFET M8 is connected to the gate of MOSFET M4. CS1 The drain and output bias voltage V BUP ; MOS transistor M CS1 The source of the MOSFET is connected to the M CS2 The drain and gate and the output bias voltage V BDN ; The source of MOSFET M3, the source of MOSFET M4, the other end of resistor R3, the collector of transistor Q1, the collector of transistor Q2, the other end of resistor R1, and the voltage divider resistor R 4_6 The other end, MOSFET M CS2 The source terminal is connected to the ground terminal GND; MOSFET M7 and voltage divider resistor R 4_1 Output reference voltage V BG Voltage divider resistor R 4_1 and voltage divider resistor R 4_2 Output reference voltage V REFH2 Voltage divider resistor R 4_2 and voltage divider resistor R 4_3 Output reference voltage V REFH1 Voltage divider resistor R 4_3 and voltage divider resistor R 4_4 Output reference voltage V REFM Voltage divider resistor R 4_4 and voltage divider resistor R 4_5 Output reference voltage V REFL1 Voltage divider resistor R 4_5 and voltage divider resistor R 4_6 Output reference voltage V REFL2 .

4. The crystal oscillator temperature compensation circuit based on current function generation according to claim 1, characterized in that, The fourth-power current generating circuit includes differential amplifier A, differential amplifier B, differential amplifier C, and differential amplifier D; Differential amplifiers A, B, C, and D each include a differential pair of transistors, a source negative feedback resistor, and a stacked NMOS tail current transistor. In the stacked NMOS tail current transistor, the source of one transistor is grounded, and the gate of the stacked NMOS tail current transistor is controlled by the bias voltage output from the temperature detection circuit. The drain is connected to the source negative feedback resistor. In each differential pair, the gate of one transistor receives the temperature indication voltage, the drain is connected to node N1, and the output is a combined current I. POUT The gate input of another transistor corresponds to the reference voltage, its drain is connected to node N2, and it outputs a combined current I. NOUT ; The reference voltages input to the differential amplifiers A, B, C, and D increase sequentially. In the differential amplifier C, the width-to-length ratio of the stacked NMOS tail current transistor is twice that of the stacked NMOS tail current transistor in other differential amplifiers, and the resistance value of the source negative feedback resistor is greater than that of the source negative feedback resistor in other differential amplifiers.

5. The crystal oscillator temperature compensation circuit based on current function generation according to claim 4, characterized in that, The fourth-power current generating circuit also includes a bias current branch. The bias current branch includes a MOSFET M G Resistance R G and with resistance R G A connected stacked NMOS tail current transistor; wherein, the MOS transistor M G The gate input corresponds to the reference voltage, the drain is connected to the node N2, and the source is connected to the resistor R. G The drain of the stacked NMOS tail current transistor is connected to the ground; the source of the stacked NMOS tail current transistor is grounded, and the gate is controlled by the bias voltage output by the temperature detection circuit. The differential amplifier A, the differential amplifier B, and the MOS transistor M G The gate voltage, the reference voltage input to the differential amplifier C, and the differential amplifier D increase sequentially, and the MOS transistor M... G The reference voltage at the gate input is equal to the value of the temperature indication voltage at the reference temperature.

6. The crystal oscillator temperature compensation circuit based on current function generation according to claim 4, characterized in that, The fourth-power current generation circuit also includes a current replication unit, which includes an operational amplifier OP2 and a resistor R. L1 Resistance R L2 and MOSFET M9; The resistor R L1 Connected to node N1 and power supply voltage terminal V DD Between; the resistor R L2 Connected to the power supply voltage terminal V DD Between the source of the MOS transistor M9 and the resistor R L1 The resistance value and the resistance R L2 The resistance values ​​are equal; The non-inverting input of operational amplifier OP2 is connected to node N1, the inverting input is connected to the source of MOSFET M9, and the output is connected to the gate of MOSFET M9; the drain of MOSFET M9 is connected to node N2, and the output current I... OUT4 =I POUT -I NOUT .

7. The crystal oscillator temperature compensation circuit based on current function generation according to claim 4, characterized in that, The fifth-power current generating circuit further includes, in addition to, the fourth-power current generating circuit: a differential amplifier E and a differential amplifier F; Both differential amplifier E and differential amplifier F include differential pair transistors, source negative feedback resistors, and stacked NMOS tail current transistors connected to the source negative feedback resistors. In each stacked NMOS tail current transistor, the source of one transistor is grounded, and the gate of the stacked NMOS tail current transistor is controlled by the bias voltage output from the temperature detection circuit. The drain is connected to the source negative feedback resistor. In each differential pair transistor, the gate of one transistor receives the temperature indication voltage, the drain is connected to node N1, and the output is a combined current I. POUT The gate input of another transistor corresponds to the reference voltage, its drain is connected to node N2, and it outputs a combined current I. NOUT ; The reference voltages input to the differential amplifiers E, A, B, D, and F increase sequentially, and the reference voltage input to the differential amplifier B is equal to that input to the differential amplifier C.

8. The crystal oscillator temperature compensation circuit based on current function generation according to claim 1, characterized in that, The current synthesis and current-to-voltage conversion circuit includes an operational amplifier OP3 and a variable resistor R. V ; The non-inverting input terminal of the operational amplifier OP3 receives a reference voltage V. BG The fifth-power current I is input at the inverting input terminal. OUT5 The variable resistor R V One end is input with the fourth power current I OUT4 The inverting input of the operational amplifier OP3 is connected to the variable resistor R. V The input terminal of the operational amplifier OP3 is connected to the variable resistor R; the output terminal of the operational amplifier OP3 is connected to the variable resistor R. V The other end outputs a nonlinear compensation voltage signal V. OUT .

9. The crystal oscillator temperature compensation circuit based on current function generation according to claim 1, characterized in that, The voltage superposition circuit includes resistors R1, R2, and R... f and operational amplifier OP4; The resistor R2 and the resistor R f The resistor is connected in series; one end of the resistor R1 receives the temperature indication voltage, and the other end is connected to the inverting input of the operational amplifier OP4 and is also connected to the resistor R2 and the resistor R... f Between; the nonlinear compensation voltage signal is input to one end of the resistor R2; the reference voltage V is input to the non-inverting input terminal of the operational amplifier OP4. BG The output terminal is connected to the resistor R. f The output terminal outputs a compensation voltage signal V. C .

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